Class / Patent application number | Description | Number of patent applications / Date published |
257132000 | Five or more layer unidirectional structure | 7 |
20110186907 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A sinker layer is in contact with a first conductivity-type well and a second conductivity-type drift layer, respectively, and is separated from a first conductivity-type collector layer. A second conductivity-type diffusion layer (second second-conductivity-type high-concentration diffusion layer) is formed in the surface layer of the sinker layer. The second conductivity-type diffusion layer has a higher impurity concentration than that of the sinker layer. The second conductivity-type diffusion layer and the first conductivity-type collector layer are isolated from each other with an element isolation insulating film interposed therebetween. | 08-04-2011 |
20110220961 | SEMICONDUCTOR DEVICE - According to one embodiment, a semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third semiconductor region of the second conductivity type, a fourth semiconductor region of the first conductivity type, a first control electrode, a first main electrode, a fifth semiconductor region of the first conductivity type, a sixth semiconductor region of the second conductivity type, a second main electrode and a semiconductor element. The semiconductor element is connected between the first main electrode and the third semiconductor region. In addition, the semiconductor element includes a channel using part of the first semiconductor region and a second control electrode configured to control the channel on the one major surface of the first semiconductor region. | 09-15-2011 |
20120193675 | ESD Protection Device - Electrostatic discharge (ESD) protection is provided for discharging current between input and output nodes. In accordance with various embodiments, an ESD protection device includes an open-base transistor having an emitter connected to the input node and a collector connected to pass current to the output node via a resistor in response to a voltage at the input node exceeding a threshold that causes the transistor to break down. The resistor is coupled across emitter and collector regions of a second open-base transistor that is configured to turn on for passing current in response to the current across the resistor exceeding a threshold that applies a threshold breakdown voltage across the second transistor. In some implementations, an emitter and/or base of the second transistor are connected to, or are respectively the same region as, a base and a collector of the first transistor. | 08-02-2012 |
20150091049 | TRIODE - A triode includes a semiconductor, a deep n-well, a p-well, an n+ doping region, and a p+ doping region. The deep n-well is disposed adjacent to the semiconductor substrate. The p-well is included in the deep n-well and serves as a collector region of the triode. The n+ doping region serves as a base region of the triode. The p+ doping region serves as an emitter region of the triode. The deep n-well is coupled to the n+ doping region. | 04-02-2015 |
20150091050 | TRIODE - A triode includes a semiconductor, a deep n-well, a p-well, an n+ doping region, and a doping region. The deep n-well is disposed adjacent to the semiconductor substrate. The p-well is included in the deep n-well and serves as a collector region of the triode. The n+ doping region serves as a base region of the triode. The p+ doping region serves as an emitter region of the triode. The deep n-well is coupled to the n+ doping region via at least one conducting channel. | 04-02-2015 |
20150108538 | CHIP, ELECTROSTATIC DISCHARGE PROTECTION DEVICE AND FABRICATION THEREOF - An electrostatic discharge protection device is disclosed. The electrostatic discharge protection device comprises a N+ well, a P doping region, a first N doping region, a plurality of N sub-doping regions, a first N+ doping region, a first P+ doping region, a second N+ doping region, and a second doping region. The P doping region is disposed in the N+ well. The first N doping region is disposed in the P doping region. The plurality of N sub-doping regions is disposed in parallel in the P doping region. The first N+ doping region is disposed in the first N doping region. The first P+ doping region is disposed in the first N doping region. The second N+ doping region is disposed in the P doping region. | 04-23-2015 |
20160071964 | SEMICONDUCTOR DEVICE - A semiconductor device includes a first semiconductor region of a second conductivity type, and a second semiconductor region of a first conductivity type. A third semiconductor region of a first conductivity type is selectively provided on the second semiconductor region. A fourth semiconductor region of the first conductivity type and a fifth semiconductor region of the second conductivity type are selectively provided on the third semiconductor region. A first electrode is provided on a second insulating film within the second semiconductor region. A second electrode is in contact with the fifth semiconductor region and the third semiconductor region. The sixth semiconductor region is provided on the second semiconductor region at least in a portion thereon other than the area where the third semiconductor region is provided. The sixth semiconductor region is not in contact with the second electrode. | 03-10-2016 |