Class / Patent application number | Description | Number of patent applications / Date published |
257162000 | Lateral structure | 7 |
20080237632 | III-nitride power semiconductor device - A III-nitride power semiconductor device that includes a first III-nitride power semiconductor device and a second III-nitride power semiconductor device formed in a common semiconductor die and operatively integrated to form a half-bridge. | 10-02-2008 |
20090140290 | SEMICONDUCTOR COMPONENT INCLUDING A SHORT-CIRCUIT STRUCTURE - A semiconductor component including a short-circuit structure. One embodiment provides a semiconductor component having a semiconductor body composed of doped semiconductor material. The semiconductor body includes a first zone of a first conduction type and a second zone of a second conduction type, complementary to the first conduction type, the second zone adjoining the first zone. The first zone and the second zone are coupled to an electrically highly conductive layer. A connection zone of the second conduction type is arranged between the second zone and the electrically highly conductive layer. | 06-04-2009 |
20100163924 | LATERAL SILICON CONTROLLED RECTIFIER STRUCTURE - A lateral silicon controlled rectifier structure includes a P-type substrate; an N-well region in the P-type substrate; a first P | 07-01-2010 |
20110147794 | STRUCTURE AND METHOD FOR A SILICON CONTROLLED RECTIFIER (SCR) STRUCTURE FOR SOI TECHNOLOGY - A design structure is embodied in a machine readable medium for designing, manufacturing, or testing a design. The design structure includes a P+-N body diode and an N+-P body diode. The P+-N body diode and the N+-P body diode are laterally integrated. | 06-23-2011 |
20130285114 | TWIN-WELL LATERAL SILICON CONTROLLED RECTIFIER - A LSCR includes a substrate having a semiconductor surface which is p-doped. A first nwell and a second nwell spaced apart from one another are in the semiconductor surface by a lateral spacing distance. A first n+ diffusion region and a first p+ diffusion region are in the first nwell. A second n+ diffusion region is in the second nwell. A second p+ diffusion is between the first nwell and second nwell which provides a contact to the semiconductor surface. Dielectric isolation is between the first n+ diffusion region and first p+ diffusion region, along a periphery between the first nwell and the semiconductor surface, and along a periphery between the second nwell and the semiconductor surface. A resistor provides coupling between the second n+ diffusion region and second p+ diffusion. | 10-31-2013 |
20130292740 | SEMICONDUCTOR DEVICE - In a region located between a collector electrode and a semiconductor substrate, there are a portion where a hollow region is located and a portion where no hollow region is located. Between the collector electrode and the portion where no hollow region is located in the semiconductor substrate, a floating silicon layer electrically isolated by insulating films is formed. | 11-07-2013 |
20150115317 | PROTECTION DEVICES FOR PRECISION MIXED-SIGNAL ELECTRONIC CIRCUITS AND METHODS OF FORMING THE SAME - Apparatus and methods for precision mixed-signal electronic circuit protection are provided. In one embodiment, an apparatus includes a p-well, an n-well, a poly-active diode structure, a p-type active region, and an n-type active region. The poly-active diode structure is formed over the n-well, the p-type active region is formed in the n-well on a first side of the poly-active diode structure, and the n-type active region is formed along a boundary of the p-well and the n-well on a second side of the poly-active diode structure. During a transient electrical event the apparatus is configured to provide conduction paths through and underneath the poly-active diode structure to facilitate injection of carriers in the n-type active region. The protection device can further include another poly-active diode structure formed over the p-well to further enhance carrier injection into the n-type active region. | 04-30-2015 |