Class / Patent application number | Description | Number of patent applications / Date published |
332100000 | FREQUENCY SHIFT KEYING MODULATOR OR MINIMUM SHIFT KEYING MODULATOR | 11 |
20080204159 | Digital FM Modulator - Provided are apparatuses and methods for digital FM modulation. In one example, a message signal is integrated by an integrator to transform the message signal into a complex signal. The complex signal may include at least two complex components that may interfere to produce an FM modulated carrier signal. Hence, in this example, the method and apparatus for digital FM modulation may produce an FM modulated carrier signal without phase shifting. In another example, a lookup table is not necessary for modulation of the carrier signal. | 08-28-2008 |
20080297269 | FREQUENCY SHIFT KEYING MODULATOR HAVING SIGMA-DELTA MODULATED PHASE ROTATOR - A frequency shift keying modulator having sigma-delta modulated phase rotator is disclosed, which includes a phase-locked loop for generating a voltage-controlled signal; a multi-phase generator for receiving the voltage-controlled signal and generating N phase-shift signals having same frequency according to the voltage-controlled signal, the N phase-shift signals having a same phase shift between the phase-shift signals adjacent to each other; a sigma-delta modulator for receiving transmission data and randomly outputting a modulation bit at a modulation clock according to the transmission data; and a phase rotator for receiving the N phase-shift signals and selectively outputting one of the N phase-shift signals and a frequency-divided signal according to the modulation bit, wherein the frequency of the frequency-divided signal is 1/(1+n/N) of the frequency of any one of the N phase-shift signals. | 12-04-2008 |
20090021319 | FREQUENCY SHIFT KEYING MODULATOR AND APPLICATIONS THEREOF - An FSK modulator and applications thereof are disclosed. The FSK modulator comprises a phase-locked loop, a frequency divider module, an image rejection mixer and a summing module. The phase-locked loop is operably coupled to generate a first oscillation from a reference oscillation. The frequency divider module is operably coupled to divide the first oscillation to produce a second oscillation. The image-rejection mixer is operably coupled to mix the second oscillation with a low intermediate oscillation to produce a mixed data signal, and the summing module is operably coupled to sum the mixed data signal with the first oscillation to produce an FSK modulated signal. | 01-22-2009 |
20090027134 | WAVEFORM GENERATOR, WAVEFORM GENERATING DEVICE, TEST APPARATUS, AND MACHINE READABLE MEDIUM STORING A PROGRAM THREROF - There is provided a waveform generator for generating an analog signal, including a data changing section which changes an input data sequence, which is a sequence of binary data and which is to be modulated to the signal which the waveform generator should generate, to generate an after-change data sequence such that in the signal to be obtained by MSK modulation, a residual phase obtained by dividing an initial phase of the signal by 2π and a residual phase obtained by dividing a final phase of the signal by 2π are continuous, a waveform generating section which generates basic waveform data representing a waveform corresponding to the signal obtained by subjecting the after-change data sequence to MSK modulation, and an output section which outputs the signal repeating the waveform represented by the basic waveform data. | 01-29-2009 |
20090027135 | WAVEFORM GENERATOR, WAVEFORM GENERATING DEVICE, TEST APPARATUS, AND MACHINE READABLE MEDIUM STORING A PROGRAM THREROF - There is provided a waveform generator for generating an analog signal, including a data changing section which changes an input data sequence, which is to be modulated to the signal which the waveform generator should generate, to generate an after-change data sequence such that an initial phase and a final phase of the signal to be obtained by FSK modulation are continuous, a waveform generating section which generates basic waveform data representing a waveform corresponding to the signal obtained by subjecting the after-change data sequence to FSK modulation, and an output section which outputs the signal repeating the waveform represented by the basic waveform data. | 01-29-2009 |
20100194486 | TRANSMISSION MODULE - The invention relates to a transmission module for transmitting data in the form of useful digital signals by modulation of a carrier, determined by the useful signals, by means of frequency shift keying. The transmission module contains a PLL circuit with a voltage-controlled oscillator and a controllable frequency divider with a frequency divider control input. The transmission module is designed to induce direct frequency shift keying (DFSK) of the carrier signal by appropriate triggering of the frequency divider with at least two different frequency divider control signals, and it has a modulation data preprocessing unit, which is connected to the frequency divider control input and is designed to weight samples of the same polarity of the useful signals to be transmitted and to fine tune the frequency divider control signal with regard to the frequency deviation to be induced. | 08-05-2010 |
20140035692 | OPTIMIZED MULTI-LEVEL FINITE STATE MACHINE WITH REDUNDANT DC NODES - A method and system for eliminating/suppressing long transition runs over a communications channel is disclosed. The method may include providing modulation coding based on a multi-level finite state machine (ML-FSM) having a periodic structure, the periodic structure being defined by a predetermined number of time frames. The ML-FSM may include a plurality of penalty-free edges for connecting nodes in one time frame to nodes at the same level in a subsequent time frame and a plurality of penalty edges for connecting nodes in one time frame to nodes at an upper level in the subsequent time frame. The method may further include utilizing the ML-FSM based modulation coding to facilitate data transmission over the communications channel. | 02-06-2014 |
20150295569 | BINARY FREQUENCY SHIFT KEYING WITH DATA MODULATED IN DIGITAL DOMAIN AND CARRIER GENERATED FROM INTERMEDIATE FREQUENCY - Binary frequency shift keying modulation is implemented by choosing appropriate phases of a high frequency clock to generate a modulated intermediate clock frequency. The high frequency clock is chosen to be (M+0.5)*fc, where fc is the carrier frequency and M is an integer. Depending on the binary data ‘1’ or ‘0’ to be transmitted, ‘M’ or ‘M+1’ clock phases from the high frequency clock are converted to an intermediate clock that is 2*N times faster than the carrier frequency, where N is an integer. This intermediate clock, generated entirely in the digital domain, has the required data modulation in it, and is used to generate N pulse width modulated (PWM) phases of waveforms operating at the carrier frequency. The N phases are then weighed appropriately to synthesize a sine waveform whose lower harmonics are substantially suppressed. | 10-15-2015 |
20150318823 | DEMODULATION DEVICE, AND DEMODULATION INTEGRATED DEVICE AND MODULATION AND DEMODULATION INTEGRATED DEVICE USING THE SAME - A demodulation device according to the present invention includes a spin device configured to output an oscillation signal; a phase control unit configured to assign a predetermined phase locking characteristic to the spin device, thereby causing the oscillation signal to be tuned to a modulation signal that is input to the spin device; and a detector configured to demodulate the oscillation signal that is output by the spin device and tuned to the modulation signal, thereby restoring information carried on the oscillation signal. | 11-05-2015 |
332101000 | Including logic element (e.g., logic gate or flip-flop) | 2 |
20090096543 | MULTI-FORMAT ALL-DIGITAL MODULATOR AND METHOD - A method, system and digital modulator for modulation are provided The modulator includes a dividing mechanism for dividing a reference clock by a divide value to produce a modulated signal associated with at least one input data, and a control unit for providing at least one divide sequence to the dividing mechanism. The at least one divide sequence includes a sequence of one or more divide values. The divide value of the divide sequence is configurable and selectively provided to the dividing mechanism based on the at least one input data. The method includes configuring at least one divide sequence including a sequence of one or more divide values, and selecting a divide value from the at least one divide sequence based on at least one input data. The method includes dividing a reference clock by the selected divide value and generating a modulated signal based on the divide operation. The system for modulation-based commutations link includes a modulation unit having a dividing mechanism for dividing a reference clock by a divide value, and a configuration register for one or more configurable divide sequences. | 04-16-2009 |
20150358033 | TRELLIS CODED MODULATION - A trellis coded modulator and method for generating an encoded word from an input word. The TCM has a first logic branch configured to generate a data portion of the encoded word; and a second logic branch, coupled in parallel with the first logic branch, and configured to generate a corresponding parity portion of the encoded word sequentially after the generation of the data portion of the encoded word. | 12-10-2015 |