Entries |
Document | Title | Date |
20080206920 | PCRAM device with switching glass layer - A method of forming a memory device, such as a PCRAM, including selecting a chalcogenide glass backbone material for a resistance variable memory function and devices formed using such a method. | 08-28-2008 |
20080206921 | METHODS OF FORMING PHASE CHANGEABLE LAYERS INCLUDING PROTRUDING PORTIONS IN ELECTRODES THEREOF - A method of forming a structure in a phase changeable memory cell can include forming a bottom electrode having an interlayer dielectric layer thereon, the bottom electrode having a recess therein that extends beyond a boundary between the bottom electrode and the interlayer dielectric. A phase changeable layer can be formed in the recess including a protruding potion of the phase changeable layer that protrudes into the bottom electrode beyond the boundary. | 08-28-2008 |
20080206922 | Methods for Fabricating Multi-Terminal Phase Change Devices - Phase change devices, and particularly multi-terminal phase change devices, include first and second active terminals bridged together by a phase-change material whose conductivity can be modified in accordance with a control signal applied to a control electrode. This structure allows an application in which an electrical connection can be created between the two active terminals, with the control of the connection being effected using a separate terminal or terminals. Accordingly, the resistance of the heater element can be increased independently from the resistance of the path between the two active terminals. This allows the use of smaller heater elements thus requiring less current to create the same amount of Joule heating per unit area. The resistance of the heating element does not impact the total resistance of the phase change device. The programming control can be placed outside of the main signal path through the phase change device, reducing the impact of the associated capacitance and resistance of the device. | 08-28-2008 |
20080268568 | MATERIAL SIDEWALL DEPOSITION METHOD - A method of forming a layer of material on a sidewall of a via with good thickness control. The method involves forming a layer of material with a conventional deposition process. The material formed on a field region surrounding the via is removed with a sputter etch process. Another layer of material is deposited thereon, wherein the sputter etch-deposition cycle is repeated as necessary to achieve a desired sidewall thickness. With this method, the thickness of the material deposited on the sidewall is linearly dependent on the number of process cycles, thus providing good thickness control. The method may be used to form a resistance variable material, e.g., a phase-change material, on a via sidewall for use in a memory element. | 10-30-2008 |
20080268569 | PHASE-CHANGE MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME - Disclosed are a phase-change memory device and its manufacturing method, which can reduce a contact area between a bottom electrode and a phase-change layer, thereby reducing the quantity of current necessary for phase change. The phase-change memory device comprises: a bottom electrode formed on a contact plug; a phase-change layer formed on the bottom electrode and having a shape of a character ‘π’; and a top electrode formed on the phase-change layer. | 10-30-2008 |
20080274585 | SPACER ELECTRODE SMALL PIN PHASE CHANGE MEMORY RAM AND MANUFACTURING METHOD - A memory device comprising a first pan-shaped electrode having a side wall with a top side, a second pan-shaped electrode having a side wall with a top side and an insulating wall between the first side wall and the second side wall. The insulating wall has a thickness between the first and second side walls near the respective top sides. A bridge of memory material crosses the insulating wall, and defines an inter-electrode path between the first and second electrodes across the insulating wall. An array of such memory cells is provided. The bridges of memory material have sub-lithographic dimensions. | 11-06-2008 |
20080293183 | PHASE CHANGE MEMORY AND MANUFACTURING METHOD THEREOF - Even if sizes of storage cells are reduced in a phase change memory, properties of the respective storage cells can be set to be approximately equal to one another and a current amount required for phase change can be reduced sufficiently. The phase change memory includes at least a storage cell. The storage cell includes a first electrode, an electrically conductive portion provided on the first electrode and having at least two electrically conductive bodies with approximately the same shape provided on the first electrode, the electrically conductive bodies being spaced by a high resistance film with a high resistance, a recording layer provided on the electrically conductive portion and having phase change material which can change between a first phase state with a first specific resistance and a second phase state with a second specific resistance different from the first specific resistance, and a second electrode provided on the recording layer. | 11-27-2008 |
20080299701 | Front-end processing of nickel plated bond pads - A front-end method of fabricating nickel plated caps over copper bond pads used in a memory device. The method provides protection of the bond pads from an oxidizing atmosphere without exposing sensitive structures in the memory device to the copper during fabrication. | 12-04-2008 |
20080311699 | PHASE-CHANGE MEMORY AND FABRICATION METHOD THEREOF - A phase-change memory comprises a bottom electrode formed on a substrate. A first isolation layer is formed on the bottom electrode. A top electrode is formed on the isolation layer. A first phase-change material is formed in the first isolation layer, wherein the top electrode and the bottom electrode are electrically connected via the first phase-change material. Since the phase-change material can have a diameter less than the resolution limit of the photolithography process, an operating current for a state conversion of the phase-change material pattern may be reduced so as to decrease a power dissipation of the phase-change memory device. | 12-18-2008 |
20090004773 | METHODS OF FABRICATING MULTI-LAYER PHASE-CHANGEABLE MEMORY DEVICES - A phase-changeable memory device includes a phase-changeable material pattern and first and second electrodes electrically connected to the phase-changeable material pattern. The first and second electrodes are configured to provide an electrical signal to the phase-changeable material pattern. The phase-changeable material pattern includes a first phase-changeable material layer and a second phase-changeable material layer. The first and second phase-changeable material patterns have different chemical, physical, and/or electrical characteristics. For example, the second phase-changeable material layer may have a greater resistivity than the first phase-changeable material layer. For instance, the first phase-changeable material layer may include nitrogen at a first concentration, and the second phase-changeable material layer may include nitrogen at a second concentration that is greater than the first concentration. Related devices and fabrication methods are also discussed. | 01-01-2009 |
20090017577 | Methods of Forming Phase Change Memory Devices Having Bottom Electrodes - Phase change memory devices can have bottom patterns on a substrate. Line-shaped or L-shaped bottom electrodes can be formed in contact with respective bottom patterns on a substrate and to have top surfaces defined by dimensions in x and y axes directions on the substrate. The dimension along the x-axis of the top surface of the bottom electrodes has less width than a resolution limit of a photolithography process used to fabricate the phase change memory device. Phase change patterns can be formed in contact with the top surface of the bottom electrodes to have a greater width than each of the dimensions in the x and y axes directions of the top surface of the bottom electrodes and top electrodes can be formed on the phase change patterns, wherein the line shape or the L shape represents a sectional line shape or a sectional L shape of the bottom electrodes in the x-axis direction. | 01-15-2009 |
20090023242 | VACUUM JACKET FOR PHASE CHANGE MEMORY ELEMENT - A memory device including a phase change element and a vacuum jacket. The device includes a first electrode element; a phase change element in contact with the first electrode element; an upper electrode element in contact with the phase change element; a bit line electrode in contact with the upper electrode element; and a dielectric fill layer surrounding the phase change element and the upper electrode element, spaced from the same and sealed by the bit line electrode to define a vacuum jacket around the phase change element and upper electrode element. | 01-22-2009 |
20090042335 | VERTICAL SIDE WALL ACTIVE PIN STRUCTURES IN A PHASE CHANGE MEMORY AND MANUFACTURING METHODS - A programmable resistor memory, such as a phase change memory, with a memory element comprising narrow vertical side wall active pins is described. The side wall active pins comprise a programmable resistive material, such as a phase change material. In a first aspect of the invention, a method of forming a memory cell is described which comprises forming a stack comprising a first electrode having a principal surface with a perimeter, an insulating layer overlying a portion of the principal surface of the first electrode, and a second electrode vertically separated from the first electrode and overlying the insulating layer. Side walls on the insulating layer and on the second electrode are positioned over the principle surface of the first electrode with a lateral offset from the perimeter of the first electrode. | 02-12-2009 |
20090075420 | METHOD OF FORMING CHALCOGENIDE LAYER INCLUDING TE AND METHOD OF FABRICATING PHASE-CHANGE MEMORY DEVICE - The method of forming a Te-containing chalcogenide layer includes radicalizing a first source that contains Te to form a radicalized Te source, and forming a Te-containing chalcogenide layer by supplying the radicalized Te source into a reaction chamber. A method fabricating a phase change memory device includes loading a substrate on which a lower electrode is formed into a reaction chamber, radicalizing a first source that contains Te to form a radicalized Te source, forming a phase change material film containing Te on the lower electrode by supplying the radicalized Te source into the reaction chamber, and forming an upper electrode on the phase change material film. | 03-19-2009 |
20090081825 | Phase change memory device and method for fabricating - A phase change memory device is provided. The phase change memory device includes a substrate with a first electrode layer formed thereon. A first phase change memory structure is on the first electrode layer and electrically connected to the first electrode layer. A second phase change memory structure is on the first phase change memory structure and electrically connected to the first phase change memory structure, wherein the first or second phase change memory structure includes a cup-shaped heating electrode. A first insulating layer covers a portion of the cup-shaped heating electrode along a first direction. A first electrode structure covers a portion of the first insulating layer and the cup-shaped heating electrode along a second direction. The first electrode structure includes a pair of phase change material sidewalls on a pair of sidewalls of the first electrode structure and covering a portion of the cup-shaped heating electrode. | 03-26-2009 |
20090087945 | Phase change memory cell with roundless micro-trenches - A method for constructing a phase change memory device includes forming a first dielectric layer on a substrate; forming a first conductive component in the first dielectric layer; forming a second dielectric layer over the first conductive component in the first dielectric layer; forming a conductive crown in the second dielectric layer, the conductive crown being in contact and alignment with the conductive component; depositing a third dielectric layer in the conductive crown; and forming a trench filled with chalcogenic materials having an amorphous phase and a crystalline phase programmable by controlling a temperature thereof to represent logic states, wherein the trench extends across the conductive crown, such that the trench is free from a rounded end portion caused by lithography during fabrication of the phase change memory device. | 04-02-2009 |
20090093083 | METHOD OF DEPOSITING CHALCOGENIDE FILM FOR PHASE-CHANGE MEMORY - Provided is a method of depositing a chalcogenide film for phase-change memory. When the chalcogenide film for phase-change memory is deposited through a method using plasma such as plasma enhanced chemical vapor deposition (PECVD) or plasma enhanced atomic layer deposition (PEALD), a plasma reaction gas including He is used such that the crystallinity of the chalcogenide film is adjusted and the grain size and morphology of the deposited film are adjusted. | 04-09-2009 |
20090098681 | PROCESS FOR MANUFACTURING A CBRAM MEMORY HAVING ENHANCED RELIABILITY - The invention relates to a process for manufacturing a plurality of CBRAM memories, each comprising a memory cell in a chalcogenide solid electrolyte, an anode, and a cathode, the process comprising implementing a sublayer of a high thermal conductivity material, higher than 1.3 W/m/K, which covers the set of contacts, then providing, on said sublayer, a triple layer comprising a chalcogenide layer, then an anodic layer, and a layer with second contacts ( | 04-16-2009 |
20090111212 | Method and apparatus for chalcogenide device formation - Chalcogenide devices are delineated and sidewalls of the devices are sealed, in an anaerobic and/or anhydrous environment environment. Throughout the delineation and sealing steps, and any intervening steps, the sidewalls are not exposed to oxygen or water. In an illustrative embodiment, a cluster tool includes an etching tool and a sealing/deposition tool configured to etch and seal the chalcogenide devices and to maintain the devices in an anaerobic and/or anhydrous environment throughout the process. | 04-30-2009 |
20090124041 | RESISTANCE VARIABLE MEMORY DEVICE WITH NANOPARTICLE ELECTRODE AND METHOD OF FABRICATION - A chalcogenide-based programmable conductor memory device and method of forming the device, wherein a nanoparticle is provided between an electrode and a chalcogenide glass region. The method of forming the nanoparticle utilizes a template over the electrode or random deposition of the nanoparticle. | 05-14-2009 |
20090130797 | METHODS OF FORMING PHASE-CHANGEABLE MEMORY DEVICES USING GROWTH-ENHANCING AND GROWTH-INHIBITING LAYERS FOR PHASE-CHANGEABLE MATERIALS - Methods of forming phase-changeable memory devices include techniques to inhibit void formation in phase-changeable materials in order to increase device reliability. These techniques to inhibit void formation use an electrically insulating growth-inhibiting layer to guide the formation of a phase-changeable material region within a memory cell (e.g., PRAM cell). In particular, methods of forming an integrated circuit memory device include forming an interlayer insulating layer having an opening therein, on a substrate, and then lining sidewalls of the opening with a seed layer (i.e., growth-enhancing layer) that supports growth of a phase-changeable material thereon. An electrically insulating growth-inhibiting layer is then selectively formed on a portion of the interlayer insulating layer surrounding the opening. The formation of the growth-inhibiting layer is followed by a step to selectively grow a phase-changeable material region in the opening, but not on the growth-inhibiting layer. | 05-21-2009 |
20090137081 | PHASE CHANGE RAM DEVICE AND METHOD FOR MANUFACTURING THE SAME - A phase change RAM device includes a semiconductor substrate having a phase change cell area and a voltage application area; a first oxide layer, a nitride layer and a second oxide layer sequentially formed on the semiconductor substrate; a first plug formed in the first oxide layer, the nitride layer and the second oxide layer of the phase change cell area; a second plug formed in the first oxide layer and the nitride layer of the voltage application area; a conductive line formed in the second oxide layer; a third oxide layer formed on the second oxide layer; a lower electrode shaped like a plug, the lower electrode being formed so as to directly make contact with the first plug; and a phase change layer and an upper electrode sequentially formed on the lower electrode in a pattern form. | 05-28-2009 |
20090142881 | Tellurium (Te) Precursors for Making Phase Change Memory Materials - Tellurium (Te)-containing precursors, Te containing chalcogenide phase change materials are disclosed in the specification. A method of making Te containing chalcogenide phase change materials using ALD, CVD or cyclic CVD process is also disclosed in the specification in which at least one of the disclosed tellurium (Te)-containing precursors is introduced to the process. | 06-04-2009 |
20090142882 | Phase Change Memories With Improved Programming Characteristics - A phase change memory may be made with improved speed and stable characteristics over extended cycling. The alloy may be selected by looking at alloys that become stuck in either the set or the reset state and finding a median or intermediate composition that achieves better cycling performance. Such alloys may also experience faster programming and may have set and reset programming speeds that are substantially similar. | 06-04-2009 |
20090148980 | METHOD FOR FORMING PHASE-CHANGE MEMORY ELEMENT - A method for forming a phase-change memory element. The method includes providing a substrate with an electrode formed thereon; sequentially forming a conductive layer and a first dielectric layer on the substrate; forming a patterned photoresist layer on the first dielectric layer; subjecting the patterned photoresist layer to a trimming process, remaining a photoresist pillar; etching the first dielectric layer with the photoresist pillar as etching mask, remaining a dielectric pillar; comformally forming a first phase-change material layer on the conductive layer and the dielectric pillar to cover the top surface and side walls of the dielectric pillar; forming a second dielectric layer to cover the first phase-change material layer; subjecting to the second dielectric layer and the first phase-change material layer to a planarization until exposing the top surface of the dielectric pillar; and forming a second phase-change material layer on the second dielectric layer. | 06-11-2009 |
20090148981 | METHOD FOR FORMING SELF-ALIGNED THERMAL ISOLATION CELL FOR A VARIABLE RESISTANCE MEMORY ARRAY - A non-volatile memory with a self-aligned RRAM element includes a lower electrode element, generally planar in form, having an inner contact surface; an upper electrode element, spaced from the lower electrode element; a containment structure extends between the upper electrode element and the lower electrode element, with a sidewall spacer element having a generally funnel-shaped central cavity with a central aperture; and a spandrel element positioned between the sidewall spacer element and the lower electrode. A RRAM element extends between the lower electrode element and the upper electrode, occupying at least a portion of the sidewall spacer element central cavity and projecting from the sidewall spacer terminal edge toward and making contact with the lower electrode. In this manner, the spandrel element inner surface is spaced from the RRAM element to define a thermal isolation cell adjacent the RRAM element. | 06-11-2009 |
20090162973 | GERMANIUM PRECURSORS FOR GST FILM DEPOSITION - A method for depositing a germanium containing film on a substrate is disclosed. A reactor, and at least one substrate disposed in the reactor, are provided. A germanium containing precursor is provided and introduced into the reactor, which is maintained at a temperature of at least 100° C. Germanium is deposited onto the substrate through a deposition process to form a thin film on the substrate. | 06-25-2009 |
20090215224 | COATING METHODS AND APPARATUS FOR MAKING A CIGS SOLAR CELL - A method for manufacturing a thin film solar cell involves applying an inductively-coupled-plasma during the deposition of selenium. A precursor thin film is formed. The precursor thin film can include copper, indium, and gallium. The inductively-coupled-plasma is applied to the selenium as the selenium is deposited into the precursor thin film to produce the thin film. The selenium is deposited into precursor thin film by evaporation, sputtering, or using a reactive gas. An inert gas is used as a carry and discharge gas. The precursor thin film and the selenium are deposited using a deposition system. The deposition system includes an inductively-coupled-plasma device. The inductively-coupled-plasma device includes a quartz plate, a plasma discharge coil, and an inlet system. The deposition can be an in-line system, a roll-to-roll system, or a hybrid system. | 08-27-2009 |
20090215225 | TELLURIUM COMPOUNDS USEFUL FOR DEPOSITION OF TELLURIUM CONTAINING MATERIALS - Precursors for use in depositing tellurium-containing films on substrates such as wafers or other microelectronic device substrates, as well as associated processes of making and using such precursors, and source packages of such precursors. The precursors are useful for deposition of chalcogenide thin films in the manufacture of nonvolatile Phase Change Memory (PCM), by deposition techniques such as chemical vapor deposition (CVD) and atomic layer deposition (ALD). | 08-27-2009 |
20090239334 | ELECTRODE FORMED IN APERTURE DEFINED BY A COPOLYMER MASK - A method of manufacturing a memory device is provided that in one embodiment includes providing an interlevel dielectric layer including a first via containing a memory material; forming at least one insulating layer on an upper surface of the memory material and the interlevel dielectric layer; forming an cavity through a portion of a thickness of the at least one insulating layer; forming a copolymer mask in at least the cavity, the copolymer mask including at least one opening that provides an exposed surface of a remaining portion of the at least one insulating layer that overlies the memory material; etching the exposed surface of the remaining portion of the at least one insulating layer to provide a second via to the memory material; and forming a conductive material within the second via in electrical contact with the memory material. | 09-24-2009 |
20090263934 | METHODS OF FORMING CHALCOGENIDE FILMS AND METHODS OF MANUFACTURING MEMORY DEVICES USING THE SAME - A method of forming a chalcogenide film is provided which includes forming a germanium film on a substrate by exposing the substrate to a germanium source and a first antimony source, and growing a polynary film from the germanium film by exposing the germanium film to at least one of a tellurium source and a second antimony source. | 10-22-2009 |
20090275168 | PHASE CHANGE MATERIAL WITH FILAMENT ELECTRODE - The present invention, in one embodiment, provides a memory device that includes a phase change memory cell; a first electrode; and a layer of filamentary resistor material positioned between the phase change memory cell and the first electrode, wherein at least one bistable conductive filamentary pathway is present in at least a portion of the layer of filamentary resistor material that provides electrical communication between the phase change memory cell and the first electrode. | 11-05-2009 |
20090280598 | Formation of Copper-Indium-Selenide and/or Copper-Indium-Gallium-Selenide Films from Indium Selenide and Copper Selenide Precursors - Liquid-based indium selenide and copper selenide precursors, including copper-organoselenides, particulate copper selenide suspensions, copper selenide ethylene diamine in liquid solvent, nanoparticlulate indium selenide suspensions, and indium selenide ethylene diamine coordination compounds in solvent, are used to form crystalline copper-indium-selenide, and/or copper indium galium selenide films ( | 11-12-2009 |
20090280599 | PHASE CHANGE MEMORY DEVICE AND METHOD OF FABRICATION - A phase change memory device includes a bottom electrode on a substrate, a phase change material pattern on the bottom electrode, and a top electrode on the phase change material pattern. The phase change material pattern includes at least 50 percent antimony (Sb). | 11-12-2009 |
20090286350 | Nonvolatile Memory Cell Comprising a Chalcogenide and a Transition Metal Oxide - A memory cell for use in integrated circuits comprises a chalcogenide feature and a transition metal oxide feature. Both the chalcogenide feature and transition metal oxide feature each have at least two stable electrical resistance states. At least two bits of data can be concurrently stored in the memory cell by placing the chalcogenide feature into one of its stable electrical resistance states and by placing the transition metal oxide feature into one of its stable electrical resistance states. | 11-19-2009 |
20090291522 | LAYOUT STRUCTURE IN SEMICONDUCTOR MEMORY DEVICE COMPRISING GLOBAL WORD LINES, LOCAL WORD LINES, GLOBAL BIT LINES AND LOCAL BIT LINES - A line layout structure and method in a semiconductor memory device having a hierarchical structure are provided. In a semiconductor memory device having a global word line and a local word line, and a global bit line and a local bit line, and individually disposing all of the global word line, the local word line, the global bit line and the local bit line at conductive layers among at least three layers; at least two of the global word line, the local word line, the global bit line and the local bit line are together disposed in parallel on one conductive layer. Signal lines constituting a semiconductor memory device are disposed in a hierarchical structure, whereby a semiconductor memory device advantageously having high integration, high speed and high performance may be obtained. | 11-26-2009 |
20090298222 | Method for manufacturing Chalcogenide devices - A method of chalcogenide device formation includes treatment of the surface upon which the chalcogenide material is deposited. The treatment reduces or eliminates native oxides and other contaminants from the surface, thereby increasing the adhesion of the chalcogenide layer to the treated surface, eliminating voids between the chalcogenide layer and deposition surface and reducing the degradation of chalcogenide material due to the migration of contaminants into the chalcogenide. | 12-03-2009 |
20090298223 | SELF-ALIGNED IN-CONTACT PHASE CHANGE MEMORY DEVICE - A memory cell and a method of making the same, that includes insulating material deposited on a substrate, a bottom electrode formed within the insulating material, a plurality of insulating layers deposited above the bottom electrode and at least one of which acts as an intermediate insulating layer. Then defining a via in the insulating layers above the intermediate insulating layer, creating a channel for etch with a step spacer, defining a pore in the intermediate insulating layer, removing all insulating layers above the intermediate insulating layer, filling the entirety of the pore with phase change material, and forming an upper electrode above the phase change material. Additionally, the formation of bit line connections with the upper electrode. | 12-03-2009 |
20090298224 | Memory and Access Device and Method Therefor - Briefly, in accordance with an embodiment of the invention, a memory and a method to manufacture the memory is provided. The memory may include a phase change material over a substrate. The memory may further include a switching material coupled to the phase change material, wherein the switching material comprises a chalcogen other than oxygen and wherein the switching material and the phase change material form portions of a vertical structure over the substrate. | 12-03-2009 |
20090305458 | ANTIMONY AND GERMANIUM COMPLEXES USEFUL FOR CVD/ALD OF METAL THIN FILMS - Antimony, germanium and tellurium precursors useful for CVD/ALD of corresponding metal-containing thin films are described, along with compositions including such precursors, methods of making such precursors, and films and microelectronic device products manufactured using such precursors, as well as corresponding manufacturing methods. The precursors of the invention are useful for forming germanium-antimony-tellurium (GST) films and microelectronic device products, such as phase change memory devices, including such films. | 12-10-2009 |
20090305459 | Methods of Splitting CdZnTe Layers from CdZnTe Substrates for the Growth of HgCdTe - Methods of producing CdZnTe (CZT) layers for the epitaxial growth of HgCdTe thereon include implanting ions into a CZT substrate at a low temperature to form a damaged layer underneath a CZT surface layer, bonding a wafer to the CZT substrate about the CZT surface layer using a bonding material, and, annealing the CZT substrate for a time sufficient to facilitate the splitting of the CZT substrate at the damaged layer from the CZT surface layer. | 12-10-2009 |
20090305460 | Programmable Via Devices with Air Gap Isolation - Programmable via devices and methods for the fabrication thereof are provided. In one aspect, a programmable via device is provided. The programmable via device comprises a first dielectric layer; a heater over the first dielectric layer; an air gap separating at least a portion of the heater from the first dielectric layer; an isolation layer over the first dielectric layer covering at least a portion of the heater; a capping layer over a side of the isolation layer opposite the first dielectric layer; at least one programmable via extending through the capping layer and at least a portion of the isolation layer and in contact with the heater, the programmable via comprising at least one phase change material; a conductive cap over the programmable via; a second dielectric layer over a side of the capping layer opposite the isolation layer; a first conductive via and a second conductive via, each extending through the second dielectric layer, the capping layer and at least a portion of the isolation layer and in contact with the heater; and a third conductive via extending through the second dielectric layer and in contact with the conductive cap. | 12-10-2009 |
20100015757 | BRIDGE RESISTANCE RANDOM ACCESS MEMORY DEVICE AND METHOD WITH A SINGULAR CONTACT STRUCTURE - A resistance random access memory in a bridge structure is disclosed that comprises a contact structure where first and second electrodes are located within the contact structure. The first electrode has a circumferential extending shape, such as an annular shape, surrounding an inner wall of the contact structure. The second electrode is located within an interior of the circumferential extending shape and separated from the first electrode by an insulating material. A resistance memory bridge is in contact with an edge surface of the first and second electrodes. The first electrode in the contact structure is connected to a transistor and the second electrode in the contact structure is connected to a bit line. A bit line is connected to the second electrode by a self-aligning process. | 01-21-2010 |
20100022049 | Mid-IR Microchip Laser: ZnS:Cr2+ Laser with Saturable Absorber Material - A method of fabrication of laser gain material and utilization of such media includes the steps of introducing a transitional metal, preferably Cr | 01-28-2010 |
20100029042 | MEMORY CELL DEVICE WITH COPLANAR ELECTRODE SURFACE AND METHOD - A memory device described herein includes a bit line having a top surface and a plurality of vias. The device includes a plurality of first electrodes each having top surfaces coplanar with the top surface of the bit line, the first electrodes extending through corresponding vias in the bit line. An insulating member is within each via and has an annular shape with a thickness between the corresponding first electrode and a portion of the bit line acting as a second electrode. A layer of memory material extends across the insulating members to contact the top surfaces of the bit line and the first electrodes. | 02-04-2010 |
20100047960 | METHOD OF FABRICATING A PHASE-CHANGE MEMORY - A phase-change memory comprises a bottom electrode formed on a substrate. A first isolation layer is formed on the bottom electrode. A top electrode is formed on the isolation layer. A first phase-change material is formed in the first isolation layer, wherein the top electrode and the bottom electrode are electrically connected via the first phase-change material. Since the phase-change material can have a diameter less than the resolution limit of the photolithography process, an operating current for a state conversion of the phase-change material pattern may be reduced so as to decrease a power dissipation of the phase-change memory device. | 02-25-2010 |
20100055829 | APPARATUS AND METHODS FOR FORMING PHASE CHANGE LAYER AND METHOD OF MANUFACTURING PHASE CHANGE MEMORY DEVICE - Provided are apparatus and methods for forming phase change layers, and methods of manufacturing a phase change memory device. A source material is supplied to a reaction chamber, and purges from the chamber. A pressure of the chamber is varied according to the supply of the source material and the purge of the source material. | 03-04-2010 |
20100055830 | I-SHAPED PHASE CHANGE MEMORY CELL - A memory device includes two electrodes, vertically separated and having mutually opposed contact surfaces, between which lies a phase change cell. The phase change cell includes an upper phase change member, having a contact surface in electrical contact with the first electrode; a lower phase change member, having a contact surface in electrical contact with the second electrode; and a kernel member disposed between and in electrical contact with the upper and lower phase change members. The phase change cell is formed of material having at least two solid phases, and the lateral extent of the upper and lower phase change members is substantially greater than that of the kernel member. An intermediate insulating layer is disposed between the upper and lower phase change members adjacent to the kernel member. | 03-04-2010 |
20100055831 | PHASE CHANGEABLE MEMORY CELL ARRAY REGION AND METHOD OF FORMING THE SAME - A phase changeable memory cell array region includes a lower interlayer insulating layer disposed on a semiconductor substrate. The region also includes a plurality of conductive plugs disposed through the lower interlayer insulating layer. The region also includes a phase changeable material pattern operably disposed on the lower interlayer insulating layer, the phase changeable pattern covering at least two of the plurality of conductive plugs, wherein the phase changeable material pattern includes a plurality of first regions in contact with one or more of the plurality of conductive plugs and at least one second region interposed between the plurality of the first regions, wherein the at least one second region has a lower thermal conductivity than the plurality of first regions. The phase changeable memory cell array region also includes an upper interlayer insulating layer covering at least one of the phase changeable material pattern and the lower interlayer insulating layer. The region also includes conductive patterns disposed through the upper interlayer insulating layer and electrically connected to a plurality of predetermined regions of the plurality of first regions. | 03-04-2010 |
20100062562 | Methods Utilizing Microwave Radiation During Formation Of Semiconductor Constructions - Some embodiments include methods in which microwave radiation is used to activate dopant and/or increase crystallinity of semiconductor material during formation of a semiconductor construction. In some embodiments, the microwave radiation has a frequency of about 5.8 gigahertz, and a temperature of the semiconductor construction does not exceed about 500° C. during the exposure to the microwave radiation. | 03-11-2010 |
20100081231 | METHOD FOR FORMING SEMICONDUCTOR THIN FILM AND METHOD FOR MANUFACTURING ELECTRONIC DEVICE - A method for forming a semiconductor thin film includes the steps of applying an inorganic semiconductor fine particle-dispersion solution on a substrate and drying the coating to form a semiconductor fine particle layer, and immersing the semiconductor fine particle layer in a solution to form a semiconductor thin film. | 04-01-2010 |
20100093130 | Methods of forming multi-level cell of semiconductor memory - Provided is a method of forming a semiconductor memory cell in which in order to store two bits or more data in a memory cell, three or more bottom electrode contacts (BECs) and phase-change materials (GST) have a parallel structure on a single contact plug (CP) and set resistances are changed depending on thicknesses (S), lengths (L) or resistivities (ρ) of the three or more bottom electrode contacts, so that a reset resistance and three different set resistances enable data other than in set and reset states to be stored. Also, a method of forming a memory cell in which three or more phase-change materials (GST) have a parallel structure on a single bottom electrode contact, and the phase-change materials have different set resistances depending on composition ratio or type, so that four or more different resistances can be implemented is provided. | 04-15-2010 |
20100112752 | Method of manufacturing a variable resistance structure and method of manufacturing a phase-change memory device using the same - In methods of manufacturing a variable resistance structure and a phase-change memory device, after forming a first insulation layer on a substrate having a contact region, a contact hole exposing the contact region is formed through the first insulation layer. After forming a first conductive layer on the first insulation layer to fill up the contact hole, a first protection layer pattern is formed on the first conductive layer. The first conductive layer is partially etched to form a contact and to form a pad on the contact. A second protection layer is formed on the first protection layer pattern, and then an opening exposing the pad is formed through the second protection layer and the first protection layer pattern. After formation of a first electrode, a phase-change material layer pattern and a second electrode are formed on the first electrode and the second protection layer. | 05-06-2010 |
20100124800 | VARIABLE RESISTANCE MEMORY DEVICE, METHOD OF FABRICATING THE SAME, AND MEMORY SYSTEM INCLUDING THE SAME - A method of fabricating a variable resistance memory device includes a plasma etching process to remove contaminants from variable resistance material that forms variable resistance elements of the device. Bottom electrodes are formed on a semiconductor substrate. Next, an interlayer dielectric layer having trenches that expose the bottom electrodes is formed on the substrate. Then a layer of variable resistance material is formed. The variable resistance material covers the interlayer dielectric layer and fills the trenches. The variable resistance material is then planarized down to at least the top surface of the interlayer dielectric layer, thereby leaving elements of the variable resistance material in the trenches. The variable resistance material in the trenches is etched to remove contaminants, produced as a result of the planarizing process, from atop the variable resistance material in the trenches. A top electrode is then formed on the variable resistance material. | 05-20-2010 |
20100129958 | METHOD AND APPARATUS FOR TRENCH AND VIA PROFILE MODIFICATION - Embodiments of the present invention generally relates to an apparatus and a method for processing semiconductor substrates. Particularly, embodiments of the present invention relates to methods and apparatus for trench and via profile modification prior to filling the trench and via. One embodiment of the present invention comprises forming a sacrifice layer to pinch off a top opening of a trench structure by exposing the trench structure to an etchant. In one embodiment, the etchant is configured to remove the first material by reacting with the first material and generating a by-product, which forms the sacrifice layer. | 05-27-2010 |
20100136742 | PHASE CHANGE MEMORY WITH OVONIC THRESHOLD SWITCH - A phase change memory includes a memory element and a selection element. The memory element is embedded in a dielectric and includes a resistive element having at least one sublithographic dimension and a storage region in contact with the resistive element. The selection element includes a chalcogenic material embedded in a dielectric. The chalcogenic material and the storage region are part of a stack having a common etched edge. | 06-03-2010 |
20100144087 | METHODS OF FORMING PHASE-CHANGEABLE MEMORY DEVICES INCLUDING AN ADIABATIC LAYER - Phase-changeable memory devices include a lower electrode electrically connected to an impurity region of a transistor in a substrate and a programming layer pattern including a first phase-changeable material on the lower electrode. An adiabatic layer pattern including a material having a lower thermal conductivity than the first phase-changeable material is on the programming layer pattern and an upper electrode is on the adiabatic layer pattern. | 06-10-2010 |
20100151623 | PHASE CHANGE MEMORY - A PCRAM cell has a high resistivity bottom electrode cap to provide partial heating near the interface between the cell and the bottom electrode, preventing separation of the amorphous GST region from the bottom electrode, and reducing the programming current requirements. | 06-17-2010 |
20100159636 | METHOD OF FORMING PHASE CHANGE LAYER AND METHOD OF MANUFCTURING PHASE CHANGE MEMORY DEVICE USING THE SAME - Disclosed herein are a method of forming a stable phase change layer without generating seams, and a method of manufacturing phase change memory device using the same. In the method of forming a phase change layer, the phase change layer is formed by performing a first deposition process of a phase change material, performing an etching process so as to etch the phase change material, and performing a second deposition process of a phase change material on the etched phase change material. The etching process and the second deposition process are performed a predetermined number of times. | 06-24-2010 |
20100159637 | Antimony precursor, phase-change memory device using the antimony precursor, and method of manufacturing the phase-change memory device - An antimony precursor including antimony, nitrogen and silicon, a phase-change memory device using the same, and a method of making the phase-change memory device. The phase-change memory device may have a phase-change film of a Ge | 06-24-2010 |
20100159638 | Method of fabricating nonvolatile memory device - A method of manufacturing a nonvolatile memory device including forming on a lower insulating layer a first sacrificial pattern having first openings extending in a first direction, forming a second sacrificial pattern having second openings extending in a second direction on the lower insulating layer and the first sacrificial pattern wherein the second openings intersect the first openings, etching the lower insulating layer using the first and second sacrificial patterns to form a lower insulating pattern having contact holes defined by a region where the first and second openings intersect each other, forming a bottom electrode in the contact holes, and forming a variable resistance pattern on the lower insulating pattern so that a portion of the variable resistance pattern connects to a top surface of the bottom electrode. | 06-24-2010 |
20100173452 | METHOD TO FORM HIGH EFFICIENCY GST CELL USING A DOUBLE HEATER CUT - Embodiments of the present invention provide a method that includes providing wafer including multiple cells, each cell including at least one emitter. The method further includes performing a lithographic operation in a word line direction of the wafer across the cells to form pre-heater element arrangements, performing a lithographic operation in a bit line direction of the wafer across the pre-heater element arrangements to form a pre-heater element adjacent each emitter, and performing a lithographic operation in the word line direction across a portion of the pre-heater elements to form a heater element adjacent each emitter. Other embodiments are also described. | 07-08-2010 |
20100190291 | Semiconductor memory device with three dimensional solid electrolyte structure, and manufacturing method thereof - The semiconductor memory device includes a variable resistance device having a solid electrolyte in a three-dimensional structure. The variable resistance device includes a first electrode; the solid electrolyte, which has at least two regions with different heights, formed on the first electrode; and a second electrode made of a conductive material formed on the solid electrolyte to cover the regions with different heights. In addition, a multibit semiconductor memory device is provided which includes a bias circuit that can control the intensity of a current and time the current is supplied to the variable resistance device inside a memory cell in multiple steps to configure multibits. | 07-29-2010 |
20100190292 | METHOD FOR THE PREPARATION OF GROUP IB-IIIA-VIA QUATERNARY OR HIGHER ALLOY SEMICONDUCTOR FILMS - This invention relates to a method for producing group IB-IIIA-VIA quaternary or higher alloy semiconductor films wherein the method comprises the steps of (i) providing a metal film comprising a mixture of group IB and group IIIA metals; (ii) heat treating the metal film in the presence of a source of a first group VIA element (said first group VIA element hereinafter being referred to as VIA | 07-29-2010 |
20100197076 | METHODS FOR MANUFACTURING A PHASE-CHANGE MEMORY DEVICE - In a method of forming a chalcogenide compound target, a first powder including germanium carbide or germanium is prepared, and a second powder including antimony carbide or antimony is prepared. A third powder including tellurium carbide or tellurium is prepared. A powder mixture is formed by mixing the first to the third powders. After a shaped is formed body by molding the powder mixture. The chalcogenide compound target is obtained by sintering the powder mixture. The chalcogenide compound target may include a chalcogenide compound that contains carbon and metal, or carbon, metal and nitrogen considering contents of carbon, metal and nitrogen, so that a phase-change material layer formed using the chalcogenide compound target may stable phase transition, enhanced crystallized temperature and increased resistance. A phase-change memory device including the phase-change material layer may have reduced set resistance and driving current while improving durability and sensing margin. | 08-05-2010 |
20100203672 | METHODS OF MANUFACTURING PHASE CHANGE MEMORY DEVICES - A phase change memory is manufactured by providing a substrate including a layer of phase-change material, forming a damascene pattern on the layer of phase-change material, and forming both a top electrode and a bit line in the damascene pattern. | 08-12-2010 |
20100210068 | Method of forming phase change memory device - Provided is a method of forming a phase change memory device, the method including washing and rinsing a phase change device structure. A phase change material layer may be formed on a semiconductor substrate. The phase change material layer may be etched so as to form a phase change device structure. The semiconductor substrate on which the phase change device structure is formed may be washed using a washing solution including a reducing agent containing fluorine (F), a pH controller, a dissolution agent and water. In addition, the semiconductor substrate on which the washing is performed may be rinsed. | 08-19-2010 |
20100221868 | Active Material Devices with Containment Layer - An active material electronic device is described with a containment layer. The device includes an active chalcogenide, pnictide, or phase-change material in electrical communication with an upper and lower electrode. The device includes a containment layer formed over the active material that prevents escape of volatilized matter from the active material when the device is exposed to high temperatures during fabrication or operation. The containment layer further prevents chemical contamination of the active material by protecting it from reactive species in the processing or ambient environment. The containment layer and intermediate layers formed between the active material and containment layer are formed at temperatures sufficiently low to prevent volatilization of the active material. Once the containment layer is formed, the device may be subjected to high temperature or chemically aggressive environments without impairing the compositional or structural integrity of the active material. Inclusion of the containment layer is shown to extend the cycle life of the device by over two orders of magnitude. | 09-02-2010 |
20100227435 | Chemical-mechanical polishing method for polishing phase-change material and method of fabricating phase-change memory device using the same - A chemical-mechanical polishing (CMP) method of polishing a phase-change material and a method of fabricating a phase-change memory, the CMP method including forming the phase-change material on an activation surface of a semiconductor wafer, and performing a CMP process on the phase-change material using a polishing pad, wherein the performing the CMP process includes reducing a change in the composition of the phase-change material by adjusting, within a predetermined range, a temperature of a region where the semiconductor wafer and the polishing pad contact each other. | 09-09-2010 |
20100267195 | Methods Of Forming Phase Change Materials And Methods Of Forming Phase Change Memory Circuitry - A method of forming a phase change material which having germanium and tellurium therein includes depositing a germanium-containing material over a substrate. Such material includes elemental-form germanium. A gaseous tellurium-comprising precursor is flowed to the germanium-comprising material and tellurium is removed from the gaseous precursor to react with the elemental-form germanium in the germanium-comprising material to form a germanium and tellurium-comprising compound of a phase change material over the substrate. Other implementations are disclosed. | 10-21-2010 |
20100267196 | HYBRID SYNTHESIS OF CORE/SHELL NANOCRYSTALS - Nanocrystals that include a core/shell structure in which the a core of semiconductor material is coated with an inorganic capping agent. The nanocrystals are made by initially providing nanocrystal precursors that include a solubility agent which renders the precursors soluble in an organic solvent. The nanocrystal precursors are then coated with the inorganic capping agent in the presence of an organic solvent. | 10-21-2010 |
20100317149 | Method of forming a memory device incorporating a resistance variable chalcogenide element - A method of forming a memory device, such as a PCRAM, including selecting a chalcogenide glass backbone material for a resistance variable memory function and devices formed using such a method. | 12-16-2010 |
20100317150 | ANTIMONY AND GERMANIUM COMPLEXES USEFUL FOR CVD/ALD OF METAL THIN FILMS - Antimony, germanium and tellurium precursors useful for CVD/ALD of corresponding metal-containing thin films are described, along with compositions including such precursors, methods of making such precursors, and films and microelectronic device products manufactured using such precursors, as well as corresponding manufacturing methods. The precursors of the invention are useful for forming germanium-antimony-tellurium (GST) films and microelectronic device products, such as phase change memory devices, including such films. | 12-16-2010 |
20110020981 | Dichalcogenide Selenium Ink and Methods of Making and Using Same - A selenium ink comprising a chemical compound having a formula RZ-Se | 01-27-2011 |
20110027939 | Methods of Forming Variable Resistance Memory Cells, and Methods of Etching Germanium, Antimony, and Tellurium-Comprising Materials - A method of etching a material that includes comprising germanium, antimony, and tellurium encompasses exposing said material to a plasma-enhanced etching chemistry comprising Cl | 02-03-2011 |
20110045633 | THIN FILM TRANSISTOR HAVING N-TYPE AND P-TYPE CIS THIN FILMS AND METHOD OF MANUFACTURING THE SAME - Provided is a thin film transistor (TFT) which uses CIS (CuInSe | 02-24-2011 |
20110053317 | PHASE CHANGE RAM DEVICE AND METHOD FOR FABRICATING THE SAME - Disclosed are a phase change RAM device and a method for fabricating a phase change RAM device, which can efficiently lower intensity of current required for changing a phase of a phase change layer. The method includes the steps of providing a semiconductor substrate formed with an insulating interlayer including a tungsten plug, forming a first oxide layer on the semiconductor substrate, forming a pad-type bottom electrode, which makes contact with the tungsten plug, in the first oxide layer, forming a second oxide layer on the first oxide layer including the bottom electrode, and forming a porous polystyrene pattern on the second oxide layer such that a predetermined portion of the second oxide layer corresponding to a center portion of the bottom electrode is covered with the porous polystyrene pattern. | 03-03-2011 |
20110065235 | PHASE CHANGE MEMORY CELL WITH CONSTRICTION STRUCTURE - Some embodiments include methods of forming memory cells. Such methods can include forming a first electrode, a second electrode, and a memory element directly contacting the first and second electrodes. Forming the memory element can include forming a programmable portion of the memory element isolated from the first electrode by a first portion of the memory element and isolated from the second electrode by a second portion of the memory element. Other embodiments are described. | 03-17-2011 |
20110070690 | THERMAL MANAGEMENT AND METHOD FOR LARGE SCALE PROCESSING OF CIS AND/OR CIGS BASED THIN FILMS OVERLYING GLASS SUBSTRATES - The thermal management and method for large scale processing of CIS and/or CIGS based thin film overlaying glass substrates. According to an embodiment, the present invention provides a method for fabricating a copper indium diselenide semiconductor film. The method includes providing a plurality of substrates, each of the substrates having a copper and indium composite structure. The method also includes transferring the plurality of substrates into a furnace, each of the plurality of substrates provided in a vertical orientation with respect to a direction of gravity, the plurality of substrates being defined by a number N, where N is greater than 5. The method further includes introducing a gaseous species including a selenide species and a carrier gas into the furnace and transferring thermal energy into the furnace to increase a temperature from a first temperature to a second temperature, the second temperature ranging from about 350° C. to about 450° C. to at least initiate formation of a copper indium diselenide film from the copper and indium composite structure on each of the substrates. | 03-24-2011 |
20110076798 | Dichalcogenide ink containing selenium and methods of making and using same - A selenium ink comprising, as initial components: a liquid carrier; a selenium component comprising selenium; and, an organic chalcogenide component having a formula selected from RZ—Z′R′ and R | 03-31-2011 |
20110076799 | Selenium/Group 1b ink and methods of making and using same - A selenium/Group 1b ink comprising, as initial components: a selenium component comprising selenium, an organic chalcogenide component having a formula selected from RZ—Z′R′ and R | 03-31-2011 |
20110111556 | ANTIMONY COMPOUNDS USEFUL FOR DEPOSITION OF ANTIMONY-CONTAINING MATERIALS - Precursors for use in depositing antimony-containing films on substrates such as wafers or other microelectronic device substrates, as well as associated processes of making and using such precursors, and source packages of such precursors. The precursors are useful for deposition of A Ge | 05-12-2011 |
20110117696 | CdTe SURFACE TREATMENT FOR STABLE BACK CONTACTS - Disclosed are etching compositions and processes of using the same for etching the surface of CdTe-containing layers. | 05-19-2011 |
20110151616 | MBE GROWTH TECHNIQUE FOR GROUP II-VI INVERTED MULTIJUNCTION SOLAR CELLS - A method of forming a Group II-VI multijunction semiconductor device comprises providing a Group IV substrate, forming a first subcell from a first Group II-VI semiconductor material, forming a second subcell from a second Group II-VI semiconductor material, and removing the substrate. The first subcell is formed over the substrate and has a first bandgap, while the second subcell is formed over the first subcell and has a second bandgap which is smaller than the first bandgap. Additional subcells may be formed over the second subcell with the bandgap of each subcell smaller than that of the preceding subcell and with each subcell preferably separated from the preceding subcell by a tunnel junction. Prior to the removal of the substrate, a support layer is affixed to the last-formed subcell in opposition to the substrate. | 06-23-2011 |
20110165728 | METHODS OF SELF-ALIGNED GROWTH OF CHALCOGENIDE MEMORY ACCESS DEVICE - Self-aligning fabrication methods for forming memory access devices comprising a doped chalcogenide material. The methods may be used for forming three-dimensionally stacked cross point memory arrays. The method includes forming an insulating material over a first conductive electrode, patterning the insulating material to form vias that expose portions of the first conductive electrode, forming a memory access device within the vias of the insulating material and forming a memory element over the memory access device, wherein data stored in the memory element is accessible via the memory access device. The memory access device is formed of a doped chalcogenide material and formed using a self-aligned fabrication method. | 07-07-2011 |
20110201148 | PHASE CHANGE CURRENT DENSITY CONTROL STRUCTURE - A phase change memory element and method of forming the same. The memory element includes first and second electrodes. A first layer of phase change material is between the first and second electrodes. A second layer including a metal-chalcogenide material is also between the first and second electrodes and is one of a phase change material and a conductive material. An insulating layer is between the first and second layers. There is at least one opening in the insulating layer providing contact between the first and second layers. | 08-18-2011 |
20110212568 | Phase change memory devices including phase change layer formed by selective growth methods and methods of manufacturing the same - A phase change memory device including a phase change layer includes a storage node and a switching device. The switching device is connected to the storage node. The storage node includes a phase change layer selectively grown on a lower electrode. In a method of manufacturing a phase change memory device, an insulating interlayer is formed on a semiconductor substrate to cover a switching device. A lower electrode connected to the switching device is formed, and a phase change layer is selectively grown on the lower electrode. | 09-01-2011 |
20110223716 | ELECTRICAL DEVICE USING PHASE CHANGE MATERIAL, PHASE CHANGE MEMORY DEVICE USING SOLID STATE REACTION AND METHOD FOR FABRICATING THE SAME - Provided are a nonvolatile memory device and a method of fabricating the same, in which a phase-change layer is formed using a solid-state reaction to reduce a programmable volume, thereby lessening power consumption. The device includes a first reactant layer, a second reactant layer formed on the first reactant layer, and a phase-change layer formed between the first and second reactant layers due to a solid-state reaction between a material forming the first reactant layer and a material forming the second reactant layer. The phase-change memory device consumes low power and operates at high speed. | 09-15-2011 |
20110263075 | Vacuum Jacket For Phase Change Memory Element - A memory device including a phase change element and a vacuum jacket. The device includes a first electrode element; a phase change element in contact with the first electrode element; an upper electrode element in contact with the phase change element; a bit line electrode in contact with the upper electrode element; and a dielectric fill layer surrounding the phase change element and the upper electrode element, spaced from the same and sealed by the bit line electrode to define a vacuum jacket around the phase change element and upper electrode element. | 10-27-2011 |
20110294258 | METHOD AND APPARATUS FOR TRENCH AND VIA PROFILE MODIFICATION - Embodiments of the present invention generally relates to an apparatus and a method for processing semiconductor substrates. Particularly, embodiments of the present invention relates to methods and apparatus for profile modification prior to filling a structure, such as a trench or a via. One embodiment of the present invention comprises forming a sacrifice layer to pinch off a top opening of a structure by exposing the structure to an etchant. In one embodiment, the etchant is configured to remove the first material by reacting with the first material and generating a by-product, which forms the sacrifice layer. | 12-01-2011 |
20110312126 | METHOD FABRICATING A PHASE-CHANGE SEMICONDUCTOR MEMORY DEVICE - A method of fabricating a phase-change semiconductor memory device includes a plasma treatment of an electrode connected to a phase-change material pattern after a conductive layer used to form the electrode has been planarized in the presence of an oxidizing agent. The plasma is formed from a plasma gas having a molecular weight of 17 or less. | 12-22-2011 |
20120009731 | METHOD OF MANUFACTURING PHASE-CHANGE RANDOM ACCESS MEMORY - A method of a phase-change random access memory (PCRAM) device is provided. The method includes forming a heat pad on a substrate, forming a phase-change material layer by injecting a deposition gas for a phase-change material and a reaction gas on the heat pad, where the phase-change material includes tellurium (Te), forming an upper electrode electrically connected to the phase-change material layer, where the tellurium (Te) is added at a ratio smaller than a normal chemical stoichiometric ratio of materials constituting the phase-change material layer. | 01-12-2012 |
20120015475 | Methods Of Forming Memory Cells, And Methods Of Patterning Chalcogenide-Containing Stacks - Some embodiments include methods of forming memory cells. Chalcogenide is formed over a plurality of bottom electrodes, and top electrode material is formed over the chalcogenide. Sacrificial material is formed over the top electrode material. A plurality of memory cell structures is formed by etching through the sacrificial material, top electrode material and chalcogenide. Each of the memory cell structures has a cap of the sacrificial material thereover. The etching forms polymeric residue over the sacrificial material caps, and damages chalcogenide along sidewalls of the structures. The sacrificial material is removed with an HF-containing solution, and such removes the polymeric residue off of the memory cell structures. After the sacrificial material is removed, the sidewalls of the structures are treated with one or both of H | 01-19-2012 |
20120015476 | METHOD FOR PRODUCING SEMICONDUCTOR LAYERS AND COATED SUBSTRATES TREATED WITH ELEMENTAL SELENIUM AND/OR SULFER, IN PARTICULAR FLAT SUBSTRATES - The invention relates to a method for producing semiconductor layers and coated substrates treated with elemental selenium and/or sulphur, in particular flat substrates, containing at least one conducting, semiconducting and/or insulating layer, in which a substrate which is provided with at least one metal layer and/or with at least one layer containing metal, in particular a stack of substrates, each of which is provided with at least one metal layer and/or with at least one layer which contains metal, is inserted into a processing chamber and heated to a predetermined substrate temperature; elementary selenium and/or sulphur vapor is guided past on the or on every metal layer and/or layer containing metal, from a source located inside and/or outside the processing chamber, in particular by means of a carrier gas which is in particular inert, under rough vacuum conditions or ambient pressure conditions or overpressure conditions, in order to react chemically with said layer with selenium or sulphur in a targeted manner; the substrate is heated by means of forced convection by at least one gas conveying device and/or the elementary selenium and/or sulphur vapor is mixed and guided past on the substrate by means of forced convection by at least one gas conveying device in the processing chamber, in particular in a homogeneous manner. The invention furthermore relates to a processing device for implementing a method of this type. | 01-19-2012 |
20120028410 | METHODS OF FORMING GERMANIUM-ANTIMONY-TELLURIUM MATERIALS AND A METHOD OF FORMING A SEMICONDUCTOR DEVICE STRUCTURE INCLUDING THE SAME - A method of forming a material. The method comprises conducting an ALD layer cycle of a first metal, the ALD layer cycle comprising a reactive first metal precursor and a co-reactive first metal precursor. An ALD layer cycle of a second metal is conducted, the ALD layer cycle comprising a reactive second metal precursor and a co-reactive second metal precursor. An ALD layer cycle of a third metal is conducted, the ALD layer cycle comprising a reactive third metal precursor and a co-reactive third metal precursor. The ALD layer cycles of the first metal, the second metal, and the third metal are repeated to form a material, such as a GeSbTe material, having a desired stoichiometry. Additional methods of forming a material, such as a GeSbTe material, are disclosed, as is a method of forming a semiconductor device structure including a GeSbTe material. | 02-02-2012 |
20120045868 | SEMICONDUCTOR DEVICE CONTACTS - A method of fabrication of electrical contact structures on a semiconductor material is described comprising the steps of: depositing an oxide of a desired contact material by a chemical electroless process on a face of the semiconductor material; and reducing the oxide via a chemical electroless process to produce a contact of the desired contact material. A method of fabrication of a semiconductor device incorporating such electrical contact structures and a semiconductor device incorporating such electrical contact structures are also described. | 02-23-2012 |
20120077309 | THERMALLY STABILIZED ELECTRODE STRUCTURE - Memory devices and methods for manufacturing are described herein. A memory device as described herein includes a first electrode layer, a second electrode layer, and a thermal isolation structure including a layer of thermal isolation material between the first and second electrode layers. The first and second electrode layers and the thermal isolation structure define a multi-layer stack having a sidewall. A sidewall conductor layer including a sidewall conductor material is on the sidewall of the multi-layer stack. The sidewall conductor material has an electrical conductivity greater than that of the thermal isolation material. A memory element including memory material is on and in contact with the second electrode layer. | 03-29-2012 |
20120094431 | Liquid precursor for deposition of indium selenide and method of preparing the same - Liquid precursors containing indium and selenium suitable for deposition on a substrate to form thin films suitable for semiconductor applications are disclosed. Methods of preparing such liquid precursors and method of depositing a liquid precursor on a substrate are also disclosed. | 04-19-2012 |
20120094432 | SELF CLEANING LARGE SCALE METHOD AND FURNACE SYSTEM FOR SELENIZATION OF THIN FILM PHOTOVOLTAIC MATERIALS - A method for fabricating a copper indium diselenide semiconductor film using a self cleaning furnace is provided. The method includes transferring a plurality of substrates having a copper and indium composite structure into a furnace comprising a processing region and at least one end cap region disengageably coupled to the processing region. The method also includes introducing a gaseous species including a hydrogen species and a selenium species and a carrier gas into the furnace and transferring thermal energy into the furnace to increase a temperature from a first temperature to a second temperature to initiate formation of a copper indium diselenide film on each of the substrates. The method further includes decomposing residual selenide species from an inner region of the process region of the furnace. The method further includes depositing elemental selenium species within a vicinity of the end cap region operable at a third temperature. | 04-19-2012 |
20120108005 | METHOD FOR FORMING Ge-Sb-Te FILM AND STORAGE MEDIUM - A film-forming method includes a preprocessing step (step | 05-03-2012 |
20120122276 | THERMAL EVAPORATION APPARATUS, USE AND METHOD OF DEPOSITING A MATERIAL - A thermal evaporation apparatus for depositing of a material on a substrate is described. The apparatus can comprise material storage means; heating means to generate a vapour of the material in the material storage means; vapour outlet means comprising a vapour receiving pipe having vapour outlet passages, and emission reducing means arranged such that an external surface of the vapour outlet means directed to said substrate exhibits low emission. Also the use of the apparatus, and a method of depositing a material onto a substrate by thermal evaporation are described. | 05-17-2012 |
20120142141 | METHOD OF FORMING RESISTANCE VARIABLE MEMORY DEVICE - A method of forming a resistance variable memory device, the method including forming a diode on a semiconductor substrate; forming a lower electrode on the diode; forming a first insulating film on the lower electrode, the first insulating film having an opening; forming a resistance variable film filling the opening such that the resistance variable film includes an amorphous region adjacent to a sidewall of the opening and a crystalline region adjacent to the lower electrode; and forming an upper electrode on the resistance variable film. | 06-07-2012 |
20120149146 | CONFINED RESISTANCE VARIABLE MEMORY CELL STRUCTURES AND METHODS - Confined resistance variable memory cell structures and methods are described herein. One or more methods of forming a confined resistance variable memory cell structure includes forming a via in a memory cell structure and forming a resistance variable material in the via by performing a process that includes providing a germanium amidinate precursor and a first reactant to a process chamber having the memory cell structure therein and providing an antimony ethoxide precursor and a second reactant to the process chamber subsequent to removing excess germanium. | 06-14-2012 |
20120171812 | METHODS OF FORMING GERMANIUM-ANTIMONY-TELLURIUM MATERIALS AND METHODS OF FORMING A SEMICONDUCTOR DEVICE STRUCTURE INCLUDING THE SAME - A method of forming a material comprises conducting an ALD layer cycle of a first metal, the ALD layer cycle comprising a reactive first metal precursor and a co-reactive first metal precursor. An ALD layer cycle of a second metal is conducted, the ALD layer cycle comprising a reactive second metal precursor and a co-reactive second metal precursor. An ALD layer cycle of a third metal is conducted, the ALD layer cycle comprising a reactive third metal precursor and a co-reactive third metal precursor. The ALD layer cycles of the first metal, the second metal, and the third metal are repeated to form a material, such as a GeSbTe material, having a desired stoichiometry. Additional methods of forming a material, such as a GeSbTe material, are disclosed, as is a method of forming a semiconductor device structure including a GeSbTe material. | 07-05-2012 |
20120178209 | Methods Of Forming Metal-Containing Structures, And Methods Of Forming Germanium-Containing Structures - Some embodiments include methods of forming metal-containing structures. A first metal-containing material may be formed over a substrate. After the first metal-containing material is formed, and while the substrate is within a reaction chamber, hydrogen-containing reactant may be used to form a hydrogen-containing layer over the first metal-containing material. The hydrogen-containing reactant may be, for example, formic acid and/or formaldehyde. Any unreacted hydrogen-containing reactant may be purged from within the reaction chamber, and then metal-containing precursor may be flowed into the reaction chamber. The hydrogen-containing layer may be used during conversion of the metal-containing precursor into a second metal-containing material that forms directly against the first metal-containing material. Some embodiments include methods of forming germanium-containing structures, such as, for example, methods of forming phase change materials containing germanium, antimony and tellurium. | 07-12-2012 |
20120220076 | Method of Making a Multicomponent Film - Described herein is a method and liquid-based precursor composition for depositing a multicomponent film. In one embodiment, the method and compositions described herein are used to deposit Germanium Tellurium (GeTe), Antimony Tellurium (SbTe), Antimony Germanium (SbGe), Germanium Antimony Tellurium (GST), Indium Antimony Tellurium (IST), Silver Indium Antimony Tellurium (AIST), Cadmium Telluride (CdTe), Cadmium Selenide (CdSe), Zinc Telluride (ZnTe), Zinc Selenide (ZnSe), Copper indium gallium selenide (CIGS) films or other tellurium and selenium based metal compounds for phase change memory and photovoltaic devices. | 08-30-2012 |
20120231579 | Methods Of Depositing Antimony-Comprising Phase Change Material Onto A Substrate And Methods Of Forming Phase Change Memory Circuitry - A method of depositing an antimony-comprising phase change material onto a substrate includes providing a reducing agent and vaporized Sb(OR) | 09-13-2012 |
20120276688 | METHOD FOR FORMING A SELF-ALIGNED BIT LINE FOR PCRAM AND SELF-ALIGNED ETCH BACK PROCESS - A method of forming bit line aligned to a phase change material that includes forming a pedestal of a sacrificial material on a portion of a lower electrode and forming at least one dielectric material adjacent to the sacrificial material, wherein the at least one dielectric material has an upper surface substantially coplanar with an upper surface of the pedestal of the sacrificial material. The pedestal of the sacrificial material is removed selective to the at least one dielectric material and the lower electrode to provide an opening to an exposed surface of the lower electrode. A phase change material is formed on the exposed surface of the lower electrode, and the opening is filled with a conductive fill material. A self-aligned etch back process is also provided. | 11-01-2012 |
20120315724 | METHOD AND APPARATUS FOR DEPOSITION OF SELENIUM THIN-FILM AND PLASMA HEAD THEREOF - A method for deposition of a selenium thin-film includes the following steps. First, a plasma head is provided. Then, a substrate is supported in an atmospheric pressure. Next, a solid-state selenium source is dissociated by the plasma head to deposit the selenium thin-film on the substrate. The plasma head includes a chamber, a housing and the solid-state selenium source. Plasma is produced in the chamber. The chamber is surrounded by the housing. The solid-state selenium source is supported by the housing. | 12-13-2012 |
20120329208 | SYNTHESIS AND USE OF PRECURSORS FOR ALD OF GROUP VA ELEMENT CONTAINING THIN FILMS - Atomic layer deposition (ALD) processes for forming Group VA element containing thin films, such as Sb, Sb—Te, Ge—Sb and Ge—Sb—Te thin films are provided, along with related compositions and structures. Sb precursors of the formula Sb(SiR | 12-27-2012 |
20130005080 | Methods Utilizing Microwave Radiation During Formation Of Semiconductor Constructions - Some embodiments include methods in which microwave radiation is used to activate dopant and/or increase crystallinity of semiconductor material during formation of a semiconductor construction. In some embodiments, the microwave radiation has a frequency of about 5.8 gigahertz, and a temperature of the semiconductor construction does not exceed about 500° C. during the exposure to the microwave radiation. | 01-03-2013 |
20130029456 | ANTIMONY AND GERMANIUM COMPLEXES USEFUL FOR CVD/ALD OF METAL THIN FILMS - Antimony, germanium and tellurium precursors useful for CVD/ALD of corresponding metal-containing thin films are described, along with compositions including such precursors, methods of making such precursors, and films and microelectronic device products manufactured using such precursors, as well as corresponding manufacturing methods. The precursors of the invention are useful for forming germanium-antimony-tellurium (GST) films and microelectronic device products, such as phase change memory devices, including such films. | 01-31-2013 |
20130089948 | VAPOR TRANSPORT DEPOSITION METHOD AND SYSTEM FOR MATERIAL CO-DEPOSITION - An improved feeder system and method for vapor transport deposition that includes at least two vaporizers couple to a common distributor for vaporizing and co-depositing at least any two vaporizable materials as a material layer on a substrate. Composition of the material layer can be controlled by changing the flow of vapors from the respective vaporizers into the distributor to adjust the proportion of respective vapors in the combined vapor prior to deposition. Flow of the vapors from the respective vaporizers into the distributor may be controlled by adjusting the flow of carrier gas transporting the raw material into the vaporizer and/or by adjusting the vibration speed and/or amplitude of the powder feeders that process the raw material. | 04-11-2013 |
20130109134 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | 05-02-2013 |
20130157410 | Memory Cell Constructions, and Methods for Fabricating Memory Cell Constructions - Some embodiments include methods for fabricating memory cell constructions. A memory cell may be formed to have a programmable material directly against a material having a different coefficient of expansion than the programmable material. A retaining shell may be formed adjacent the programmable material. The memory cell may be thermally processed to increase a temperature of the memory cell to at least about 300° C., causing thermally-induced stress within the memory cell. The retaining shell may provide a stress which substantially balances the thermally-induced stress. Some embodiments include memory cell constructions. The constructions may include programmable material directly against silicon nitride that has an internal stress of less than or equal to about 200 megapascals. The constructions may also include a retaining shell silicon nitride that has an internal stress of at least about 500 megapascals. | 06-20-2013 |
20130196467 | PHASE-CHANGE MEMORY - A phase-change memory element with side-wall contacts is disclosed, which has a bottom electrode. A non-metallic layer is formed on the electrode, exposing the periphery of the top surface of the electrode. A first electrical contact is on the non-metallic layer to connect the electrode. A dielectric layer is on and covering the first electrical contact. A second electrical contact is on the dielectric layer. An opening is to pass through the second electrical contact, the dielectric layer, and the first electrical contact and preferably separated from the electrode by the non-metallic layer. A phase-change material is to occupy one portion of the opening, wherein the first and second electrical contacts interface the phase-change material at the side-walls of the phase-change material. A second non-metallic layer may be formed on the second electrical contact. A top electrode contacts the top surface of the outstanding terminal of the second electrical contact. | 08-01-2013 |
20130224908 | METHOD OF MANUFACTURING PRAM USING LASER INTERFERENCE LITHOGRAPHY - A method of manufacturing a phase-change random access memory includes: sequentially depositing an insulating layer, a first electrode layer, a phase change material layer, and a transfer material layer on a substrate; forming an array pattern in the transfer material layer using a laser interference lithography process; forming a metal layer on the transfer material layer having the array pattern formed; forming a second electrode layer by removing the transfer material layer; and forming a phase change layer by etching the phase change material layer using the second electrode layer as a mask. Accordingly, the manufacturing process of the phase-change random access memory may achieve an increase in speed and may be simplified. | 08-29-2013 |
20130295717 | Methods Of Depositing Antimony-Comprising Phase Change Material Onto A Substrate And Methods Of Forming Phase Change Memory Circuitry - A method of depositing an antimony-comprising phase change material onto a substrate includes providing a reducing agent and vaporized Sb(OR) | 11-07-2013 |
20140024172 | VAPOR DEPOSITION APPARATUS FOR CONTINUOUS DEPOSITION AND TREATMENT OF A THIN FILM LAYER ON A SUBSTRATE - Apparatus and method for vapor deposition of a sublimated source material are generally provided. The apparatus includes a deposition head with a first sublimation compartment and a second sublimation compartment, each configured for receipt and sublimation of a source material. A first distribution plate can be positioned at a first defined distance above a horizontal conveyance plane of an upper surface of substrates conveyed through a first deposition area of the apparatus, and a second distribution plate can be positioned at a second defined distance above a horizontal conveyance plane of an upper surface of substrates conveyed through a second deposition area of said apparatus. The first sublimation compartment and the second sublimation compartment can be isolated from each other such that the sublimated first source material is substantially prevented from mixing with the sublimated second source material, at least during sublimation. | 01-23-2014 |
20140024173 | Method of Making a Multicomponent Film - Described herein is a method and liquid-based precursor composition for depositing a multicomponent film. In one embodiment, the method and compositions described herein are used to deposit Germanium Tellurium (GeTe), Antimony Tellurium (SbTe), Antimony Germanium (SbGe), Germanium Antimony Tellurium (GST), Indium Antimony Tellurium (IST), Silver Indium Antimony Tellurium (AIST), Cadmium Telluride (CdTe), Cadmium Selenide (CdSe), Zinc Telluride (ZnTe), Zinc Selenide (ZnSe), Copper indium gallium selenide (CIGS) films or other tellurium and selenium based metal compounds for phase change memory and photovoltaic devices. | 01-23-2014 |
20140073084 | Methods of Forming Phase Change Materials and Methods of Forming Phase Change Memory Circuitry - A method of forming a phase change material which having germanium and tellurium therein includes depositing a germanium-containing material over a substrate. Such material includes elemental-form germanium. A gaseous tellurium-comprising precursor is flowed to the germanium-comprising material and tellurium is removed from the gaseous precursor to react with the elemental-form germanium in the germanium-comprising material to form a germanium and tellurium-comprising compound of a phase change material over the substrate. Other implementations are disclosed. | 03-13-2014 |
20140134791 | Solution-Processed Metal-Selenide Semiconductor Using Selenium Nanoparticles - A method is provided for forming a solution-processed metal and mixed-metal selenide semiconductor using selenium (Se) nanoparticles (NPs). The method forms a first solution including SeNPs dispersed in a solvent. Added to the first solution is a second solution including a first material set of metal salts, metal complexes, or combinations thereof, which are dissolved in a solvent, forming a third solution. The third solution is deposited on a conductive substrate, forming a first intermediate film comprising metal precursors, from corresponding members of the first material set, and embedded SeNPs. As a result of thermally annealing, the metal precursors are transformed and the first intermediate film is selenized, forming a first metal selenide-containing semiconductor. In one aspect, the first solution further comprises ligands for the stabilization of SeNPs, which are liberated during thermal annealing. In another aspect, the metal selenide-containing semiconductor comprises copper, indium, gallium diselenide (CIGS). | 05-15-2014 |
20140134792 | Solution-Processed Metal Selenide Semiconductor using Deposited Selenium Film - Methods are provided for fabricating a solution-processed metal and mixed-metal selenide semiconductor using a selenium (Se) film layer. One aspect provides a conductive substrate and deposits a first Se film layer over the conductive substrate. A first solution, including a first material set of metal salts, metal complexes, or combinations thereof, is dissolved in a solvent and deposited on the first Se film layer. A first intermediate film comprising metal precursors is formed from corresponding members of the first material set. In one aspect, a plurality of intermediate films is formed using metal precursors from the first material set or a different material set. In another aspect, a second Se film layer is formed overlying the intermediate film(s). Thermal annealing is performed in an environment including hydrogen (H | 05-15-2014 |
20140147965 | HEATING PHASE CHANGE MATERIAL - A phase change memory may be formed of two vertically spaced layers of phase change material. An intervening dielectric may space the layers from one another along a substantial portion of their lateral extent. An opening may be provided in the intervening dielectric to allow the phase change layers to approach one another more closely. As a result, current density may be increased at this location, producing heating. | 05-29-2014 |
20140162400 | Alkali Metal-Doped Solution-Processed Metal Chalcogenides - A method is provided for forming an alkali metal-doped solution-processed metal chalcogenide. A first solution is formed that includes a first material group of metal salts, metal complexes, or combinations thereof, dissolved in a solvent. The first material group may include one or more of the following elements: copper (Cu), indium (In), and gallium (Ga). An alkali metal-containing material is added to the first solution, and the first solution is deposited on a conductive substrate. The alkali metal-containing material may be sodium (Na). An alkali metal-doped first intermediate film results, comprising metal precursors from corresponding members of the first material group. Then, thermally annealing is performed in an environment of selenium (Se), Se and hydrogen (H | 06-12-2014 |
20140162401 | Ge-Sb-Te FILM FORMING METHOD, Ge-Te FILM FORMING METHOD, AND Sb-Te FILM FORMING METHOD - A Ge—Sb—Te film forming method includes a Sb source material introducing process, a first purging process, a Te source material introducing process, a second purging process, a Ge source material introducing process, a third purging process. An additive gas containing at least one of ammonia, methylamine, dimethylamine, hydrazine, monomethylhydrazine, dimethylhydrazine and pyridine is introduced in at least one of the Sb, Te and Ge source material introducing processes and the first to third purging processes. | 06-12-2014 |
20140186995 | Method of fabricating cigs solar cells with high band gap by sequential processing - A method for forming TFPV absorber layer. A first layer including In is formed on a substrate. The first layer is partially or fully selenized to form a layer that includes In | 07-03-2014 |
20140206136 | ANTIMONY COMPOUNDS USEFUL FOR DEPOSITION OF ANTIMONY-CONTAINING MATERIALS - Precursors for use in depositing antimony-containing films on substrates such as wafers or other microelectronic device substrates, as well as associated processes of making and using such precursors, and source packages of such precursors. The precursors are useful for deposition of Ge | 07-24-2014 |
20140220733 | ANTIMONY AND GERMANIUM COMPLEXES USEFUL FOR CVD/ALD OF METAL THIN FILMS - Antimony, germanium and tellurium precursors useful for CVD/ALD of corresponding metal-containing thin films are described, along with compositions including such precursors, methods of making such precursors, and films and microelectronic device products manufactured using such precursors, as well as corresponding manufacturing methods. The precursors of the invention are useful for forming germanium-antimony-tellurium (GST) films and microelectronic device products, such as phase change memory devices, including such films. | 08-07-2014 |
20140242748 | METHODS OF FORMING GERMANIUM-ANTIMONY-TELLURIUM MATERIALS AND CHALCOGENIDE MATERIALS - Methods of forming a material include exposing a substrate to a first germanium-containing compound and a second, different germanium-containing compound; exposing the substrate to a first antimony-containing compound and a second, different antimony-containing compound; and exposing the substrate to a first tellurium-containing compound and a second, different tellurium-containing compound. Methods of forming chalcogenide materials include exposing a substrate to a first precursor comprising a reactive precursor of a first metal and a co-reactive precursor of the first metal, the reactive precursor and the co-reactive precursor each having at least one ligand coordinated to an atom of the first metal, wherein the at least one ligand of the co-reactive precursor is different from the at least one ligand of the reactive precursor. The substrate is also exposed to a reactive antimony precursor and a co-reactive antimony precursor and to a reactive tellurium precursor and a co-reactive tellurium precursor. | 08-28-2014 |
20140308776 | Methods of Forming Phase Change Materials and Methods of Forming Phase Change Memory Circuitry - A method of forming a phase change material which having germanium and tellurium therein includes depositing a germanium-containing material over a substrate. Such material includes elemental-form germanium. A gaseous tellurium-comprising precursor is flowed to the germanium-comprising material and tellurium is removed from the gaseous precursor to react with the elemental-form germanium in the germanium-comprising material to form a germanium and tellurium-comprising compound of a phase change material over the substrate. Other implementations are disclosed. | 10-16-2014 |
20140329357 | TELLURIUM COMPOUNDS USEFUL FOR DEPOSITION OF TELLURIUM CONTAINING MATERIALS - Precursors for use in depositing tellurium-containing films on substrates such as wafers or other microelectronic device substrates, as well as associated processes of making and using such precursors, and source packages of such precursors. The precursors are useful for deposition of Ge | 11-06-2014 |
20150037929 | APPARATUS AND METHOD FOR TREATING A SUBSTRATE - Provided are a substrate treating apparatus and method of manufacturing a phase-change layer having superior deposition characteristics. The substrate treating method of manufacturing a phase-change memory includes forming a bottom electrode on a substrate on which a pattern is formed, performing surface treating for removing impurities generated or remaining on a surface of the substrate while the bottom electrode is formed, performing nitriding on the surface of the substrate from which the impurities are removed, and successively depositing a phase-change layer and a top electrode on the bottom electrode. The substrate treating apparatus for manufacturing a phase-change memory includes a load lock chamber into/from which a plurality of substrates are loaded or unloaded, the load lock chamber being converted between an atmosphere state and a vacuum state, a nitriding chamber in which nitriding is performed on a surface of a substrate on which a bottom electrode is disposed, the nitriding chamber being coupled to one side of a plurality of sides of the vacuum transfer chamber, and a process chamber in which a phase-change layer is deposited on the surface of the substrate on which nitriding is performed in the nitriding process chamber, the process chamber being coupled to one of the plurality of sides of the vacuum transfer chamber. | 02-05-2015 |
20150147844 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating a semiconductor device includes supplying a first source gas including a germanium (Ge) precursor onto a semiconductor substrate for a first time period, and periodically interrupting the supplying of the first source gas for the first time period to form Ge elements on the semiconductor substrate. | 05-28-2015 |
20160020068 | ELECTRON BEAM-INDUCED ETCHING - Beam-induced etching uses a work piece maintained at a temperature near the boiling point of a precursor material, but the temperature is sufficiently high to desorb reaction byproducts. In one embodiment, NF | 01-21-2016 |
20160155939 | MEMORY DEVICE, SEMICONDUCTOR DEVICE, METHOD FOR PRODUCING MEMORY DEVICE, AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE | 06-02-2016 |