Class / Patent application number | Description | Number of patent applications / Date published |
438503000 | Fluid growth from gaseous state combined with preceding diverse operation | 61 |
20080242064 | Manufacturing method of semiconductor device - To provide a manufacturing method of a semiconductor device capable of performing a selective growth at a low temperature. A manufacturing method of a semiconductor device for placing in a processing chamber a substrate having at least a silicon surface and an insulating film surface on a surface; and allowing an epitaxial film to selectively grow only on the silicon surface by using a substrate processing apparatus for heating an atmosphere in the processing chamber and the substrate, using a hearting unit disposed outside of the processing chamber, includes a substrate loading step of loading the substrate into the processing chamber; a pre-processing step of supplying dichlorsilane gas and hydrogen gas into the processing chamber while maintaining a temperature in the substrate processing chamber to a prescribed temperature of 700° C. or less, and removing a natural oxide film or impurities formed on the silicon surface; and a substrate unloading step of unloading the substrate to outside of the processing chamber. | 10-02-2008 |
20080299748 | Group III-V Crystal - Favorable-quality III-V crystals are easily obtained at low cost without causing cracks, even when using a variety of substrates. The III-V crystals are obtained by manufacturing method characterized in including: a step of depositing a metal film ( | 12-04-2008 |
20090017603 | METHOD OF FORMING EPITAXIAL LAYER - A method of forming an epitaxial layer on a silicon substrate includes (a) providing a silicon substrate; (b) performing a wet-cleaning process onto the silicon substrate; (c) performing a first plasma cleaning process onto the wet-cleaned silicon substrate by providing a chlorine (Cl | 01-15-2009 |
20090068822 | METHOD FOR PREPARING SUBSTRATE FOR GROWING GALLIUM NITRIDE AND METHOD FOR PREPARING GALLIUM NITRIDE SUBSTRATE - Provided is a method for preparing a substrate for growing gallium nitride and a gallium nitride substrate. The method includes performing thermal cleaning on a surface of a silicon substrate, forming a silicon nitride (Si | 03-12-2009 |
20090124067 | METHOD TO DECREASE THIN FILM TENSILE STRESSES RESULTING FROM PHYSICAL VAPOR DEPOSITION - A method and apparatus for a backside metallization of a wafer is provided. The wafer comprised of a first substance is bent by creating tension on a backside and creating compression on a front side prior to deposition of a thin film of a second substance. After deposition, the wafer is released and the thin film deposited on the wafer exhibits less tensile stress than if the thin film was deposited on a flat wafer. | 05-14-2009 |
20090130829 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE AND SUBSTRATE PROCESSING APPARATUS - Provided are a manufacturing method of a semiconductor device and a substrate processing apparatus. The manufacturing method of the semiconductor device includes: loading a plurality of substrates into a reaction vessel, which is configured by a process tube and a manifold that supports the process tube, and arranging the loaded substrates within the reaction vessel; pre-processing the plurality of substrates by supplying a pre-process gas from the manifold side toward the process tube side within the reaction vessel; main-processing the plurality of pre-processed substrates by supplying a main-process gas from the manifold side toward the process tube side within the reaction vessel; and unloading the plurality of main-processed substrates from the reaction vessel, wherein in pre-processing the plurality of substrates, the pre-process gas is supplied from at least one position in an area corresponding to the manifold, and at least one position in an upper area of an area corresponding to a substrate arrangement area. | 05-21-2009 |
20090149008 | METHOD FOR DEPOSITING GROUP III/V COMPOUNDS - Embodiments of the invention generally relate to methods for forming Group III-V materials by a hydride vapor phase epitaxy (HVPE) process. In one embodiment, a method for forming a gallium nitride material on a substrate within a processing chamber is provided which includes heating a metallic source to form a heated metallic source, wherein the heated metallic source contains gallium, aluminum, indium, alloys thereof, or combinations thereof, exposing the heated metallic source to chlorine gas while forming a metallic chloride gas, exposing the substrate to the metallic chloride gas and a nitrogen precursor gas while forming a metal nitride layer on the substrate during the HVPE process. The method further provides exposing the substrate to chlorine gas during a pretreatment process prior to forming the metal nitride layer. In one example, the exhaust conduit of the processing chamber is heated to about 200° C. or less during the pretreatment process. | 06-11-2009 |
20090170294 | METHOD FOR FILM DEPOSITING GROUP III NITRIDE SUCH AS GALLIUM NITRIDE - [Problem to be Solved] To film deposit a group III nitride such as GaN using atmospheric pressure plasma. | 07-02-2009 |
20090197399 | METHOD OF GROWING GROUP III-V COMPOUND SEMICONDUCTOR, AND METHOD OF MANUFACTURING LIGHT-EMITTING DEVICE AND ELECTRON DEVICE - Provided are a method of growing a group III-V compound semiconductor, and method of manufacturing a light-emitting device and an electron device, in which risks are reduced and nitrogen can be efficiently supplied at low temperatures. | 08-06-2009 |
20100009526 | FABRICATION METHOD AND FABRICATION APPARATUS OF GROUP III NITRIDE CRYSTAL SUBSTANCE - A fabrication method of a group III nitride crystal substance includes the steps of cleaning the interior of a reaction chamber by introducing HCl gas into the reaction chamber, and vapor deposition of a group III nitride crystal substance in the cleaned reaction chamber. A fabrication apparatus of a group III nitride crystal substance includes a configuration to introduce HCl gas into the reaction chamber, and a configuration to grow a group III nitride crystal substance by HVPE. Thus, a fabrication method of a group III nitride crystal substance including the method of effectively cleaning deposits adhering inside the reaction chamber during crystal growth, and a fabrication apparatus employed in the fabrication method are provided. | 01-14-2010 |
20100041217 | Method of synthesizing silicon wires - A method of synthesizing silicon wires is provided. A substrate is provided. A copper catalyst particle layer is formed on a top surface of the substrate. The reactive device is heated at a temperature of above 450° C. in a flowing protective gas. A mixture of a protective gas and a silicon-based reactive gas is introduced at a temperature above 450° C. at a pressure below 700 Torr to form the silicon wires on the substrate. | 02-18-2010 |
20100048002 | SILICON NITRIDE LAYER FOR LIGHT EMITTING DEVICE, LIGHT EMITTING DEVICE USING THE SAME, AND METHOD OF FORMING SILICON NITRIDE LAYER FOR LIGHT EMITTING DEVICE - Provided are a silicon nitride layer for a light emitting device, light emitting device using the same, and method of forming the silicon nitride layer for the light emitting device. The silicon nitride layer of the light emitting device includes a silicon nitride matrix and silicon nanocrystals formed in the silicon nitride matrix. A light emitting device manufactured by the silicon nitride layer has a good luminous efficiency and emits light in the visible region including the short-wavelength blue/violet region and the near infrared region. | 02-25-2010 |
20100136772 | DELIVERY OF VAPOR PRECURSOR FROM SOLID SOURCE - A method is disclosed that uses solid precursors for semiconductor processing. A solid precursor is provided in a storage container. The solid precursor is transformed into a liquid state in the storage container. The liquid state precursor is transported from the storage container to a liquid holding container. The liquid state precursor is transported from the liquid holding container to a reaction chamber. The molten precursor allows the precursor to be metered in the liquid state. The storage container can be heated only when necessary to replenish the liquid holding container, thereby reducing the possibility of thermal decomposition of the precursor. | 06-03-2010 |
20100144130 | THIN-FILM DEPOSITION AND RECIRCULATION OF A SEMI-CONDUCTOR MATERIAL - A process for coating a substrate at atmospheric pressure is disclosed, the process comprising the steps of vaporizing a mass of semiconductor material within a heated inert gas stream to create a fluid mixture having a temperature above the condensation temperature of the semiconductor material, directing the fluid mixture at the substrate, the substrate having a temperature below the condensation temperature of the semiconductor material thereby depositing a layer of the semiconductor material onto a surface of the substrate, extracting undeposited semiconductor material; and circulating the undeposited semiconductor material into the fluid mixture having a temperature above the condensation temperature. | 06-10-2010 |
20100167505 | METHODS FOR REDUCING LOADING EFFECTS DURING FILM FORMATION - A method for fabricating a semiconductor device is provided. The method comprises selectively forming a first layer over a first and second exposed portions of a substrate. The first and second exposed portions are of different sizes and are located adjacent to a first and second active devices. During the first layer formation, a gas mixture comprising first and second source gases that function as growth components for forming the first layer and a reactant gas that functions as an etching component for controlling selectivity of the first layer growth is provided. The reactant gas is different from the first and second source gases and one of first and second source gases forms the first layer at a faster rate over the first exposed portion as compared to the second exposed portion and the other source gas exhibits an opposite behavior. | 07-01-2010 |
20100173482 | METHOD AND APPARATUS FOR FABRICATING IB-IIIA-VIA2 COMPOUND SEMICONDUCTOR THIN FILMS - Methods and apparatus for fabricating IB-IIIA-VIA | 07-08-2010 |
20100267223 | Method of Fabricating Thin Film Interface for Internal Light Reflection and Impurities Isolation - A high-quality epitaxial silicon thin layer is formed on an upgraded metallurgical grade silicon (UMG-Si) substrate. A thin film interface is fabricated between the UMG-Si substrate and the epitaxial silicon thin layer. The interface is capable of internal light reflection and impurities isolation. With the interface, photoelectrical conversion efficiency is improved. Thus, the present invention is fit to be applied for making solar cell having epitaxial silicon thin layer. | 10-21-2010 |
20110065265 | FABRICATION METHOD AND FABRICATION APPARATUS OF GROUP III NITRIDE CRYSTAL SUBSTANCE - A fabrication method of a group III nitride crystal substance includes the steps of cleaning the interior of a reaction chamber by introducing HCl gas into the reaction chamber, and vapor deposition of a group III nitride crystal substance in the cleaned reaction chamber. A fabrication apparatus of a group III nitride crystal substance includes a configuration to introduce HCl gas into the reaction chamber, and a configuration to grow a group III nitride crystal substance by HVPE. Thus, a fabrication method of a group III nitride crystal substance including the method of effectively cleaning deposits adhering inside the reaction chamber during crystal growth, and a fabrication apparatus employed in the fabrication method are provided. | 03-17-2011 |
20120034768 | METHOD OF MANUFACTURING SEMICONDUCTOR WAFER - A method of manufacturing a semiconductor wafer, which includes: a semiconductor substrate made of silicon and having both a central area and an outer periphery area; and a compound semiconductor layer made of a nitride-based semiconductor and formed on the semiconductor substrate, the method comprising: forming a growth inhibition layer to inhibit the compound semiconductor layer from growing on a tapered part provided in the outer periphery area of the semiconductor substrate; and growing the compound semiconductor layer on at least the central area of the semiconductor substrate, after the growth inhibition layer has been formed. | 02-09-2012 |
20120231615 | SEMICONDUCTOR THIN-FILM MANUFACTURING METHOD, SEMICONDUCTOR THIN-FILM MANUFACTURING APPARATUS, SUSCEPTOR, AND SUSCEPTOR HOLDER - Substrates are mounted on a plurality of susceptors respectively. The plurality of susceptors on which respective substrates are mounted are placed on a rotational mechanism so that the susceptors are vertically spaced at a predetermined interval. The rotational mechanism on which the plurality of susceptors are placed is rotated. The plurality of susceptors on which the substrates are mounted respectively are heated. Semiconductor thin-films are deposited by supplying a source gas to each of the susceptors that are heated while being rotated, the source gas having been heated while passing through gas flow paths of respective path lengths substantially equal to each other. | 09-13-2012 |
20120270384 | APPARATUS FOR DEPOSITION OF MATERIALS ON A SUBSTRATE - Methods and apparatus for deposition of materials on a substrate are provided herein. In some embodiments, an apparatus for processing a substrate may include a process chamber having a substrate support disposed therein to support a processing surface of a substrate, an injector disposed to a first side of the substrate support and having a first flow path to provide a first process gas and a second flow path to provide a second process gas independent of the first process gas, wherein the injector is positioned to provide the first and second process gases across the processing surface of the substrate, a showerhead disposed above the substrate support to provide the first process gas to the processing surface of the substrate, and an exhaust port disposed to a second side of the substrate support, opposite the injector, to exhaust the first and second process gases from the process chamber. | 10-25-2012 |
20120289035 | NANOSCALE CHEMICAL TEMPLATING WITH OXYGEN REACTIVE MATERIALS - A method of fabricating templated semiconductor nanowires on a surface of a semiconductor substrate for use in semiconductor device applications is provided. The method includes controlling the spatial placement of the semiconductor nanowires by using an oxygen reactive seed material. The present invention also provides semiconductor structures including semiconductor nanowires. In yet another embodiment, patterning of a compound semiconductor substrate or other like substrate which is capable of forming a compound semiconductor alloy with an oxygen reactive element during a subsequent annealing step is provided. This embodiment provides a patterned substrate that can be used in various applications including, for example, in semiconductor device manufacturing, optoelectronic device manufacturing and solar cell device manufacturing. | 11-15-2012 |
20130017674 | CRYOGENIC SILICON ION-IMPLANTATION AND RECRYSTALLIZATION ANNEALINGAANM Itokawa; HiroshiAACI MaltaAAST NYAACO USAAGP Itokawa; Hiroshi Malta NY US - Described herein are methods for forming a semiconductor structure. The methods involve forming a doped semiconductor film, amorphizing the doped semiconductor film through ion implantation; and annealing the doped semiconductor film. The ion implantation and the annealing can increase an activation efficiency of the dopant. The ion implantation and the annealing can also reduce a number of crystalline defects in the doped semiconductor film. | 01-17-2013 |
20130034951 | METHOD OF MANUFACTURING FREE-STANDING GALLIUM NITRIDE SUBSTRATE - A method of manufacturing a free-standing gallium nitride (GaN) substrate, by which a free-standing GaN substrate can be manufactured without warping or cracks. The method includes the steps of collecting polycrystalline GaN powder that is deposited in a reactor or on a susceptor in a process of growing single crystalline GaN, loading the collected polycrystalline GaN powder into a forming mold, preparing a polycrystalline GaN substrate by sintering the loaded polycrystalline GaN powder, and forming a single crystalline GaN layer by growing single crystalline GaN over the polycrystalline GaN substrate. It is possible to reduce warping and cracks that are caused, due to the difference in the coefficient of thermal expansion, during the growth or cooling of single crystalline GaN in the process of manufacturing the free-standing GaN substrate. | 02-07-2013 |
20130052809 | PRE-CLEAN METHOD FOR EPITAXIAL DEPOSITION AND APPLICATIONS THEREOF - A method for fabricating an epitaxizl structure is provided, wherein the method comprises steps as follows: a reactive gas containing nitrogen and fluorine atoms is firstly applied to react with an oxygen-atom-containing residue residing on a surface of a substrate so as to form a solid compound on the surface. Subsequently, an anneal process is performed to sublimate the solid compound. A semiconductor deposition process is then performed on the substrate. | 02-28-2013 |
20130109159 | GAS DISPERSION APPARATUS | 05-02-2013 |
20130109160 | METHODS FOR DEPOSITING THIN FILMS COMPRISING INDIUM NITRIDE BY ATOMIC LAYER DEPOSITION | 05-02-2013 |
20130143396 | Pretreatment Method for Reduction and/or Elimination of Basal Plane Dislocations Close to Epilayer/Substrate Interface in Growth of SiC Epitaxial - Non-destructive pretreatment methods are generally provided for a surface of a SiC substrate with substantially no degradation of surface morphology thereon. In one particular embodiment, a molten mixture (e.g., including KOH and a buffering agent) is applied directly onto the surface of the SiC substrate to form a treated surface thereon. An epitaxial film (e.g., SiC) can then be grown on the treated surface to achieve very high (e.g., up to and including 100%) BPD to TED conversion rate close to the epilayer/substrate interface. | 06-06-2013 |
20130244410 | METHODS OF FORMING BULK III-NITRIDE MATERIALS ON METAL-NITRIDE GROWTH TEMPLATE LAYERS, AND STRUCTURES FORMED BY SUCH METHODS - Bulk III-nitride semiconductor materials are deposited in an HPVE process using a metal trichloride precursor on a metal nitride template layer of a growth substrate. Deposition of the bulk III-nitride semiconductor material may be performed without ex situ formation of the template layer using a MOCVD process. In some embodiments, a nucleation template layer is formed ex situ using a non-MOCVD process prior to depositing bulk III-nitride semiconductor material on the template layer using an HVPE process. In additional embodiments, a nucleation template layer is formed in situ using an MOCVD process prior to depositing bulk III-nitride semiconductor material on the template layer using an HVPE process. In further embodiments, a nucleation template layer is formed in situ using an HVPE process prior to depositing bulk III-nitride semiconductor material on the template layer using an HVPE process. | 09-19-2013 |
20130260541 | METHOD FOR PRODUCING Ga-CONTAINING GROUP III NITRIDE SEMICONDUCTOR - A method for producing a Ga-containing group III nitride semiconductor having reduced threading dislocation is disclosed. A buffer layer in a polycrystal, amorphous or polycrystal/amorphous mixed state, comprising AlGaN is formed on a substrate. The substrate having the buffer layer formed thereon is heat-treated at a temperature higher than a temperature at which a single crystal of a Ga-containing group III nitride semiconductor grows on the buffer layer and at a temperature that the Ga-containing group III nitride semiconductor does not grow, to reduce crystal nucleus density of the buffer layer as compared with the density before the heat treatment. After the heat treatment, the temperature of the substrate is decreased to a temperature that the Ga-containing group III nitride semiconductor grows, the temperature is maintained, and the Ga-containing group III nitride semiconductor is grown on the buffer layer. | 10-03-2013 |
20140342536 | Defect Reduction Using Aspect Ratio Trapping - Lattice-mismatched epitaxial films formed proximate non-crystalline sidewalls. Embodiments of the invention include formation of facets that direct dislocations in the films to the sidewalls. | 11-20-2014 |
20150017789 | ELECTRONIC DEVICE USING GROUP III NITRIDE SEMICONDUCTOR AND ITS FABRICATION METHOD AND AN EPITAXIAL MULTI-LAYER WAFER FOR MAKING IT - The present invention discloses an electronic device using a group III nitride substrate fabricated via the ammonothermal method. By utilizing the high-electron concentration of ammonothermally grown substrates having the dislocation density less than 10 | 01-15-2015 |
20150311069 | METHOD FOR MANUFACTURING SILICON CARBIDE SEMICONDUCTOR SUBSTRATE - A method for manufacturing a silicon carbide semiconductor substrate is provided to offer a silicon carbide semiconductor substrate having a highly flat surface at low cost. The method includes: a step of preparing a silicon carbide substrate as a seed substrate; a step of performing vapor phase etching onto a main surface of the silicon carbide substrate; and a step of epitaxially growing silicon carbide on the main surface. A carbon-atom containing gas is supplied to silicon carbide substrate from a point of time in the step of performing the vapor phase etching. | 10-29-2015 |
20150348773 | ALUMINUM-NITRIDE BUFFER AND ACTIVE LAYERS BY PHYSICAL VAPOR DEPOSITION - Embodiments of the invention described herein generally relate to an apparatus and methods for forming high quality buffer layers and Group III-V layers that are used to form a useful semiconductor device, such as a power device, light emitting diode (LED), laser diode (LD) or other useful device. Embodiments of the invention may also include an apparatus and methods for forming high quality buffer layers, Group III-V layers and electrode layers that are used to form a useful semiconductor device. In some embodiments, an apparatus and method includes the use of one or more cluster tools having one or more physical vapor deposition (PVD) chambers that are adapted to deposit a high quality aluminum nitride (AlN) buffer layer that has a high crystalline orientation on a surface of a plurality of substrates at the same time. | 12-03-2015 |
20160068954 | SYNTHESIS OF SILICON CONTAINING MATERIALS USING LIQUID HYDROSILANE COMPOSITIONS THROUGH DIRECT INJECTION - An apparatus and a non-vapor-pressure dependent method of chemical vapor deposition of Si based materials using direct injection of liquid hydrosilane(s) are presented. Liquid silane precursor solutions may also include metal, non-metal or metalloid dopants, nanomaterials and solvents. An illustrative apparatus has a precursor solution and carrier gas system, atomizer and deposit head with interior chamber and a hot plate supporting the substrate. Atomized liquid silane precursor solutions and carrier gas moves through a confined reaction zone that may be heated and the aerosol and vapor are deposited on a substrate to form a thin film. The substrate may be heated prior to deposition. The deposited film may be processed further with thermal or laser processing. | 03-10-2016 |
20160181096 | Method For Growing Germanium Epitaxial Films | 06-23-2016 |
20160189956 | METHOD FOR MANUFACTURING SiC WAFER FIT FOR INTEGRATION WITH POWER DEVICE MANUFACTURING TECHNOLOGY - A method for producing silicon carbide substrates fit for epitaxial growth in a standard epitaxial chamber normally used for silicon wafers processing. Strict limitations are placed on any substrate that is to be processed in a chamber normally used for silicon substrates, so as to avoid contamination of the silicon wafers. To take full advantage of standard silicon processing equipment, the SiC substrates are of diameter of at least 150 mm. For proper growth of the SiC boule, the growth crucible is made to have interior volume that is six to twelve times the final growth volume of the boule. Also, the interior volume of the crucible is made to have height to width ratio of 0.8 to 4.0. Strict limits are placed on contamination, particles, and defects in each substrate. | 06-30-2016 |
438504000 | Differential etching | 18 |
20090163001 | SEPARATE INJECTION OF REACTIVE SPECIES IN SELECTIVE FORMATION OF FILMS - Methods and apparatuses for selective epitaxial formation of films separately inject reactive species into a CVD chamber. The methods are particularly useful for selective deposition using volatile combinations of precursors and etchants. Formation processes include simultaneous supply of precursors and etchants for selective deposition, or sequential supply for cyclical blanket deposition and selective etching. In either case, precursors and etchants are provided along separate flow paths that intersect in the relatively open reaction space, rather than in more confined upstream locations. | 06-25-2009 |
20090246947 | Method for Manufacturing Semiconductor Device - Disclosed herein is a method of manufacturing a semiconductor device that includes forming a metal catalytic pattern on a semiconductor substrate; etching the semiconductor substrate using the metal catalytic pattern as an etching mask to form a recess; forming an insulating layer over a structure including the recess, the metal catalytic pattern, and the semiconductor substrate; patterning the insulating layer to cross over the metal catalytic pattern and to expose a predetermined portion of the metal catalytic pattern; and growing a nano wire using the exposed predetermined portion of the metal catalytic pattern. | 10-01-2009 |
20090280627 | METHOD OF FORMING STEPPED RECESSES FOR EMBEDDED STRAIN ELEMENTS IN A SEMICONDUCTOR DEVICE - A method of fabricating a semiconductor transistor device is provided. The fabrication method begins by forming a gate structure overlying a layer of semiconductor material, such as silicon. Then, spacers are formed about the sidewalls of the gate structure. Next, ions of an amorphizing species are implanted into the semiconductor material at a tilted angle toward the gate structure. The gate structure and the spacers are used as an ion implantation mask during this step. The ions form amorphized regions in the semiconductor material. Thereafter, the amorphized regions are selectively removed, resulting in corresponding recesses in the semiconductor material. In addition, the recesses are filled with stress inducing semiconductor material, and fabrication of the semiconductor transistor device is completed. | 11-12-2009 |
20100029070 | METHOD FOR PRODUCING SEMICONDUCTOR DEVICE - A method for producing a device includes embedding trenches with an epitaxial layer having high crystallinity while a mask oxide film remains unremoved. An n-type semiconductor is formed on the surface of a silicon substrate, and a mask oxide film and a mask nitride film are formed on the surface of the n-type semiconductor. The mask laminated film is opened by photolithography and etching, and trenches are formed in the silicon substrate. The width of the remaining mask laminated film is narrowed, whereby portions of the n-type semiconductor close to the opening ends of the trenches are exposed. The trenches are embedded with a p-type semiconductor, whereby the surface of the mask laminated film is prevented from being covered with the p-type semiconductor. The p-type semiconductor is grown from the second exposed portions of the n-type semiconductor. V-shaped grooves are prevented from forming on the surface of the p-type semiconductor. | 02-04-2010 |
20100124814 | METHODS FOR IMPROVING THE QUALITY OF STRUCTURES COMPRISING SEMICONDUCTOR MATERIALS - Methods which can be applied during the epitaxial growth of semiconductor structures and layers of III-nitride materials so that the qualities of successive layers are successively improved. An intermediate epitaxial layer is grown on an initial surface so that growth pits form at surface dislocations present in the initial surface. A following layer is then grown on the intermediate layer according to the known phenomena of epitaxial lateral overgrowth so it extends laterally and encloses at least the agglomerations of intersecting growth pits. Preferably, prior to growing the following layer, a discontinuous film of a dielectric material is deposited so that the dielectric material deposits discontinuously so as to reduce the number of dislocations in the laterally growing material. The methods of the invention can be performed multiple times to the same structure. Also, semiconductor structures fabricated by these methods. | 05-20-2010 |
20110189842 | Method For Producing A Semiconductor Wafer Composed Of Silicon With An Epitaxially Deposited Layer - Semiconductor wafers composed of silicon with an epitaxially deposited layer, are prepared by:
| 08-04-2011 |
20120142173 | MANUFACTURING METHOD OF SILICON CARBIDE SINGLE CRYSTAL - A manufacturing method of an SiC single crystal includes preparing an SiC substrate, implanting ions into a surface portion of the SiC substrate to form an ion implantation layer, activating the ions implanted into the surface portion of the SiC substrate by annealing, chemically etching the surface portion of the SiC substrate to form an etch pit that is caused by a threading screw dislocation included in the SiC substrate and performing an epitaxial growth of SiC to form an SiC growth layer on a surface of the SiC substrate including an inner wall of the etch pit in such a manner that portions of the SiC growth layer grown on the inner wall of the etch pit join with each other. | 06-07-2012 |
20120220110 | SEMICONDUCTOR FABRICATION APPARATUSES TO PERFORM SEMICONDUCTOR ETCHING AND DEPOSITION PROCESSES AND METHODS OF FORMING SEMICONDUCTOR DEVICE USING THE SAME - A semiconductor fabrication apparatus and a method of fabricating a semiconductor device using the same performs semiconductor etching and deposition processes at an edge of a semiconductor substrate after disposing the semiconductor substrate at a predetermined place in the semiconductor fabrication apparatus. The semiconductor fabrication apparatus has lower, middle and upper electrodes sequentially stacked. The semiconductor substrate is disposed on the middle electrode. Semiconductor etching and deposition processes are performed on the semiconductor substrate in the semiconductor fabrication apparatus. The semiconductor fabrication apparatus forms electrical fields along an edge of the middle electrode during performance of the semiconductor etching and deposition processes. | 08-30-2012 |
20120276722 | METHOD FOR GROWING SEMIPOLAR NITRIDE - A method for growing a semipolar nitride comprises steps: forming a plurality of parallel discrete trenches on a silicon substrate , each discrete trenches having a first wall and a second wall, wherein a tilt angle is formed between the surface of the silicon substrate and the first wall; forming a buffer layer on the silicon substrate and the trenches, wherein the buffer layer on the first wall has a plurality of growing zones and a plurality of non-growing zones among the growing zones and complementary to the growing zones; forming a cover layer on the buffer layer and revealing the growing zones; and growing a semipolar nitride from the growing zones of the buffer layer and covering the cover layer. Thereby cracks caused by thermal stress between the silicon substrate and semipolar nitride are decreased and the quality of the semipolar nitride film is improved. | 11-01-2012 |
20120295428 | METHODS FOR PRETREATMENT OF GROUP III-NITRIDE DEPOSITIONS - Embodiments of the present disclosure relate to methods for pretreatment of substrates and group III-nitride layers for manufacturing devices such as light emitting diodes (LEDs), laser diodes (LDs) or power electronic devices. One embodiment of the present disclosure provides a method including providing one or more substrates having an aluminum containing surface in a processing chamber and exposing a surface of each of the one or more substrates having an aluminum containing surface to a pretreatment gas mixture to form a pretreated surface. The pretreatment gas mixture includes ammonia (NH | 11-22-2012 |
20130302973 | HORIZONTAL EPITAXY FURNACE FOR CHANNEL SIGE FORMATION - A method and apparatus are provided for recessing a channel region of the PFET and epitaxially growing channel SiGe in the recessed region inside of a horizontally oriented processing furnace. Embodiments include forming an n-channel region and a p-channel region in a front side of a wafer and at least one additional wafer, the n-channel and p-channel regions corresponding to locations for forming an NFET and a PFET, respectively; placing the wafers inside a horizontally oriented furnace having a top surface and a bottom surface, with the wafers oriented vertically between the top and bottom surfaces; recessing the p-channel regions of the wafers inside the furnace; and epitaxially growing cSiGe without hole defects in the recessed p-channel regions inside the furnace. | 11-14-2013 |
20130330916 | METHODS OF FORMING HIGH MOBILITY FIN CHANNELS ON THREE DIMENSIONAL SEMICONDUCTOR DEVICES - Disclosed herein are various methods of forming high mobility fin channels on three dimensional semiconductor devices, such as, for example, FinFET semiconductor devices. In one example, the method includes forming a plurality of spaced-apart trenches in a semiconducting substrate, wherein the trenches define an original fin structure for the device, and wherein a portion of a mask layer is positioned above the original fin structure, forming a compressively-stressed material in the trenches and adjacent the portion of mask layer, after forming the compressively-stressed material, removing the portion of the mask layer to thereby expose an upper surface of the original fin structure, and forming a final fin structure above the exposed surface of the original fin structure. | 12-12-2013 |
20140141602 | Method for Manufacturing a Semiconductor Device - A method for producing a semiconductor device is provided. The method includes: forming in a semiconductor substrate a plurality of semiconductor mesas extending to an upper side so that adjacent semiconductor mesas are spaced apart from each other by one of a substantially empty trench and a trench substantially filled with a sacrificial layer selectively etchable with respect to the semiconductor mesas; forming a support structure mechanically connecting the semiconductor mesas spaced apart from each other by one of the substantially empty trench and the trench substantially filled with the sacrificial layer; and processing the semiconductor substrate from the upper side while the semiconductor mesas are mechanically connected via the support structure. | 05-22-2014 |
20140154875 | METHOD OF EPITAXIAL GERMANIUM TIN ALLOY SURFACE PREPARATION - Methods of preparing a clean surface of germanium tin or silicon germanium tin layers for subsequent deposition are provided. An overlayer of Ge, doped Ge, another GeSn or SiGeSn layer, a doped GeSn or SiGeSn layer, an insulator, or a metal can be deposited on a prepared GeSn or SiGeSn layer by positioning a substrate with an exposed germanium tin or silicon germanium tin layer in a processing chamber, heating the processing chamber and flowing a halide gas into the processing chamber to etch the surface of the substrate using either thermal or plasma assisted etching followed by depositing an overlayer on the substantially oxide free and contaminant free surface. Methods can also include the placement and etching of a sacrificial layer, a thermal clean using rapid thermal annealing, or a process in a plasma of nitrogen trifluoride and ammonia gas. | 06-05-2014 |
20140349469 | PROCESSING FOR ELECTROMECHANICAL SYSTEMS AND EQUIPMENT FOR SAME - This disclosure provides systems, methods and apparatus for processing multiple substrates in a processing tool. An apparatus for processing substrates can include a process chamber, a common reactant source, and a common exhaust pump. The process chamber can be configured to process multiple substrates. The process chamber can include a plurality of stacked individual subchambers. Each subchamber can be configured to process one substrate. The common reactant source can be configured to provide reactant to each of the subchambers in parallel. The common exhaust pump can be connected to each of the subchambers. | 11-27-2014 |
20150311073 | TECHNIQUES FOR FORMING ANGLED STRUCTURES FOR REDUCED DEFECTS IN HETEROEPITAXY OF SEMICONDUCTOR FILMS - In one embodiment, a method for etching a substrate includes providing a reactive ambient around the substrate when a non-crystalline layer is disposed over a first crystalline material in the substrate; generating a plasma in a plasma chamber; modifying a shape of a plasma sheath boundary of the plasma; extracting ions from the plasma; and directing the ions to the substrate at a non-zero angle of incidence with respect to a perpendicular to a plane of the substrate, wherein the ions and reactive ambient are effective to form an angled cavity through the non-crystalline layer to expose a portion of the first crystalline material at a bottom of the angled cavity, and the angled cavity forms a non-zero angle of inclination with respect to the perpendicular. | 10-29-2015 |
20150371868 | METHOD FOR FABRICATING VERTICALLY STACKED NANOWIRES FOR SEMICONDUCTOR APPLICATIONS - Embodiments of the present disclosure provide methods for forming nanowire structures with desired materials for three dimensional (3D) stacking of fin field effect transistor (FinFET) for semiconductor chips. In one example, a method of forming nanowire structures on a substrate includes in a suspended nanowire structure on a substrate, the suspended nanowire includes multiple material layers having a spaced apart relationship repeatedly formed in the suspended nanowire structure, wherein the material layer includes a coating layer coated on an outer surface of a main body formed in the material layer, selectively removing a first portion of the coating layer from the material layers to expose the underlying main body of the material layers while maintaining a second portion of the coating layer remaining on the material layers, laterally etching the main body of the material layers exposed by removal of the coating layer, and selectively growing film layers on the exposed main body of the material layer. | 12-24-2015 |
20160126337 | SUBSTRATE PROCESSING APPARATUS, SEMICONDUCTOR DEVICE MANUFACTURING METHOD, AND SUBSTRATE PROCESSING METHOD - A substrate processing apparatus includes a substrate having an SiGe film or Ge film exposed on at least a portion of a surface thereof, a process chamber configured to process the substrate, an etching gas supply part configured to supply an etching gas into the process chamber, a deposition gas supply part configured to supply gas containing at least an Si-containing gas as a deposition gas into the process chamber, and a control part configured to control the deposition gas supply part and the etching gas supply part so as to remove a Ge oxide film formed on a surface of the SiGe film or the Ge film by supplying the etching gas and to epitaxially grow an Si-containing film on at least the SiGe film or the Ge film by supplying the Si-containing gas after removing the Ge oxide film by the supply of the etching gas. | 05-05-2016 |
438505000 | Doping of semiconductor | 6 |
20080286951 | Semiconductor Wafer With An Epitaxially Deposited Layer, And Process For Producing The Semiconductor Wafer - A semiconductor wafer is formed of a substrate wafer of single crystal silicon doped with dopant atoms of the n type or p type, with a front surface and a back surface, contains a layer deposited epitaxially on the front surface of the substrate wafer. The substrate wafer additionally includes an n | 11-20-2008 |
20090163002 | METHOD OF FORMING P-TYPE COMPOUND SEMICONDUCTOR LAYER - A method of forming a p-type compound semiconductor layer includes increasing a temperature of a substrate loaded into a reaction chamber to a first temperature. A source gas of a Group III element, a source gas of a p-type impurity, and a source gas of nitrogen containing hydrogen are supplied into the reaction chamber to grow the p-type compound semiconductor layer. Then, the supply of the source gas of the Group III element and the source gas of the p-type impurity is stopped and the temperature of the substrate is lowered to a second temperature. The supply of the source gas of nitrogen containing hydrogen is stopped and drawn out at the second temperature, and the temperature of the substrate is lowered to room temperature using a cooling gas. Accordingly, hydrogen is prevented from bonding to the p-type impurity in the p-type compound semiconductor layer. | 06-25-2009 |
20130109161 | METAL ORGANIC CHEMICAL VAPOR DEPOSITION APPARATUS AND METHOD | 05-02-2013 |
438506000 | Ion implantation | 3 |
20090042373 | PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING A DOPED SEMICONDUCTOR LAYER - A process can include forming a doped semiconductor layer over a substrate. The process can also include performing an action that reduces a dopant content along an exposed surface of a workpiece that includes the substrate and the doped semiconductor layer. The action is performed after forming the doped semiconductor layer and before the doped semiconductor layer is exposed to a room ambient. In particular embodiments, the doped semiconductor layer includes a semiconductor material that includes a combination of at least two elements selected from the group consisting of C, Si, and Ge, and the doped semiconductor layer also includes a dopant, such as phosphorus, arsenic, boron, or the like. The action can include forming an encapsulating layer, exposing the doped semiconductor layer to radiation, annealing the doped semiconductor layer, or any combination thereof. | 02-12-2009 |
20110306192 | METHOD FOR FORMING IMPURITY REGION OF VERTICAL TRANSISTOR AND METHOD FOR FABRICATING VERTICAL TRANSISTOR USING THE SAME - A method for forming an impurity region of a vertical transistor includes forming an impurity ion junction region within a semiconductor substrate, and forming a trench by etching the semiconductor substrate in which the impurity ion junction region is formed. The etching process is performed to remove a portion of the impurity ion junction region, so that a remaining portion of the impurity ion junction region is exposed to a lower side wall of the trench to serve as a buried bit line junction region. | 12-15-2011 |
20160005839 | METHOD AND APPARATUS FOR SELECTIVE DEPOSITION - Methods for forming fin structures with desired materials formed on different locations of the fin structure using a selective deposition process for fin field effect transistors (FinFETs) are provided. In one embodiment, a method of forming a structure with desired materials on a substrate includes depositing a first material on a substrate having a three-dimensional (3D) structure formed thereon while performing an implantation process to dope a first region of the 3D structure. The first material may be removed and a second material may be deposited on the 3D structure. The second material may selectively grow on a second region of the 3D structure. | 01-07-2016 |