Class / Patent application number | Description | Number of patent applications / Date published |
708520000 | Matrix array | 37 |
20080250094 | EFFICIENT IMPLEMENTATIONS OF KERNEL COMPUTATIONS - A method and apparatus for efficiently performing digital signal processing is provided. In one embodiment, kernel matrix computations are simplified by grouping similar kernel coefficients together. Each coefficient group contains only coefficients having the same value. At least one of the coefficient groups has at least two coefficients. Techniques are disclosed herein to efficiently apply successive first order difference operations to a data signal. The techniques allow for a low gate count. In particular, the techniques allow for a reduction of the number of multipliers without increasing clock frequency, in an embodiment. The techniques update pixels of a data signal at a rate of two clock cycles per each pixel, in an embodiment. The techniques allow hardware that is used to process a first pixel to be re-used to start the processing of a second pixel while the first pixel is still being processed. | 10-09-2008 |
20090006518 | Simple MIMO precoding codebook design for a MIMO wireless communications system - The present invention relates to methods and apparatus for establishing a precoding codebook for a Multiple Input Multiple Output (MIMO) wireless communication system. The precoding codebook includes a plurality of codebook entries. Each codebook entry includes four sets of vectors for four respective corresponding transmission ranks. The vectors may be predetermined, or generated from source unitary matrices. In addition, the codebook is fully nested. | 01-01-2009 |
20090063607 | METHOD AND STRUCTURE FOR FAST IN-PLACE TRANSFORMATION OF STANDARD FULL AND PACKED MATRIX DATA FORMATS - A method and structure for an in-place transformation of matrix data. For a matrix A stored in one of a standard full format or a packed format and a transformation T having a compact representation, blocking parameters MB and NB are chosen, based on a cache size. A sub-matrix A | 03-05-2009 |
20090063608 | Full Vector Width Cross Product Using Recirculation for Area Optimization - Embodiments of the invention are generally related to the field of image processing, and more specifically to vector units for supporting image processing. A vector unit may comprise a plurality of operand multiplexers associated with each vector processing lane of the vector unit. The operand multiplexers may select vector operands from one or more register files for performing a cross product operation. A first multiply operation may be performed in a first pipeline stage by multiplying a first set of operands in a multiplier. In a second pipeline stage, a second multiply operation may be performed by multiplying a second set of operands. The results of the first multiply operation and the second multiply operation may be transferred to an adder to complete the cross product instruction. | 03-05-2009 |
20090077153 | Reconfigurable arithmetic unit - A reconfigurable arithmetic circuit including a plurality of logical AND gates arranged in logical columns and rows, a plurality of conductors each connected to furnish input to the AND gates of a row, an array of memory cells each connected to furnish input to one of the AND gates, and a plurality of reconfigurable counting circuits, each counting circuit connected to receive the output of each of the AND gates in a column, each counting circuit being configurable to provide a count of parity of the outputs furnished by the AND gates of the column. | 03-19-2009 |
20090106343 | METHOD AND STRUCTURE FOR PRODUCING HIGH PERFORMANCE LINEAR ALGEBRA ROUTINES USING COMPOSITE BLOCKING BASED ON L1 CACHE SIZE - A method (and structure) for performing a matrix subroutine, includes storing data for a matrix subroutine call in a computer memory in an increment block size that is based on a cache size. | 04-23-2009 |
20090157787 | ROW-VECTOR NORM COMPARISON METHOD AND ROW-VECTOR NORM COMPARISON APPARATUS FOR INVERSE MATRIX - Disclosed are a row-vector norm comparison method and a row-vector norm comparison apparatus for an inverse matrix. A row-vector norm comparison apparatus includes: an input matrix processing module that receives and combines constituent elements of a matrix; a cofactor operation module that multiplexes the combination result of the constituent elements to calculate factors constituting an adjoint matrix; a square calculation module that squares the calculated factors; a summation module that selects a predetermined number of factors among the squared factors and sums the selected factors to calculate the norms of row vectors in an inverse matrix; and a norm comparison module that outputs a comparison result of the calculated norms of the row vectors. A row-vector norm comparison method includes: combining constituent elements of a matrix to generates a plurality of combination results of the constituent elements; multiplexing the combination results to calculate factors constituting an adjoint matrix of the matrix; squaring the calculated factors and selectively summing the squared factors; and calculating the norms of row vectors in an inverse matrix and comparing the calculated norms of the row vectors. With this configuration, row-vector norm comparison for an inverse matrix can be performed with a design structure. Therefore, it is not necessary to use an existing complex operation method. In addition, low power consumption of the multiple antenna system can be achieved, and efficiency of the design structure can be improved. | 06-18-2009 |
20090248778 | SYSTEMS AND METHODS FOR A COMBINED MATRIX-VECTOR AND MATRIX TRANSPOSE VECTOR MULTIPLY FOR A BLOCK-SPARSE MATRIX - Systems and methods for combined matrix-vector and matrix-transpose vector multiply for block sparse matrices. Exemplary embodiments include a method of updating a simulation of physical objects in an interactive computer, including generating a set of representations of objects in the interactive computer environment, partitioning the set of representations into a plurality of subsets such that objects in any given set interact only with other objects in that set, generating a vector b describing an expected position of each object at the end of a time interval h, applying a biconjugate gradient algorithm to solve A*Δv=b for the vector Δv of position and velocity changes to be applied to each object wherein the q=Ap and qt=A | 10-01-2009 |
20090292755 | METHODS AND APPARATUS FOR SIGNATURE PREDICTION AND FEATURE LEVEL FUSION - A system for signature prediction and feature-level fusion of a target according to various aspects of the present invention includes a first sensing modality for providing a measured data set. The system further includes a processor receiving the measured data set and generating a first k-orthogonal spanning tree constructed from k orthogonal minimal spanning trees having no edge shared between the k minimal spanning trees to define a first data manifold. | 11-26-2009 |
20100082724 | Method For Solving Reservoir Simulation Matrix Equation Using Parallel Multi-Level Incomplete Factorizations - A parallel-computing iterative solver is provided that employs a preconditioner that is processed using parallel-computing for solving linear systems of equations. Thus, a preconditioning algorithm is employed for parallel iterative solution of a large sparse system of linear system of equations (e.g., algebraic equations, matrix equations, etc.), such as the linear system of equations that commonly arise in computer-based 3D modeling of real-world systems (e.g., 3D modeling of oil or gas reservoirs, etc.). A novel technique is proposed for application of a multi-level preconditioning strategy to an original matrix that is partitioned and transformed to block bordered diagonal form. An approach for deriving a preconditioner for use in parallel iterative solution of a linear system of equations is provided. In particular, a parallel-computing iterative solver may derive and/or apply such a preconditioner for use in solving, through parallel processing, a linear system of equations. | 04-01-2010 |
20100241683 | METHOD AND APPARATUS FOR ARITHMETIC OPERATION BY SIMULTANEOUS LINEAR EQUATIONS OF SPARSE SYMMETRIC POSITIVE DEFINITE MATRIX - An arithmetic operation apparatus includes: a branch node set detection unit to detect a set of branch nodes for each parallel level; a subtree memory storage area allocation unit to allocate an arithmetic result of a column vector to a memory storage area selected on a basis of a predetermined selection rule from a plurality of memory storage areas; and a node memory storage area allocation unit to allocate an arithmetic result of a column vector to a memory storage area selected on a basis of a predetermined selecting rule from a plurality of memory storage areas. | 09-23-2010 |
20100306300 | Sparse Matrix Padding - Zero elements are added to respective lines (e.g., rows/columns) of a sparse matrix. The added zero elements increase the number of elements in the respective lines to be a multiple of a predetermined even number “n” (e.g., 2, 4, 8, etc.), based upon an n-fold unrolling loop, where n=2, 4, 8, etc. By forming a sparse matrix having lines (e.g., rows or columns) that are multiples of the predetermined number “n”, the n-fold unrolling loop thereby acts upon a predetermined number of elements in respective iterations, avoiding unnecessarily costly operations (e.g., additional loop unrolling code) on remainder non-zero elements (e.g. remainder row/column elements not within an n-fold unrolling loop) left in a row or column after unrolling. This improves the efficiency of sparse matrix linear algebra solvers and key sparse linear algebra kernels (e.g., SPMV) thereby improving the overall performance of a computer (e.g., running an application). | 12-02-2010 |
20110010411 | VIEW PROJECTION - A first derived matrix of transport coefficients and a second derived matrix of transport coefficients are derived from a primary matrix of transport coefficients Each of the transport coefficients describes transport of a respective image forming element from a first position onto one or more image forming elements at a second position. An approximate inverse of the first derived matrix is ascertained. A modified version of a projection image is determined from the projection image, the approximated inverse of the first derived matrix, and the second derived matrix. The modified version of the projection image is rendered from the first position onto a physical medium at the second position. | 01-13-2011 |
20110191401 | CIRCUIT AND METHOD FOR CHOLESKY BASED DATA PROCESSING - A method for Cholesky based processing of data includes receiving a first matrix that equals a product of a first lower triangular matrix and a first upper triangular matrix, where the first upper triangular matrix is a complex conjugate transpose of the first lower triangular matrix, and applying, by a processing unit that has a set of P processors, a loopless Cholesky factorization process on each equally sized block of multiple equally sized blocks of the first matrix to provide the first lower triangular matrix. Each equally sized block has E elements, where E is a integer multiple of P. | 08-04-2011 |
20120296950 | METHOD AND APPARATUS FOR QR-FACTORIZING MATRIX ON A MULTIPROCESSOR SYSTEM - A method and apparatus for QR-factorizing matrix on a multiprocessor system, wherein the multiprocessor system comprises at least one core processor and a plurality of accelerators, comprises the steps of: iteratively factorizing each panel in the matrix until the whole matrix is factorized; wherein in each iteration, the method comprises: partitioning an unprocessed matrix part in the matrix into a plurality of blocks according to a predetermined block size; partitioning a current processed panel in the unprocessed matrix part into at least two sub panels, wherein the current processed panel is composed of a plurality of blocks; and performing QR factorization one by one on the at least two sub panels with the plurality of accelerators, and updating the data of the sub panel(s) on which no QR factorization has been performed among the at least two sub panels by using the factorization result. | 11-22-2012 |
20130124593 | QUANTIFYING MEHTOD FOR INTRINSIC DATA TRANSFER RATE OF ALGORITHMS - The quantifying method for intrinsic data transfer rate of algorithms is provided. The provided quantifying method for an intrinsic data transfer rate includes steps of: detecting whether or not a datum is used; providing a dataflow graph G including n vertices and m edges, and a Laplacian matrix L having ixj elements L(i,j) when the datum is not reused, wherein each of the vertices represents one of an operation and a datum, each of the edges represents a data transfer, and vi is the ith vertex; and using the Laplacian matrix L to estimate a maximum quantity of the intrinsic data transfer rate. | 05-16-2013 |
20130138712 | MINIMUM MEAN SQUARE ERROR PROCESSING - A first systolic array receives an input set of time division multiplexed matrices from a plurality of channel matrices. In a first mode, the first systolic array performs triangularization on the input matrices, producing a first set of matrices, and in a second mode performs back-substitution on the first set, producing a second set of matrices. In a first mode, a second systolic array performs left multiplication on the second set of matrices with the input set of matrices, producing a third set of matrices. In a second mode, the second systolic array performs cross diagonal transposition on the third set of matrices, producing a fourth set of matrices, and performs right multiplication on the second set of matrices with the fourth set of matrices. The first systolic array switches from the first mode to the second mode after the triangularization, and the second systolic array switches from the first mode to the second mode after the left multiplication. | 05-30-2013 |
20130159372 | MATRIX-BASED DYNAMIC PROGRAMMING - Embodiments relate to dynamic programming. An aspect includes representing a dynamic programming problem as a matrix of cells, each cell representing an intermediate score to be calculated. Another aspect includes providing a mapping assigning cells of the matrix to elements of a result container data structure, and storing cells of the matrix to elements of the result container data structure in accordance with the mapping. Another aspect includes calculating intermediate scores of all cells of the matrix, whereby intermediate scores of some of the cells of the matrix are stored to a respectively assigned element of the result container data structure in accordance with the mapping. Another aspect includes during the calculation of the intermediate scores, dynamically updating the assignment of cells and elements in the mapping and assembling a final result of the dynamic programming problem from the intermediate scores stored in the result container data structure. | 06-20-2013 |
20130159373 | MATRIX STORAGE FOR SYSTEM IDENTIFICATION - A sparse matrix used in the least-squares method is divided into small matrices in accordance with the number of elements of observation. An observation ID is assigned to each element of observation, a parameter ID is assigned to each parameter, and the IDs are associated with parameters of elements as ID mapping. A system determines positions of nonzero elements in accordance with whether or not ID mapping exists, the correspondence between observation IDs and parameter IDs, and the positions of the small matrices, and selects a storage scheme for each small matrix based thereon. The system selects a storage scheme in accordance with conditions, such as whether or not a target element is a diagonal element, whether or not a term decided without ID mapping exists, and whether or not the same ID mapping is referred to. | 06-20-2013 |
20130262548 | MATRIX CALCULATION UNIT - A matrix calculation unit may include a matrix operation unit and a converting unit. The matrix operation unit may include functions to perform a matrix operation of a first size with respect to data stored in a memory, and to perform a matrix operation of a second size with respect to the data stored in the memory, where the second size is enlarged from the first size. The converting unit may convert in at least one direction in the memory between a data array suited for the matrix operation of the first size and a data array suited for the matrix operation of the second size. | 10-03-2013 |
20140095569 | ORTHOGONAL CODE MATRIX GENERATION METHOD AND RELATED CIRCUIT THEREOF - An orthogonal code matrix generation method includes: establishing an N×N orthogonal code matrix, wherein an inner product of every two rows of the orthogonal code matrix is 0, and each column of the orthogonal code matrix has a summation of elements equal to a same value, wherein N is a power of 4; and using the N×N orthogonal code matrix as a basic unit to establish a target orthogonal code matrix. An orthogonal code matrix generation circuit includes: an N×N orthogonal code matrix generator, arranged for establishing an N×N orthogonal code matrix, wherein an inner product of every two rows of the orthogonal code matrix is 0, each column of the orthogonal code matrix has a summation of elements equal to a same value; and a target orthogonal code matrix generator, arranged for using the N×N orthogonal code matrix as a basic unit to establish a target orthogonal code matrix. | 04-03-2014 |
20140149480 | SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR TRANSPOSING A MATRIX - A system, method, and computer program product are provided for transposing a matrix. In use, a matrix is identified. Additionally, the matrix is transposed utilizing row-wise operations and column-wise operations, where the row-wise operations and the column-wise operations are performed independently. | 05-29-2014 |
20140164466 | DATA TRANSFORMATION DEVICE, DATA TRANSFORMATION METHOD, AND PROGRAM - A data transformation device defines a first square submatrix of an m order (m≧2) including elements (n, n) in the matrixes A and F being detA≠1 and A=GH | 06-12-2014 |
20140188969 | Efficient Algorithm to Bit Matrix Symmetry - An algorithm that maintains the symmetry of a symmetric bit matrix stored in computer memory without having to process all of the elements of a transpose column by considering only the elements changed in a row. The algorithm operates on groups of bits forming rows of the matrix rather than processing the individual bit elements of the matrix. Instead of checking whether each bit needs to be modified, the algorithm toggles only the column bits that are the transpose elements of modified row elements, thereby taking advantage of the existing symmetry to eliminate unnecessary conditional operations. As a result, the algorithm modifies the matrix on a row-by-row basis and makes changes to only those column bits that correspond to modified row elements without having to check the value of the transpose column elements that do not require modification. | 07-03-2014 |
20140280426 | INFORMATION RETRIEVAL USING SPARSE MATRIX SKETCHING - Embodiments of the invention include method of approximating a matrix of data using sparse matrices which includes receiving a first matrix and generating a second matrix based on the first matrix and a first sparse matrix. The method further includes generating a third matrix based on the first matrix and a second sparse matrix and generating a fourth matrix by generating a Moore-Penrose pseudo-inverse matrix based on the first matrix, the second matrix and the third matrix. The method also includes generating a fifth matrix based on a product of the second matrix, the third matrix, and a fourth matrix. The method further includes receiving, by a computer, a request to access at least one entry of the first matrix and responding to the request by accessing an entry of the fifth matrix. | 09-18-2014 |
20150067012 | METHOD AND DATA PROCESSING DEVICE FOR RECONSTRUCTING A VECTOR - A method for reconstructing a first vector from a second vector includes: storing code for the row vectors according to a first code and a second code; correcting the row vectors of the second vector corresponding to the first vector so that the row vectors of the second vector have the same code as the row vectors of the first vector; calculating the code of the column vectors of the second vector according to the second code; comparing the code of the row vectors of the second vector with the code of the column vectors of the first vector; identifying the columns in which the first vector is unequal to the second vector; the rows in which the first vector is unequal to the second vector; and the components in which the first vector is not equal to the second vector, and correcting the components of the second vector. | 03-05-2015 |
20150081752 | MATRIX OPERATION APPARATUS - According to an embodiment, a matrix operation apparatus executing a matrix operation includes multiple nodes, the nodes including: a multiplier configured to perform a first operation for a first input, which is column data and a second input which is row data for the matrix operation and output element components of an operation result of the matrix operation; and an accumulator configured to perform cumulative addition of operation results of the multiplier. | 03-19-2015 |
20150088953 | METHODS, SYSTEMS AND COMPUTER-READABLE MEDIA FOR DISTRIBUTED PROBABILISTIC MATRIX FACTORIZATION - The present invention provides a method and system for distributed probabilistic matrix factorization. In accordance with a disclosed embodiment, the method may include partitioning a sparse matrix into a first set of blocks on a distributed computer cluster, whereby a dimension of each block is MB rows and NB columns. Further, the method shall include initializing a plurality of matrices including first mean matrix Ū, a first variance matrix Ũ, a first prior variance matrix Ũ | 03-26-2015 |
20150106418 | METHOD AND SYSTEM FOR EFFICIENT DECOMPOSITION OF SINGLE-QUBIT QUANTUM GATES INTO FIBONACCI ANYON BRAID CIRCUITS - Methods for compiling single-qubit quantum gates into braid representations for non-Abelian quasiparticles described by the Fibonacci anyon model are based on a probabilistically polynomial algorithm that, given a single-qubit unitary gate and a desired target precision, outputs a braid pattern that approximates the unitary to desired precision and has a length that is asymptotically optimal (for a circuit with such property). Single-qubit unitaries that can be implemented exactly by a Fibonacci anyon braid pattern are classified, and associated braid patterns are obtained using an iterative procedure. Target unitary gates that are not exactly representable as braid patterns are first approximated to a desired precision by a unitary that is exactly representable, then a braid pattern associated with the latter is obtained. | 04-16-2015 |
20150113031 | SPARSITY-DRIVEN MATRIX REPRESENTATION TO OPTIMIZE OPERATIONAL AND STORAGE EFFICIENCY - Embodiments of the invention relate to sparsity-driven matrix representation. In one embodiment, a sparsity of a matrix is determined and the sparsity is compared to a threshold. Computer memory is allocated to store the matrix in a first data structure format based on the sparsity being greater than the threshold. Computer memory is allocated to store the matrix in a second data structure format based on the sparsity not being greater than the threshold | 04-23-2015 |
20150113032 | METHOD AND SYSTEM FOR QUANTIFYING BINARY WORDS SYMMETRY - The present invention provides an innovative method and system for quantifying the binary words symmetry. Information of all kinds is necessarily interpreted by binary words. Quantifying the symmetry of these binary words, regardless of their size, is a new approach that makes available a new measure that can better appreciate the complexity, the information, the redundancy or the physical structure contained in each binary word and hence, in its source. Binary numbers processing can, thanks to this measure, have new tools for new approaches in many areas such as Information Theory and Theory of Symmetry which plays a significant role in Mathematics, Chemistry, Biology, Crystallography, etc. This method is based on computational system that generates the concerned ‘Symmetric Value’ of any binary number as well as its two amazing ‘Symmetric Value Matrixes’ which do not require storage to be known, regardless of their size. | 04-23-2015 |
20150318865 | METHOD AND SYSTEM FOR CODING INFORMATION - A method and an apparatus are described for coding information, the method comprising obtaining a list of integers to be encoded; determining a hyper-pyramid having a dimension adapted to encode the list of integers, the hyper-pyramid having a plurality of vertices whose number is determined by the degree of the hyper-pyramid, which is equal to the sum of the integers of the list of integers and by the dimension of the hyper-pyramid which is equal to the number of integers of the list of integers minus one; indexing the list of integers in the hyper-pyramid using an indexing system; and providing an indication of the indexing of the list of integers in the hyper-pyramid. | 11-05-2015 |
20160004665 | CALCULATION CONTROL INDICATOR CACHE - A microprocessor comprises an instruction execution unit operable to generate an intermediate result vector and a plurality of calculation control indicators and storage external to the instruction execution unit which stores the intermediate result vector and the plurality of calculation control indicators. The intermediate result vector is generated from an application of at least a first arithmetic operation of a compound arithmetic operation. The calculation control indicators indicate how subsequent calculations to generate a final result from the intermediate result vector should proceed. The subsequent calculations may involve one or more remaining arithmetic operations of the compound arithmetic operation. The intermediate result vector, in combination with the plurality of calculation control indicators, provides sufficient information to generate a result indistinguishable from an infinitely precise calculation of the compound arithmetic operation whose result is reduced in significance to a target data size. | 01-07-2016 |
20160117285 | FINDING A CUR DECOMPOSITION - One embodiments is a computer-implemented method for finding a CUR decomposition. The method includes constructing, by a computer processor, a matrix C based on a matrix A. A matrix R is constructed based on the matrix A and the matrix C. A matrix U is constructed based on the matrices A, C, and R. The matrices C, U, and R provide a CUR decomposition of the matrix A. The construction of the matrices C, U, and R provide at least one of an input-sparsity-time CUR and a deterministic CUR. | 04-28-2016 |
20160124715 | MULTI-ELEMENT COMPARISON AND MULTI-ELEMENT ADDITION - An apparatus | 05-05-2016 |
20160203105 | INFORMATION PROCESSING DEVICE, INFORMATION PROCESSING METHOD, AND INFORMATION PROCESSING PROGRAM | 07-14-2016 |
20220137927 | PROCESSING COMPONENT, DATA PROCESSING METHOD, AND RELATED DEVICE - A processing component includes at least one arithmetic and logic unit (ALU), the ALU including a decoding and parameter input channel, a data input channel, an operation component, a first port crossbar switch matrix, and a second port crossbar switch matrix, the decoding and parameter input channel being configured to receive an execution parameter; the data input channel being configured to receive first data and second data; the first port crossbar switch matrix being configured to input the first data to the operation component; the second port crossbar switch matrix being configured to input the second data to the operation component; and the operation component being configured to process the first data and the second data according to the execution parameter to obtain a target operation result. | 05-05-2022 |