01st week of 2019 patent applcation highlights part 71 |
Patent application number | Title | Published |
20190007026 | GALLIUM NITRIDE STRUCTURE, PIEZOELECTRIC ELEMENT, METHOD OF MANUFACTURING PIEZOELECTRIC ELEMENT, AND RESONATOR USING PIEZOELECTRIC ELEMENT - A gallium nitride structure that includes: a substrate; a gallium nitride layer opposed to the substrate and containing gallium nitride as a main component thereof; and a first electrode between the gallium nitride layer and the substrate. The first electrode includes at least one hafnium layer containing a single metal of hafnium as a main component thereof, and the at least one hafnium layer is in contact with the gallium nitride layer. | 2019-01-03 |
20190007027 | RESONATOR DEVICE, ELECTRONIC APPARATUS, AND VEHICLE - A resonator device includes first and second resonators and an integrated circuit. The integrated circuit includes first and second oscillation circuits that oscillate first and second resonators, first and second terminals connected to the first oscillation circuit, and third and fourth terminals connected to the second oscillation circuit. The first terminal of the integrated circuit and one electrode of the first resonator are connected to each other via a bump. The third terminal and one electrode of the second resonator are connected to each other via a bump. In a plan view, at least a portion of the first resonator overlaps the first oscillation circuit and at least a portion of the second resonator overlaps the second oscillation circuit. | 2019-01-03 |
20190007028 | ELLIPTICALLY-SHAPED RESONATOR MARKERS WITH ENHANCED FREQUENCY STABILITY AND GAIN - A magnetoelastic resonator device comprises a housing, at least one elliptically-shaped or substantially elliptically-shaped magnetoelastic element disposed within the housing, and at least one bias magnet disposed in the housing, wherein the at least one elliptically-shaped or substantially elliptically-shaped magnetoelastic element is configured to couple to an external magnetic field at a particular frequency and convert the magnetic energy into mechanical energy, in the form of oscillations. | 2019-01-03 |
20190007029 | PIEZOELECTRIC THIN FILM RESONATOR, FILTER, AND MULTIPLEXER - A piezoelectric thin film resonator includes: a substrate; a lower electrode located on the substrate through an air gap; a piezoelectric film located so as to have a resonance region where the lower electrode and an upper electrode face each other across the piezoelectric film and having a lower piezoelectric film and an upper piezoelectric film, in an extraction region where the lower electrode is extracted from the resonance region, a lower end of a first end face of the lower piezoelectric film being substantially aligned with or located further out than an outer periphery of the air gap, a second end face of the upper piezoelectric film being inclined, an upper end of the second end face being substantially aligned with or located further in than the outer periphery, the lower piezoelectric film having a substantially uniform film thickness between the first end face and the second end face. | 2019-01-03 |
20190007030 | COMPOSITE FILTER DEVICE, HIGH-FREQUENCY FRONT END CIRCUIT, AND COMMUNICATION DEVICE - A composite filter device includes an antenna common terminal, a first band pass filter having a first pass band, and a second band pass filter having a second pass band located at higher frequencies than the first pass band. The first band pass filter includes an elastic wave resonator. The elastic wave resonator includes a LiNbO3 substrate, an IDT electrode on the LiNbO3 substrate, and a dielectric film that covers the IDT electrode and includes a silicon oxide as a main component. When f1′ is the frequency of a Sezawa wave of the first band pass filter and f2 is the center frequency of the second pass band, f1′ is located at a different position from f2. | 2019-01-03 |
20190007031 | SEMICONDUCTOR DEVICE WITH POWER GATING SCHEME - A semiconductor device includes: a power-gated logic circuit suitable for operating in response to a first power gating enable signal which is deactivated in a standby mode and activated in an active mode; a transmission unit suitable for selectively transmitting an output signal of the power-gated logic circuit to an output terminal in response to a third power gating enable signal; a clocked latch unit suitable for latching a signal of the output terminal in the standby mode and an initial stage of the active mode in response to a second power gating enable signal; and an internal circuit suitable for operating based on the signal of the output terminal, wherein the first to third power gating enable signals are sequentially activated. | 2019-01-03 |
20190007032 | BUFFER CIRCUIT AND DEVICE INCLUDING THE SAME - A buffer circuit may include: a current mirror circuit suitable for selectively forming a first current mirror corresponding to a first power source voltage, and a second current mirror corresponding to a second power source voltage; and a differential pair coupled to the current mirror circuit, and suitable for forming a current path with the first current mirror or the second current mirror, amplifying a differential signal corresponding to a difference between a reference voltage and input data received through an input terminal, and outputting the amplified differential signal to an output terminal as a buffer output signal. | 2019-01-03 |
20190007033 | TUNNEL FIELD-EFFECT TRANSISTOR (TFET) BASED HIGH-DENSITY AND LOW-POWER SEQUENTIAL - Described is an apparatus which comprises: a first p-type Tunneling Field-Effect Transistor (TFET); a first n-type TFET coupled in series with the first p-type TFET; a first node coupled to gate terminals of the first p-type and n-type TFETs; a first clock node coupled to a source terminal of the first TFET, the first clock node is to provide a first clock; and a second clock node coupled to a source terminal of the second TFET, the second clock node is to provide a second clock. | 2019-01-03 |
20190007034 | CLOCK SIGNAL GENERATOR CIRCUIT - A clock signal generator circuit includes a CR oscillator part, which outputs a clock signal having a frequency corresponding to a time constant determined by a capacitor and a resistor, and a frequency varying part. The frequency varying part includes a counter for performing a counting operation and varies a frequency of the clock signal by varying a resistance value of the resistor in correspondence to a count value of the counter. The resistor of the CR oscillator part includes plural resistive elements, one terminal of which are connected to a common node. The frequency varying part includes tri-state buffers, input terminals of which are connected in common and output terminals of which are connected to other terminals of the resistive elements, respectively, and varies the resistance value of the resistor by switching over states of the buffers in correspondence to the count value. | 2019-01-03 |
20190007035 | DELAY CELL AND CIRCUIT INCLUDING THE SAME - A delay cell may include: a first inverter coupled to an input terminal; a second inverter coupled between the first inverter and an output terminal; an additional inverter coupled in parallel to the first inverter; and a delay element suitable for selectively coupling the additional inverter to the input terminal under control of a control signal. | 2019-01-03 |
20190007036 | Clock Duty Cycle Calibration and Frequency Multiplier Circuit - Provided is a clock duty cycle calibration and frequency multiplier circuit used in a square wave frequency multiplier, comprising: a multiplexing module ( | 2019-01-03 |
20190007037 | COMPARATOR - A comparator includes a resolver controlled by a resolver clock signal and a differential amplifier controlled by a sampling clock signal. The resolver clock signal and the sampling clock signal are such that amplification at the differential amplifier during the reset phase of the resolver clock signal and the reset phase of the sampling clock signal begins during the resolving phase of the resolver. | 2019-01-03 |
20190007038 | NON-OSCILLATING COMPARATOR - A comparison circuit includes an input interface configured to receive input signals and an output interface configured to deliver an output signal. A comparator is coupled between the input interface and the output interface. An amplifier is coupled between the input interface and the comparator. A neutralization circuit is configured to neutralize any change of state of the output signal starting from each moment in time at which the change of state of the output signal occurs and lasting for a second duration of propagation that compensates for a duration of propagation of signals within the amplifier. | 2019-01-03 |
20190007039 | SEMICONDUCTOR DEVICE, POWER MODULE, AND CONTROL METHOD OF POWER CONVERSION DEVICE - The junction temperature of a field effect transistor is detected with a higher degree of accuracy than in the past. A semiconductor device controls multiple field effect transistors that configure a power conversion device, and includes a differential amplifier and a controller that controls ON/OFF of the multiple field effect transistors. The differential amplifier detects the potential difference between a source and a drain of a field effect transistor that is controlled in the OFF state by the controller and that induces an electric current flowing through the body diode thereof, among the multiple field effect transistors. | 2019-01-03 |
20190007040 | Drive Voltage Booster - This disclosure describes a gate driver with voltage boosting capabilities. In some embodiments, the gate driver may comprise a charge pump that includes capacitor(s) and switch(es). Responsive a logic low input signal, the gate driver may bypass the capacitor(s) to allow the input digital signal to drive the gating signal directly. Conversely, responsive to a logic high input signal, the gate driver may couple the capacitor(s) in series with the input digital signal to generate a boosted gating signal. In some embodiments, the gate driver may comprise an inductor-capacitor resonant circuit to create a doubled output gating signal with respect to the input digital signal. In some embodiments, the resonant gate driver may include an additional voltage boosting capability that can be selectively enabled to compensate for a voltage drop during the signal transfer from the input to the output. | 2019-01-03 |
20190007041 | ELECTRICAL CIRCUIT ARRANGEMENT WITH AN ACTIVE DISCHARGE CIRCUIT - The present invention relates to an electrical circuit arrangement with an active discharge circuit including at least one electrical switching element, by means of which the circuit arrangement can be discharged in controlled manner. The circuit arrangement includes a RC snubber element with capacitor and resistor for damping voltage or current peaks in the circuit arrangement, wherein the electrical switching element is integrated in the RC snubber element and connected in parallel to the capacitor of the RC snubber. This enables the discharge circuit to be designed in a manner that is economical in terms of space and cost. The discharge circuit uses the heat sink for the RC snubber element and therefore does not need any additional heat dissipation systems. | 2019-01-03 |
20190007042 | Devices and Methods for Improving Voltage Handling and/or Bi-Directionality of Stacks of Elements When Connected Between Terminals - Devices and methods for improving voltage handling and/or bi-directionality of stacks of elements when connected between terminals are described. Such devices and method include use of symmetrical compensation capacitances, symmetrical series capacitors, or symmetrical sizing of the elements of the stack. | 2019-01-03 |
20190007043 | Circuit with Impedance Elements Connected to Sources and Drains of PMOSFET Headers - A method to generate a circuit instance to include a plurality of pMOSFET instances, where each pMOSFET instance has a source terminal instance connected to one or more supply rail instances. The circuit instance includes impedance element instances, where each impedance element instance is connected to a source terminal instance and a drain terminal instance of a corresponding pMOSFET instance. Depending upon a set of requirements, one or more of the impedance element instances are in a high impedance state or a low impedance state. | 2019-01-03 |
20190007044 | METHOD FOR MANAGING A CAPACITIVE KEYBOARD FITTED TO A MOTOR VEHICLE - A method for managing a capacitive keyboard fitted to a motor vehicle, the capacitive keyboard comprising a plurality of keys connected to an electronic control unit and having a tactile function, the method including the steps of: performing a measurement of capacitance for each of the keys; and temporarily deactivating the tactile function of the keyboard if, for at least one of the keys, the capacitance is greater than or equal to a predetermined threshold value. The disclosure also relates to a motor vehicle comprising a capacitive keyboard and an electronic control unit configured for implementing such a method. | 2019-01-03 |
20190007045 | SEMICONDUCTOR DEVICE - A semiconductor device includes a latch circuit including a first inverter configured to output a first signal based on an input signal, a second inverter configured to output a first clock signal based on a first strobe signal, a third inverter configured to output a second clock signal based on a second strobe signal, a first clock generation circuit configured to generate a third clock signal having transitions that are delayed with respect to the first clock signal, a second clock generation circuit configured to generate a fourth clock signal having transitions that are delayed with respect to the second clock signal, a fourth inverter configured to output an inversion signal of the first signal in accordance with the third and fourth clock signals, and a data latch circuit configured to latch an output signal of the fourth inverter. | 2019-01-03 |
20190007046 | GATE CONTROL FOR A TRISTATE OUTPUT BUFFER - A gate control circuit for a tristate output buffer operating in a first voltage domain includes a pull-up circuit coupled between an upper rail and a first gate control signal, a pull-down circuit coupled between a lower rail and a second gate control signal, and a gate isolation switch coupled between the first gate control signal and the second gate control signal. The gate isolation switch includes a first PMOS transistor coupled in parallel with a first NMOS transistor. The first NMOS transistor is controlled by a first enable signal and the first PMOS transistor is controlled by a second enable signal. | 2019-01-03 |
20190007047 | Clock Architecture, including Clock Mesh Fabric, for FPGA, and Method of Operating Same - An integrated circuit comprising (i) an array of logic tiles wherein each logic tile is configurable to connect with at least one adjacent logic tile and (ii) a clock mesh fabric including a clock mesh to provide a mesh clock signal to each of the logic tiles of the array of logic tiles. In one embodiment, each logic tile of the array of logic tiles includes (1) distribution and transmission circuitry configurable to provide an associated tile clock to circuitry which performs operations using or based on the associated tile clock, wherein the distribution and transmission circuitry includes circuitry to generate a tile clock signal having a skew which is balanced with respect to the tile clock signals generated by the generation circuitry of each tile, and (2) selection circuitry to responsively output the associated tile clock which corresponds to the mesh clock signal or the tile clock signal. | 2019-01-03 |
20190007048 | INTEGRATED CIRCUIT AND PROCESS FOR FAMILY OF DIGITAL LOGIC FUNCTIONS - A family of digital logic functions has the same specifications for input and output voltages and the same number of bond pads. A digital logic integrated circuit for the family includes a substrate of semiconductor material having a core area and a peripheral area; a certain number of bond pads formed in the peripheral area, the certain number of bond pads determining the total area of the substrate; programmable digital logic transistor circuitry formed in the core area for each of the digital logic functions in the family; programmable input and output circuitry formed in the peripheral area; programming circuitry for programming the programmable digital logic transistor circuitry into a selected digital logic function; and programmable input and output means for programming the input and output circuitry into input and output circuits for the selected digital logic function. | 2019-01-03 |
20190007049 | SELF-ADAPTIVE CHIP AND CONFIGURATION METHOD - Disclosed are a self-adaptive chip ( | 2019-01-03 |
20190007050 | REGIONAL PARTIAL RECONFIGURATION OF A PROGRAMMABLE DEVICE - Devices and methods for reconfiguring a programmable fabric include identifying resources in a programmable fabric of the programmable device as belonging to a partition. Reconfiguring the programmable fabric also includes creating a mask for the partition that indicates that the identified resources belong to the partition. Reconfiguring the partition also includes reconfiguring resources, via a configuration controller, in programmable fabric associated with the partition using the mask without changing resources associated with other partitions in the programmable fabric. | 2019-01-03 |
20190007051 | Parametrically Activated Quantum Logic Gates - In a general aspect, a quantum logic gate is performed in a quantum computing system. In some cases, a pair of qubits are defined in a quantum processor; the pair of qubits can include a first qubit defined by a first qubit device in the quantum processor and a second qubit defined by a tunable qubit device in the quantum processor. A quantum logic gate can be applied to the pair of qubits by communicating a control signal to a control line coupled to the tunable qubit device. The control signal can be configured to modulate a transition frequency of the tunable qubit device at a modulation frequency, and the modulation frequency can be determined based on a transition frequency of the first qubit device. | 2019-01-03 |
20190007052 | APPARATUS AND METHODS FOR SYSTEM CLOCK COMPENSATION - Apparatus and methods for clock synchronization and frequency translation are provided herein. Clock synchronization and frequency translation integrated circuits (ICs) generate one or more output clock signals having a controlled timing relationship with respect to one or more reference signals. The teachings herein provide a number of improvements to clock synchronization and frequency translation ICs, including, but not limited to, reduction of system clock error, reduced variation in clock propagation delay, lower latency monitoring of reference signals, precision timing distribution and recovery, extrapolation of timing events for enhanced phase-locked loop (PLL) update rate, fast PLL locking, improved reference signal phase shift detection, enhanced phase offset detection between reference signals, and/or alignment to phase information lost in decimation. | 2019-01-03 |
20190007053 | SERDES WITH ADAPTIVE CLOCK DATA RECOVERY - A gear-shifting serializer-deserializer (SerDes) is provided that uses a first divisor value to form a divided clock while de-serializing a serial data stream prior to a lock detection and that uses a second divisor value to form the divided clock value after the lock detection, wherein the second divisor value is greater than the first divisor value. | 2019-01-03 |
20190007054 | STROBE CENTERING APPARATUS AND METHOD - An apparatus is provided which comprises: a receiver to receive a differential clock; a delay locked loop (DLL) coupled to the receiver; a first phase interpolator (PI) coupled to the DLL, the first PI to provide a first clock phase; a second PI coupled to the DLL, wherein the second PI is to provide a second or third clock phase; circuitry to adjust the first and second PIs according to the first clock phase, and the second or third clock phase. | 2019-01-03 |
20190007055 | APPARATUS AND METHODS FOR COMPENSATION OF SIGNAL PATH DELAY VARIATION - Apparatus and methods for clock synchronization and frequency translation are provided herein. Clock synchronization and frequency translation integrated circuits (ICs) generate one or more output clock signals having a controlled timing relationship with respect to one or more reference signals. The teachings herein provide a number of improvements to clock synchronization and frequency translation ICs, including, but not limited to, reduction of system clock error, reduced variation in clock propagation delay, lower latency monitoring of reference signals, precision timing distribution and recovery, extrapolation of timing events for enhanced phase-locked loop (PLL) update rate, fast PLL locking, improved reference signal phase shift detection, enhanced phase offset detection between reference signals, and/or alignment to phase information lost in decimation. | 2019-01-03 |
20190007056 | FREQUENCY DIVIDER CIRCUIT, DEMULTIPLEXER CIRCUIT, AND SEMICONDUCTOR INTEGRATED CIRCUIT - A frequency divider circuit includes: a first frequency dividing circuit configured to divide a first clock signal to generate a first frequency-divided clock signal; a second frequency dividing circuit configured to divide a second clock signal having the same frequency as the first clock signal and having a first phase difference with respect to the first clock signal to generate a second frequency-divided clock signal; a detection circuit configured to detect a phase relationship between the first frequency-divided clock signal and the second frequency-divided clock signal; and a selection circuit configured to select and output one of the second frequency-divided clock signal and an inverted signal of the second frequency-divided clock signal which are generated by the second frequency dividing circuit, based on the phase relationship between the first frequency-divided clock signal and the second frequency-divided clock signal detected by the detection circuit | 2019-01-03 |
20190007057 | DELTA MODULATOR WITH VARIABLE FEEDBACK GAIN, ANALOG-TO-DIGITAL CONVERTER INCLUDING THE DELTA MODULATOR, AND COMMUNICATION DEVICE INCLUDING THE DELTA MODULATOR - A variable feedback gain delta modulator includes group of capacitors commonly connected to a first terminal and are respectively classified into a first capacitor group and a second capacitor group; a comparator for sequentially generating n-bit digital output signals based on a voltage of the first terminal; and a switch group including switches respectively connected to the capacitors, wherein the switches are respectively classified into a first switch group and a second switch group respectively connected to the first capacitor group and the second capacitor group, and the first switch group and the second switch group respectively operate according to a first control signal and a second control signal that are determined based on the n-bit digital output signals and the variable feedback gain. | 2019-01-03 |
20190007058 | SSD COMPRESSION AWARE - Embodiments of the present invention include a compression system including one or more compressibility inputs; a compression predictor configured to predict the compressibility of data based on the one or more compressibility inputs; a compressor configured to compress the data; and one or more compression inputs. At least one of the compression predictor or the compressor is configured to determine how to compress the data based on the one or more compression inputs. The one or more compressibility inputs comprise at least one of an object extension dictionary, an object signature dictionary, and an entropy estimation algorithm library. The one or more compression inputs comprise at least one of a quality of service profile, a device performance profile and a compression algorithm performance chart. | 2019-01-03 |
20190007059 | COMPRESSION OF SEMI-STRUCTURED DATA - A method for compressing semi-structured data is discussed. The method includes accessing semi-structured data, the semi-structured data comprising a plurality of elements. The method includes determining a plurality of unique elements of the plurality of elements, each of the plurality of unique elements associated with a respective unique index of a plurality of unique indexes. Each of the unique index can indicate a position in one of a plurality of data stores. The method includes generating a sequence of encoded representations corresponding to the plurality of elements, the generating based on the plurality of unique indexes. | 2019-01-03 |
20190007060 | CORRECTION DATA - Correction data units for data packets of a data stream are generated. A correction data unit is based on a set of the data packets of the stream. The stream is transmitted over a communication channel. A performance measure to be optimized is selected, which relates to the recovery of lost data packets of the stream. To optimize the performance measure, a plurality of correction data vectors are determined, and a plurality of a plurality of non-recovery probabilities, corresponding to the correction data vectors, are initialized. One or more of the correction data vectors are selected that contribute towards a non-recovery probability of an original data packet. The non-recovery probability associated with the original data packet is then minimized based on the selected one or more correction data vectors. The selected one or more correction data vectors are then used to determine which of the original data packets or data correction units to transmit. | 2019-01-03 |
20190007061 | DATA PROCESSING APPARATUS AND DATA PROCESSING METHOD - A data processing apparatus and a data processing method which enable provision of an LDPC code that achieves good error-rate performance. An LDPC encoding unit performs encoding using an LDPC code having a code length of 64800 bits and a code rate of 24/30, 25/30, 26/30, 27/30, 28/30, or 29/30. The LDPC code includes information bits and parity bits, and a parity check matrix H is composed of an information matrix portion corresponding to the information bits of the LDPC code, and a parity matrix portion corresponding to the parity bits. The information matrix portion of the parity check matrix H is represented by a parity check matrix initial value table that shows positions of elements of 1 in the information matrix portion in units of 360 columns. The present technology apparatus and method may be applied to LDPC encoding and LDPC decoding. | 2019-01-03 |
20190007062 | EFFICIENT GENERALIZED TENSOR PRODUCT CODES ENCODING SCHEMES - A method for generating a binary GTP codeword, comprised of N structure stages and each stage comprises at least one BCH codeword with error correction capability greater than a prior stage and smaller than a next stage, includes: receiving a syndrome vector | 2019-01-03 |
20190007063 | GENERATING HAMMING WEIGHTS FOR DATA - Embodiments herein provide for a controller that is operable to soft read a data bit a plurality of times, to generate a bit set for the data bit from the soft reads, to logically operate on the bit set, and to generate a Hamming weight for the data bit based on the logical operation. The Hamming weight has fewer bits than the bit set and is operable to correct the data bit. | 2019-01-03 |
20190007064 | TRANSMITTING APPARATUS AND INTERLEAVING METHOD THEREOF - A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a low density parity check (LDPC) codeword by LDPC encoding based on a parity check matrix; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol, wherein the modulator is further configured to map a bit included in a predetermined bit group from among a plurality of bit groups constituting the LDPC codeword onto a predetermined bit of the modulation symbol. | 2019-01-03 |
20190007065 | BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 16200 AND CODE RATE OF 2/15 AND 16-SYMBOL MAPPING, AND BIT INTERLEAVING METHOD USING SAME - A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 2/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 16-symbol mapping. | 2019-01-03 |
20190007066 | INTERLEAVING AND MAPPING METHOD AND DEINTERLEAVING AND DEMAPPING METHOD FOR LDPC CODEWORD - An interleaving and mapping method and a deinterleaving and demapping method for an LDPC codeword are provided. The interleaving and mapping method comprises: performing first bit interleaving on a parity bits part of the LDPC codeword to obtain interleaved parity bits; splicing an information bit part of the codeword and the interleaved parity bits into a codeword after the first bit interleaving; dividing the codeword after the first bit interleaving into multiple consecutive bit subblocks in a predetermined length, and changing the order of the bit subblocks according to a corresponding permutation order (bit-swapping pattern) to form a codeword after second bit interleaving; dividing the codeword after the second bit interleaving into two parts, and writing the two parts into storage space in a column order respectively and reading the two parts from the storage space in a row order respectively to obtain a codeword after third bit interleaving. | 2019-01-03 |
20190007067 | INTERLEAVING AND MAPPING METHOD AND DEINTERLEAVING AND DEMAPPING METHOD FOR LDPC CODEWORD - An interleaving and mapping method and a deinterleaving and demapping method for an LDPC codeword are provided. The interleaving and mapping method comprises: performing first bit interleaving on a parity bits part of the LDPC codeword to obtain interleaved parity bits; splicing an information bit part of the codeword and the interleaved parity bits into a codeword after the first bit interleaving; dividing the codeword after the first bit interleaving into multiple consecutive bit subblocks in a predetermined length, and changing the order of the bit subblocks according to a corresponding permutation order (bit-swapping pattern) to form a codeword after second bit interleaving; dividing the codeword after the second bit interleaving into two parts, and writing the two parts into storage space in a column order respectively and reading the two parts from the storage space in a row order respectively to obtain a codeword after third bit interleaving. | 2019-01-03 |
20190007068 | EARLY-TERMINATION OF DECODING CONVOLUTIONAL CODES - A decoder having an input configured to receive a sequence of softbits presumed to correspond to a convolutionally-encoded codeword; and a decoding circuit configured to: determine, as part of a decoding process, a Maximum Likelihood (ML) survivor path in a trellis representation of the codeword; determine whether the presumed convolutionally-encoded codeword meets an early-termination criteria; and abort the decoding process if the presumed convolutionally-encoded codeword meets the early-termination criteria, continue the decoding process if the presumed convolutionally-encoded codeword fails to meet the early-termination criteria. | 2019-01-03 |
20190007069 | BANDWIDTH EFFICIENT FEC SCHEME SUPPORTING UNEVEN LEVELS OF PROTECTION - In one embodiment, a device in a network splits each of a plurality of packets of two or more data streams into an equal number of fragments. The number of fragments for packets of a particular one of the streams controls the level of error correction for that stream. The device generates recovery symbols for the fragments for each of the plurality of packets. Each of the plurality of packets has an equal sum of fragments plus recovery symbols. The device multiplexes the fragments and recovery symbols for each of the packets, to form a set of new packets. The device sends the set of new packets to one or more recipients in the network. | 2019-01-03 |
20190007070 | SEQUENTIAL POWER TRANSITIONING OF MULTIPLE DATA DECODERS - Method and apparatus for managing data decoder circuits, such as LDPC (low density parity check) decoders in a solid state drive (SSD). In some embodiments, a non-volatile memory (NVM) is configured to store data in the form of code words. Each code word has a user data payload and associated code bits. A plurality of data decoder circuits are configured to use the code bits to detect and correct bit errors in the code words during a read operation. A power transition circuit is configured to successively transition each of the data decoder circuits in turn from a first power mode to a second power mode, such as from an active mode to an idle mode, at a different time and at a conclusion of a predetermined time interval. In this way, voltage spikes or other anomalous conditions on a voltage source pathway may be reduced. | 2019-01-03 |
20190007071 | ERROR CORRECTING ANALOG-TO-DIGITAL CONVERTERS - A pipeline ADC comprising an ADC segment and a digital backend coupled to the ADC segment. In some examples the ADC is configured to receive an analog signal, generate a first partial digital code representing a first sample of the analog signal, and generate a second partial digital code representing a second sample of the analog signal. In some examples the digital backend is configured to receive the first and second partial digital codes from the ADC segment, generate a combined digital code based at least partially on the first and second partial digital codes, determine a gain error of the ADC segment based at least partially on a first correlation of a PRBS with a difference between the first and second partial digital codes, and apply a first correction to the combined digital code based at least partially on the gain error of the ADC segment. | 2019-01-03 |
20190007072 | Wireless Terminal and Antenna Switching Control Method for Wireless Terminal - A wireless terminal and an antenna switching control method for a wireless terminal, where the wireless terminal includes a main antenna, a first antenna, and a second antenna. The main antenna is connected to a first radio frequency circuit and configured to receive and transmit a first standard signal. A frequency band of the first standard signal includes a first frequency band with a super high frequency and a second frequency band with a high frequency. The first antenna is configured to receive a first standard signal of the first frequency band, and receive and transmit a second standard signal. The second antenna is connected to the first radio frequency circuit and configured to receive a first standard signal of the second frequency band. Hence an overall size of the wireless terminal can be reduced using the second antenna. | 2019-01-03 |
20190007073 | FRONT-END ARCHITECTURE THAT SUPPORTS UPLINK CARRIER AGGREGATION AND SIMULTANEOUS MIMO USING SWITCH COMBINING - Described herein are front-end architectures that use switch-combining in a MIMO module to provide uplink carrier aggregation and simultaneous MIMO operations in a plurality of band combinations. The front-end architectures include a combination of low-band, mid-band, high-band, MIMO, and uplink carrier aggregation modules to provide the described functionality. To provide certain band combinations, one or more of the modules can implement switchplexing to provide the targeted functionality. | 2019-01-03 |
20190007074 | Terminal and Communication Method Thereof - A terminal includes a first baseband processor, a second baseband processor, a first radio frequency chip, a second radio frequency chip, a first antenna, a second antenna, a third antenna, and a fourth antenna. The first baseband processor is coupled to the first antenna and the second antenna using the first radio frequency chip. The first radio frequency chip is coupled to the first antenna to form a first channel, and is coupled to the second antenna to form a second channel. The second baseband processor is coupled to the third antenna and the fourth antenna using the second radio frequency chip. The second radio frequency chip is coupled to the third antenna to form a third channel, and is coupled to the fourth antenna to form a fourth channel. | 2019-01-03 |
20190007075 | DIGITAL COMPENSATOR - An approach to digital compensation uses a particular structure for a digital pre-distorter (DPD) which acts as a relatively accurate pre-inverse of a non-linear circuit (e.g., a non-linear transmit chain involving digital-to-analog converter (DAC), lowpass filter, modulator, bandpass filter, and power amplifier) while making use of a relatively small number of parameters that characterize the non-linearity and/or parameters that provide accurate linearization without requiring continual updating. | 2019-01-03 |
20190007076 | METHOD AND APPARATUS TO DETECT LO LEAKAGE AND IMAGE REJECTION USING A SINGLE TRANSISTOR - Local oscillator (LO) leakage and Image are common and undesirable effects in typical transmitters. Typically, fairly complex hardware and algorithms are used to calibrate and reduce these impairments. A single transistor that draws essentially no dc current and occupies a very small area detects the LO leakage and Image signals. The single transistor operating as a square-law device is used to mix the signals at the input and output ports of a power amplifier. The mixed signal generated by the single transistor enables the simultaneous calibration of the LO leakage and Image Rejection. | 2019-01-03 |
20190007077 | METHODS AND APPARATUS TO MEASURE EXPOSURE TO BROADCAST SIGNALS HAVING EMBEDDED DATA - Example methods and apparatus to measure exposure to broadcast signals having embedded data are disclosed. An example broadcast signal exposure meter includes a first decoder to obtain an identifier of a broadcast station from an audio signal output by an end user broadcast receiver, a radio to tune to a broadcast signal from the broadcast station associated with the identifier of the broadcast station, a second decoder to obtain embedded data from the broadcast signal, the embedded data representing media contained in the broadcast signal, and an interface to provide the embedded data to a server, the server to determine audience measurement information for the media based on the provided embedded data. | 2019-01-03 |
20190007078 | FACILITATION OF PASSIVE INTERMODULATION CANCELATION VIA MACHINE LEARNING - A passive intermodulation detection system is provided to remotely identify passive intermodulation at a base station site and diagnose the type of intermodulation and location of the non-linearity that is the source of the passive intermodulation. A passive intermodulation cancelation system can generate an equivalent signal to a received interference signal and use the equivalent signal to generate an error signal. The error signal can then be used to reinforce a learning system and converge on a steady state of the interference signal to cancel other interference signals. | 2019-01-03 |
20190007079 | Increasing Wireless Spectral Efficiency by Leveraging Interfering Signals - A computing system may utilize interfering signals of two or more wireless devices for improving communications involving the two or more wireless devices. These techniques and architectures may allow for improved spectral efficiency that enables a relatively large number of wireless devices to communicate among one another via receivers that share overlapping or adjacent frequencies. Such utilization of interfering signals may help solve a general problem involving, for example, co-channel interference (CCI) arising from densely deployed relatively small wireless communication cells for increasing communication throughput. | 2019-01-03 |
20190007080 | Efficient Front End Module - Example aspects of the present disclosure are directed to front end modules for use in communication systems. In one example aspect, a front end module can include a receive path. The receive path can include a low noise amplifier. The receive path can include an analog to digital converter (ADC) circuit operable to receive an analog signal from the low noise amplifier and convert the analog signal to a digital RF receive signal. The receive path can include an ADC post processing circuit operable to process the digital RF receive signal in the digital domain. The front end module can include a transmit path. The transmit path can include a digital to analog converter circuit operable to convert the digital RF transmit signal to an analog RF transmit signal. The transmit path can include a power amplifier. | 2019-01-03 |
20190007081 | WIRELESS COMMUNICATION APPARATUS AND STRUCTURE FOR MOUNTING COMMUNICATION EQUIPMENT - A mounting base ( | 2019-01-03 |
20190007082 | EMBEDDED SUBSCRIBER IDENTITY MODULE INCLUDING COMMUNICATION PROFILES - An embedded subscriber identity module (eUICC1), which includes communication profiles, and that co-operates with a communications terminal (T). The module includes at least two communication profiles (P) that are active at the same time so as to allow the communications terminal to communicate with each mobile telephone network (R1, R2) associated with the active communication profiles, a receive module for receiving, from the terminal (T), a command (CMD) that has one of the active communication profiles as its destination (P), (referred to as the destination profile), and a determination module for determining the destination profile from among the active communication profiles on the basis of a destination profile identifier included in the command | 2019-01-03 |
20190007083 | DEVICE FOR REFLECTING, DEFLECTING, AND/OR ABSORBING ELECTROMATNETIC RADIATION EMITTED FROM AN ELECTRONIC DEVICE AND METHOD THEREFOR - A device for reflecting radio frequency (RF) radiation away from a user of a mobile phone has a metallic plate configured to be positioned between the mobile phone and a decorative and/or protective cover. The metallic plate is positioned over a rear surface of the mobile phone. The metallic plate is removable and non-permanently attached to the mobile phone and the decorative and/or protective cover. | 2019-01-03 |
20190007084 | PROTECTIVE/CONTROL RECEPTACLE - A remote control arrangement has a protective/control receptacle and a mobile radio device for use as a remote control. The protective/control receptacle forms a closed peripheral cover on which a corner protector for holding corners of the mobile radio device is provided and has a receptacle-side control for controlling a device-side control on the mobile radio device. The receptacle-side control is operable from the outside. The receptacle-side control is haptically perceivable on the outer face of the cover and is used to control a virtual device-side control. | 2019-01-03 |
20190007085 | MOBILE TERMINAL - A mobile terminal includes a metal frame including a base portion and an edge portion formed along the outer edge of the base portion, first and second cases bonded to the front and back sides of the metal frame so as to expose the edge portion to the outside, first and second waterproof layers formed between the cases and the metal frame, conductive members that operate a radiator for antennas, together with the edge portion, and are formed on one side of the second case, and feeding portions for feeding the conductive members, the feeding portions being disposed in an enclosed space formed by the waterproof layers. | 2019-01-03 |
20190007086 | SYSTEMS AND METHODS FOR REDUCING TRANSMIT AND RECEIVE POWER VIA A T/R SWITCH - A wireless communication device is described. The wireless communication device includes a transmit/receive (T/R) switch that is configured with an antenna port coupled to an antenna, a transmitter port coupled to a transmitter and a receiver port coupled to a receiver. The T/R switch selectively connects the transmitter port to the antenna port or the receiver port to the antenna port. The wireless communication device also includes a T/R switch controller that sets the T/R switch to disconnect the transmitter from the antenna when the transmitter is actively transmitting in a high insertion loss mode to reduce power from the transmitter to the antenna. | 2019-01-03 |
20190007087 | ADJUSTABLE COMPENSATION CIRCUIT FOR SWITCHING APPLICATIONS - Adjustable compensation circuit for switching applications. In some embodiments, a compensation circuit for a switching circuit can include an inductive circuit that couples a selected node of the switching circuit with a reference node. The inductive circuit can be configured to provide a plurality of inductance values. | 2019-01-03 |
20190007088 | ULTRA-LOW POWER RECEIVER - An ultra-low-power receiver includes a low-noise amplifier configured to receive an input analog signal and generate an amplified signal and a mixer electrically coupled to the low-noise amplifier. The mixer is configured to convert said amplified signal into an intermediate frequency signal. A progressively reduced intermediate frequency filter is configured to process the intermediate frequency signal from the mixer in discrete time. | 2019-01-03 |
20190007089 | SYSTEMS AND METHODS FOR INTELLIGENTLY-TUNED DIGITAL SELF-INTERFERENCE CANCELLATION - A system for digital self-interference cancellation includes a filter that generates a reduced-noise digital residue signal; a channel estimator that generates a current self-interference channel estimate from a digital transmit signal, the reduced-noise digital residue signal, and past self-interference channel estimates; a controller that dynamically sets the digital transform configuration in response to changes in a controller-sampled digital residue signal; and a channel memory that stores the past self-interference channel estimates. | 2019-01-03 |
20190007090 | METHOD AND SYSTEM FOR RECEIVING TELEMETRY MESSAGES OVER RF CHANNEL - A method to receive telemetry messages over an RF channel, the method implemented by a system on a chip, in which a signal is received from the output of an input RF module, the received signal is offset in time and frequency wherein the signal, at first, is offset in time so that the offset magnitudes uniformly fill the length of one data bit, then, the signal is offset in frequency so that the offset magnitudes uniformly fill the space between the Fourier transform subcarriers, with the frequency offsets being independent of the time offsets; each signal processed at the preceding step is subjected to sequential Fourier transforms, with the first time element of each next transform immediately following the last element of the preceding transform; all messages are demodulated independently. The technical result consists in that messages can be received over multiple channels at multiple rates. | 2019-01-03 |
20190007091 | OPTICAL RAKE RECEIVER USING AN ETALON DETECTOR - An optical receiver and communication method receives an optical signal by an optical resonator to provide an intensity modulated signal indicative of a modulation of the optical signal. The intensity modulated signal is provided to a channel receiver of a plurality of channel receivers, and the channel receiver recovers from the intensity modulated signal a multipath version of a transmitted signal embedded in the modulation of the optical signal. The channel receiver's output is combined with an output of at least one other of the plurality of channel receivers to provide a combined output signal. | 2019-01-03 |
20190007092 | Methods and Apparatus for Signal Spreading and Multiplexing - Binary forward error correcting (FEC) encoding is applied to a stream of input bits, to generate a stream of coded bits. The coded bits are mapped to multiple binary streams. In some embodiments, at least one coded bit is mapped to more than one of the binary streams and none of the binary streams are identical to each other. Stream-specific modulations are applied to the binary streams. Non-binary FEC encoding could be applied after the stream-specific modulations. | 2019-01-03 |
20190007093 | Pulse Shaping Interoperability Protocol for Ultra Wideband Systems - Embodiments enable communicating Ultra Wideband (UWB) devices to collaborate by exchanging pulse shape information. The UWB devices use the pulse shape information to improve ranging accuracy. The improved ranging accuracy can be used in complex multipath environments where advanced estimation schemes are used to extract an arriving path for time-of-flight estimation. To determine the pulse shape information to be shared, some embodiments include determining location information of a UWB device and selecting the pulse shape information that satisfies regional aspects. The pulse shape information includes a time-zero index specific to a ranging signal that is used by UWB receivers to establish timestamps time-of-flight calculations. Some embodiments include measuring performance characteristics and selecting different pulse shape information based on the performance characteristics for improved accuracy. | 2019-01-03 |
20190007094 | Cable Modem Transceiver, Cable Modem, Cable Modem Communication System, Processor for a Cable Modem Transceiver, Method for Calibrating a Cable Modem Transceiver, and Computer Program - A cable modem transceiver includes a processor configured to derive an instant of time for an upstream calibration signal on basis of upstream scheduling information. Further, the cable modem transceiver includes a transmitter configured to generate the upstream calibration signal at the derived instant of time. The cable modem transceiver additionally includes a detector configured to determine a property of the generated upstream calibration signal. The processor is further configured to derive at least one calibration parameter for the transmitter on basis of the detected property. | 2019-01-03 |
20190007095 | TRANSMISSION DEVICE, TRANSMISSION METHOD, AND COMMUNICATION SYSTEM - A transmission device of the present disclosure includes: a driver unit that transmits a data signal with use of a first voltage state, a second voltage state, and a third voltage state interposed between the first voltage state and the second voltage state, and is configured to make a voltage in the third voltage state changeable; and a controller that changes the voltage in the third voltage state to cause the driver unit to perform emphasis. | 2019-01-03 |
20190007096 | METHOD AND APPARATUS OF COMMUNICATION UTILIZING WAVEGUIDE AND WIRELESS DEVICES - Aspects of the subject disclosure may include, for example a communication device that includes first and second waveguide devices that provide communications via electromagnetic waves that propagate along a transmission medium without utilizing an electrical return path, where the electromagnetic waves are guided by the transmission medium. The communication device can include a housing supporting a first plurality of antennas and a second plurality of antennas. The communication device can include a support structure physically connecting the first and second waveguide devices with the housing. Other embodiments are disclosed. | 2019-01-03 |
20190007097 | Line Synchronization Method in OSD System, System, and Vectoring Control Entity - A line synchronization method in an overlapped spectrum duplex (OSD) system having K pairs of communications lines. Each pair of communications lines includes an uplink and a downlink. The method includes synchronizing downstream synchronization symbols of downlinks in the pairs of communications lines, and separately synchronizing an upstream synchronization symbol of an uplink of each pair of communications lines with a downstream synchronization symbol of a downlink of each pair of communications lines. The method may be applied to crosstalk channel estimation to distinguish near-end crosstalk (NEXT) and far-end crosstalk (FEXT) crosstalk channels when upstream and downstream spectrums are overlapped. | 2019-01-03 |
20190007098 | LIVE ELECTRICAL POWERLINE SIMULATION SYSTEM - A powerline simulation system is provided that is used in facilitating the powerline technician training to simulate powerline contact without using a live powerline. A conductive mesh liner covers an exterior of a torso and arms of an electrical safety jacket worn by a powerline technician or trainee. A controller coupled to the mesh detects contact of the mesh with an un-energized electrical line, the contact is detected through a change in capacitance of the mesh and providing an audible indication of the contact to the powerline technician or trainee. The simulation tool allows a consistent testing environment, ensuring that no touches are missed. | 2019-01-03 |
20190007099 | MACHINE ASSISTED DEVELOPMENT OF DEPLOYMENT SITE INVENTORY - Aspects of the subject disclosure may include, for example, determining a target position of a particular physical location, accessing an image system that provides a number of images based on physical locations including the particular physical location, and obtaining a target image from the image system based on the particular physical location. The target image includes imaged features based on physical features of the particular physical location. Image processing is applied to the target image, and a particular physical feature is identified as a candidate deployment site based on the applying of the image processing, wherein the candidate deployment site is configured to accommodate equipment of a distributed communication network that facilitates transmission of electromagnetic waves along a surface of a transmission medium. Other embodiments are disclosed. | 2019-01-03 |
20190007100 | Power Line Communication Apparatus and Electronic Control Apparatus Including Power Line Communication Apparatus - A power line communication apparatus includes a drive block including an actuator control circuit and a drive circuit and a communication block. The actuator control circuit generates a control pulse for controlling an actuator, and controls a transition timing of the control pulse during an operation period set within a communication cycle by a communication clock. The drive circuit controls a driving current of the actuator supplied from a DC power source through a power line based on the control pulse in which the transition timing is controlled. The communication block generates the communication clock, and modulates a current flowing through the power line in response to data to be transmitted during a signal transmission period different from the operation period, set within the communication cycle. | 2019-01-03 |
20190007101 | Launch Topology for Field Confined Near Field Communication System - A system is provided in which a set of modules each have a substrate on which is mounted a radio frequency (RF) transmitter and/or an RF receiver coupled to a near field communication (NFC) coupler located on the substrate. Each module has a housing that surrounds and encloses the substrate. The housing has a port region on a surface of the housing. Each module has a field confiner located between the NFC coupler and the port region on the housing configured to guide electromagnetic energy emanated from the NFC coupler through the port region to a port region of an adjacent module. A reflective surface is positioned adjacent the backside of each NFC coupler to reflect back side electromagnetic towards the port region. | 2019-01-03 |
20190007102 | WIRELESS BED POWER - Patient care equipment includes a wireless coupler that transfers power and/or data between an architectural unit and the patient care equipment. The patient care equipment may also include additional wireless couplers that transfer power and/or data between first and second components of the equipment. The second component may be movable relative to the first component. A structure or hot swapping batteries is also disclosed, the swapped battery being charged on an inductive charging mat. | 2019-01-03 |
20190007103 | INTEGRATED ARTIFICIAL MAGNETIC LAUNCH SURFACE FOR NEAR FIELD COMMUNICATION SYSTEM - A system is provided in which a set of modules each have a substrate on which is mounted a radio frequency (RF) transmitter and/or an RF receiver coupled to a near field communication (NFC) coupler located on the substrate. Each module has a housing that surrounds and encloses the substrate. The housing has a port region on a surface of the housing. Each module has a field confiner located between the NFC coupler and the port region on the housing configured to guide electromagnetic energy emanated from the NFC coupler through the port region to a port region of an adjacent module. An artificial magnetic conductor surface is positioned adjacent the backside of each NFC coupler to reflect back side electromagnetic energy with a phase shift of approximately zero degrees. | 2019-01-03 |
20190007104 | DISTRIBUTING MULTIPLE-INPUT, MULTIPLE-OUTPUT (MIMO) COMMUNICATIONS STREAMS TO REMOTE UNITS IN A DISTRIBUTED COMMUNICATION SYSTEM (DCS) TO SUPPORT CONFIGURATION OF INTERLEAVED MIMO COMMUNICATIONS SERVICES - Distributed communications systems (DCSs) supporting configuring or reconfiguring the distribution of MIMO communications streams to designated remote units in the DCS to provide interleaved MIMO cell bonding of remote units are disclosed. In one example, the DCS includes different physical layers that are maintained from the central unit to the remote units. In this manner, the central unit can be configured or reconfigured to distribute separate MIMO communications streams to the desired physical layers in the DCS to support distributing MIMO communications streams to the desired remote units to provide the desired interleaved MIMO communications services. In this manner, interleaved MIMO communications services can be configured for a DCS using an existing infrastructure of remote units having substantially non-overlapping remote coverage areas, by directing the MIMO communications streams over the configured physical layers to be provided to the desired remote units to facilitate interleaved MIMO cell bonding of remote units. | 2019-01-03 |
20190007105 | TRANSMISSION DEVICE, TRANSMISSION METHOD, RECEPTION DEVICE, AND RECEPTION METHOD - By a transmission method according to one aspect of the present disclosure, in a broadcasting system that generates a first broadcasting signal and a second broadcasting signal by performing multi-antenna encoding on program data, and wirelessly transmits a first broadcasting signal and a second broadcasting signal, a first transmit station transmits the first broadcasting signal, a second transmit station transmits the second broadcasting signal, the first transmit station and the second transmit station transmit the first broadcasting signal and the second broadcasting signal to an overlapping area at an identical time using an overlapping frequency band, polarized wave transmitted from the first transmit station differs from polarized wave transmitted from the second transmit station, and arrangement of the first transmit station differs from arrangement of the second transmit station. | 2019-01-03 |
20190007106 | METHOD FOR TRANSMITTING/RECEIVING CHANNEL STATE INFORMATION IN WIRELESS COMMUNICATION SYSTEM AND APPARATUS FOR SAME - Disclosed are a method for transmitting/receiving channel state information in a wireless communication system and an apparatus for the same. Particularly, a method for reporting channel state information (CSI) by a user equipment (UE) in a wireless communication system may comprise the steps of: receiving channel state information reference signal (CSI-RS) from a base station through a multi-antenna port; and reporting CSI to the base station, wherein the CSI includes selection information indicating multiple codewords used to generate a precoding matrix within a codebook for reporting the CSI, a power coefficient and a phase coefficient are applied to each of the multiple codewords and the precoding matrix is then generated on the basis of a linear combination of the multiple codewords to each of which the power and phase coefficients are applied, and the selection information and information indicating the power coefficient are transmitted at different CSI reporting instances. | 2019-01-03 |
20190007107 | METHOD FOR TRANSMITTING FEEDBACK INFORMATION FOR DM-RS BASED OPEN-LOOP DOWNLINK TRANSMISSION IN WIRELESS COMMUNICATION SYSTEM, AND APPARATUS THEREFOR - The present invention provides a method for reporting channel status information (CSI) for downlink transmission to an eNode B (eNB) by a user equipment (UE) in a wireless communication system. Specifically, the method comprises the steps of: receiving a channel status information-reference signal (CSI-RS) from the eNB; calculating the CSI on the basis of the CSI-RS under the assumption that a dual-precoder including a first precoder and a second precoder is applied; and reporting the CSI to the eNB, wherein the step of calculating the CSI includes a step for assuming that at least one of the first precoder and the second precoder is cyclically employed from a predetermined precoder candidate set on the basis of a predetermined resource unit; and information associated with the at least one precoder and information associated with the predetermined precoder candidate set are provided from the eNB through radio resource control (RRC) layer signaling. | 2019-01-03 |
20190007108 | Channel Quality Index Measurement Method and Apparatus - Embodiments of the present invention disclose a channel quality index measurement method and apparatus. The method includes: determining, by a base station, a target CSI-RS on each of time-frequency resources corresponding to resource numbers of a terminal, where the target CSI-RS is a precoded CSI-RS, and the time-frequency resource is a resource element used to transmit the CSI-RS or the target CSI-RS; sending, by the base station, the target CSI-RS on each of the time-frequency resources corresponding to the resource numbers to the terminal on the time-frequency resource; sending, by the base station to the terminal, indication information used to indicate the resource numbers of the terminal; and receiving, by the base station, a CQI that is sent by the terminal and that is used to indicate channel quality. | 2019-01-03 |
20190007109 | FREQUENCY DIVISION MULTIPLE ANTENNA DISTRIBUTION - An apparatus of a base station can include an antenna array comprising a plurality of antenna elements, and processing circuitry coupled to the antenna array. The processing circuitry is configured to perform operations including generating a plurality of sub-carrier signals using a carrier signal. A sub-carrier pattern formed from a subset of the plurality of sub-carrier signals is selected. Each signal in the subset of sub-carrier signals corresponds to a different antenna element in a subset of the plurality of antenna elements. The sub-carrier signals are transmitted using the subset of antenna elements. Each of the sub-carrier signals is transmitted with a transmission power corresponding to a transmission weight of a plurality of transmission weights. During the transmitting, the sub-carrier pattern is transitioned throughout the antenna array to adjust the transmission power for each of the sub-carrier signals in the sub-carrier pattern. | 2019-01-03 |
20190007110 | SIMULTANEOUS ANTENNA UTILIZATION IN MU-MIMO MODE - A MIMO-enabled information handling system may have multiple antennas configured to transmit multiple spatial streams. In some modes, all antennas may be used such as during SU-MIMO communications. In other modes, less than all antennas may be used such as during MU-MIMO communications. When unused MIMO antennas are available during MU-MIMO mode, the elements may be reused for transmitting data for other wireless technologies or spectrums. For example, while transmitting MU-MIMO Wi-Fi data through one spatial stream, Bluetooth data may be simultaneously transmitted through one of the unused Wi-Fi MIMO antennas. | 2019-01-03 |
20190007111 | METHOD AND APPARATUS FOR TRANSCEIVING DATA IN A MIMO SYSTEM - The present invention relates to a method and apparatus for transceiving data. A method in which a transmitting terminal transmits data to a receiving terminal in a MIMO system according to one embodiment of the present invention comprises the following steps: generating a data field containing the data; generating a signal field containing information on the data field; generating a data frame containing the data field and the signal field; and transmitting the data frame to the receiving terminal. According to the present invention, an end of the frame being transmitted is accurately notified to the receiving terminal in a communication system in which the frame is transmitted using MIMO, thereby decoding the frame in a more efficient manner at the receiving terminal. | 2019-01-03 |
20190007112 | High Spatial Resolution Beam Space CSI Feedback - A method in a radio communications network, the network comprising a base station and at least one user equipment, UE, wherein the base station comprises an antenna array comprising a plurality of antenna elements, the method being implemented in the base station and comprising the steps of precoding ( | 2019-01-03 |
20190007113 | METHOD FOR DETECTING AN EXTERNAL ANTENNA CONNECTED TO A COMMUNICATION DEVICE - The disclosure concerns a method for selecting an antenna of a communication device for exchanging data with a radio access node. In order to select which one of the antennas connected to the communication device should be used to communicate with the radio access node, detection mechanisms based on resistivity measurements are run by the communication devices. However, such detection mechanisms are not reliable for detecting the connection of capacitive antennas. According to an embodiment of the disclosure, an antenna is selected for exchanging data with the radio access node upon detection of the establishment of a radio connection between the antenna and the radio access node, the detection being triggered when it is determined that the antenna provides a better reception of the radio signals than other antennas. | 2019-01-03 |
20190007114 | THROUGHPUT OPTIMIZATION BY GUARD INTERVAL SELECTION FROM BEAMFORMING FEEDBACK - This disclosure provides systems, methods and apparatus for wireless communication. In one aspect, a method of wireless communication includes utilizing a sounding procedure to obtain compressed beamforming (CBF) information. The sounding procedure may be a single-user or multi-user sounding procedure. The CBF information may contain various information regarding a particular channel that an access point may use for transmission. The information may include per-tone SNR information which may be processed to determine characteristics of the channel. Various techniques may be utilized to determine the further characteristics of the channel. The determined characteristics of the channel may then be used to determine an appropriate guard interval (GI) between symbols that are to be transmitted. Appropriate GI selection in wireless communications may facilitate higher throughput while decreasing overhead due to unnecessary idle time. | 2019-01-03 |
20190007115 | WIRELESS PERSONAL AREA NETWORK TRANSMIT BEAMFORMING - According to various aspects, techniques to enable implicit and/or explicit transmit (Tx) beamforming in a wireless personal area network are provided. In particular, the implicit transmit beamforming may be enabled during certain events, frames, and/or other conditions when a channel between a beamformer and a beamformee is reciprocal (i.e., packets are received and transmitted on the same frequency). In such cases, the beamformer may estimate channel state information (CSI) based on a packet received from the beamformee and use the estimated CSI to steer a beam in a direction towards the beamformee. In use cases that implement explicit transmit beamforming, the beamformee may estimate the CSI based on a packet received from the beamformer and provide the estimated CSI to the beamformer, which may then use the estimated CSI received from the beamformee to steer a beam in a direction towards the beamformee. | 2019-01-03 |
20190007116 | REFERENCE SIGNAL FOR RECEIVE BEAM REFINEMENT IN CELLULAR SYSTEMS - User Equipment (UE) and base station (eNB) apparatus and methodology for adjusting receive beamforming. A beam refinement reference signal (BRRS) is transmitted with the same transmit beam direction on which data is to be transmitted. While receiving the BRRS, the receiver varies its receive beam direction and measures a signal characteristic of reception of the BRRS to determine a refined receive beam direction. The refined receive beam direction is used to receive the data. | 2019-01-03 |
20190007117 | METHOD FOR TRANSMITTING/RECEIVING DATA SIGNAL BETWEEN BASE STATION AND TERMINAL IN WIRELESS COMMUNICATION SYSTEM AND APPARATUS SUPPORTING SAME - Disclosed are a method for transmitting/receiving a data signal between a base station and a terminal, and an apparatus supporting the same. More particularly, the present invention provides a method for reliably transmitting/receiving a data signal between a terminal and a base station when the data signal transmission/reception between the terminal and the base station is performed according to an analog beamforming method, and apparatuses supporting the same. | 2019-01-03 |
20190007118 | COMMUNICATION METHOD USING OUTDATED CHANNEL STATE INFORMATION IN G-CELL AND 2-USER CELLULAR NETWORK - Disclosed is a communication method using outdated channel state information in a network environment having a G-cell and 2-user terminal, by allowing a terminal and base stations to transmit and receive data symbols for G time slots, and to transmit and receive a reconfiguration signal for an additional one time slot. | 2019-01-03 |
20190007119 | METHOD AND DEVICE FOR UPLINK INFORMATION FEEDBACK AND DOWNLINK DATA TRANSMISSION - Provided are a method and device for uplink information feedback and downlink data transmission, used, when the speed of motion of a terminal is high, for solving the problem of CSI information reported by the terminal being insufficient to track changes on the channel, such that data transmission carried out on the basis of the channel state information reported by the terminal causes seriously degraded performance. The method comprises: a base station obtaining a precoding matrix of a terminal, and an l-th precoding matrix set of L precoding matrix sets corresponding to said precoding matrix; each precoding matrix set of said L precoding matrix sets containing at least one precoding matrix; said at least one precoding matrix originating from a preset codebook, wherein l≤L and L is a positive integer; according to the precoding matrix contained in the obtained l-th precoding matrix set, the base station sending downlink data to the terminal. By means of the precoding matrix set, a relatively wide beam is formed to cover the user, thus guaranteeing downlink transmission for the terminal when it is moving at high speed, improving the reliability of downlink transmission. | 2019-01-03 |
20190007120 | Antenna Tuning Components in Patterned Conductive Layers - An electronic device may include a peripheral conductive housing wall. The housing wall may be patterned to form first and second continuous regions defining opposing edges of a patterned region. The patterned region may include slots that divide the wall into conductive structures between the first and second continuous regions. A tuning element for an antenna in the device may be formed from the conductive structures and the slots in the patterned region. The slots and the conductive structures in the patterned region may be configured to mitigate any excessive capacitances between the first and second continuous regions in one or more desired frequency bands to optimize antenna efficiency. The slots may be narrow enough so as to be invisible to the un-aided human eye. This may configure the first and second continuous regions to appear to a user as a single continuous piece of conductor. | 2019-01-03 |
20190007121 | OPERATING A WIRELESS COMMUNICATION SYSTEM - The present invention relates to a method for operating a wireless communication system. The wireless communication system comprises a base station and a terminal. The terminal comprises a plurality of antenna elements and provides at least two antenna array configurations comprising a first antenna array configuration comprising at least two antenna elements having same radio transmission characteristics and a second antenna array configuration comprising at least two antenna elements having different radio transmission characteristics. According to the method, a selection process for selecting and an antenna array configuration of the at least two antenna array configurations is triggered and for each of the at least two antenna array configurations a corresponding figure of merit is determined. The corresponding figure of merit is determined based on corresponding pilot signals received from the base station via the corresponding antenna array configuration. Depending on the figures of merit, an antenna array configuration is activated. | 2019-01-03 |
20190007122 | A Network Node, A Wireless Device, and Methods Therein for Beam Selection - A Network Node (NN) | 2019-01-03 |
20190007123 | Beam Sweep or Scan in a Wireless Communication System - A user equipment is configured for use in a wireless communication system. The user equipment in this regard is configured to detect an orientation of an equipment coordinate frame defined for the user equipment relative to an earth coordinate frame defined for Earth. The user equipment is also configured to determine, based on the detected orientation, a set) of beams defined in the equipment coordinate frame which does not include any beam pointing in one or more predefined directions in the earth coordinate frame. The user equipment is further configured to perform a beam sweep or scan on the determined set of beams. | 2019-01-03 |
20190007124 | METHOD AND DEVICE FOR RELAYING SIGNAL IN MOBILE COMMUNICATION SYSTEM - Provided is a method for a relay that supports a time division duplex (TDD) operation for temporally multiplexing a first link, which is either an uplink or downlink, and a second link, which is different from the first link. The method comprises: receiving, by the relay, a first radio signal through a first reception antenna for the first link; limiting, by the relay, an amplification rate of a first transmission antenna for the first link or an amplification rate of a second transmission antenna for the second link, based on an amplitude of the first radio signal; and relaying, by the relay, the first radio signal through the first transmission antenna without decoding the first radio signal if the amplification rate of the second transmission antenna is limited. | 2019-01-03 |
20190007125 | HOST NODE DEVICE AND METHODS FOR USE THEREWITH - Aspects of the subject disclosure may include, for example, a repeater device having a first coupler to extract downstream channel signals from first guided electromagnetic waves bound to a transmission medium of a guided wave communication system. An amplifier amplifies the downstream channel signals to generate amplified downstream channel signals. A channel selection filter selects one or more of the amplified downstream channel signals to wirelessly transmit to the at least one client device via an antenna. A second coupler guides the amplified downstream channel signals to the transmission medium of the guided wave communication system to propagate as second guided electromagnetic waves. Other embodiments are disclosed. | 2019-01-03 |