03rd week of 2015 patent applcation highlights part 23 |
Patent application number | Title | Published |
20150015241 | CURRENT SENSOR - A current sensor according to the present invention includes a bus bar, a magnetic sensor element disposed so as to face the bus bar, a wiring board on which the magnetic sensor element is provided, and a signal line electrically connected to the magnetic sensor element. The wiring board includes a base portion facing the bus bar and an extending portion extending from the base portion, and the signal line is connected to the extending portion and provided in a direction intersecting the wiring board. | 2015-01-15 |
20150015242 | VOLTAGE DETECTION CIRCUIT - A voltage detection circuit includes: an amplifier which amplifies a voltage difference between first and second input signals input into non-inverting and inverting input terminals of the amplifier via first and second input portions; a first signal line which connects the first input portion to the amplifier; a second signal line which connects the second input portion to the amplifier; a first capacitor connected in parallel to the first signal line; a second capacitor connected in parallel to the second signal line; a first filter element which has an inductor component and a resistor component and is connected in series to the first signal line between the first capacitor and the amplifier; and a second filter element which has an inductor component and a resistor component and is connected in series to the second signal line between the second capacitor and the amplifier. | 2015-01-15 |
20150015243 | CIRCUIT ASSEMBLY FOR THE STATE MONITORING AND LOGGING OF OVERVOLTAGE PROTECTION DEVICES OR OVERVOLTAGE PROTECTION SYSTEMS - The invention relates to a circuit assembly for the state monitoring and logging of overvoltage protection devices or overvoltage protection systems by means of pulse current monitoring, comprising at least one passive RFID transponder having an inductively coupled voltage supply, wherein in the case of an event of the overvoltage protection device or the overvoltage protection system, the RFID transponder antenna circuit is influenced, in particular interrupted, short circuited, or detuned, so that disturbance processes can be identified. According to the invention, a coil L | 2015-01-15 |
20150015244 | TEMPERATURE COMPENSATED CURRENT MEASUREMENT - A temperature compensated current measurement device comprises a Rogowski coil having a terminating impedance arranged to adjust the attenuation of the coil to balance changes in coil sensitivity so that the output voltage indicative of measured current remains substantially unchanged, the terminating impedance having different values above and below a threshold frequency. | 2015-01-15 |
20150015245 | MULTI-ROTATION ENCODER - A battery-less multi-rotation encoder including detection coils with the Barkhausen effect includes a rotation detection mechanism and a signal processing circuit. The detection coils generate voltage pulses with different positive and negative signs, and transmit them to the signal processing circuit, and the signal processing circuit includes a controller and an adder. The controller can set states of the detection coils to be High or Low and to maintain them at High or Low, based on the positive and negative signs of the respective voltage pulses and no voltage pulse being generated therefrom. The controller is configured to store the states of the respective detection coils in a memory. The adder can update a number of rotations according to the changes in the states of the respective detection coils. The signal processing circuit can determine the rotational angle of a rotational shaft within about 1/4 rotation unit. | 2015-01-15 |
20150015246 | CALIBRATING READ SENSORS OF ELECTROMAGNETIC READ-WRITE HEADS - Described are embodiments to calibrate read sensors, which in turn may ensure that the equipment utilized to detect antigens is reliable and accurate. If it is determined that a read sensor is degraded a method of calibrating a read sensor of a read head may be used. | 2015-01-15 |
20150015247 | Magnetic Particle Imaging Devices and Methods - A magnetic particle imaging device is provided. The device includes a magnetic field source configured to produce a magnetic field having a non-saturating magnetic field region, an excitation signal source configured to produce an excitation signal in the non-saturating magnetic field region that produces a detectable signal from magnetic particles in the non-saturating magnetic field region, and a signal processor configured to convert a detected signal into an image of the magnetic particles. Aspects of the present disclosure also include methods of imaging magnetic particles in a sample, and methods of producing an image of magnetic particles in a subject. The subject devices and methods find use in a variety of applications, such as medical imaging applications. | 2015-01-15 |
20150015248 | CURRENT SENSOR AND ELECTRIC POWER CONVERTER - An art of measuring a current with a suppressed influence of a switching noise is provided. The art disclosed by the present specification is a current sensor that measures an output current of a switching circuit. The current sensor is equipped with a magneto-optical element that is arranged at a current measurement point, a light source that radiates light onto the magneto-optical element, and a light receiver that receives transmitted light or reflected light of the magneto-optical element. The light source radiates light in synchronization with a carrier signal of the switching circuit. Light is radiated in synchronization with the carrier signal, and a current is measured with the aid of the light. Due to synchronization with the carrier signal, the current can be measured at timings other than a switching timing resulting from a PWM signal that is generated on the basis of the carrier signal. | 2015-01-15 |
20150015249 | Current Sensor Device - A current sensor device includes a casing having a cavity and a conductor fixedly mounted to the casing. A semiconductor chip configured to sense a magnetic field is arranged in the cavity. An electrically insulating medium is configured to at least partially fill the cavity of the casing. | 2015-01-15 |
20150015250 | In-situ Characterization Of Formation Constituents - A well-logging method for a geological formation having a borehole therein may include collecting a plurality of nuclear magnetic resonance (NMR) snapshots from the borehole indicative of changes in the geological formation and defining NMR data. The method may further include identifying a plurality of fluids within the geological formation based upon the NMR data, determining respective NMR signatures for the identified fluids based upon the NMR data, determining apparent volumes for the identified fluids based upon the NMR signatures, and determining adjusted volumes for the identified fluids based upon the apparent volumes. | 2015-01-15 |
20150015251 | ATOM BEAM GYROSCOPE - One embodiment of the invention includes an atom beam gyroscope system. The system includes an atom beam system that generates an atom beam comprising alkali metal atoms along a length of a detection region orthogonal to a sensitive axis. The system also includes a detection system comprising a detection laser and photodetector. The detection laser can generate an optical detection beam that illuminates the detection region to pump the alkali metal atoms. The photodetector can measure an optical absorption of the optical detection beam by the alkali metal atoms in the atom beam and to generate an intensity signal associated with the measured optical absorption. The system further includes a gyroscope sensor configured to calculate rotation of the atom beam gyroscope system about the sensitive axis based on a magnitude of the intensity signal due to a Doppler-shift in energy of the alkali metal atoms in the atom beam. | 2015-01-15 |
20150015252 | Methods and Kits for Detecting Non-Luminescent or Weakly Luminescent Metals - The invention provides methods and kits for detecting the presence of, the amount of or the concentration of a substantially non-emitting metal in a sample by a) providing a sensitizer to a chelator of the substantially non-emitting metal thereby creating a sensitized-metal complex; b) adding an unsensitized chelate, and c) detecting a signal from the unsensitized chelate. The substantially non-emitting metal may be gadolinium and may exist in complex with a chelator. The unsensitized chelate may be terbium (Tb) or europium (Eu), and the detecting a signal may be performed by fluorescence. | 2015-01-15 |
20150015253 | AUTOMATED IMAGE ANALYSIS FOR MAGNETIC RESONANCE IMAGING - A magnetic resonance imaging (MRI) system, comprising: a magnetic resonance imaging scanner configured to generate a plurality of signals for forming at least one magnetic resonance image of a soft tissue region from a subject under observation, wherein the at least one magnetic resonance image provides at least one integrating feature to facilitate automatic segmentation; a signal processing system in communication with the magnetic resonance imaging scanner to receive the plurality of signals; and a data storage unit in communication with the signal processing system, wherein the data storage unit contains at least one template corresponding to the soft tissue region, wherein the signal processing system is adapted to process the plurality of signals received from the magnetic resonance imaging scanner to automatically perform segmentation for the soft tissue region of the subject under observation by utilizing the at least one template and the at least one integrating feature. | 2015-01-15 |
20150015254 | Control of SAR Values in MR Imaging - In a method for imaging a body part of a patient particularly in relation to DBS where conductive elements can reduce a safe SAR level, the power in the RF pulses being delivered to the RF transmit coil is measured in real time by a unit associated with the FR transmit coil and is used to stop the supply of RF pulses to the RF coil in the event that the power exceeds a predetermined safe limit. As signal can also be transmitted to the MR control unit to shut off the imaging sequence. | 2015-01-15 |
20150015255 | METHOD AND APPARATUS FOR PERFORMING GUIDED AND FLEXIBLE SELF-NAVIGATED STRUCTURAL MRI FOR MOTION COMPENSATION - A method and a magnetic resonance imaging apparatus provide subject/object motion detection and correction during a MRI scan. The method includes generating via a magnetic resonance scanner a magnetic field gradient and a radio-frequency signal for the MRI scan. The radio-frequency signal contains a successive repetition of pulse sequences, each pulse sequence starting with a radio-frequency excitation pulse. A time between two successive radio-frequency excitation pulses are defined as a repetition time. Detecting, from a readout signal emitted in response to the pulse sequence, time-points in which motion has occurred. Interleaves are automatically created. A sampling of the k-space is performed by arranging k-space MRI readout signals acquired over each repetition time of the pulse sequence into several groups of interleaves of uniform k-space sampling reconstructing separately each subset of interleaves for obtaining low resolution MR images. | 2015-01-15 |
20150015256 | MAGNETIC RESONANCE IMAGING APPARATUS AND MAGNETIC RESONANCE IMAGING METHOD - According to one embodiment, an MRI apparatus includes a data acquisition unit and an image generation unit. The data acquisition unit acquires an analog MR signal from an object and converts the analog MR signal into a digital MR signal. The image generation unit generates MR image data based on the digital MR signal. The data acquisition unit includes an AD converter, a signal processing part and a noise suppression part. The AD converter converts the analog MR signal, before a down conversion, into the digital MR signal, inside an imaging room. The signal processing part performs signal processing of the digital MR signal, inside the imaging room or outside the imaging room. The noise suppression part suppresses a noise arising caused by a conversion from the analog MR signal, before the down conversion, into the digital MR signal. | 2015-01-15 |
20150015257 | METHOD AND MAGNETIC RESONANCE APPARATUS TO DETERMINE A B0 FIELD MAP - In a method and magnetic resonance apparatus to determine a B0 field map describing the local deviation from a nominal Larmor frequency of the magnetic resonance apparatus, magnetic resonance data are acquired at at least two different dephasing times after an excitation, in measurements implemented at two different echo times whose difference forms a dephasing time, and a phase change used to determine the B0 field map is determined from a difference of phases measured at different echo times. The phase changes of different dephasing times are evaluated to at least partially reduce an ambiguity due to Nyquist phase wrapping. The measurements for different dephasing times are implemented at least in part with excitations that generate different excitation fields. | 2015-01-15 |
20150015258 | METHOD AND MAGNETIC RESONANCE APPARATUS TO DETERMINE A B1 PHASE MAP - In a method to determine a B1 phase map for at least two excitation modes of a radio-frequency coil arrangement of a magnetic resonance apparatus, the radio-frequency coil arrangement having multiple independently controllable transmission channels, and the B1 phase map describing, with spatial resolution, the phase of radio-frequency field this is generated in a respective excitation mode relative to a common reference phase map, first magnetic resonance data describing the phase change of a basic magnetic field of the magnetic resonance apparatus between a first echo time and a second echo time are acquired, and are evaluated to determine a spatially resolved Larmor frequency value that describes the deviation from a nominal Larmor frequency of the magnetic resonance apparatus. To correct raw phase maps derived from second magnetic resonance data acquired using a respective one of the excitation modes, a correction map, determined relative to the reference phase map, is calculated and subtracted from the raw phase map under consideration of the Larmor frequency value and the echo times in the acquisition of the second magnetic resonance data. | 2015-01-15 |
20150015259 | SYSTEM, ARRANGEMENT AND METHOD FOR DECOUPLING RF COILS USING ONE OR MORE NON-STANDARDLY-MATCHED COIL ELEMENTS - Arrangement, magnetic resonance imaging system and method can be provided, according to certain exemplary embodiments of the present disclosure. For example, a plurality of radio frequency (RF) coil elements can be utilized which can include at least one coil element that is coupled to and non-standard impedance matched with at least one preamplifier. | 2015-01-15 |
20150015260 | COOLING SYSTEM AND SUPERCONDUCTING MAGNET APPARATUS EMPLOYING THE SAME - A cooling system and a superconducting magnet apparatus employing the same. The cooling system includes: a thermal shield unit for thermally shielding a superconducting coil; a recondensing unit for recondensing an extremely low temperature refrigerant that cools down the superconducting coil. A cryocooler includes a body and an end portion extending from the body and inserted into the recondensing unit in order to directly contact the extremely low temperature refrigerant. A refrigerator chamber penetrates through the thermal shield unit and to which the cryocooler is attachably and detachably provided. A sealing member is disposed between the cryocooler and the refrigerator chamber to seal the recondensing unit. | 2015-01-15 |
20150015261 | Patient Bore With Integrated Radiofrequency Return Flux Space - The embodiments relate to a magnetic resonance imaging device, where the cladding of the patient bore of the MR imaging device includes a conductive layer. | 2015-01-15 |
20150015262 | EXTENDED DETUNING IN LOCAL COILS - A local coil for an MRI imaging system includes an antenna containing a first detuning circuit and a second detuning circuit, and a connection connected to the antenna between a first connection point on the antenna and a second connection point on the antenna. The connection is configured to be short-circuited by at least one diode. The first connection point and the second connection point are situated spatially between a first partial region and a second partial region of the antenna. | 2015-01-15 |
20150015263 | AIRBORNE ELECTROMAGNETIC SYSTEM WITH RIGID LOOP STRUCTURE COMPRISED OF LIGHTWEIGHT MODULAR NON-ROTATIONAL FRAMES - The present invention provides a light weight, modular and rigid structure for supporting the transmitter loop of an airborne electromagnetic system. The airborne electromagnetic surveying system comprises a tow assembly connected to an aircraft, the tow assembly including a transmitter section comprising a transmitter coil for generating a primary electromagnetic field that induces a secondary electromagnetic field. The transmitter coil is supported by a generally rigid transmitter frame. The transmitter frame comprises a plurality of frame sections assembled in a way such that the generally rigid transmitter frame substantially retains a rigid shape during operation. The system may also include a receiver section located above the generally rigid transmitter frame in between the aircraft and the generally rigid transmitter frame for detecting the secondary electromagnetic field. | 2015-01-15 |
20150015264 | FINDING POROSITY AND OIL FRACTION BY MEANS OF DIELECTRIC SPECTROSCOPY - Methods, systems, devices and products for evaluating an earth formation. Methods include estimating at least one property of the earth formation using at least one polarization parameter estimated using a real part and an imaginary part of a permittivity of the earth formation at a plurality of frequencies, where the real parts and the imaginary parts are based on measurements obtained using an electromagnetic tool in a borehole penetrating the earth formation. | 2015-01-15 |
20150015265 | Look Ahead Logging System - A technique utilizes the acquisition of data from desired subterranean regions via a logging system. The logging system is constructed for use in a wellbore and comprises a transmitter module having a transmitter antenna. Additionally, the logging system utilizes a receiver module spaced from the transmitter module and having a receiver antenna. The transmitter antenna and the receiver antenna are oriented to enable sensitivity in desired directions, such as ahead of the logging system. | 2015-01-15 |
20150015266 | MULTI-FUNCTIONAL ONLINE TESTING SYSTEM FOR SEMICONDUCTOR LIGHT-EMITTING DEVICES OR MODULES AND METHOD THEREOF - The disclosure provides a system and method for multi-functional online testing of semiconductor light-emitting devices or modules. The system comprises an electrical characteristic generating and testing equipment, one or more optical characteristic detecting and controlling equipments, an optical signal processing and analyzing equipment, one or more thermal characteristic detecting equipments, a central monitoring and processing computer, a multi-channel integrated drive controlling equipment, one or more multi-stress accelerated degradation controlling equipments, and one or more load boards. The present disclosure enables in-situ online monitoring and testing under accelerated degradation in a multi-stress accelerated degradation environment. | 2015-01-15 |
20150015267 | INTEGRATED STANDARD-COMPLIANT DATA ACQUISITION DEVICE - An integrated standard-compliant data acquisition device includes an electrically insulating package including a plurality of conductive leads and an integrated circuit (IC) disposed within the electrically insulating package and electrically coupled to at least some of the plurality of conductive leads. The IC includes a first multiplexer (MUX), a second MUX, a third MUX, an analog-to-digital converter (ADC), a plurality of registers, a fourth MUX, control logic, and communication circuitry. In operation, a first circuit value under a first condition can be determined and stored, a second circuit value under a second condition can be determined and stored, and the decision as to whether there is a fault condition can be mad by comparing the first circuit value and the second circuit value. | 2015-01-15 |
20150015268 | ELECTROMAGNETIC INPUT DEVICE AND COIL DETECTION CIRCUIT THEREOF - A coil detection circuit thereof for an electromagnetic input device including a plurality of first loop coils and second loop coils includes a first detection unit, a second detection unit and a selection unit. When the selection unit selects one the first loop coils to emit an electromagnetic signal for each one of the second loop coils, each one of the second loop coils forms a second closed loop for receiving the electromagnetic signal, and the second detection unit detects a second signal. When one of the second loop coils forms an open circuit or short circuit, the second detection unit detects an open-circuit signal or a short-circuit signal. | 2015-01-15 |
20150015269 | DETECTION OF MIS-SOLDERED CIRCUITS BY SIGNAL ECHO CHARACTERISTICS - One embodiment of the present invention sets forth a method for detecting defective solder balls that includes configuring a transmitter pad to transmit a pulse signal, transmitting the pulse signal, configuring transmitter pad to receive a pulse reflection, receiving a pulse reflection, analyzing the pulse reflection; and determining whether the pulse reflection is indicative of a defective solder ball. One advantage of the disclosed method is that solder ball defects may be detected more accurately than in the trial and error approach. | 2015-01-15 |
20150015270 | RELATIVE ANGLE DETECTION APPARATUS AND ELECTRIC POWER STEERING APPARATUS - A relative angle detection apparatus includes a first magnetometric sensor and a first voltage amplifier that output a signal corresponding to a relative rotation angle between a first rotation shaft and a second rotation shaft; a first amplifier circuit that amplifies the output signal of the first voltage amplifier; a second magnetometric sensor and a second voltage amplifier that output a signal that corresponds to the relative rotation angle; a second amplifier circuit that amplifies the output signal of the second voltage amplifier; a first resistor that is provided between the first amplifier circuit and a power supply terminal, or between the first amplifier circuit and a GND terminal; and a second resistor that is provided between the second amplifier circuit and the power supply terminal, or between the second amplifier circuit and the GND terminal. | 2015-01-15 |
20150015271 | DETECTING CIRCUIT AND DETECTING METHOD FOR DETERMINING CONNECTION STATUS BETWEEN FIRST PIN AND SECOND PIN - A detecting circuit for determining a connection status between a first pin and a second pin includes a signal generation unit, a logic unit and a determining unit. The signal generation unit is coupled to the first pin, and arranged for generating a first signal to the first pin. The logic unit is coupled to the signal generation unit and the second pin, and arranged for generating a determining signal according to the first signal inputted to the first pin and a second signal received from the second pin. The determining unit is coupled to the logic unit, and arranged for determining the connection status between the first pin and the second pin according to the determining signal. | 2015-01-15 |
20150015272 | GROUND ROD TESTING DEVICE FOR GROUND CHARACTERISTIC ANALYSIS - The present invention relates to a ground rod testing device for ground characteristic analysis. The ground rod testing device according to the present invention includes: an impulse generator generating an impulse waveform; a testing chamber accommodating the ground rod in which the impulse waveform is applied and a conductive fluid; a sensor for sensing the impulse waveform output from the ground rod; and a measuring instrument for measuring the impulse waveform sensed by the sensor. | 2015-01-15 |
20150015273 | Method For Determining An Electrical Property Of Cable Insulation - A method for determining conductivity of cable insulation of a cable including at least one conductor that determines the central axis of the cable and insulation layer surrounding the conductor longitudinally and radially includes steps of retrieving a cable sample from a cable, which sample includes a length of at least one insulation layer and preparing an insulation sample from the cable sample. The insulation sample is prepared from cable sample by cutting a circular layer having a set thickness at desired radius from the central axis of the cable. | 2015-01-15 |
20150015274 | DIRECT MEMORY BASED RING OSCILLATOR (DMRO) FOR ON-CHIP EVALUATION OF SRAM CELL DELAY AND STABILITY - A novel and useful direct memory based ring oscillator (DMRO) circuit and related method for on-chip evaluation of SRAM delay and stability. The DMRO circuit uses an un-modified SRAM cell in each delay stage of the oscillator. A small amount of external circuitry is added to allow the ring to oscillate and detect read instability errors. An external frequency counter is the only equipment that is required, as there is no need to obtain an exact delay measurement and use a precise waveform generator. The DMRO circuit monitors the delay and stability of an SRAM cell within its real on-chip operating neighborhood. The advantage provided by the circuit is derived from the fact that measuring the frequency of a ring oscillator is easier than measuring the phase difference of signals or generating signals with precise phase, and delivering such signals to/from the chip. In addition, the DMRO enables monitoring of read stability failures. | 2015-01-15 |
20150015275 | PASSIVE WIRELESS ANTENNA SENSOR FOR STRAIN, TEMPERATURE, CRACK AND FATIGUE MEASUREMENT - An apparatus and method is provided for monitoring a condition of a structure using a passive wireless antenna sensor having a known resonant frequency when mounted on the structure. A signal is transmitted with sweeping frequencies around a known resonant frequency to the passive wireless antenna sensor. A signal is received from the passive wireless antenna sensor and a resonant frequency of the passive wireless antenna sensor is determined based on the received signal. The determined resonant frequency is then compared to the known resonant frequency, whereby a change in the resonant frequency indicates a change in the condition of the structure. | 2015-01-15 |
20150015276 | PROBE FOR MEASURING BIOMOLECULES BY MEANS OF ELECTROCHEMICAL IMPEDANCE SPECTROSCOPY | 2015-01-15 |
20150015277 | CAPACITIVE ROTARY POSITION ENCODER - Some embodiments may include a capacitive rotary position encoder for the absolute determination of a rotary position about a rotary spindle. The rotary position encoder may include a transceiver unit, comprising a first arrangement of N electrically conductive, capacitive sensitivity areas which are embodied as angle segments over a defined angle range, which are distributed uniformly over the circumference, an electrically conductive reference area and an evaluation circuit, by means of which an electrical capacitance value between the reference area and one of the sensitivity areas is determinable. In some embodiments the sensitivity areas and the reference area are embodied as conductor track structures on a first electronics printed circuit board. A counterpart may be situated opposite the transceiver unit and rotatable relative thereto about the rotary spindle and may include a reference coupling area arranged opposite the reference area, and an arrangement of electrically conductive code areas connected thereto. | 2015-01-15 |
20150015278 | Obscured Feature Detector - A surface-conforming obscured feature detector includes a plurality of sensor plates, each having a capacitance that varies based on the dielectric constant of the materials that compose the surrounding objects and the proximity of those objects. A sensing circuit is coupled to the sensor plates | 2015-01-15 |
20150015279 | Evaluation Method and Evaluation Device for a Capacitive Contact Sensor - In an evaluation method for a capacitive contact sensor with at least one transmitting and at least one receiving electrode, which are able to be brought into a capacitive coupling, at the at least one receiving or sensor electrode a measurement signal is tapped, which represents the temporal course of the coupling capacitance between the at least one transmitting electrode and the at least one receiving electrode and the temporal course of the capacitive load of the sensor electrode, respectively, a reference signal is created from the measurement signal, and at least one detection signal is created, when the reference signal meets at least one detection criterion. An evaluation device may be coupled with at least one transmitting electrode and at least one receiving electrode or with at least one sensor electrode of the capacitive contact sensor and is adapted to carry out the above evaluation method. | 2015-01-15 |
20150015280 | WEAR DETECTION FOR COATED BELT OR ROPE - A method of wear detection of a coated belt or rope includes connecting a wear detection unit to one or more monitoring strands and/or cords of a coated belt or rope. The coated belt or rope includes one or more baseline strands and/or cords exhibiting a first change in electrical resistance as a function of bending cycles of the belt or rope and one or more monitoring strands and/or cords exhibiting a second change in electrical resistance as a function of bending cycles of the belt or rope, greater than the first change in electrical resistance. An electrical resistance of the one or more monitoring strands and/or cords is measured via the wear detection unit. Using at least the measured electrical resistance of the one or more monitoring strands and/or cords, a wear condition of the belt or rope is determined. | 2015-01-15 |
20150015281 | RESISTANCE MEASUREMENT - This disclosure describes techniques for measuring the resistance of a component with measurement circuitry that is electrically coupled to the component via one or more electrical conductors (e.g., one or more bond wires). The resistance measurement techniques of this disclosure may measure a resistance of an electrical conductor, and generate a value indicative of a resistance of a component other than the electrical conductor based on the measured resistance of the electrical conductor. The electrical conductor for which the resistance is measured may be the same as or different than one or more of the electrical conductors that the couple the measurement circuitry to the component to be measured. Using an electrical conductor resistance measurement to determine the resistance of a component may improve the accuracy of the resistance measurement for the component. | 2015-01-15 |
20150015282 | TESTING DEVICE FOR RESISTANCE VALUE - A testing device for testing resistance value includes a base, an operation pole, a sliding device, and a housing for enclosing the base. The base defines a hook receiving slot. A plurality of contact tabs is formed inside the hook receiving slot for contacting pins of the expansion card. A plurality of conductive tabs is formed on the base for being electrically coupled to the contact tabs. A ground terminal is electrically coupled to one of the conductive tabs coupling to the ground pins. The sliding device includes a resilient tab. The resilient tab includes a first end contacting one of the conductive tabs and a second end. The housing includes a connection portion for contacting the second end of the resilient tab and a test terminal electrically coupled to the connection portion. | 2015-01-15 |
20150015283 | Method and Apparatus for Power Glitch Detection in Integrated Circuits - A method and apparatus for power glitch detection in IC's is disclosed. In one embodiment, a method includes a detection circuit in an IC detecting a voltage transient wherein a value of a supply voltage has at least momentarily fallen below a reference voltage value. Responsive thereto, the detection circuit may cause a logic value to be stored in a register indicating that the detection circuit has detected the supply voltage falling below the reference voltage. The IC may include a number of detection circuits coupled to the register, each of which may provide a corresponding indication of detecting the supply voltage falling below the reference voltage. The detection circuits may be placed at different locations, and thus reading the register may yield information indicating the locations where, if any, such voltage transients occurred. | 2015-01-15 |
20150015284 | TRANSMIT/RECEIVE UNIT, AND METHODS AND APPARATUS FOR TRANSMITTING SIGNALS BETWEEN TRANSMIT/RECEIVE UNITS - In one embodiment, apparatus for transmitting and receiving data includes a transmission line network having at least three input/output terminals; at least three transmit/receive units, respectively coupled to the at least three input/output terminals; and a control system. The control system is configured to, depending on a desired direction of data flow over the transmission line network, i) dynamically place each of the transmit/receive units in a transmit mode or a receive mode, and ii) dynamically enable and disable an active termination of each transmit/receive unit. Methods for using this and other related apparatus to transmit and receive data over a transmission line network are also disclosed. | 2015-01-15 |
20150015285 | PROBE APPARATUS - A probe apparatus can suppress a spark from occurring near a wafer surface simply and efficiently when inspecting electrical characteristics of a semiconductor device at wafer level. A spark preventing device | 2015-01-15 |
20150015286 | MICRO-VISION ALIGNMENT SYSTEM WITH GUIDING RINGS FOR IC TESTING - A vision alignment system for an integrated circuit device testing handler includes a head guiding ring configured to be attached to a pick-and-place device, the head guiding ring having an opening in which a device-under-test having a device contact array is locatable; a socket apparatus including: a fixed mounting frame, a moveable socket guiding ring, and a plurality of actuators configured to move the moveable socket guiding ring relative to the fixed mounting frame; and a visualization device configured to provide data relating to a position of the device contact array relative to the contactor pin array. The socket apparatus is configured to adjust a position of the head guiding ring by moving the moveable socket guiding ring while the head guiding ring is located in an opening of the moveable socket guiding ring to align the device contact array to the contactor pin array. | 2015-01-15 |
20150015287 | TESTING APPARATUS AND METHOD FOR MICROCIRCUIT AND WAFER LEVEL IC TESTING - The test system provides an array of test probes having a cross beam. The probes pass through a first or upper probe guide retainer which has a plurality of slot sized to receive the probes in a way that they cannot rotate. The probes are biased upwardly through the retainer by an elastomeric block having a similar array of slots. The elastomer is then capped at its bottom by a second or lower retainer with like slots to form a sandwich with the elastomer therebetween. The bottom ends of the probes are group by probe height. A plurality of flex circuits at the different heights engage bottom probe ends at their respective height levels and take continue the circuits to a probe card where test signals originate. | 2015-01-15 |
20150015288 | Test Probe Coated with Conductive Elastomer for Testing of Backdrilled Plated Through Holes in Printed Circuit Board Assembly - A test probe is provided for probing signal information on a back-drilled plated through hole connector formed in a printed circuit board, where the test probe includes a conductive probe body with a distal tip region extending a predetermined minimum coverage length (L | 2015-01-15 |
20150015289 | Multipath Electrical Probe And Probe Assemblies With Signal Paths Through Secondary Paths Between Electrically Conductive Guide Plates - A multiple conduction path probe can provide an electrically conductive signal path from a first contact end to a second contact end. The probe can also include an electrically conductive secondary path and an electrically insulated gap between the signal path and the secondary path. The gap can be relatively small and thus provide the probe with a low loop inductance. A probe assembly can comprise multiple such probes disposed in passages in substantially parallel electrically conductive guide plates. The signal path of each of the probes can be electrically insulated from both guide plates, but the secondary path of each probe can be electrically connected to one or both of the guide plates. In some configurations, the probe assembly can include one or more secondary probes disposed in passages of the conductive guide plates and electrically connected to one or both of the guide plates. In some configurations, a probe assembly can comprise probes that are substantially the same shape and/or configuration all of which are disposed in passages through substantially parallel guide plates. Some of the probes can be electrically insulated from the guide plates and thus provide signal paths, and others of the probes can be electrically connected to the guide plates and thus provide secondary paths. Any of the foregoing types of probe assemblies can be part of a test contactor such as a probe card assembly, a load board, or the like. | 2015-01-15 |
20150015290 | PROBE MODULE SUPPORTING LOOPBACK TEST - A probe module, which supports loopback test and is provided between a PCB and a DUT, includes a substrate, a probe base, two probes, two signal path switchers, and a capacitor. The substrate has two first connecting circuits and two second connecting circuits, wherein an end of each first connecting circuit is connected to the PCB. The probe base is provided between the substrate and the DUT with the probes provided thereon, wherein an end of each probe is exposed and electrically connected to one second connecting circuit, while another end thereof is also exposed to contact the DUT. Each signal path switcher is provided on the probe base, and respectively electrically connected to another end of one first and one second connecting circuits. The capacitor is provided on the probe base with two ends electrically connected to the two signal path switchers. | 2015-01-15 |
20150015291 | CANTILEVER PROBE CARD FOR HIGH-FREQUENCY SIGNAL TRANSMISSION - A cantilever probe card, which is provided between a device under test (DUT) and a tester, includes a carrier board, a probe base, two probes, and a transmission device. The carrier board is provided with through holes. The probe base is provided on the carrier board, and the probes are mounted to the probe base. Each probe has a tip to contact a test pad of the DUT. The transmission device is flexible, and has signal circuits. The transmission device passes through the through hole on the carrier board, and the signal circuits connect the probes to the tester respectively. | 2015-01-15 |
20150015292 | WAFER TESTING SYSTEM AND ASSOCIATED METHODS OF USE AND MANUFACTURE - A wafer testing system and associated methods of use and manufacture are disclosed herein. In one embodiment, the wafer testing system includes an assembly for releaseably attaching a wafer to a wafer translator and the wafer translator to an interposer by means of separately operable vacuums, or pressure differentials. The assembly includes a wafer translator support ring coupled to the wafer translator, wherein a first flexible material extends from the wafer translator support ring so as to enclose the space between the wafer translator and the interposer so that the space may be evacuated by a first vacuum through one or more first evacuation paths. The assembly can further include a wafer support ring coupled to the wafer and the chuck, wherein a second flexible material extends from wafer support ring so as to enclose the space between the wafer and the wafer translator so that the space may be evacuated by a second vacuum through one or more second evacuation pathways. | 2015-01-15 |
20150015293 | On-Center Electrically Conductive Pins For Integrated Testing - A structure and method for providing a contact pin between a device under test (DUT) and a load board which provides upper and lower contact point which are axial aligned is disclosed. The pin has an upper ( | 2015-01-15 |
20150015294 | Test Socket With Hook-Like Pin Contact Edge - The present invention provides a test socket adaptable for testing different Integrated Circuit (IC) pad size during an IC testing. The test socket comprising a molded socket having an inner space and a plurality of through-apertures disposed on its surface; and a plurality of contact elements disposed within the inner space of the molded socket, each contact element has a pin contact edge and a pin-end; wherein each pin contact edge extends through the through-apertures of the molded socket; wherein each pin contact edge provides a linear surface area for contact with the DUT's lead; and wherein each pin contact edge provides a large contact area for various DUT's lead size. | 2015-01-15 |
20150015295 | SIGNAL PATH SWITCH AND PROBE CARD HAVING THE SIGNAL PATH SWITCH - A probe card, which is between a tester and a device under test (DUT), includes two first electrical lines, two second electrical lines, two inductive elements, and a capacitor. The first electrical lines are electrically connected to the probes respectively. The second first electrical lines are electrically connected to the first electrical lines respectively. The inductive elements are electrically connected the first electrical lines and the tester respectively; and the capacitor has opposite ends connected to the second first electrical lines respectively. | 2015-01-15 |
20150015296 | TEST STRUCTURE, ARRAY SUBSTRATE HAVING THE SAME AND METHOD OF MEASURING SHEET RESISTANCE USING THE SAME - A test structure includes a terminal pattern, a first extending part, a second extending part and a measuring part. The terminal pattern includes a first terminal part, a second terminal part, a third terminal part and a fourth terminal part sequentially disposed and spaced apart from each other in a first direction. The first extending part is connected to the first terminal part and the second terminal part. The first extending part extends in a second direction crossing the first direction. The second extending part is connected to the third terminal part and the fourth terminal part. The second extending part extends in the second direction. The measuring part partially overlaps the first extending part and the second extending part. | 2015-01-15 |
20150015297 | PHOTO DEVICE INSPECTION APPARATUS AND PHOTO DEVICE INSPECTION METHOD - A photo device inspection apparatus is an apparatus for inspecting a solar cell panel, which is a photo device. The photo device inspection apparatus includes an irradiation part configured to irradiate the solar cell panel with pulsed light radiated from a femtosecond laser, which is a light source, an electromagnetic wave detection part configured to detect a pulse of an electromagnetic wave radiated from the solar cell panel in response to irradiation with the pulsed light, and a current detection part configured to detect a current generated by the solar cell panel in response to irradiation with the pulsed light. | 2015-01-15 |
20150015298 | METHOD AND APPARATUS FOR SIGNALING PARTIAL SHADOWING OF A PHOTOVOLTAIC GENERATOR - The disclosure relates to a method for signaling partial shadowing within a PV generator including at least two partial PV generators connected in parallel. The method includes performing a reference impedance measurement on each of the at least two partial PV generators in a state of uniform irradiation of the PV generator, and determining at least one reference resonant property of each of the at least two partial PV generators from the reference impedance measurement. Furthermore, impedance measurements are carried out on the at least two partial PV generators at a first operating point of the PV generator during operation of the PV generator. Resonant properties of the partial PV generators are determined from the impedance measurements. Partial shadowing within the PV generator is detected and signaled if a difference between the resonant properties of the partial PV generators at the first operating point differs from a difference between the reference resonant properties of the partial PV generators. The disclosure also relates to an apparatus suitable for carrying out the method. | 2015-01-15 |
20150015299 | TRANSLATORS COUPLEABLE TO OPPOSING SURFACES OF MICROELECTRONIC SUBSTRATES FOR TESTING, AND ASSOCIATED SYSTEMS AND METHODS - Translators coupleable to opposing surfaces of microelectronic substrates for testing, and associated systems and methods are disclosed. An arrangement in accordance with one embodiment includes a microelectronic substrate having a first major surface, a second major face facing opposite from the first major surface, and electrically conductive through-substrate vias extending through the substrate and electrically accessible from both the first and second surfaces. The arrangement further includes a first translator releasably connected to the substrate and positioned in a first region extending outwardly from the first surface, the first translator including first electrical signal paths that access the vias from the first surface, and a second translator releasably connected to the substrate simultaneously with the first translator, the second translator being positioned in a second region extending outwardly from the second surface, the second translator including second electrical signal paths that access the vias from the second surface. | 2015-01-15 |
20150015300 | DETECTING FAULTS IN HOT-SWAP APPLICATIONS - Circuitry for detecting faults in a system for supplying power from an input node to an output node and having at least one switch coupled between the input node and the output node. The fault detecting circuitry is configured for indicating a fault condition of the switch when the switch is commanded to turn on and at least one of the following conditions is detected: a voltage across the switch exceeds a predetermined value or a value of the switch control signal is insufficient to turn the switch on. The fault condition is indicated only if the detected condition is present for a predetermined period of time. | 2015-01-15 |
20150015301 | ISLANDING DETECTION IN ELECTRICITY DISTRIBUTION NETWORK - A device is disclosed for detecting an islanding condition in an electricity distribution network, by receiving a signal of the electricity distribution network, and determining an islanding condition based on the received signal. The device determines a voltage total harmonic distortion change parameter for each phase component in the received signal, determines a voltage unbalance change parameter in the received signal, compares each of the voltage total harmonic distortion change parameters and the voltage unbalance change parameter to respective triggering conditions, and concludes an islanding condition to have been detected when the voltage total harmonic distortion change parameter for each phase component of the signal and the voltage unbalance change parameter fulfil their respective triggering conditions. | 2015-01-15 |
20150015302 | ISLANDING DETECTION RELIABILITY IN ELECTRICITY DISTRIBUTION NETWORK - A device for detecting an islanding condition in an electricity distribution network. The device comprises means for concurrently monitoring an islanding condition and a network event condition in the electricity distribution network, means for detecting an islanding condition in the power system network, and means for determining on the validity of detection of the islanding condition based on whether there is an associated network event with the detected islanding condition. | 2015-01-15 |
20150015303 | PARTIAL DISCHARGE MEASUREMENT SYSTEM AND PARTIAL DISCHARGE MEASUREMENT METHOD BY REPEATED IMPULSE VOLTAGE - An impulse voltage generator uses a predetermined rectangular waveform signal and a high voltage to generate an impulse voltage. The high voltage is obtained by boosting an instruction voltage of the rectangular waveform signal on a per-cycle basis. A partial discharge frequency calculation section receives detection signals based on partial discharges occurring in an object to be measured by the application of the impulse voltage and counts the detection signal on a per-cycle basis as a partial discharge frequency. An application voltage signal observation circuit observes an application voltage signal indicating the impulse voltage applied to the object to be measured. In a first cycle in which the partial discharge frequency reaches a specified frequency or more, a voltage value acquiring section sets, as a partial discharge starting voltage, the peak value of the voltage indicated by the application voltage signal output from the application voltage signal observation circuit. | 2015-01-15 |
20150015304 | PROTECTING DATA FROM DECRYPTION FROM POWER SIGNATURE ANALYSIS IN SECURE APPLICATIONS - Disclosed is a novel circuit able to generate any logic combination possible as a function of the input logic signals. The circuit is described as a 2 input logistic map circuit but may be expanded to 3 or more inputs as required. Further disclosed is a universal logic array with variable circuit topology. A metallization layer and/or a via interconnection between cells in the array elements produce a circuit topology that implements a Boolean function and/or chaotic function and/or a logic function. The novel circuit provides a circuit topology for secure applications with no obvious physical correspondence between control signal values and input to output mapping. Further disclosed is a network which has a power signature independent of input signal state and output transition. This provides a very useful circuit to protect data from decryption from power signature analysis in secure applications. | 2015-01-15 |
20150015305 | DYNAMIC CIRCUITRY USING PULSE AMPLIFICATION TO REDUCE METASTABILITY - Synchronisation circuitry | 2015-01-15 |
20150015306 | SYSTEMS AND METHODS FOR REDUCING POWER CONSUMPTION IN SEMICONDUCTOR DEVICES - A method of making a first timing path includes developing a first design of the first timing path with a first logic circuit and a first functional cell, wherein the first functional cell comprises a first transistor that is spaced from a first well boundary. The timing path is analyzed to determine if the first timing path has positive timing slack. If the analyzed speed of operation shows positive timing slack, the design is changed to a modified design to reduce power consumption of the first timing path by moving the first transistor closer to the first well boundary. Also the first timing path is then built using the modified design to reduce power consumption of the first timing path by reducing leakage power consumption of the first transistor. | 2015-01-15 |
20150015307 | COMPARATOR AND AMPLIFIER - A comparator has a differential pair circuit and a current control circuit. The differential pair circuit has first and second comparator transistors, and is arranged to compare a first input and a second input according to a clock signal to generate a result indicating whether a difference of the first and second inputs exceeds an internal offset. The current control circuit is coupled in series with the differential pair circuit, and configured to provide unequal abilities of drawing currents for the first and second comparator transistors. An amplifier circuit is also disclosed, having a differential pair circuit, a current control circuit, an amplification circuit and a reset circuit. | 2015-01-15 |
20150015308 | PHASE-LOCKED LOOP (PLL)-BASED FREQUENCY SYNTHESIZER - This disclosure describes techniques for generating signals that have relatively steep frequency profiles with a phase-locked loop (PLL) circuit architecture. In some examples, the techniques for generating signals that have relatively steep frequency profiles may include modulating an amplitude of a forward path signal in a PLL circuit at a location in a forward circuit path of the PLL circuit based on a control signal. The control signal may have an amplitude profile that is determined based on a target frequency profile to be generated by the PLL circuit. Modulating the forward circuit path of the PLL circuit with a signal that is determined based on a target frequency profile may allow a PLL-based frequency synthesizer to generate signals with relatively steep frequency profiles while still maintaining acceptable levels of phase noise. | 2015-01-15 |
20150015309 | Electronic Circuit with a Reverse-Conducting IGBT and Gate Driver Circuit - An electronic circuit includes a reverse-conducting IGBT and a driver circuit. A first diode emitter efficiency of the reverse-conducting IGBT at a first off-state gate voltage differs from a second diode emitter efficiency at a second off-state gate voltage. A driver terminal of the driver circuit is electrically coupled to a gate terminal of the reverse-conducting IGBT. In a first state the driver circuit supplies an on-state gate voltage at the driver terminal. In a second state the driver circuit supplies the first off-state gate voltage, and in a third state the driver circuit supplies the second off-state gate voltage at the driver terminal. The reverse-conducting IGBT may be operated in different modes such that, for example, overall losses may be reduced. | 2015-01-15 |
20150015310 | CLOCK DELAY DETECTING CIRCUIT AND SEMICONDUCTOR APPARATUS USING THE SAME - Provided is a clock delay detecting circuit and semiconductor apparatus using the same that is capable of generating a period signal whose period is a delay time of a clock, dividing the period signal, and counting the divided period signal. The clock delay detection circuit comprises a period signal generating unit configured to generate a counting control signal, a period signal dividing unit configured to generate a counting enable signal by dividing the counting control signal, and a counting unit configured to generate a delay information signal by counting the counting enable signal with a clock, wherein the counting control signal has a period with a predetermined time. | 2015-01-15 |
20150015311 | FRACTIONAL FREQUENCY DIVIDER CIRCUIT - A fractional frequency divider circuit includes: a frequency divider circuit configured to frequency-divide an input clock at 1/CTSquo, wherein the CTSquo is a quotient of CTS/N; a clock addition circuit configured to add one clock to an output of the frequency divider circuit; a counter that counts the number of cycles of the output of the frequency divider circuit by a carry of the frequency divider circuit or an output of the clock addition circuit; a match detection circuit that determines whether an integer multiple of N/CTSrem matches a value of the counter, wherein the CTSrem is a remainder of CTS/N; and a selector circuit that outputs the output of the clock addition circuit as an output clock when the match is detected by the match detection circuit, and outputs the output of the frequency divider circuit as an output clock when the match is not detected. | 2015-01-15 |
20150015312 | INTEGER FREQUENCY DIVIDER AND PROGRAMMABLE FREQUENCY DIVIDER CAPABLE OF ACHIEVING 50% DUTY CYCLE - An integer frequency divider capable of achieving a 50% duty cycle includes a source clock input end that provides a source clock, and two or more latches connected in series according to a connection order. Each of the latches includes: a signal input stage, configured to receive an input signal; a clock receiving stage, configured to treat the source clock as an input clock and an inverted clock of the source clock as an inverted signal of the input clock when the latch corresponds to an odd number in the connection order, and to treat the inverted clock as the input clock and the source clock as the inverted signal of the input clock when the latch corresponds to an even number in the connection order; and a signal output stage, configured to output an output signal according to the input signal and the source clock. | 2015-01-15 |
20150015313 | FREQUENCY MULTIPLIER JITTER CORRECTION - A system and method are provided for frequency multiplication jitter correction. The method accepts an analog reference signal having a first frequency, and using the analog reference signal, derives a system clock signal having a second frequency, greater than the first frequency. A PLL using a voltage controlled oscillator (VCO) is one example of a frequency multiplier. The method samples the amplitude of the analog reference signal using the system clock signal and converts the sampled analog reference signal into a digitized reference signal. In response to comparing the digitized reference signal to an ideal digitized reference signal, the phase error correction for the system clock signal is derived. The phase error correction at a first instance of time can be applied to the digitized data signal, previously converted from an analog data signal sampled at a first instance of time with the system clock signal. | 2015-01-15 |
20150015314 | MESOCHRONOUS SYNCHRONIZER WITH DELAY-LINE PHASE DETECTOR - A method and a system are provided for synchronizing a signal. A keep out window is defined relative to a second clock signal and an edge detection signal is generated that indicates if an edge of a first clock signal is within the keep out window. The edge detection signal may be filtered. An input signal is received in a domain corresponding to the first clock signal and a delayed input signal is generated. Based on the edge detection signal or the filtered edge detection signal, either the input signal or the delayed input signal is selected, to produce an output signal in a domain corresponding to the second clock signal. | 2015-01-15 |
20150015315 | Method and Apparatus for Duty Cycle Distortion Compensation - A method and apparatus for duty cycle distortion compensation is disclosed. In one embodiment, an integrated circuit includes a differential signal transmitter having a main data path and a compensation data path. The main data path includes a first and second differential driver circuits each having output terminals coupled to a differential output. A transmission controller is configured to transmit data into the main and compensation data paths, the data corresponding to pairs of sequentially transmitted bits including an odd data bit followed by an even data bit, and further configured to determine respective duty cycle widths for each of the odd and even data bits as received by the transmission controller. The transmission controller is configured to cause the first and second driver circuits to equalize the respective duty cycle widths of the odd and even data bits, as transmitted, based their respective duty cycle widths as received. | 2015-01-15 |
20150015316 | PERSISTENT NODES FOR RFID - An RFID transponder in one embodiment comprises a radio frequency (RF) transceiver, processing logic coupled to the RF transceiver, a switch coupled to the processing logic, a tunneling device coupled to the switch and a differential sensing circuit having a first input coupled to the tunneling device and a second input coupled to a predetermined reference voltage. In one embodiment, the tunneling device can discharge to a voltage below the predetermined reference voltage. | 2015-01-15 |
20150015317 | SPARE CELL STRATEGY USING FLIP-FLOP CELLS - Configurable flip-flop cells for use in scan chain configurations include one or more multiplexers, a flip-flop, and one or more logic gates. The logic gates are configurable, through modification of different metallization or semiconductor layers, to operate as spare gates or to disable flip-flop cell outputs based selection signal switching between scan shift and capture mode. When disabling flip-flop cell outputs, the logic gates are configured to receive both a test signal and a data input signal and select one of the two to pass to the flip-flop based on the selection signal. When used as spare gates, the logic gates receive external inputs and provide spare gate outputs to circuitry on an integrated circuit that is external to the flip-flop cells. | 2015-01-15 |
20150015318 | TRANSMITTER WITH HIGH FREQUENCY AMPLIFICATION - A transmitter may include a first path configured to receive a signal, to attenuate the low frequency components of the signal, and to output the low frequency component attenuated signal. The transmitter may further include a second path configured to receive the signal, to amplify the signal, and to output the amplified signal. The transmitter may also include a node coupled to the first path and the second path and configured such that the low frequency component attenuated signal and the amplified signal combine at the node. | 2015-01-15 |
20150015319 | DEVICES FOR SHIELDING A SIGNAL LINE OVER AN ACTIVE REGION - A multi-path transistor includes an active region including a channel region and an impurity region. A gate is dielectrically separated from the channel region. A signal line is dielectrically separated from the impurity region. A conductive shield is disposed between, and dielectrically separated from, the signal line and the channel region. In some multi-path transistors, the channel region includes an extension-channel region under the conductive shield and the multi-path transistor includes different conduction paths, at least one of the different conduction paths being in the extension-channel region to conduct substantially independent of a voltage on the signal line. In other multi-path transistors, the conductive shield is operably coupled to the impurity region and the multi-path transistor includes different conduction paths, at least one of the different conduction paths being under the conductive shield to conduct substantially independent of a voltage on the signal line. | 2015-01-15 |
20150015320 | BUS ENCODING SCHEME BASED ON NON-UNIFORM DISTRIBUTION OF POWER DELIVERY NETWORK COMPONENTS AMONG I/O CIRCUITS - A system and method for reducing simultaneous switching output (SSO) noise. In one embodiment, power supply decoupling capacitances are distributed non-uniformly among a plurality of I/O circuits. Transitions between consecutive values on a data bus are either sent by the transmitter as requested at the input of the transmitter, or, in cases for which the noise of the requested transition is high, converted by an encoder to transitions having lower SSO noise. The converted transitions are decoded in a receiver, so that the data at the output of the receiver are the same as the data at the input to the transmitter. | 2015-01-15 |
20150015321 | Circuit and Method for Controlling Charge Injection in Radio Frequency Switches - A circuit and method for controlling charge injection in a circuit are disclosed. In one embodiment, the circuit and method are employed in a semiconductor-on-insulator (SOI) Radio Frequency (RF) switch. In one embodiment, an SOI RF switch comprises a plurality of switching transistors coupled in series, referred to as “stacked” transistors, and implemented as a monolithic integrated circuit on an SOI substrate. Charge injection control elements are coupled to receive injected charge from resistively-isolated nodes located between the switching transistors, and to convey the injected charge to at least one node that is not resistively-isolated. In one embodiment, the charge injection control elements comprise resistors. In another embodiment, the charge injection control elements comprise transistors. A method for controlling charge injection in a switch circuit is disclosed whereby injected charge is generated at resistively-isolated nodes between series coupled switching transistors, and the injected charge is conveyed to at least one node of the switch circuit that is not resistively-isolated. | 2015-01-15 |
20150015322 | Parallel FET Solid State Relay Utilizing Commutation FETs - A solid state relay circuit is disclosed, containing a first and second group of FETs, the groups being connected in parallel. The first FET group contains commutation FETs capable of handling the commutation load of the circuit. The second FET group contains secondary FETs of lower resistance than the commutation FETs. The circuit is configured such that, when the circuit is activated, the commutation FETs are driven on before the secondary FETs. The circuit is also configured such that, when the circuit is deactivated, the commutation FETs are driven off only after the secondary FETs. | 2015-01-15 |
20150015323 | CHARGE PUMP CIRCUIT - A charge pump circuit includes a plurality of serially coupled stages and a plurality of clock drivers. A voltage output of a first of the stages is connected to a voltage input of a second of the stages. A voltage output of the second of the stages is boosted relative to a voltage input of the second of the stages. Each of the stages includes complementary charge pumps. Each of the charge pumps includes a pumping capacitor that stores charge in the stage. Each of the clock drivers drives a clock signal to the pumping capacitor of at least one of the stages. A voltage of the clock signal provided to the second of the stages is derived from the voltage input of the second of the stages. | 2015-01-15 |
20150015324 | CIRCUITRY, MULTI-BRANCH CHARGE PUMP, METHOD FOR CONTROLLING A CHARGE PUMP AND SYSTEM - One example refers to a circuitry comprising a first charge pump stage controlled by a first control signal, a second charge pump stage controlled by a second control signal, wherein the first charge pump stage and the second charge pump stage are arranged subsequently to each other and comprising a control unit for providing the first control signal and the second control signal, wherein the control unit is arranged to set the second control signal to high when the first control signal is high. Also, a multi-branch charge pump, a method for controlling various charge pumps and a system for controlling various charge pumps are suggested. | 2015-01-15 |
20150015325 | MULTIPLE OUTPUT CHARGE PUMP WITH MULTIPLE FLYING CAPACITORS - A multiple output charge pump that includes a first flying capacitor, a second flying capacitor, a first output node, a second output node, and a switching network. The first output node is configured to provide a first voltage, and the second output node is distinct from the first output node and is configured to provide a second voltage, different than the first voltage. The switching network is configured to provide a first mode of operation in which the first and second flying capacitors are connected in one of in series with one another between an input voltage and ground or in parallel with one another between the input voltage and ground, a second mode of operation in which the first and second flying capacitors are connected in parallel with one another between ground and the second output node, and a third mode of operation. | 2015-01-15 |
20150015326 | BULK-MODULATED CURRENT SOURCE - A bulk-modulated current source includes: an output terminal configured to supply an output current; a first transistor comprising: a first electrode coupled to the output terminal, a second electrode, a bulk electrode, and a gate electrode configured to receive a bias voltage; and an amplifier comprising: an input terminal electrically coupled to the first electrode of the first transistor, and an output terminal electrically coupled to the bulk electrode of the first transistor. | 2015-01-15 |
20150015327 | Controller and Method for Controlling a Signal Processor - A controller for controlling a signal processor includes a transformation unit and a control unit. The transformation unit is configured to generate at least one amplitude-modulation-to-phase-modulation-distortion within a signal, output by using the signal processor according to a signal processing, based on generated at least one amplitude-modulation-to-amplitude-modulation-distortion of the signal. The control unit is configured to adjust the signal processing of the signal processor so as to minimize the at least one amplitude-modulation-to-phase-modulation-distortion. | 2015-01-15 |
20150015328 | PRE-DISTORTION METHOD AND ASSOCIATED APPARATUS AND NON-TRANSITORY MACHINE READABLE MEDIUM - A pre-distortion method includes: receiving an input data; and obtaining a pre-distorted output by inputting the input data into a pre-distortion function, wherein the pre-distortion function is determined according to a power amplifier. A pre-distortion apparatus includes a receiver and a pre-distortion unit. The receiver is utilized for receiving an input data. The pre-distortion unit is utilized for obtaining a pre-distorted output by inputting the input data into a pre-distortion function, wherein the pre-distortion function is determined according to a following power amplifier. A non-transitory machine readable medium stores a program code executed for performing steps of the proposed pre-distortion method. | 2015-01-15 |
20150015329 | RADIO FREQUENCY COMPOSITE CLASS-S POWER AMPLIFIER HAVING DISCRETE POWER CONTROL - A composite amplifier providing digitally selectable amplification includes a plurality of channels and a combiner. Each of the channels includes a digitally controllable selector, a Class-S power amplifier, and bandpass filter. The digitally controllable selector selectively couples a digital bitstream to the amplifier. The amplifier receives the digital bitstream and provides an amplified signal. The bandpass filter generates a filtered signal as a function of the amplified signal. The combiner couples filtered signals provided by the channels to form a composite output signal. A method of providing digitally selectable amplification includes steps of: selectively coupling a digital bitstream to a plurality of channels in the amplifier; amplifying the digital bitstream to provide an amplified signal associated with a corresponding one of the channels; filtering amplified signals associated with the channels to provide corresponding filtered signals; and combining the filtered signals to generate a composite output signal. | 2015-01-15 |
20150015330 | DIFFERENTIAL-TO-SINGLE-END CONVERTER - A converter that converts a differential input signal to a single-end output signal is provided. The converter includes first, second, third and fourth transistors, and a pair of current sources. The first and second transistors are driven by the differential input signal, and have two conduction nodes coupled to each other and two conduction nodes not coupled to each other. The third and fourth transistors are driven by the differential input signal, and are connected in series with the first and second transistors. The pair of current sources, respectively connected in series with the third and fourth transistors, have a common control node coupled to the second conduction node of the first transistor. The second conduction node of the second transistor generates the single-end output signal. | 2015-01-15 |
20150015331 | Method and Circuit for Controlled Gain Reduction of a Differential Pair - The present document relates to multi-stage amplifiers, such as linear regulators or linear voltage regulators (e.g. low-dropout regulators) configured to provide a constant output voltage subject to load transients. A multi-stage amplifier is described, having a differential amplification stage which comprises a differential transistor pair. The differential amplification stage is configured to provide a stage output voltage at a stage output node of the differential transistor pair, based on a first input voltage at a first stage input node and a second input voltage at a second stage input node. The differential transistor pair also comprises a reference node. The differential amplification stage further comprises an active load comprising a first diode transistor coupled to the reference node and a first mirror transistor coupled to the stage output node. | 2015-01-15 |
20150015332 | Method and Circuit for Controlled Gain Reduction of a Gain Stage - The present document relates to multi-stage amplifiers, such as linear regulators or linear voltage regulators (e.g. low-dropout regulators) configured to provide a constant output voltage subject to load transients. A multi-stage amplifier is described. The multi-stage amplifier comprises a first amplification stage configured to provide a stage output voltage at a stage output node. Furthermore, the amplifier comprises an intermediate amplification stage comprising an amplifier current source configured to provide an amplifier current and an amplifier transistor arranged in series with the amplifier current source. A gate of the amplifier transistor is coupled to the stage output node of the first amplification stage. The intermediate amplification stage is configured to provide an amplified or attenuated stage output voltage at a midpoint between the amplifier current source and the amplifier transistor. | 2015-01-15 |
20150015333 | DIFFERENTIAL MEASUREMENTS WITH A LARGE COMMON MODE INPUT VOLTAGE - An apparatus comprises a differential amplifier circuit and a current source. The differential amplifier circuit is configured to receive a voltage at an input, wherein the differential amplifier circuit generates an output voltage having a magnitude proportional to the received voltage over a voltage range to be measured at a specified output common mode voltage. The current source is electrically connected to an input of the differential amplifier circuit and is configured to subtract a midpoint of a voltage range of the battery voltage to be measured at the input of the differential amplifier, wherein a circuit supply voltage provided to the differential amplifier circuit and the current source is less than the voltage at the input. | 2015-01-15 |
20150015334 | ANALOG CIRCUITS HAVING IMPROVED TRANSISTORS, AND METHODS THEREFOR - Circuits are disclosed that may include a plurality of transistors having controllable current paths coupled between at least a first and second node, the transistors configured to generate an analog electrical output signal in response to an analog input value; wherein at least one of the transistors has a deeply depleted channel formed below its gate that includes a substantially undoped channel region formed over a relatively highly doped screen layer formed over a doped body region. | 2015-01-15 |
20150015335 | SENSE AMPLIFIER LAYOUT FOR FINFET TECHNOLOGY - A sense amplifier (SA) comprises a semiconductor substrate having an oxide definition (OD) region, a pair of SA sensing devices, a SA enabling device, and a sense amplifier enabling signal (SAE) line for carrying an SAE signal. The pair of SA sensing devices have the same poly gate length Lg as the SA enabling device, and they all share the same OD region. When enabled, the SAE signal turns on the SA enabling device to discharge one of the pair of SA sensing devices for data read from the sense amplifier. | 2015-01-15 |
20150015336 | CMOS CASCODE POWER CELLS - A circuit includes a first CMOS device forming a gain stage of a power amplifier and a second CMOS device forming a voltage buffer stage of the power amplifier. The first CMOS device includes a first doped well formed in a substrate, a first drain region and a first source region spaced laterally from one another in the first doped well, and a first gate structure formed over a first channel region in the first doped well. The second CMOS device includes a second doped well formed in the semiconductor substrate such that the first doped well and the second is disposed adjacent to the second doped well. A second drain region and a second source region are spaced laterally from one another in the second doped well, and a second gate structure formed over a second channel region in the second doped well. | 2015-01-15 |
20150015337 | MODULAR APPROACH FOR REDUCING FLICKER NOISE OF MOSFETS - In one example implementation, the present disclosure provides a modular approach to reducing flicker noise in metal-oxide semiconductor field-effect transistors (MOSFETs) in a device. First, a circuit designer may select one or more surface channel MOSFETs in a device. Then, the one or more surface channel MOSFETs are converted to one or more buried channel MOSFETs to reduce flicker noise. One or more masks may be applied to the channel(s) of the one or more surface channel MOSFETs. The technique maybe used at the input(s) of operational amplifiers, and more particularly, rail-to-rail operational amplifiers, as well as other analog and digital circuits such a mixers, ring oscillators, current mirrors, etc. | 2015-01-15 |
20150015338 | POWER AMPLIFIER - There is provided a power amplifier capable of readily reducing odd-order harmonic waves even in high frequencies. This power amplifier includes n current sources (where “n” is a natural number equal to or greater than 3) that cause predetermined currents to flow; n switches that open and close current paths of the n current sources, respectively; and a signal generating section that generates n timing signals for turning on/off the n switches, respectively. In the power amplifier, the n timing signals are signals that have an identical duty ratio and that are different in phase; and the power amplifier outputs a signal amplified in power based on the currents flowing through the n current sources. | 2015-01-15 |
20150015339 | POWER AMPLIFIER ARCHITECTURES WITH INPUT POWER PROTECTION CIRCUITS - An RF power amplifier circuit and input power limiter circuits are disclosed. A power detector generates a voltage output proportional to a power level of an input signal. There is a directional coupler with a first port connected to a transmit signal input, a second port connected to the input matching network, and a third port connected to the power detector. A first power amplifier stage with an input is connected to the input matching network and an output is connected to the transmit signal output. A control circuit connected to the power detector generates a gain reduction signal based upon a comparison of the voltage output from the power detector to predefined voltage levels corresponding to specific power levels of the input signal. Overall gain of the RF power amplifier circuit is reduced based upon the gain reduction signal that adjusts the configurations of the circuit components. | 2015-01-15 |
20150015340 | VARIABLE SWITCHED DC-TO-DC VOLTAGE CONVERTER - A voltage converter can be switched among two or more modes to produce an output voltage tracking a reference voltage that can be of an intermediate level between discrete levels corresponding to the modes. One or more voltages generated from a power supply voltage, such as a battery voltage, can be compared with the reference voltage to determine whether to adjust the mode. The reference voltage can be independent of the power supply voltage. | 2015-01-15 |