04th week of 2017 patent applcation highlights part 60 |
Patent application number | Title | Published |
20170025969 | SYNCHRONOUS RECTIFIER PHASE CONTROL TO IMPROVE LOAD EFFICIENCY - A semiconductor device includes a current monitor circuit to measure a load current. A controller controls drive signals having a signal phase to operate a synchronous rectifier (SR) circuit based on the measured load current from the current monitor circuit. The controller applies a first control phase sequence to control the signal phase to the SR circuit if the measured load current is above a predetermined current threshold. The controller applies a second control phase sequence to control the signal phase to the SR circuit if the measured load current is equal or below the predetermined current threshold. | 2017-01-26 |
20170025970 | CIRCUIT WITH LOW DC BIAS STORAGE CAPACITORS FOR HIGH DENSITY POWER CONVERSION - A circuit for converting DC to AC power or AC to DC power comprises a storage capacitor, boost and buck inductors and switching elements. The switches are controlled to steer current to and from the storage capacitor to cancel DC input ripple or to provide near unity power factor AC input. The capacitor is alternately charged to high positive or negative voltages with an average DC bias near zero. The circuit is configured to deliver high-efficiency power in applications including industrial equipment, home appliances, mobility devices and electric vehicle applications. | 2017-01-26 |
20170025971 | UNMANNED AERIAL VEHICLE AND DATA PROCESSING METHOD THEREOF - The present disclosure discloses an unmanned aerial vehicle comprising at least two controllers, at least two electronic speed controllers and at least two motors, wherein: the at least two electronic speed controllers are electrically connected with the at least two controllers to obtain at least two sets of control data respectively from the at least two controllers, select optimal control data from the at least two sets of control data, and control a rotation speed of the corresponding motor according to the optimal control data. The present disclosure further discloses a data processing method of an unmanned aerial vehicle. The electronic speed controllers of the present disclosure may be able to receive data directly from the controllers and select the optimal control data for controlling the rotation speed of the motors, thereby effectively reducing design costs and safety risks. | 2017-01-26 |
20170025972 | CONTROL APPARATUS FOR ELIMINATING MAGNETIZING ERROR OF ROTOR IN DC MOTOR AND METHOD THEREOF - A control apparatus for eliminating a magnetizing error of a rotor in a DC motor and a method thereof. The rotor in the DC motor is provided with 2N magnetic pole positions disposed therein for phase switching, where N is a positive integer no less than 1. The control apparatus includes a phase detector, at least one counter, a PWM signal generator, control circuit and a full-bridge driving circuit. The phase detector detects changes of states of the magnetic pole positions of the rotor to generate a periodic phase-switching signal. The counter counts a count value associated with each of the magnetic pole positions, respectively. The PWM signal generator periodically outputs 2N PWM signals and adjusts each of the PWM signals issued in a next cycle, respectively, according to the count value associated with each of the magnetic pole positions received in a current cycle. | 2017-01-26 |
20170025973 | POWER STEERING DEVICE AND CONTROL DEVICE FOR POWER STEERING DEVICE - Provided are a power steering device and a control device for a power steering device, which are capable of reducing power consumption. The power steering device includes a current detection number setting circuit configured to set the number of times of detection of a DC bus current value by a current detecting circuit to a first predetermined number over a first predetermined cycle of a PWM period when the steering-state signal indicative of a steering operation state is received, and to set the number of times of detection so that the number of times of detection becomes smaller than the first predetermined number over the first predetermined cycle of the PWM period when a steering-state signal indicative of a non-steered state is received. | 2017-01-26 |
20170025974 | ENCODERLESS MOTOR WITH IMPROVED GRANULARITY AND METHODS OF USE - A DC electric motor having a stator mounted to a substrate, the stator having a coil assembly having a magnetic core, a rotor mounted to the stator with permanent magnets distributed radially about the rotor, the permanent magnets extending beyond the magnetic core, and sensors mounted to the substrate adjacent the permanent magnets. During operation of the motor passage of the permanent magnets over the sensors produces a substantially sinusoidal signal of varying voltage substantially without noise and/or saturation, allowing an angular position of the rotor relative the substrate to be determined from linear portions of the sinusoidal signal without requiring use of an encoder or position sensors and without requiring noise-reduction or filtering of the signal. | 2017-01-26 |
20170025975 | METHOD, DRIVE SYSTEM AND VEHICLE - The present invention discloses a method for controlling an electric machine, having an encoder wheel which has a multiplicity of teeth and at least one reference marking, having the steps: detecting the dynamics of the electric machine, detecting the positions of the teeth on the encoder wheel in relation to the at least one reference marking if the electric machine exhibits low dynamics, calculating a rotational speed of the electric machine on the basis of at least the detected positions, and controlling the electric machine on the basis of at least the calculated rotational speed. Furthermore, the present invention discloses a drivetrain and a vehicle. | 2017-01-26 |
20170025976 | MOTOR SPEED CONTROL CIRCUIT AND CONTROL METHOD THEREOF - A motor speed control circuit including a voltage-dividing module, a first analog-to-digital converter, a second analog-to-digital converter and an operation module. The voltage-dividing module includes a first resistor unit and a second resistor unit. The first analog-to-digital converter receives a supply voltage and converts the supply voltage into a digital supply voltage. The second analog-to-digital converter receives a divided voltage generated by the voltage-dividing module, and converts the divided voltage into a digital divided voltage. The divided voltage is associated with a resistance ratio between the first resistor unit and the second resistor unit. The operation module receives the digital divided voltage and determines a motor speed curve according to the resistance ratio. The operation module generates a first pulse width modulation signal according to the motor speed curve and the digital supply voltage to drive a motor. | 2017-01-26 |
20170025977 | GENERATOR COMPRISING A VARIABLE SPEED MAGNETIC GEAR - A generator comprising a magnetic gear, the magnetic gear comprising a stationary member comprising a set of electromagnets, a first moveable member comprising a set of magnets, and a second moveable member disposed between the first moveable member and the stationary member. The second moveable member comprises a set of core members. The first and second moveable members are magnetically coupled to define a gear ratio therebetween and the electromagnets are operable to control the gear ratio. The stationary member comprises a stator of the generator and the first moveable member comprises an armature of the generator, wherein the armature is arranged to induce an electrical current in a set of generator windings disposed around the stator. The second moveable member comprises an input means arranged to receive a drive force. The gear ratio is variable, such that a variable output speed may be produced for a given input speed. In this way, the electrical output of the generator is decoupled from the input speed, so as to provide sufficient power for a range of input speeds. | 2017-01-26 |
20170025978 | Low-Frequency Band Suppression Enhanced Anti-Reversal Power System Stabilizer - A low-frequency band suppression enhanced anti-reversal power system stabilizer is presented by the invention. Currently the widely used PSS2B power system stabilizer needs lead elements above Order 2 to meet the phase compensation requirement of DC blocking signal of active power, thus quickly increasing high-frequency band gain, restricting allowable total setting gain of PSS, limiting low-band gain and reducing low-frequency band suppression ability of power system stabilizer. The invention will add generator speed signal ω (which is treated by DC blocking element and corrected by parallel proportional differential PD) and active power signal P | 2017-01-26 |
20170025979 | Adaptive Torque Disturbance Cancellation for Electric Motors - An adaptive torque disturbance cancellation method and motor control system for rotating a load are described. The system has: (i) a speed controller for receiving a first input signal indicating a desired motor speed and, in response, for outputting a motor control signal; (ii) current sensing circuitry for sensing current through a motor that rotates in response to the speed controller; (iii) circuitry for storing, into a storage device, history data representative of the current through a motor when the motor operates to rotate the load; and (iv) circuitry for modifying the motor control signal in response to the history data. | 2017-01-26 |
20170025980 | METHOD FOR DRIVING VIBRATING MOTOR - A method for driving a vibrating motor is provided in the present disclosure. The method includes the following steps: providing a driving signal to a vibrating motor; detecting a vibration direction of a vibrating unit of the vibrating motor; determining whether the driving signal facilitates vibration of the vibrating unit; and switching a polarity of the driving signal when the driving signal does not facilitate the vibration of the vibrating unit. | 2017-01-26 |
20170025981 | ACTIVE FRONT END POWER CONVERTER WITH BOOST MODE DERATING TO PROTECT FILTER INDUCTOR - Methods and apparatus are presented for controlling a power converter to protect input filter inductors from overheating, in which an active front end (AFE) rectifier is operated in a boost mode to provide a boosted DC voltage at a derated output current value selected according to the DC bus voltage boost amount corresponding to a maximum load condition for which the filter inductors will not overheat. | 2017-01-26 |
20170025982 | CONTROL CIRCUIT FOR CONTROLLING COOLING FAN OF DATA CENTER - A control circuit for controlling a cooling fan is defined in a data center. The control circuit includes a cooling fan, a controller, a switch unit, and a control unit. The controller is configured to generate a first pulse width modulation (PWM) signal for controlling the cooling fan to rotate at a first speed and the control unit is configured to generate a second PWM signal for controlling the cooling fan to rotate at a second speed. The switch unit is configured to output the first PWM signal to the cooling fan when the data center is in an active mode and configured to output the second PWM signal to the cooling fan when the data center is in a standby mode. | 2017-01-26 |
20170025983 | SMART SOLAR TILE NETWORKS - Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for a dynamic solar tile network. In one aspect, a method includes designating a first solar tile in a set of solar tiles as a control tile. Selecting a subset of solar tiles in the set of solar tiles as controlled tiles that are each controlled by the control tile to form a solar tile network that includes the control tile and the controlled tiles. Receiving, at the control tile, status information from each of the controlled tiles. Determining, by the control tile, an operational state for each of the controlled tiles based on the status information. Transmitting, by the control tile, operation instructions to the controlled tiles that cause each controlled tile to switch to the operational state determined by the control tile. | 2017-01-26 |
20170025984 | MULTI-MODULE THERMOVOLTAIC POWER SOURCE - A thermophotovoltaic (TPV) system includes multiple thermo-photovoltaic modules that provide power to an application. Different thermo-photovoltaic modules provide different power levels to the application. Electronics can activate a portion of the thermo-photovoltaic modules in response to the power requirements of the application. | 2017-01-26 |
20170025985 | SYSTEM AND METHOD FOR MOUNTING SOLAR PANEL FRAMES ON CORRUGATED ROOFING - The system and method invention herein disclosed and claimed is a bracket and mounting method used to mount a solar panel frame to a corrugated roof without requiring any tools or special skills. | 2017-01-26 |
20170025986 | SPRING LOADED MOUNTING FOOT FOR PHOTOVOLTAIC SYSTEMS - A photovoltaic (PV) module mounting system including a mounting puck, an arm portion, and a PV module coupling device for coupling to the frames of two photovoltaic modules attached to the arm portion. A clamp pin formed in the mounting puck restrains the arm portion against the mounting puck when a spring holding the clamp pin is released from a compressed position. | 2017-01-26 |
20170025987 | HEIGHT ADJUSTMENT BRACKET FOR ROOF APPLICATIONS - A roof mount for mounting at least one solar panel to a roof surface including a base. The roof mount includes a clamp connected to the base and a first recess sized to support a first solar panel. The first recess has a first height extending between a first top flange and a first bottom flange. The clamp also includes a second recess sized to support one of a second solar panel and a skirt flange. The second recess has a second height extending between a second top flange and a second bottom flange. The roof mount further includes a fastener connected to the clamp. The second fastener is operable to adjust the first and second heights, such that upon tightening of the second fastener, the first height increases and the second height decreases, and upon loosening of the second fastener, the first height decreases and the second height increases. | 2017-01-26 |
20170025988 | MOBILE HOUSE UTILISING RENEWABLE ENERGY - The invention relates to a mobile house utilising renewable energy, characterised by comprising:—a shell structure ( | 2017-01-26 |
20170025989 | A POLE MOUNTABLE SOLAR TRACKING DEVICE - A pole mounted dual axis solar tracking apparatus has a main mounting member [ | 2017-01-26 |
20170025990 | SUPPORT BASEMENT FOR PHOTOVOLTAIC PANELS - A support basement adapted to support fixedly mounted or extensible and collapsible photovoltaic panels that comprises a plurality of triangular arrays ( | 2017-01-26 |
20170025991 | PORTABLE PHOTOVOLTAIC DEVICE - A portable photovoltaic device includes a waveguide body, a photovoltaic cell, an electronic module, and a fixing element. Waveguide material having transparency, flexibility, plasticity and weather resistance encapsulates photovoltaic cells and electronic module, without complicated light focusing system to converge light on a photovoltaic cell, to improve the power generating efficiency of the photovoltaic cell. Portable photovoltaic device of the present invention may be applied to wearable devices, mobile carrier or portable fixed electronic device, which has advantages of light weight, convenient use, energy saving, protection of electronics and environment friendly. | 2017-01-26 |
20170025992 | Mirrors Transparent to Specific Regions of the Electromagnetic Spectrum - Systems and methods in accordance with various embodiments of the invention implement mirrors that are more transparent to specific regions of the electromagnetic spectrum (e.g. the microwave region of the electromagnetic spectrum) relative to conventional metallic mirrors (e.g. mirrors made form aluminum or silver). In one embodiment, a space-based solar power system includes: a photovoltaic material; and a mirror that is—relative to a 10 μm thick sheet of aluminum—more transparent to at least one of a substantial portion of the microwave region of the electromagnetic spectrum and a substantial portion of the radio wave region of the electromagnetic spectrum; where the mirror is configured to focus incident visible light onto the photovoltaic material. | 2017-01-26 |
20170025993 | PHOTOVOLTAIC MODULE AND PHOTOVOLTAIC SYSTEM INCLUDING THE SAME - Disclosed are a photovoltaic module and a photovoltaic system including the same. The photovoltaic module includes a solar cell module, a converter to convert a DC voltage from the solar cell module, an inverter to convert the DC voltage from the converter into an AC voltage, and a plug to outwardly output the AC voltage from the inverter, the plug having a ground terminal. The ground terminal is electrically connected to a ground of the inverter, and the ground of the inverter is electrically connected to a ground of the solar cell module. Thereby, the AC voltage from the photovoltaic module is directly supplied to an outlet inside or outside a building. | 2017-01-26 |
20170025994 | SYSTEM AND METHOD FOR A PLUG AND PLAY ELECTRICAL WIRING HARNESS FOR THE CONNECTION OF A SOLAR SYSTEM TO EXISTING ELECTRICAL WIRING OF A BUILDING - Provided is a system and method for a plug and play style electrical wiring harness permitting connection of a photovoltaic solar installation to existing electrical wiring of a building. Moreover, provided is a wiring bundle providing a plurality of electrically conductive wires in a pre-defined arrangement, the wiring bundle encased by a flexible non-conductive protective covering, the wiring bundle having a first end and a second end; a first electrical plug disposed upon the first end, the first electrical plug providing at least one connector for each of the of the plurality of conductive wires within the wiring bundle, the first electrical plug structured and arranged to connect to a connector provided by the photovoltaic solar installation in only one orientation, the orientation ensuring proper electrical connection and alignment between the output lines of the photovoltaic solar installation and the wires of the wiring bundle; and a second electrical plug disposed upon the second end of the wiring bundle, the second electrical plug providing at least one connector for each of the plurality of conductive wires within the wiring bundle, the second electrical plug having a male connector with a plurality of protruding electrical conductors for insertion into an existing building power outlet and a female connector with a plurality of inset electrical conductors to receive a conductor plug intended for the existing building power outlet to which the male connector of the second plug is attached. | 2017-01-26 |
20170025995 | DEVICE FOR REDUCING THE OPEN CIRCUIT VOLTAGE OF A SOLAR SYSTEM - Devices for reducing the open circuit voltages of solar systems are described. In one embodiment, a solar system includes a string of a plurality of solar modules having an open circuit voltage. The solar system also includes a device for reducing the open circuit voltage of the string of the plurality of solar modules during an open circuit configuration. | 2017-01-26 |
20170025996 | COMPUTATIONALLY EFFICIENT ARC DETECTOR WITH COHERENT SAMPLING - Switching interference is a primary artifact which affects the accuracy of arc detectors. To address switching interference, conventional arc detectors employ computationally intensive techniques which are often designed specifically for a target application. Thus, conventional arc detectors require a significant amount of hardware to accurately detect arc faults, which can increase costs of the power systems and prohibit wide deployment of arc detectors. With improved signal processing, a unique method for arc detection can accurately detect arc faults efficiently while tolerate switching interference from an inverter of the power system. Specifically, the method provides accurate but efficient arc detection by using a small Fast Fourier Transform with coherent sampling that is accomplished with a common clock generator in combination with signal conditioning. The overall system implementing the method is also programmable to suit a variety of target applications. | 2017-01-26 |
20170025997 | APPARATUS AND METHOD FOR ANALYZING POWER GENERATION SYSTEM - Technique is provided that enables detection of changes in the condition of a power generation system that generates fluctuating power outputs even in a normal condition thereof. A power generation system management apparatus has: range information management means for managing a condition determination power output range corresponding to a range in which a power output at a predetermined measurement point of the power generation system is to be included with a predetermined probability or higher, the condition determination power output range being determined based on a standard deviation of a plurality of model construction power output values, which is calculated using a representative value of the power output at the measurement point and the model construction power output values, the representative value being calculated from a pseudo system model that is created with a non-parametric method using the plurality of model construction power output values. | 2017-01-26 |
20170025998 | Systems and Methods for Graphene Mechanical Oscillators with Tunable Frequencies - A nano-electro-mechanical systems (NEMS) oscillator can include an insulating substrate, a source electrode and a drain electrode, a metal local gate electrode, and a micron-sized, atomically thin graphene resonator. The source electrode and drain electrode can be disposed on the insulating substrate. The metal local gate electrode can be disposed on the insulating substrate. The graphene resonator can be suspended over the metal local gate electrode and define a vacuum gap between the graphene resonator and the metal local gate electrode. | 2017-01-26 |
20170025999 | A SUB-HARMONIC MIXER AND A METHOD THEREIN FOR CONVERTING RADIO FREQUENCY SIGNALS TO INTERMEDIATE FREQUENCY SIGNALS - A sub-harmonic mixer two or more cascaded stages for converting a Radio Frequency signal to an Intermediate Frequency signal. Each stage comprises a common-emitter transistor or a common-source transistor and each stage having an input and an output, the output of each stage is coupled to the input of a next stage by a capacitor. An Alternating Current choke is coupled at a collector or drain of each transistor. An LO input is coupled to the input of a first stage of the two or more stages; an RF input is coupled to the output of the first stage of the two or more stages; and an IF output is coupled to the output of a last stage of the two or more stages. | 2017-01-26 |
20170026000 | LINEARIZING CIRCUIT AND METHOD FOR AMPLIFIER - Linearizing circuit and method for amplifier. In some embodiments, a biasing circuit assembly for an amplifier can include a biasing circuit configured to provide a first bias signal or a second bias signal through a common node and a ballast to an input path of an amplifying transistor for operation in a first mode or a second mode, respectively. The biasing circuit assembly can further include a linearizing circuit implemented to couple the common node and a node along the input path. The linearizing circuit can be configured to improve linearity of the amplifying transistor operating in the first mode while allowing the ballast to be sufficiently robust for the amplifying transistor operating in the second mode. | 2017-01-26 |
20170026001 | Amplifier Assembly - An amplifier assembly includes a three or more way Doherty amplifier arrangement (DAA) having at least three amplifiers, including a main amplifier and at least two peak amplifiers. The DAA is within a dual-path package including a first-RF-input-lead and a second-RF-input-lead for receiving components of a split RF-input signal and providing the components to the DAA. A first-RF-output-lead and a second-RF-output-lead receive a split output signal from the DAA. The DAA includes a first-semiconductor-die and a second-semiconductor-die, each having thereon respective amplifier(s). The first-semiconductor-die includes a Doherty-splitter element splitting the RF-input signal from the first-RF-input-lead to provide an input to two amplifiers thereon and a Doherty-combiner element to combine an output from the two amplifiers. The Doherty-combiner element is connected to the first-RF-output-lead. The second-semiconductor-die amplifier(s) are connected to the second-RF-input-lead to provide an input to the amplifier(s) and to the second-RF-output-lead to receive an output from the amplifier(s). | 2017-01-26 |
20170026002 | ARCHITECTURES AND DEVICES RELATED TO DOHERTY AMPLIFIERS - An amplifier architecture can include an input circuit for splitting a signal into first and second portions, and carrier and peaking amplification paths for receiving the first and second portions. The architecture can further include an output circuit having a balun transformer circuit with first and second coils, with the first coil between first and second ports, the second coil between third and fourth ports, the first and third ports coupled by a first capacitance, and the second and fourth ports coupled by a second capacitance. The first port can receive a first signal from the carrier amplification path, and the fourth port can receive a second signal from the peaking amplification path. The second port can provide a combination of the first signal and the second signal as an amplified signal. A termination circuit can be provided to couple the third port to a ground. | 2017-01-26 |
20170026003 | SYSTEMS AND METHODS FOR THERMAL MANAGEMENT FOR TELECOMMUNICATIONS ENCLOSURES USING HEAT PIPES - Systems and methods for thermal management for telecommunications enclosures are provided. In one embodiment, a method for thermal management for modular radio frequency (RF) electronics housed within an electronics enclosure comprises: distributing heat generated from an RF electronics component installed on a first thermal region of an electronics module base plate across the first thermal region using at least one primary heat pipe that laterally traverses the first thermal region; distributing heat generated from the RF electronics component to a second thermal region using at least one secondary heat pipe not parallel with the at least one primary heat pipe; conductively transferring heat across a thermal interface between the electronics module back-plate and a backplane of an electronics enclosure that houses the electronics module, wherein the backplane comprises a plurality heat sink fins aligned with the at least one primary heat pipe and the at least one secondary heat pipe. | 2017-01-26 |
20170026004 | OFF-STATE ISOLATION ENHANCEMENT FOR FEEDBACK AMPLIFIERS - A feedback amplifier having an improved feedback network including two cross coupled switches that isolate the amplifier from extraneous undesired electrical signals present in a system or network when the amplifier is turned off (i.e., in an off-state). The cross coupled switches interconnect two feedback paths of a feedback network to enable out-of-phase differential signals to be summed and effectively canceled. Further, the feedback amplifier provides on-stage advantages to enable different amplifier characteristics and parameter to be selectively engaged by turning on or turning off certain feedback networks. | 2017-01-26 |
20170026005 | COMPRESSION CONTROL OF CASCODE POWER AMPLIFIERS - Compression control of cascode power amplifiers. A power amplifier module can include a power amplifier including a cascode transistor pair. The cascode transistor pair can include a first transistor and a second transistor. The power amplifier module can include a current comparator configured to compare a first base current of the first transistor and a second base current of the second transistor to generate a comparison signal. The power amplifier module can include a saturation controller configured to maintain the power amplifier out of saturation based on the comparison signal. | 2017-01-26 |
20170026006 | MULTI-PORT AMPLIFIER UTILIZING AN ADJUSTABLE DELAY FUNCTION - Disclosed is a multi-port power amplifier (“MPA”) having an input hybrid matrix (“IHM”), an output hybrid matrix (“OHM”), and a plurality of high-power amplifier (“HPA”) chains. The MPA may include a plurality of adjustable delay modules (“ADMs”) in signal communication with the IHM and the plurality of HPA chains. Each adjustable delay module (“ADM”) of the plurality of ADMs may be in signal communication with the IHM and a corresponding HPA chain of the plurality of HPA chains. | 2017-01-26 |
20170026007 | FEEDBACK COMPENSATION FOR MULTISTAGE AMPLIFIERS - Feedback compensation for multistage amplifiers. In some embodiments, an amplifier can include a first stage, a second stage, and a third stage implemented in series between an input node and an output node. The amplifier can further include a first feedback path implemented between an output of the third stage and a node between the first and second stages, with the first feedback including a first capacitance. The amplifier can further include a second feedback path implemented between the output of the third stage and an output of the second stage. The second feedback pack can include a transconductance element and a second capacitance arranged in series. In some embodiments, such an amplifier can be configured as an operational-amplifier. | 2017-01-26 |
20170026008 | PROTECTION CIRCUIT OF POWER AMPLIFICATION CIRCUIT AND POWER AMPLIFICATION CIRCUIT USING THE SAME - A protection circuit of a power amplifier includes a first current mirror configured to supply a current mirrored to a first reference current as a bias current of a driver amplifier; and a current sink configured to adjust a bias current of the driver amplifier by sinking the first reference current according to a magnitude of a voltage output from the power amplifier. | 2017-01-26 |
20170026009 | IMPEDANCE MATCHING ARRANGEMENT FOR AN AMPLIFIER - An impedance matching arrangement for an amplifier includes first and second metallic transmission lines arranged on a ground plane, the first metallic transmission line being connected with a first power amplification stage of the amplifier, the second metallic transmission line being connected with a second power amplification stage of the amplifier; wherein the first and second metallic transmission lines are electrically coupled for transmitting an RF signal amplified by the first power amplification stage to the second power amplification stage. | 2017-01-26 |
20170026010 | AMPLIFICATION CIRCUIT - An amplification circuit includes a first switching circuit that includes input terminals and first and second output terminals and that puts the second output terminal into an open state with respect to the input terminals while selectively putting the first output terminal into a state of being connected to any of the input terminals or selectively puts the second output terminal into a state of being connected to any of input terminals while putting the first output terminal into a state of being open with respect to the input terminals, a matching network that is connected to the first output terminal, an amplifier that is connected to an output side of the matching network, a second switching circuit that is connected to an output side of the amplifier, and a bypass path that electrically connects the second output terminal and an output terminal of the second switching circuit. | 2017-01-26 |
20170026011 | Transimpedance Amplifier with Bandwidth Extender - A transimpedance amplifier that includes an input configured to receive a current input from an upstream device and output configured to present an output voltage. The current input may be from a photodetector or any other device that is part of an optical signal receiving unit front end. In one configuration, there are three amplifier stages in the transimpedance amplifier connected in series. A feedback path with feedback resistor connects between the input and output of the transimpedance amplifier. A bandwidth extender circuit connects between a stage output and a stage input of the transimpedance amplifier. In a three stage embodiment, the bandwidth extender circuit extends between an input of the second stage and the output of the second stage. The bandwidth extender includes at least one active device configured to provide positive feedback to increase gain. The bandwidth extender circuit is able to be automatically or selectively deactivated to filter unwanted frequency components. | 2017-01-26 |
20170026012 | TRANSMISSION APPARATUS, RECEPTION APPARATUS, AND TRANSMISSION/RECEPTION SYSTEM - A transmission/reception system | 2017-01-26 |
20170026013 | Multi-Stage Amplifiers with Low Loss - An amplifier circuit ( | 2017-01-26 |
20170026014 | Method And Apparatus For Adaptive Transmit Power Control - Systems and methods for dynamically adjusting transmit gain in a transceiver. The gain is adjusted in order to provide the maximum gain. The amount of distortion is measured. The gain is increased until the distortion reaches a predetermined limit. The gain of several components can be adjusted independently. | 2017-01-26 |
20170026015 | Loudness Matching - An example method may involve a device determining a first loudness representation for a playback device based on a first equalization setting applied to a representation of average music. The device may also determine a second loudness representation for the playback device, based on a second equalization setting applied to the representation of average music. The device may also determine a loudness adjustment factor based on the first and second loudness representations, and then causing the playback device to play back media based on the second equalization setting and the determined loudness adjustment factor. | 2017-01-26 |
20170026016 | Equalization Contouring by a Control Curve - A method for equalization contouring provides a reduction of equalization in certain frequency regions either by user control or by automated selection of frequency, without introducing artifacts. A control curve smoothly scales the magnitude of the equalization in the areas where less equalization is desired to obtain a contoured equalization. The control curve varies by frequency and may be defined specifically for every sampled frequency value of the equalization, may be a continuous function of frequency, or may be a function of control points at a select number of frequency points. The control curve may also have automatic inputs, e.g. a machine-detected cutoff frequency of a speaker may be used to determine a control point in the control curve. As another example, the reverberation time (e.g. RT60) may be used to determine a control point in the control curve. The result is a contoured equalization curve without sudden steps. | 2017-01-26 |
20170026017 | VOLUME LEVELER CONTROLLER AND CONTROLLING METHOD - Volume leveler controller and controlling method are disclosed. In one embodiment, A volume leveler controller includes an audio content classifier for identifying the content type of an audio signal in real time; and an adjusting unit for adjusting a volume leveler in a continuous manner based on the content type as identified. The adjusting unit may configured to positively correlate the dynamic gain of the volume leveler with informative content types of the audio signal, and negatively correlate the dynamic gain of the volume leveler with interfering content types of the audio signal. | 2017-01-26 |
20170026018 | NOISE FILTER IMPLEMENTATION STRUCTURE - A transmission line includes three wires formed on a substrate. Each of the transmission lines transmits a three-level signal. A common-mode choke coil is inserted into the transmission line. The common-mode choke coil includes three coils coupled to one another and three pairs of outer electrodes, each of the three pairs being connected to the corresponding two ends of the coils. The outer electrodes of the common-mode choke coil are connected to the transmission line such that the three coils are serially inserted into the respective three wires. | 2017-01-26 |
20170026019 | COIL COMPONENT - A coil component includes a magnetic body having a plurality of filter parts disposed on a substrate and spaced apart from each other in a thickness direction. A plurality of input terminals and output terminals are disposed on outer surfaces of the magnetic body. Each of the filter parts includes upper and lower coils disposed in the magnetic body and spaced apart from each other in the thickness direction. In one example, a number of turns of the upper and lower coils of one filter part is different from a number of turns of the upper and lower coils of another filter part adjacent thereto. In another example, the number of turns of the upper and lower coils of the one and the other filter parts are the same, but capacitances of the one and the other filter parts are different. | 2017-01-26 |
20170026020 | System and Method for a Directional Coupler - In accordance with an embodiment, a method of operating a directional coupler includes determining a coupled power variation by applying an input signal at an input port of the directional coupler, applying a first impedance at a transmitted port of the directional coupler, measuring a first coupled power at a coupled port of the directional coupler after applying the first impedance, applying a second impedance at the transmitted port of the directional coupler, measuring a second coupled power after applying the second impedance, and determining a difference between the first coupled power and the second coupled power to form the coupled power variation. | 2017-01-26 |
20170026021 | Tunable and Integrated Impedance Matching and Filter Circuit - A high performance integrated tunable impedance matching network with coupled merged inductors. Embodiments include a combination of merged multiport constructively coupled spiral inductors and tunable capacitors configured to reduce insertion losses, circuit size, and optimization time while maintaining a high Q factor for the coupled spiral inductors. Some embodiments integrate one or more filter circuits with a tunable impedance matching network, useful in conjunction with such applications as radio frequency power amplifiers. | 2017-01-26 |
20170026022 | TELECOMMUNICATIONS DEVICE COMPRISING AN EBD CIRCUIT, A TUNABLE IMPEDANCE NETWORK AND A METHOD FOR TUNING A TUNABLE IMPEDANCE NETWORK - A system having a tunable impedance network and a method of tuning a tunable impedance network are disclosed. In one aspect, a telecommunications device comprises an electrical-balance duplexer (EBD) circuit coupled to at least one output node of a transmit path (TXin), an antenna, and at least one input node of a receive path (RXout), wherein the EBD circuit is configured to isolate the transmit path from the receive path by signal cancellation, and a balancing network (Zbal) as part of the EBD circuit. In one embodiment, the balancing network is an integrated tunable impedance network configured to provide an impedance that matches a target impedance (Zant) associated with the antenna at a first frequency and simultaneously at a second, different frequency. The network comprises a first portion and a second portion, the first portion reducing the influence of the tuning of the second portion at the first frequency. In some embodiments, the network preferably comprises no explicit resistors. | 2017-01-26 |
20170026023 | BALUN TRANSFORMER - A balun includes a dielectric layer having first and second sides, an electrically conductive plate on the second side of the dielectric layer, a first electrically conductive line on the first side and comprising a first end electrically connected to a first terminal and a second end, a second electrically conductive line on the second side and comprising a third end electrically coupled to a second terminal and a fourth end connected to an unbalanced terminal and a micro strip line comprising a fifth end electrically connected to the third end and a sixth end. The first electrically conductive line overlaps the second electrically conductive line. The second and the sixth ends are electrically coupled to the electrically conductive plate. The electrically conductive plate is hollowed in at least a region corresponding to an overlap area of the first electrically conductive line and second electrically conductive line. | 2017-01-26 |
20170026024 | BALANCE-UNBALANCE CONVERTER - A balance-unbalance converter includes a low pass filter including a first inductor and a first capacitor and a high pass filter including a second inductor and a second capacitor. A via continuous portion of the first inductor penetrates a helix of a helical portion of the second inductor, and a via continuous portion of the second inductor penetrates a helix of a helical portion of the first inductor. | 2017-01-26 |
20170026025 | Electroacoustic Component and Crystal Cuts for Electroacoustic Components - An electroacoustic component is disclosed. In an embodiment, the electroacoustic component includes a piezoelectric substrate comprising a rare earth metal and calcium oxoborates (RE-COB) and component structures arranged on the substrate, the component structures being suitable for converting between RF signals and acoustic waves, wherein the waves are capable of propagation in a direction x′″, and wherein the direction x′″ is determined by Euler angles (λ, μ, θ), the Euler angles being selected from angle ranges (20 . . . 90, 95 . . . 160, 15 . . . 55), (20 . . . 85, 95 . . . 160, 95 . . . 125) and (15 . . . 25, 85 . . . 100, 0 . . . 175). | 2017-01-26 |
20170026026 | SURFACE ACOUSTIC WAVE DEVICE - A surface acoustic wave device includes a piezoelectric substrate, an IDT electrode that is provided on the piezoelectric substrate and includes combtooth-shaped electrode fingers, and a wiring electrode that is connected to the IDT electrode. A line width of the electrode fingers at a lower edge thereof and a line width of the electrode fingers at an upper edge thereof in a cross section of the electrode fingers that is perpendicular or substantially perpendicular to a longitudinal direction of the electrode fingers is smaller than a maximum line width of the electrode fingers. | 2017-01-26 |
20170026027 | CRYSTAL-OSCILLATING DEVICE AND MANUFACTURING METHOD THEREFOR - A crystal-oscillating device is disclosed with a reduction in size and a favorable Q value. The crystal-oscillating device includes a first packaging material; a crystal resonator mounted on the first packaging material; joining members that join the first packaging material to the crystal resonator; a first sealing frame for joining the second and third packaging materials, the first packaging material, and the second packaging material; and a second sealing frame for joining the second packaging material and the third packaging material to each other. Preferable, the second packaging material is formed in a frame shape to surround an outer peripheral edge of the crystal resonator, and the second packaging material and a crystal substrate of the crystal resonator are formed from the same crystal substrate. | 2017-01-26 |
20170026028 | PIEZOELECTRIC DEVICE - A piezoelectric device has an insulated container including a frame portion. Four external connection terminals to be solder-bonded to an external substrate each have a shape with a bent portion in plan view in which the external connection terminal is extending from one of the four corners on a bottom surface of the frame portion in a long-side direction and a short-side direction of an outer peripheral edge of the frame portion. The four external connection terminals are spaced from an opening end of a recess with an electrode-absent region interposed therebetween. The four external connection terminals each have a plurality of angular parts in plan view, and at least one of the plurality of angular parts is in proximity to the inner peripheral edge of the frame portion in an arc shape or a chamfered shape at each of the four corners thereof. | 2017-01-26 |
20170026029 | MULTI-RESONATOR CLOCK REFERENCE - A clock reference includes a substrate, a first resonator and a second resonator both formed on the substrate providing a differential resonator pair. A first variable capacitor is connected across electrodes of the first resonator for electronically tuning a first native frequency of the first resonator to provide a first tuned frequency (f | 2017-01-26 |
20170026030 | MULTIMODE RECONFIGURABLE AMPLIFIER AND ANALOG FILTER INCLUDING THE SAME - Provided is a reconfigurable amplifier. The reconfigurable amplifier includes a gain circuit including a gain path configured to amplify an input signal, and a feed forward circuit including a feed forward path configured to receive the input signal and perform feed forward compensation on the input signal, and a first control circuit configured to perform the feed forward compensation in a first mode by activating the feed forward path, and deactivate the feed forward path in a second mode different from the first mode. | 2017-01-26 |
20170026031 | APPARATUS AND METHODS FOR TUNABLE NOTCH FILTERS - A notch filter is described. A notch filter including an input, an output and at least one variable capacitor coupled in series between the input and the output. The at least one variable capacitor including at least a first set of metal oxide semiconductor variable capacitor arrays. The notch filter also including at least a first inductor coupled in series between the input and the output and in parallel with the at least one variable capacitor. Moreover, the notch filter includes at least a second inductor coupled with the output in a shunt configuration to the at least one variable capacitor and the first inductor. And, the first capacitor coupled with the second inductor and configured to couple with a voltage reference. | 2017-01-26 |
20170026032 | OFFSET CANCELLING CIRCUIT AND METHOD - When a voltage is applied from outside such that a current flowing in a Hall element is switched, each of a plurality of capacitors is charged with an output voltage of the Hall element in each state. A dummy switching element is connected to a switching element which connects the plurality of capacitors in parallel to each other, the dummy switching element and the switching element being controlled to be switched ON and OFF exclusively with respect to each other. | 2017-01-26 |
20170026033 | SKEW CORRECTION CIRCUIT, ELECTRONIC DEVICE, AND SKEW CORRECTION METHOD - A skew correction circuit includes: a phase-difference detection circuit that generates a phase difference signal indicating a phase difference between an edge of a first signal that is one signal of differential signals and an edge of a second signal that is another signal of the differential signals; and a correction-signal generation circuit that generates a correction signal having an inverted phase of the second signal by combining the phase difference signal and the first signal. | 2017-01-26 |
20170026034 | SEMICONDUCTOR DEVICE - A semiconductor device has a drive unit outputting a first drive signal to a first electrode and a second drive signal to a second electrode, an instruction signal generation unit generating an instruction signal as a basis of the drive signals and a control unit outputting a first control signal as a basis of the first drive signal and a second control signal as a basis of the second drive signal, based on the instruction signal to control the drive unit. The control unit synchronizes the first control signal with the instruction signal, delays a turning-on timing of the second control signal by a predetermined time relative to the instruction signal and determines a turning-off timing of the second control signal based on a previous pulse width of the instruction signal. | 2017-01-26 |
20170026035 | Tuning Capacitance to Enhance FET Stack Voltage Withstand - An RF switch to controllably withstand an applied RF voltage Vsw, or a method of fabricating such a switch, which includes a string of series-connected constituent FETs with a node of the string between each pair of adjacent FETs. The method includes controlling capacitances between different nodes of the string to effectively tune the string capacitively, which will reduce the variance in the RF switch voltage distributed across each constituent FET, thereby enhancing switch breakdown voltage. Capacitances are controlled, for example, by disposing capacitive features between nodes of the string, and/or by varying design parameters of different constituent FETs. For each node, a sum of products of each significant capacitor by a proportion of Vsw appearing across it may be controlled to approximately zero. | 2017-01-26 |
20170026036 | SEMICONDUCTOR DEVICE AND METHOD FOR CONTROLLING SEMICONDUCTOR DEVICE - A semiconductor device includes: a plurality of semiconductor chips which are stacked; a plurality of circuit blocks respectively included in the plurality of semiconductor chips; a first power supply domain that supplies power and stops the supply of the power to one of the plurality of circuit blocks independently of the other circuit blocks; and a second power supply domain that supplies power and stops the supply of the power to at least two of the plurality of circuit blocks in common and supplies the power and stops the supply of the power independently of the other circuit blocks. | 2017-01-26 |
20170026037 | LOW-VOLTAGE DIFFERENTIAL SIGNALING DRIVING CIRCUIT - A low-voltage differential signaling (LVDS) driving circuit, coupled to a load resistor via a first output end and a second output end, includes: a voltage generating unit, providing a first reference voltage; a first switch, coupled between the voltage generating unit and a first node; a second switch, coupled between the voltage generating unit and a second node; a third switch, coupled between the first node and a third node, the third node having a second reference voltage; a fourth switch, coupled between the second node and the third node; a first resistor, coupled between the first node and the first output end; and a second resistor, coupled between the second node and the second output end. The first resistor and the second resistor are in a series connection with the load resistor. | 2017-01-26 |
20170026038 | ELECTRONIC DEVICE AND OPERATION METHOD THEREOF - An electronic device includes a transmission interface and a control circuit. The transmission interface includes a signal reference contact and a signal transmission contact. The control circuit is electrically coupled between the signal reference contact and a ground layer, in which the control circuit is configured to selectively conduct the signal reference contact and the ground layer, and when the signal reference contact and the ground layer are conducted, the signal transmission contact is configured to transmit a first signal, and when the signal reference contact the ground layer are not conducted, the signal reference contact is configured to transmit a second signal. A transmission frequency of the second signal is less than a transmission frequency of the first signal. | 2017-01-26 |
20170026039 | DRIVER CIRCUIT, DISPLAY DEVICE INCLUDING THE DRIVER CIRCUIT, AND ELECTRONIC APPLIANCE INCLUDING THE DISPLAY DEVICE - An object of the present invention is to provide a driver circuit including a normally-on thin film transistor, which driver circuit ensures a small malfunction and highly reliable operation. The driver circuit includes a static shift register including an inverter circuit having a first transistor and a second transistor, and a switch including a third transistor. The first to third transistors each include a semiconductor layer of an oxide semiconductor and are depletion-mode transistors. An amplitude voltage of clock signals for driving the third transistor is higher than a power supply voltage for driving the inverter circuit. | 2017-01-26 |
20170026040 | SECURE SWITCH ASSEMBLY - A secure switch assembly is provided and includes inputs respectively associated with at least first and second security levels, switch element outputs respectively associated with the at least first and second security levels and a field programmable gate array (FPGA) operably interposed between the inputs and the switch element outputs. The FPGA has a first side facing the inputs and a second side facing the switch element outputs and includes a gate array. The gate array is programmable to generate entirely separate physical interconnections extending from the first side to the second side by which each of the first security level associated inputs and switch element outputs are connectable and each of the second security level associated inputs and switch element outputs are connectable. | 2017-01-26 |
20170026041 | HYBRID CHIP COMPRISING HYBRID CONNECTOR - An integrated circuit (IC), a method of testing the IC, and a method of manufacturing the IC are provided. The IC includes analog circuitry, digital circuitry, at least one first connector, and a switching unit operatively coupled with the at least one first connector and configured to, if a first signal is received, couple the analog circuitry and the at least one first connector, and, if a second signal is received, couple the digital circuitry and the at least one first connector. | 2017-01-26 |
20170026042 | LEVEL SHIFTING CIRCUIT AND METHOD FOR THE SAME - A level shifting circuit includes a transistor output unit that receives a first power supply signal and convert the first power supply signal to a second power supply signal having a different level from the first power supply signal and a current provision unit that provides a current to an output terminal of the transistor output unit when the first power supply signal of the transistor output unit is inputted to shorten a prolonged portion of the second power supply signal. Therefore, the level shifting circuit may provide an additional current to the output terminal of the transistor output unit to shorten a prolonged portion of the output voltage. | 2017-01-26 |
20170026043 | Multi-Voltage to Isolated Logic Level Trigger - Various systems may benefit from interfaces for handling multiple types of inputs. For example, a device with a trigger input from an external device may benefit from an isolated logic level trigger that is capable of addressing multiple types and values of voltage. An apparatus can include an input configured to receive an external trigger input signal having a trigger input voltage. The apparatus can also include circuitry configured to automatically adjust the trigger input voltage to a value configured to be compatible with a provided attached system. A working range of the trigger input voltage can exceed a compatible working range of the provided attached system. | 2017-01-26 |
20170026044 | HIGH-SPEED LEVEL-SHIFTING MULTIPLEXER - Systems and methods for level-shifting multiplexing are described herein. In one embodiment, a method for level-shifting multiplexing comprises selecting one of a plurality of inputs based on one or more select signals, and pulling down one of first and second nodes based on a logic state of the selected one of the plurality of inputs. The method also comprises pulling up the first node if the second node is pulled down, and pulling up the second node if the first node is pulled down. | 2017-01-26 |
20170026045 | FUNCTION PROGRAMMABLE CIRCUIT AND OPERATION METHOD THEREOF - A function programmable circuit and an operation method thereof are provided. The function programmable circuit includes a micro-controller unit (MCU) and a field programmable gate array (FPGA). The FPGA is coupled to the MCU, and is capable of being configured to execute a first function and work with the MCU in a first period, while the FPGA is being programmed a second function by the MCU in the same first period. The FPGA is controlled by a function switch pulse output from the MCU to terminate the first period, and switched from the first function to the second function, and then executes the second function and works with the MCU in a second period. | 2017-01-26 |
20170026046 | DETECTION AND COMPENSATION OF DIELECTRIC RESONATOR OSCILLATOR FREQUENCY DRIFT - Systems and methods are provided for detection and compensation of dielectric resonator oscillator frequency drift. DRO frequency drift detection and compensation may comprise, for a received input signal, detecting one or more channels in the input signal, determine frequency offset for each of the detected channels; determining determine dielectric resonator oscillator (DRO) frequency drift based on combining frequency offsets of the detected channels, and determining, based on the DRO frequency drift, one or more adjustments for compensating for the DRO frequency drift. The DRO frequency drift may be determined based on analysis of an intermediate signal generated during processing of the input signal. | 2017-01-26 |
20170026047 | RECEPTION CIRCUIT - A determination circuit receives an input data signal and determines a value of the input data signal when a logic level of a sampling clock changes. A sampling clock generation circuit generates the sampling clock on the basis of the input data signal, generates a frequency adjustment value on the basis of the frequency difference between the sampling clock and the input data signal, and adjusts the frequency of the sampling clock on the basis of the frequency adjustment value. A frequency pull-in control circuit performs integration on frequency adjustment values and obtains an integral value in an individual time period. When the integral value reaches a threshold before a single time period elapses, the frequency pull-in control circuit outputs a reset signal that causes the sampling clock generation circuit to output an initial value of the frequency adjustment value until the time period elapses. | 2017-01-26 |
20170026048 | CLOCK GENERATOR AND INTEGRATED CIRCUIT USING THE SAME AND INJECTION-LOCKED PHASE-LOCKED LOOP CONTROL METHOD - A control technique for an injection-locked phase-locked loop (ILPLL) includes the following steps: providing the ILPLL with a sampling clock and an injection clock for an integral path and a proportional path of the ILPLL, respectively; making a change in the power level of the injection clock to get the phase error of the integral path of the ILPLL; and controlling the phase difference between the sampling clock and the injection clock based on the phase error of the integral path of the ILPLL. | 2017-01-26 |
20170026049 | Oscillator Arrangement, Method, Computer Program And Communication Device - A reference oscillator arrangement is provided for a communication apparatus capable of communicating according to a plurality of transport formats. The reference oscillator arrangement comprises a reference oscillator controller; a resonator core comprising a reference resonator and a driving circuit for the reference resonator, wherein the resonator core is arranged to provide an oscillating signal at a frequency of the reference resonator; and a reference oscillator buffer arrangement, connected to the resonator core, comprising an active circuit arranged to provide a reference oscillator output based on the oscillating signal. The reference oscillator controller is arranged to receive information about an applied transport format and control the driving circuit and/or the active circuit based on the information about the applied transport format. An oscillator arrangement, a communication device, methods therefor and a computer program are also disclosed. | 2017-01-26 |
20170026050 | FREQUENCY SYNTHESIZER - A phase locked loop frequency synthesizer is arranged to provide a target frequency output signal for a radio transmitter or receiver. The synthesizer comprises: a voltage controlled oscillator ( | 2017-01-26 |
20170026051 | SEMICONDUCTOR DEVICE PERFORMING COMMON MODE VOLTAGE COMPENSATION USING ANALOG-TO-DIGITAL CONVERTER - A semiconductor device is provided that includes a first chip that generates a single signal by connecting a first signal line and a second signal line, to which differential signals are respectively provided, and outputs the single signal to a third signal line. The first chip is driven by a first power supply voltage. The semiconductor device also includes a second chip comprising an analog-to-digital converter (ADC) that receives the single signal through the third signal line, compares the single signal with a reference voltage, and outputs a digital signal based on the comparison. The semiconductor device also includes a controller that monitors the digital signal and adjusts the reference voltage to be approximately equivalent to the first power supply voltage. | 2017-01-26 |
20170026052 | METHOD AND DEVICE FOR COMPENSATING BANDWIDTH MISMATCHES OF TIME INTERLEAVED ANALOG TO DIGITAL CONVERTERS - A device can be used for compensating bandwith mismatches of time interleaved analog to digital converters. A processor of the device determines, for each original sample stream, an estimated difference between the time constant of a low pass filter representative of the corresponding converter and a reference time constant of a reference low pass filter, and uses this estimated difference and a filtered stream to correct the original stream and deliver a corrected stream of corrected samples. | 2017-01-26 |
20170026053 | SEMICONDUCTOR DEVICE INCLUDING INTEGRATOR AND SUCCESSIVE APPROXIMATION REGISTER ANALOG-TO-DIGITAL CONVERTER AND DRIVING METHOD OF THE SAME - A semiconductor device includes an integrator, a successive approximation register analog-to-digital converter (SAR ADC) and a residue capacitor. The integrator is configured to receive a signal and generate a first analog signal during a first operation mode using a capacitor module comprising one or more capacitors. The SAR ADC is configured to receive the first analog signal, convert the first analog signal into a first digital signal using the capacitor module, and generate a first residue signal in a second operation mode. The residue capacitor is connected to the capacitor module in parallel, and is configured to receive the first residue signal in the second operation mode and provide the first residue signal to the integrator in the first operation mode. | 2017-01-26 |
20170026054 | DATA COMPRESSION DEVICE AND METHOD - A data compression device including a processor to perform a procedure comprising: obtaining data of a predetermined number (Z) of digits in a time series; and performing a compression process on the data. The data is obtained by encoding a vibration state of a measurement target. The compression process includes: deleting upper digits when the upper digits do not include significant information; and adding a unique code to a top of the upper digits when the upper digits include significant information. A digit number (X) of the upper digits is smaller than the predetermined number (Z). | 2017-01-26 |
20170026055 | ADAPTIVE DESATURATION IN MIN-SUM DECODING OF LDPC CODES - A system implements adaptive desaturation for the min-sum decoding of LDPC codes. Specifically, when an-above threshold proportion of messages from check nodes to variable nodes (CN-to-VN messages) are saturated to a maximum fixed-precision value, all CN-to-VN messages are halved. This facilitates the saturation of correct messages and boosts error correction over small trapping sets. The adaptive desaturation approach reduces the error floor by orders of magnitudes with negligible add-on circuits. | 2017-01-26 |
20170026056 | UNIFIED H-ENCODER FOR A CLASS OF MULTI-RATE LDPC CODES - A quasi-cyclic LDPC encoding apparatus is disclosed wherein a matrix H of the form [0 T; D E] is used, where T is a triangular matrix and D and E are arbitrary matrices selected to improve encoding performance. T and E vary with the size of an encoded data word whereas D is maintained constant. T and E are sparse such that encoding operations performed on them are computationally simple. Likewise D and its inverse are constant and pre-computed further reducing computation. T, E, and D and the inverse of D may be constrained to be quasi-cyclic, which reduces storage required to represent them and enables the performance of encoding operations using shift registers. | 2017-01-26 |
20170026057 | METHOD AND DECODER FOR DETERMINING AN ERROR VECTOR FOR A DATA WORD ACCORDING TO A REED-MULLER CODE - A method for determining an error vector for a data word according to a Reed-Muller Code includes determining the syndrome of the error vector according to the Reed-Muller Code, expanding the syndrome with zeroes to 1 bit length less than the length of the Reed-Muller Code, determining a code word of a Simplex Code of 1 bit length less than the length of the Reed-Muller Code whose difference to the expanded syndrome has a weight below a first threshold or equal to or above a second threshold, expanding the difference between the determined code word and the expanded syndrome by a zero, and outputting the expanded difference as error vector if its weight is below the first threshold or outputting the inverted expanded difference as error vector if the weight of the expanded difference is equal to or above the second threshold. | 2017-01-26 |
20170026058 | RECONFIGURABLE FEC - The present invention is directed to data communication systems and methods thereof. According to various embodiments, the present invention provides a communication with a reconfigurable forward-error-correction (FEC) module. The FEC module processes data received from two or more communication lanes, and depending on the mode of operation, the FEC module can combine data from the two or more communication lanes and perform error correction on the combined data, or the FEC module can processes data from the two communications lanes separately and perform error correction independently for the each of the data communication lanes. There are other embodiments as well. | 2017-01-26 |
20170026059 | SYSTEMS AND METHODS FOR SELECTING DIGITAL CONTENT CHANNELS USING LOW NOISE BLOCK CONVERTERS INCLUDING DIGITAL CHANNELIZER SWITCHES - Systems and methods in accordance with embodiments of the invention include converting satellite signals to an intermediate frequency signal for content decoding, and selecting modulated digital data within the satellite signals for content decoding using digital signal processing. One embodiment includes a system configured to select at least one content channel from an input signal including a plurality of content channels modulated onto a carrier, the system including: a digital channelizer switch including: a high speed analog to digital converter configured to digitize an intermediate frequency signal; a digital channelizer configured to digitally tune a content channel from the digitized intermediate frequency signal; and a high speed digital to analog converter configured to generate an analog output signal using the content channel digitally tuned from the digitized intermediate frequency signal by the digital channelizer. | 2017-01-26 |
20170026060 | CARRIER AGGREGATION USING DIPLEXERS - Current aggregation using diplexers. A multiplexing system can include a first diplexer and a second diplexer. The first diplexer can have a first transmit terminal, a first receive terminal, and a first common terminal. The first diplexer can be configured to filter a first transmit signal received at the first transmit terminal to a first cellular frequency band and output the filtered first transmit signal at the first common terminal. The first diplexer can be further configured to filter a first receive signal received at the first common terminal to a second cellular frequency band and output the filtered first receive signal at the first receive terminal input. The second diplexer can have a second transmit terminal, a second receive terminal, and a second common terminal. The second diplexer can be configured to filter a second transmit signal received at the second transmit terminal to the second cellular frequency band and output the filtered second transmit signal at the second common terminal. The second diplexer can be further configured to filter a second receive signal received at the second common terminal to the first cellular frequency band and output the filtered second receive signal at the second receive terminal. | 2017-01-26 |
20170026061 | WIDEBAND MULTIPLEXER FOR RADIO-FREQUENCY APPLICATIONS - Wideband multiplexer for radio-frequency (RF) applications. In some embodiments, a multiplexer may include a common path configured to receive a plurality of RF signals. The multiplexer may further include a first path having an output coupled to the common path and configured to provide a band-pass response for a frequency band BX. The multiplexer may further include a second path having an output coupled to the common path such that RF signals in the first and second paths are combined and routed through the common path. The second path may be configured to provide a band-stop response for the frequency band BX such that the common path includes a wideband response that includes the frequency band BX and one or more other frequency bands. | 2017-01-26 |
20170026062 | RADIO-FREQUENCY INTEGRATED CIRCUIT (RFIC) CHIP(S) FOR PROVIDING DISTRIBUTED ANTENNA SYSTEM FUNCTIONALITIES, AND RELATED COMPONENTS, SYSTEMS, AND METHODS - Radio-frequency (RF) integrated circuit (RFIC) chip(s) allow for the integration of multiple electronic circuits on a chip to provide distributed antenna system functionalities. RFIC chips are employed in central unit and remote unit components, reducing component cost and size, increasing performance and reliability, while reducing power consumption. The components are also easier to manufacture. The RFIC chip(s) can be employed in distributed antenna systems and components that support RF communications services and/or digital data services. | 2017-01-26 |
20170026063 | METHOD AND APPARATUS FOR WIRELESS COMMUNICATIONS TO MITIGATE INTERFERENCE - Aspects of the subject disclosure may include, for example, generating a wireless signal at a first network device and directing the wireless signal towards a second network device of another utility pole, which includes directing the wireless signal away from another network device of the other utility pole. Other embodiments are disclosed. | 2017-01-26 |
20170026064 | TRANSMIT SPECTRAL REGROWTH CANCELLATION AT RECEIVER PORT - A front-end module configured to cancel unwanted transmit spectrum at one or more receivers comprises at least one transmitter having a power amplifier and configured to transmit signals to an antenna. The front-end module also comprises at least one receiver to receive the transmit signals, wherein the at least one receiver receives at least a portion of unwanted transmit spectrum. A directional coupler couples at least a portion of a transmit output signal from the power amplifier to provide a coupled transmit output signal to signal conditioning circuitry associated with the at least one receiver and configured to condition the coupled transmit output signal to generate a conditioned transmit signal to provide to the at least one receiver, wherein the conditioned transmit signal at least partially cancels the unwanted transmit spectrum. The signal conditioning circuitry may adjust the amplitude and phase of the coupled transmit output signal. | 2017-01-26 |
20170026065 | LOCAL PHASE CORRECTION - The present invention is directed to integrated circuits and methods thereof. More specifically, embodiments of the present invention provide a local correction for bending communication line pairs. In an IC package, a pair of communication lines is used to provide a physical link for data communication between two or more components. At regions where the pair of communication lines is bent, the inner bend line is extended in length and shaped to match the length of the outer bend line while preserving integrity of its signal propagation characteristics, thereby providing local phase correction. There are other embodiments as well. | 2017-01-26 |
20170026066 | CIRCUITS AND METHODS FOR DETECTING INTERFERERS - Mechanisms for interferer detection can detect interferers by detecting elevated signal amplitudes in one or more of a plurality of bins (or bands) in a frequency range between a maximum frequency (f | 2017-01-26 |
20170026067 | METHOD AND APPARATUS FOR SENSING INTER-MODULATION TO IMPROVE RADIO PERFORMANCE IN SINGLE AND DUAL TUNER - A method of performing alternate frequency switching in a radio includes tuning the radio to a primary frequency. A candidate alternate frequency is identified. It is determined whether the candidate alternate frequency is a third order inter-modulation artifact. Tuning is switched from the primary frequency to the candidate alternate frequency only if it is determined in the determining step that the candidate alternate frequency is not a third order inter-modulation artifact. | 2017-01-26 |
20170026068 | RECEIVING DEVICE - The disclosure provides a receiving device, receiving broadcasts. The receiving device has a frequency setting part, setting a high-side local oscillating frequency or a low-side local oscillating frequency with respect to predetermined receiving frequency bands to be received. | 2017-01-26 |