05th week of 2013 patent applcation highlights part 15 |
Patent application number | Title | Published |
20130026416 | ORGANIC-INORGANIC COMPOSITE, COMPOSITION FOR FORMATION OF ORGANIC-INORGANIC COMPOSITE, AND INK - An organic-inorganic composite of the present invention includes metal oxide particles and an organic polymer compound including a monomer containing organic ligands and a vinyl-based monomer having organic ligands which are bonded to a polymer chain through covalent bonds and the organic polymer compound is bonded to the metal oxide particles by the organic ligands forming a complex with metal atoms on the surface of the metal oxide particles. According to the organic-inorganic composite, the metal oxide particles and the organic polymer compound containing the organic ligands can be chemically bonded, therefore, light emission characteristics such as light emission intensity or stabilization of light emission wavelength can be improved, and transparency and mechanical characteristics such as thermal stability or hardness can also be improved. | 2013-01-31 |
20130026417 | Production of synthesis gas by heating oxidized biomass with a hot gas obtained from oxidation of residual products - A process for producing synthesis gas, or syngas, from biomass. The process comprises contacting biomass with oxygen, or oxygen and steam, in an amount effective to oxidize the biomass and to heat the biomass to a temperature to no greater than 750° C. At least one combustible material also is contacted with oxygen and steam to heat the at least one combustible material to a temperature of at least 1,100° C., to provide a hot gas derived from the oxidized combustible material. The latter maybe residual products derived from the process itself as char, tar, or hydrocarbons. The oxidized biomass then is contacted with the hot flue gas to heat the biomass to a temperature of at least 900° C., thereby producing synthesis gas. The synthesis gas then is recovered. Such process provides a method of providing heat for producing synthesis gas without consuming a portion of the synthesis gas to provide such heat, thereby providing an increased yield of synthesis gas. | 2013-01-31 |
20130026418 | PRODUCTION OF SYNTHESIS GAS FROM SOLVENT DEASPHALTING PROCESS BOTTOMS IN A MEMBRANE WALL GASIFICATION REACTOR - A cost-effective solution for the disposal of solvent deasphalting process bottoms that include spent solid adsorbent material containing ash-producing constituents, asphalt and process reject materials is provided by introducing them in the form of a flowable slurry into a membrane wall gasification reactor to produce a synthesis gas and, optionally, subjecting the synthesis gas to a water-gas shift reaction to produce a more hydrogen-rich product stream; process steam and electricity are produced by recovering the sensible heat values from the hot synthesis gas. | 2013-01-31 |
20130026419 | METHOD AND SYSTEM FOR PRODUCING SYNTHESIS GAS - A method for producing synthesis gas, including: 1) pre-treating a biomass raw material; 2) carrying out low-temperature carbonization to obtain pyrolysis gas and charcoal, cooling the charcoal at an outlet of an carbonization furnace, and conveying the cooled charcoal to a charcoal storage bin; 3) separating the pyrolysis gas from charcoal powder; 4) delivering part of a separated pyrolysis gas to a combustion bed for combustion, heating the other part of the separated pyrolysis gas, and delivering a heated pyrolysis gas to the carbonization furnace; delivering a waste hot flue gas after heat exchange to a pretreatment part for the biomass raw material for drying; conveying the separated charcoal powder to the charcoal storage bin; 5) milling the charcoal powder to prepare a charcoal slurry; and 6) using high-pressure charcoal slurry pump, introducing the charcoal slurry to a gasification furnace for gasification. | 2013-01-31 |
20130026420 | INERT AND NON-TOXIC EXPLOSIVE SIMULANTS AND METHOD OF PRODUCTION - The present disclosure describes simulants and methods of production thereof that imitate characteristics of known explosives, including characteristics at the microscopic and macroscopic level. For instance, the present disclosure includes a simulant with the same texture, granularity, bulk density, particle density, and porosity of a known explosive. The simulants described herein provide the macroscopic bulk physical properties and the microscopic scale properties of actual explosives. | 2013-01-31 |
20130026421 | COMPOSITION AND METHOD FOR PREPARATION OF ORGANIC ELECTRONIC DEVICES - The present invention relates to novel compositions comprising an organic semiconductor (OSC) and one or more organic solvents. The composition is solid at a temperature of 25° C. and fluid at a higher temperature and the boiling point of the solvent is at most 400° C. Furthermore, the present invention describes the use of these compositions as inks for the preparation of organic electronic (OE) devices, especially organic photovoltaic (OPV) cells and OLED devices, to methods for preparing OE devices using the novel compositions, and to OE devices, OLED devices and OPV cells prepared from such methods and compositions. | 2013-01-31 |
20130026422 | BRIDGED TRIARYLAMINES AND -PHOSPHINES AS MATERIALS FOR ELECTRONIC DEVICES - The present invention relates to a compound according to formula (I), to the use thereof in an electronic device and to an electronic device which comprises one or more compounds according to formula (I). | 2013-01-31 |
20130026423 | Liquid Crystal Display Panel and Conductive Adhesive, Conductive Particles and Method of Manufacturing Thereof - The present invention relates to a conductive particle, a conductive adhesive with the conductive particles, a LCD panel with the conductive adhesive, a method of manufacturing of the conductive particle and a method of manufacturing of the conductive adhesive. The conductive particle comprising an outer coating layer of graphite and an inner core of an organic resin enclosed by the outer coating layer, and therefore the conductive particles can have good conductivity as well as good strength and elasticity. | 2013-01-31 |
20130026424 | ELECTRODE AND METHOD FOR MANUFACTURING THE SAME - The invention relates to an electrode that can be formed by firing in air a conductive paste comprising a copper powder, a boron powder, an additional inorganic powder, a glass frit, and an organic medium, wherein the additional inorganic powder is zirconia powder. | 2013-01-31 |
20130026425 | Conductive Composition and Method for Manufacturing - The present invention provides a conductive composition which comprises a conductive functional phase mixture. The conductive functional phase mixture is made of a metal and a metal oxide, wherein the metal oxide is as the filler and the metal is as the main body. A coating portion covers substantially at least a partial surface of the filler, wherein the coating portion includes at least silver or copper. | 2013-01-31 |
20130026426 | CARBAZOLE DERIVATIVE AND SEMICONDUCTOR NANOCRYSTAL - A carbazole derivative represented by the following General Formula (1) where at least one aromatic ring has one to three substituents each represented by the following General Formula (2): | 2013-01-31 |
20130026427 | REDUCED OXIDES HAVING LARGE THERMOELECTRIC ZT VALUES - Doped and partially-reduced oxide (e.g., SrTiO | 2013-01-31 |
20130026428 | PREPARATION OF A PHOTOCHROMIC INK - The present invention relates to a photochromic ink, the process for its preparation which is based on a spiropyran powder obtainable by melting, cooling and crushing, and to a new form of a spiropyran obtainable thereby. | 2013-01-31 |
20130026429 | APPARATUS FOR PUSHING CONDUCTORS INTO CONDUIT AND OTHER STRUCTURES - An apparatus and methods for pushing conductors into conduit and other structures are disclosed. The apparatus (“pusher”) can include rollers to apply a pushing force to one or more conductors or bundles of conductors. One or more rollers can be coupled to a drive mechanism. The pusher is configured to pull conductors or bundles of conductors off of one or more spools, and push the conductors or bundles of conductors without de-bundling or sorting the conductors. The conductors can be fed through the pusher in any format including side-by-side, vertical on top of one another, twisted together, or other formats. The pusher can include a guiding device that is configured to route the conductors from the pusher to a conduit through which the conductors are being pushed or pulled. | 2013-01-31 |
20130026430 | TIGHTENING DEVICE AND MANUAL FORK TRUCK USING THE SAME - A manual fork truck using a tightening device is disclosed. The tightening device applied to a manual fork truck, comprises a tightening rod; a fixing portion on one end of the tightening rod; and a plurality of tightening assemblies separately assembled to the tightening rod axially; each of the plurality of tightening assemblies comprising at least one tightening arm on the tightening rod, and a tightening belt having one end connected to the at least one tightening arm. | 2013-01-31 |
20130026431 | PIPE LAYER AND WARM-UP METHOD FOR PIPE LAYER - A warm-up pilot pressure control unit adjusts pilot pressure inputted to a first flow channel open/close unit so that the flow channel open/close unit is switched to an open state when a warm-up start state is entered under the necessary condition that a first winch operation member is in a neutral position. When the first flow channel open/close unit is in the open state, a first pump displacement adjustment unit adjusts the displacement of a first hydraulic pump so that the differential pressure between a first pump hydraulic circuit and a first warm-up hydraulic circuit becomes constant at a predetermined set pressure. | 2013-01-31 |
20130026432 | Electric Snake Deterrent Fencing - A snake deterrent system that offers a physical barrier and an electric current to deter snakes from navigating over the barrier. The units are easily assembled together by use of a hinge system and easily installed with legs that go into the ground. The fencing system can be attached to most electric fence controllers that are used for livestock, pets, or wildlife. Offering a measure of safety to deter venomous snakes from posing a threat to people, children, pets, and livestock. | 2013-01-31 |
20130026433 | FENCE/RAIL ASSEMBLY WITH CONCEALED SLIDING, PIVOTAL CONNECTION, AND MANUFACTURING METHOD THEREFOR - A fencing/railing assembly adapted to be positioned between a pair of posts and mounted thereto. The assembly includes a plurality of pickets, a plurality of rails extending transverse to the pickets, and one or more pivoting, sliding connectors for connecting a picket to a rail, with the sliding, pivotal connection concealed by the rail. The connector is slidably mounted to the rail and is pivotally connected to the picket. The sliding, pivotal connection allows the pickets to be oriented at greater angles relative to the rails (i.e. it allows the assembly to rack to a greater degree, thereby allowing the fencing/raining to following more-steeply changing terrain or contours). In one embodiment, an elongated connector strip is concealed by the rail and spans multiple pickets. In another embodiment, the assembly includes a plurality of shorter connectors, one for each picket/rail connection. | 2013-01-31 |
20130026434 | MEMRISTOR WITH CONTROLLED ELECTRODE GRAIN SIZE - A memristor with a controlled electrode grain size includes an adhesion layer, a first electrode having a first surface contacting the adhesion layer and a second surface opposite the first surface, in which the first electrode is formed of an alloy of a base material and at least one second material, and in which the alloy has a relatively smaller grain size than a grain size of the base material. The memristor also includes a switching layer positioned adjacent to the second surface of the first electrode and a second electrode positioned adjacent to the switching layer. | 2013-01-31 |
20130026435 | SWITCHING DEVICE AND RESISTANCE CHANGE MEMORY DEVICE USING THE SAME - A switching device that provides bipolar current paths and a resistance change memory device using the switching device. The switching device includes a first electrode, a second electrode, and an amorphous carbon layer interposed between the first electrode and the second electrode and configured to control a bipolar current to flow therethrough in response to a voltage applied between the first electrode and the second electrode. | 2013-01-31 |
20130026436 | PHASE CHANGE MEMORY ELECTRODE WITH SHEATH FOR REDUCED PROGRAMMING CURRENT - An example embodiment is a phase change memory cell that includes a bottom contact and an electrically insulating layer disposed over the bottom contact. The electrically insulating layer defines an elongated via. Furthermore, a bottom electrode is disposed at least partially in the via. The bottom electrode includes a sleeve of a first electrically conductive material surrounding a rod of a second electrically conductive material. The first electrically conductive material and the second electrically conductive material have different specific electrical resistances. The memory cell also includes a phase change layer electrically coupled to the first electrode. | 2013-01-31 |
20130026437 | RESISTANCE VARIABLE MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME - A method for fabricating a resistance variable memory device, includes: providing a substrate having first contacts and second contacts, where the second contacts do not overlap the first contacts; forming a line pattern over the substrate, the line pattern overlapping a first line and including a stacked structure of a first electrode, a resistor, and a second electrode; forming a first contact hole to expose the second contact; forming an insulating spacer on a sidewall of the first contact hole; forming a third contact to fill the first contact hole having the insulating spacer formed therein; and forming a third electrode over the third contact such that the third electrode overlaps a second line extending in a second direction and is cut open over the first contact, where the first and second contacts are alternately arranged on the second line. | 2013-01-31 |
20130026438 | CURRENT-LIMITING LAYER AND A CURRENT-REDUCING LAYER IN A MEMORY DEVICE - A current-limiting layer and a current-reducing layer are incorporated into a resistive switching memory device to form memory arrays. The incorporated current-limiting layer reduces the occurrence of current spikes during the programming of the resistive switching memory device and the incorporated current-reducing layer minimizes the overall current levels that can flow through the resistive switching memory device. Together, the two incorporated layers help improve device performance and lifetime. | 2013-01-31 |
20130026439 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - Provided are semiconductor devices and methods of fabricating the same. The device may include lower interconnection lines, upper interconnection lines crossing the lower interconnection lines, selection elements disposed at intersections, respectively, of the lower and upper interconnection lines, and memory elements interposed between the selection elements and the upper interconnection lines, respectively. Each of the selection elements may be realized using a semiconductor pattern having a first sidewall, in which a first lower width is smaller than a first upper width, and a second sidewall, in which a second lower width is greater than a second upper width, the first and second sidewalls crossing each other. | 2013-01-31 |
20130026440 | NANOSCALE SWITCHING DEVICES WITH PARTIALLY OXIDIZED ELECTRODES - A nanoscale switching device is provided. The device comprises: a first electrode of a nanoscale width; a second electrode of a nanoscale width; an active region disposed between the first and second electrodes, the active region having a non-conducting portion comprising an electronically semiconducting or nominally insulating and a weak ionic conductor switching material capable of carrying a species of dopants and transporting the dopants under an electric field and a source portion that acts as a source or sink for the dopants; and an oxide layer either formed on the first electrode, between the first electrode and the active region or formed on the second electrode, between the second electrode and the active region. A crossbar array comprising a plurality of the nanoscale switching devices is also provided. A process for making at least one nanoscale switching device is further provided. | 2013-01-31 |
20130026441 | Apparatus and Associated Methods Related to Detection of Electromagnetic Signalling - In one or more embodiments described herein, there is provided an apparatus including a first layer for detecting electromagnetic signalling, and a second layer positioned proximate to the first layer. The first layer includes graphene, and the second layer is configured to undergo plasmonic resonance in response to receiving electromagnetic signalling. This plasmonic resonance that the second layer undergoes thereby sensitizes the graphene of the first layer to detection of particular spectral characteristics of received electromagnetic signalling corresponding to the particular plasmonic resonance of the second layer. | 2013-01-31 |
20130026442 | PHOTODETECTOR - A photodetector includes: a substrate; a first dielectric material positioned on the substrate; an optical waveguide positioned on the first dielectric material; a second dielectric material positioned on the optical waveguide; a graphene layer positioned on the second dielectric material; and a first electrode and a second electrode that are positioned on the graphene layer. | 2013-01-31 |
20130026443 | SILICON NANOWIRE COMPRISING HIGH DENSITY METAL NANOCLUSTERS AND METHOD OF PREPARING THE SAME - A silicon nanowire including metal nanoclusters formed on a surface thereof at a high density. The metal nanocluster improves electrical and optical characteristics of the silicon nanowire, and thus can be usefully used in various electrical devices such as a lithium battery, a solar cell, a bio sensor, a memory device, or the like. | 2013-01-31 |
20130026444 | SYNTHESIZING GRAPHENE FROM METAL-CARBON SOLUTIONS USING ION IMPLANTATION - A method and semiconductor device for synthesizing graphene using ion implantation of carbon. Carbon is implanted in a metal using ion implantation. After the carbon is distributed in the metal, the metal is annealed and cooled in order to precipitate the carbon from the metal to form a layer of graphene on the surface of the metal. The metal/graphene surface is then transferred to a dielectric layer in such a manner that the graphene layer is placed on top of the dielectric layer. The metal layer is then removed. Alternatively, recessed regions are patterned and etched in a dielectric layer located on a substrate. Metal is later formed in these recessed regions. Carbon is then implanted into the metal using ion implantation. The metal may then be annealed and cooled in order to precipitate the carbon from the metal to form a layer of graphene on the metal's surface. | 2013-01-31 |
20130026445 | QUANTUM DOT OPTOELECTRONIC DEVICE AND METHODS THEREFOR - An optoelectronic device and method for fabricating optoelectronic device, comprising: forming a quantum dot layer on a substrate including at least one electronically conductive layer, including a plurality of quantum dots which have organic capping layers; and removing organic capping layers from the quantum dots of the quantum dot layer by physically treating the quantum dot layer, the physical treatment including both thermal treatment and plasma processing. | 2013-01-31 |
20130026446 | SEMICONDUCTOR LIGHT EMITTING DEVICE AND FABRICATION METHOD THEREOF - A semiconductor light emitting device and a fabrication method thereof are provided. The semiconductor light emitting device includes: first and second conductivity-type semiconductor layers; and an active layer disposed between the first and second conductivity-type semiconductor layers and having a structure in which a quantum barrier layer and a quantum well layer are alternately disposed, and the quantum barrier layer includes first and second regions disposed in order of proximity to the first conductivity-type semiconductor layer. | 2013-01-31 |
20130026447 | Surface-Emitting Semiconductor Light-Emitting Diode - The invention is directed to a surface emitting semiconductor light-emitting diode (LED) in which a reflector layer ( | 2013-01-31 |
20130026448 | LIGHT EMITTING DIODE (LED) DIE HAVING PERIPHERAL ELECTRODE FRAME AND METHOD OF FABRICATION - A light emitting diode (LED) die includes a first-type semiconductor layer, a multiple quantum well (MQW) layer and a second-type semiconductor layer. The light emitting diode (LED) die also includes a peripheral electrode on the first-type semiconductor layer located proximate to an outer periphery of the first-type semiconductor layer configured to spread current across the first-type semiconductor layer. A method for fabricating the light emitting diode (LED) die includes the step of forming an electrode on the outer periphery of the first-type semiconductor layer at least partially enclosing and spaced from the multiple quantum well (MQW) layer configured to spread current across the first-type semiconductor layer. | 2013-01-31 |
20130026449 | Hybrid CMOS Technology with Nanowire Devices and Double Gated Planar Devices - A substrate includes a first source region and a first drain region each having a first semiconductor layer disposed on a second semiconductor layer and a surface parallel to {110} crystalline planes and opposing sidewall surfaces parallel to the {110} crystalline planes; nanowire channel members suspended by the first source region and the first drain region, where the nanowire channel members include the first semiconductor layer, and opposing sidewall surfaces parallel to {100} crystalline planes and opposing faces parallel to the {110} crystalline planes. The substrate further includes a second source and drain regions having the characteristics of the first source and drain regions, and a single channel member suspended by the second source region and the second drain region and having the same characteristics as the nanowire channel members. A width of the single channel member is at least several times a width of a single nanowire member. | 2013-01-31 |
20130026450 | NITRIDE-BASED HETEROJUCTION SEMICONDUCTOR DEVICE AND METHOD FOR THE SAME - Disclosed is a semiconductor device. More specifically, disclosed are a nitride-based heterojunction semiconductor device and a method for producing the same. The nitride-based heterojunction semiconductor device includes a nitride semiconductor buffer layer, a barrier layer disposed on the buffer layer, a cap layer discontinuously disposed on the barrier layer, a source electrode and a drain electrode that contact at least one of the barrier layer and the cap layer, and a gate electrode that Schottky-contacts at least one of the barrier layer and the cap layer and is disposed between the source electrode and the drain electrode. | 2013-01-31 |
20130026451 | Hybrid CMOS Technology With Nanowire Devices and Double Gated Planar Devices - A substrate includes a first source region and a first drain region each having a first semiconductor layer disposed on a second semiconductor layer and a surface parallel to {110} crystalline planes and opposing sidewall surfaces parallel to the {110} crystalline planes; nanowire channel members suspended by the first source region and the first drain region, where the nanowire channel members include the first semiconductor layer, and opposing sidewall surfaces parallel to {100} crystalline planes and opposing faces parallel to the {110} crystalline planes. The substrate further includes a second source and drain regions having the characteristics of the first source and drain regions, and a single channel member suspended by the second source region and the second drain region and having the same characteristics as the nanowire channel members. A width of the single channel member is at least several times a width of a single nanowire member. | 2013-01-31 |
20130026452 | HETEROLEPTIC IRIDIUM COMPLEXES AS DOPANTS - Novel phosphorescent heteroleptic iridium complexes with phenylpyridine and dibenzo-containing ligands are provided. Alkyl substitution at specific positions on the ligands gives rise to compounds with improved OLED properties, including saturated green emission. | 2013-01-31 |
20130026453 | Methods of Polymerizing Silanes and Cyclosilanes Using N-Heterocyclic Carbenes, Metal Complexes Having N-Heterocyclic Carbene Ligands, and Lanthanide Compounds - Compositions and methods for controlled polymerization and/or oligomerization of silane (and optionally cyclosilane) compounds, including those of the general formulae Si | 2013-01-31 |
20130026454 | PhotoSensor And Photodiode Therefor - According to example embodiments, a photodiode includes a photoelectric layer on a first electrode, a second electrode on the photoelectric layer, and a first phosphorescence layer on the second electrode. | 2013-01-31 |
20130026455 | HYBRID ORGANIC-INORGANIC THIN FILM AND PRODUCING METHOD OF THE SAME - The present disclosure relates to a hybrid organic-inorganic thin film producing method including an interlayer connection between an inorganic cross-linked layer and an organic polymer through a molecular layer deposition (MLD) method, a hybrid organic-inorganic thin film produced by the producing method, and an organic electronic device and a thin film transistor containing the hybrid organic-inorganic thin film. | 2013-01-31 |
20130026456 | ORGANIC LIGHT EMITTING DIODE DISPLAY - An organic light emitting diode display, which includes: a first electrode; a second electrode facing the first electrode; and an emission layer interposed between the first electrode and the second electrode. Herein the first electrode includes: a first layer including a material having a work function of about 4.0 eV or less and an electron injection material; and a second layer including a material having a resistivity of about 10 μΩcm or less. The first layer is disposed between the second layer and the emission layer. | 2013-01-31 |
20130026457 | POLYMER BLEND, ORGANIC LIGHT-EMITTING DIODE INCLUDING POLYMER BLEND, AND METHOD OF CONTROLLING CHARGE MOBILITY OF EMISSION LAYER INCLUDING POLYMER BLEND - A polymer blend including a first polymer having a unit represented by Formula 1 and a second polymer having a unit represented by Formula 2: | 2013-01-31 |
20130026458 | CROSSLINKABLE COMPOSITION - To provide a composition (e.g., a coating composition) useful for forming an organic semiconductor having excellent conductivity, solvent resistance, heat resistance, durability, and other properties, and an organic semiconductor formed with the composition. | 2013-01-31 |
20130026459 | POLYMER COMPOUND - A photoelectric conversion device that contains a polymer compound having a structural unit represented by formula (1) has high photoelectric conversion efficiency. | 2013-01-31 |
20130026460 | Light-Emitting Element, Light-Emitting Device, and Electronic Device - Disclosed is a light-emitting element having a light-emitting layer which includes a first layer, a second layer, and a third layer provided in this order on an anode side between the anode and a cathode. The first layer has a hole-transporting property, the second layer has a bipolar property, and the third layer has an electron-transporting property, wherein the first layer contains a first fluorescent compound and a hole-transporting organic compound, the second layer contains a phosphorescent compound and a host material, and the third layer contains a second fluorescent compound and an electron-transporting organic compound. The light-emitting layer is also arranged so that the triplet-excitation energy of both the hole-transporting organic compound and the electron-transporting organic compound are greater than that of the host material. The use of the light-emitting layer with the above-mentioned structure enables production of a light-emitting element with improved luminous efficiency and reduced power consumption. | 2013-01-31 |
20130026461 | ORGANIC LED ELEMENT, TRANSLUCENT SUBSTRATE, AND METHOD FOR MANUFACTURING ORGANIC LED ELEMENT - The present invention provides an organic LED element having the significantly larger light emission area than conventional ones. The invention relates to an organic LED element, comprising: a transparent substrate; a light scattering layer; a transparent first electrode; an organic light-emitting layer; and a second electrode formed in this order, wherein the light scattering layer has a base material comprising a glass, and a plurality of scattering materials dispersed in the base material; the light scattering layer has side surfaces, and each of the side surfaces has a surface tilted at an angle larger than right angle from an upper surface on the first electrode side toward a bottom surface on the transparent substrate side; and the first electrode is placed so as to continuously cover the side surfaces. | 2013-01-31 |
20130026462 | METHOD FOR MANUFACTURING THIN FILM TRANSISTOR AND THIN FILM TRANSISTOR MANUFACTURED BY THE SAME, AND ACTIVE MATRIX SUBSTRATE - A method for manufacturing a thin film transistor includes the step of forming a gate electrode ( | 2013-01-31 |
20130026463 | ELECTRONIC DEVICE AND MANUFACTURING METHOD FOR SAME - The present invention is an electronic device comprising a first substrate, a second substrate arranged opposite the first substrate, a sealed portion arranged between the first substrate and the second substrate, and a sealing portion that connects the first and the second substrate and is provided around the sealed portion, wherein at least a portion of the sealing portion following along the periphery of the sealed portion has outer resin sealing portions respectively fixed to the first substrate and the second substrate and an intermediate resin sealing portion arranged so as to be interposed by the outer resin sealing portions between the first substrate and the second substrate, the outer resin sealing portions and the intermediate resin sealing portion contain resin, and a melt flow rate or melting point of the intermediate resin sealing portion differs from a melt flow rate or melting point of the outer resin sealing portions. | 2013-01-31 |
20130026464 | TEST PATTERN FOR MEASURING SEMICONDUCTOR ALLOYS USING X-RAY DIFFRACTION - A test pattern for measuring semiconductor alloys using X-ray diffraction (XRD) includes a first region to an Nth region defined on a wafer, and a plurality of test structures positioned in the first region and so forth up to in the Nth region. The test structures in the same region have sizes identical to each other and the test structures in different regions have sizes different from each other. | 2013-01-31 |
20130026465 | SEMICONDUCTOR DEVICE INCLUDING AN ASYMMETRIC FEATURE, AND METHOD OF MAKING THE SAME - A semiconductor device (e.g., field effect transistor (FET)) having an asymmetric feature, includes a first gate formed on a substrate, first and second diffusion regions formed in the substrate on a side of the first gate, and first and second contacts which contact the first and second diffusion regions, respectively, the first contact being asymmetric with respect to the second contact. | 2013-01-31 |
20130026466 | TESTING ARCHITECTURE OF CIRCUITS INTEGRATED ON A WAFER - An embodiment of a testing architecture of integrated circuits on a wafer is described of the type including at least one first circuit of a structure TEG realized in a scribe line providing separation between at least one first and one second integrated circuit. The architecture includes at least one pad shared by a second circuit inside at least one of these first and second integrated circuit and the first circuit, as well as a switching circuitry coupled to the at least one pad and to these first and second circuits. | 2013-01-31 |
20130026467 | DUAL METAL FOR A BACKSIDE PACKAGE OF BACKSIDE ILLUMINATED IMAGE SENSOR - A method for fabricating a semiconductor device with improved bonding ability is disclosed. The method comprises providing a substrate having a front surface and a back surface; forming one or more sensor elements on the front surface of the substrate; forming one or more metallization layers over the front surface of the substrate, wherein forming a first metallization layer comprises forming a first conductive layer over the front surface of the substrate; removing the first conductive layer from a first region of the substrate; forming a second conductive layer over the front surface of the substrate; and removing portions of the second conductive layer from the first region and a second region of the substrate, wherein the first metallization layer in the first region comprises the second conductive layer and the first metallization layer in the second region comprises the first conductive layer and the second conductive layer. | 2013-01-31 |
20130026468 | RADIATION DETECTOR AND METHOD OF MANUFACTURING THE SAME - A graphite substrate is processed to have surface unevenness in a range of 1 μm to 8 μm. Thereby, a semiconductor film to be laminated on the graphite substrate has a stable film quality, and thus adhesion of the graphite substrate and the semiconductor layer can be enhanced. When an electron blocking layer is interposed between the graphite substrate and the semiconductor layer, the electron blocking layer is thin and thus the surface unevenness of the graphite substrate is transferred onto the electron blocking layer. Consequently, the electron blocking layer also has surface unevenness approximately in such range. Thus, almost the same effect as a configuration in which the semiconductor layer is directly connected to the graphite substrate can be produced. | 2013-01-31 |
20130026469 | SILICON WAFERS AND INGOTS WITH REDUCED OXYGEN CONTENT AND METHODS FOR PRODUCING THEM - Silicon nitride coated crucibles for holding melted semiconductor material and for use in preparing multicrystalline silicon ingots by a directional solidification process; methods for coating crucibles; methods for preparing silicon ingots and wafers; compositions for coating crucibles and silicon ingots and wafers with a low oxygen content. | 2013-01-31 |
20130026470 | WIRING STRUCTURE, DISPLAY APPARATUS, AND SEMICONDUCTOR DEVICE - Disclosed is a wiring structure that attains excellent low-contact resistance even if eliminating a barrier metal layer that normally is disposed between a Cu alloy wiring film and a semiconductor layer, and wiring structure with excellent adhesion. The wiring structure is provided with a semiconductor layer, and a Cu alloy layer, on a substrate in this order from the substrate side. A laminated structure is included between the semiconductor layer, and the Cu alloy layer. The laminated structure is composed of a (N, C, F, O) layer which contains at least one element selected from among a group composed of nitrogen, carbon, fluorine, and oxygen, and a Cu—Si diffusion layer which includes Cu and Si, in this order from the substrate side. At least one element selected from among the group composed of nitrogen, carbon, fluorine, and oxygen that composes the (N, C, F, O) layer is bonded to Si in the semiconductor layer. The Cu alloy layer is a laminated structure containing a Cu—X alloy layer (a first layer) and a second layer. | 2013-01-31 |
20130026471 | Circuit Structures, Memory Circuitry, And Methods - A circuit structure includes a substrate having an array region and a peripheral region. The substrate in the array and peripheral regions includes insulator material over first semiconductor material, conductive material over the insulator material, and second semiconductor material over the conductive material. The array region includes vertical circuit devices which include the second semiconductor material. The peripheral region includes horizontal circuit devices which include the second semiconductor material. The horizontal circuit devices in the peripheral region individually have a floating body which includes the second semiconductor material. The conductive material in the peripheral region is under and electrically coupled to the second semiconductor material of the floating bodies. Conductive straps in the array region are under the vertical circuit devices. The conductive straps include the conductive material and individually are electrically coupled to a plurality of the vertical circuit devices in the array region. Other implementations are disclosed. | 2013-01-31 |
20130026472 | TFT STRUCTURE AND PIXEL STRUCTURE - A pixel structure including a substrate, a gate, an insulation layer, a metal oxide semiconductor (MOS) layer, a source and a drain, at least one film layer, and a first electrode layer is provided. The gate is disposed on the substrate. The insulation layer covers the gate. The MOS layer is disposed on the insulation layer above the gate. The source and the drain are disposed on the MOS layer. The film layer covers the MOS layer and includes a transparent photocatalytic material, wherein the transparent photocatalytic material blocks ultraviolet light from reaching the MOS layer. The first electrode layer is electrically connected to the source or the drain. | 2013-01-31 |
20130026473 | Pixel Structure and Method for Fabricating the Same - A pixel structure includes a first patterned metal layer, a gate insulating layer, a semiconductor channel layer, a second patterned metal layer, a passivation layer, and a conducting layer. A gate line of the second patterned metal layer is electrically connected by the conducting layer to a gate extension electrode of the first patterned metal layer. A source electrode of the second patterned metal layer is electrically connected by the conducting layer to a second data line segment of the first patterned metal layer. A method for fabricating a pixel structure is also disclosed herein. | 2013-01-31 |
20130026474 | STORAGE CAPACITOR ARCHITECTURE FOR PIXEL STRUCTURE AND MANUFACTURING METHOD THEREOF - A storage capacitor architecture for pixel structure and manufacturing method thereof are described. The storage capacitor architecture includes a substrate, a first electrode, an insulating layer and a second electrode. The first electrode has a first concave and convex structure. The insulating layer is disposed on the first concave and convex structure of the first electrode. The second electrode is disposed on the insulating layer and has a second concave and convex structure. The first concave and convex structure and the second concave and convex structure form an interdigitated space and the insulating layer is disposed in the interdigitated space to solve the problem of decreased aperture ratio of the LCD panel. | 2013-01-31 |
20130026475 | ORGANIC LIGHT-EMITTING DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME - An organic light-emitting display device includes a capacitor lower electrode that includes a semiconductor material doped with ion impurities. A first insulating layer covers an active layer and the capacitor lower electrode. A gate electrode includes a gate lower electrode formed of a transparent conductive material and a gate upper electrode formed of metal. A pixel electrode is electrically connected to the thin film transistor. A capacitor upper electrode is at the same level as the pixel electrode. An etch block layer is formed between the first insulating layer and the capacitor upper electrode. Source and drain electrodes are electrically connected to the active layer. A second insulating layer has an opening completely exposing the capacitor upper electrode. A third insulating layer exposes the pixel electrode. An intermediate layer includes an emissive layer. An opposite electrode faces the pixel electrode. | 2013-01-31 |
20130026476 | ORGANIC LIGHT EMITTING DISPLAY APPARATUS - An organic light emitting display apparatus includes a substrate on which a display area and a non-display area are defined, a first electrode on the substrate, an intermediate layer on the first electrode, the intermediate layer includes an organic emission layer, a second electrode on the intermediate layer, a plurality of pad units on the non-display area, and an insulating layer on the pad units. The insulating layer includes contact holes overlapping upper surfaces of the pad units and grooves adjacent to the contact holes. | 2013-01-31 |
20130026477 | FLAT PANEL DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME - A flat panel display device includes a substrate having an emission area in which an image is displayed and a pad area that is outside of the emission area, a semiconductor layer on the substrate, and the semiconductor layer has crystallization areas and amorphous areas. An electrostatic protecting circuit is on a portion of at least one of the amorphous areas corresponding to the pad area, and a panel circuit unit is on a portion of at least one of the crystallization areas corresponding to the pad area. | 2013-01-31 |
20130026478 | DISPLAY UNIT AND SUBSTRATE FOR DISPLAY UNIT - A display unit includes, on a substrate: a plurality of light emitting devices in which a first electrode, an organic layer including a light emitting layer, and a second electrode are respectively and sequentially layered; and a black insulating layer separating the organic layer for the every light emitting device. | 2013-01-31 |
20130026479 | SEMICONDUCTOR THIN-FILM FORMING METHOD, SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE MANUFACTURING METHOD, SUBSTRATE, AND THIN-FILM SUBSTRATE - A semiconductor thin-film manufacturing method includes: forming, above a substrate, an amorphous silicon film (precursor film) having a photoluminescence (PL) intensity greater than or equal to 0.65 when photon energy is 1.1 eV in a PL spectrum normalized to have a maximum PL intensity of 1; and annealing the amorphous silicon film to form a crystalline silicon film. | 2013-01-31 |
20130026480 | Nucleation of Aluminum Nitride on a Silicon Substrate Using an Ammonia Preflow - A silicon wafer used in manufacturing crystalline GaN for light emitting diodes (LEDs) includes a silicon substrate, a buffer layer of aluminum nitride (AlN) and an upper layer of GaN. The silicon wafer has a diameter of at least 200 millimeters and an Si(111)1×1 surface. The AlN buffer layer overlies the Si(111) surface. The GaN upper layer is disposed above the buffer layer. Across the entire wafer substantially no aluminum atoms of the AlN are present in a bottom most plane of atoms of the AlN, and across the entire wafer substantially only nitrogen atoms of the AlN are present in the bottom most plane of atoms of the AlN. A method of making the AlN buffer layer includes preflowing a first amount of ammonia equaling less than 0.01% by volume of hydrogen flowing through a chamber before flowing trimethylaluminum and then a subsequent amount of ammonia through the chamber. | 2013-01-31 |
20130026481 | TEXTURED OPTOELECTRONIC DEVICES AND ASSOCIATED METHODS OF MANUFACTURE - Textured optoelectronic devices and associated methods of manufacture are disclosed herein. In several embodiments, a method of manufacturing a solid state optoelectronic device can include forming a conductive transparent texturing material on a substrate. The method can further include forming a transparent conductive material on the texturing material. Upon heating the device, the texturing material causes the conductive material to grow a plurality of protuberances. The protuberances can improve current spreading and light extraction from the device. | 2013-01-31 |
20130026482 | Boron-Containing Buffer Layer for Growing Gallium Nitride on Silicon - A silicon wafer used in manufacturing GaN for LEDs includes a silicon substrate, a buffer layer of boron aluminum nitride (B | 2013-01-31 |
20130026483 | Gallium and Nitrogen Containing Triangular or Diamond-Shaped Configuration for Optical Devices - A gallium and nitrogen containing optical device has a base region and no more than three major planar side regions configured in a triangular arrangement provided from the base region. | 2013-01-31 |
20130026484 | Multi-Color Light Emitting Devices with Compositionally Graded Cladding Group III-Nitride Layers Grown on Substrates - A light emitting device includes a substrate, multiple n-type layers, and multiple p-type layers. The n-type layers and the p-type layers each include a group III nitride alloy. At least one of the n-type layers is a compositionally graded n-type group III nitride, and at least one of the p-type layers is a compositionally graded p-type group III nitride. A first ohmic contact for injecting current is formed on the substrate, and a second ohmic contact is formed on a surface of at least one of the p-type layers. Utilizing the disclosed structure and methods, a device capable of emitting light over a wide spectrum may be made without the use of phosphor materials. | 2013-01-31 |
20130026485 | POWER SEMICONDUCTOR DEVICE - A power semiconductor device is provided. The power semiconductor device includes a source electrode disposed on a device activation region and widened in a direction toward a first side, a drain electrode arranged alternately with the source electrode on the device activation region and widened in a direction toward a second side facing the first side, an insulating layer disposed on the source electrode and the drain electrode and configured to include a plurality of via contacts contacting the source electrode and the drain electrode, a source electrode pad disposed in a first region on the insulating layer to be brought into contact with the source electrode, and a drain electrode pad disposed in a second region separated from the first region on the insulating layer and brought into contact with the plurality of via contacts contacting the drain electrode. | 2013-01-31 |
20130026486 | EPITAXIAL SUBSTRATE AND METHOD FOR MANUFACTURING EPITAXIAL SUBSTRATE - Provided is a crack-free epitaxial substrate having excellent breakdown voltage properties in which a silicon substrate is used as a base substrate thereof. The epitaxial substrate includes: a (111) single crystal Si substrate and a buffer layer including a composition modulation layer that is formed of a first composition layer made of AlN and a second composition layer made of Al | 2013-01-31 |
20130026487 | NITRIDE SEMICONDUCTOR LIGHT EMITTING ELEMENT - An object of the present invention is to provide a nitride semiconductor light emitting element having a novel transparent electrode. The nitride semiconductor light emitting element has the transparent electrode on a p-type nitride semiconductor layer, wherein the p-type nitride semiconductor layer and the transparent electrode can be in good ohmic contact to each other and wherein the variability of the forward voltage (Vf) within the wafer can be reduced. | 2013-01-31 |
20130026488 | EPITAXIAL SUBSTRATE AND METHOD FOR MANUFACTURING EPITAXIAL SUBSTRATE - Provided is a crack-free epitaxial substrate having excellent breakdown voltage properties in which a silicon substrate is used as a base substrate thereof. The epitaxial substrate includes: a (111) single crystal Si substrate and a buffer layer including a plurality of composition modulation layers each formed of a first composition layer made of AlN and a second composition layer made of Al | 2013-01-31 |
20130026489 | AlN BUFFER N-POLAR GaN HEMT PROFILE - An N-face GaN HEMT device including a semiconductor substrate, a buffer layer including AlN or AlGaN deposited on the substrate, a barrier layer including AlGaN or AlN deposited on the buffer layer and a GaN channel layer deposited on the barrier layer. The channel layer, the barrier layer and the buffer layer create a two-dimensional electron gas (2-DEG) layer at a transition between the channel layer and the barrier layer. | 2013-01-31 |
20130026490 | GLASS/CERAMICS REPLACEMENT OF EPOXY FOR HIGH TEMPERATURE HERMETICALLY SEALED NON-AXIAL ELECTRONIC PACKAGES - A high temperature, non-cavity package for non-axial electronics is designed using a glass ceramic compound with that is capable of being assembled and operating continuously at temperatures greater that 300-400° C. Metal brazes, such as silver, silver colloid or copper, are used to connect the semiconductor die, lead frame and connectors. The components are also thermally matched such that the packages can be assembled and operating continuously at high temperatures and withstand extreme temperature variations without the bonds failing or the package cracking due to a thermal mismatch. | 2013-01-31 |
20130026491 | LED STRUCTURE AND METHOD FOR MANUFACTURING THEREOF - The present invention discloses a LED structure and a method for manufacturing the LED structure. The LED structure includes a substrate, a reflection layer, a first conducting layer, a light emitting layer, and a second conducting layer. The substrate has a plurality of grooves, and the reflection layer is disposed inside the plurality of grooves. The reflection layer is formed as a reflection block inside each of the grooves. The first conducting layer is disposed on the substrate, that is, the reflection layer is disposed between the first conducting layer and the substrate. The light emitting layer and the second conducting layer are sequentially disposed on the first conducting layer. The light emitting layer generates light when a current pass through the light emitting layer. Accordingly, the light generated by the light emitting layer can be emitted to the same side of the LED structure. | 2013-01-31 |
20130026492 | Diamond Semiconductor System and Method - Disclosed herein is a new and improved system and method for fabricating diamond semiconductors. The system may include a diamond material having n-type donor atoms and a diamond lattice, wherein 0.16% of the donor atoms contribute conduction electrons with mobility greater than 770 cm2/Vs to the diamond lattice at 100 kPa and 300K. The method of fabricating diamond semiconductors may include the steps of selecting a diamond material having a diamond lattice; introducing a minimal amount of acceptor dopant atoms to the diamond lattice to create ion tracks; introducing substitutional dopant atoms to the diamond lattice through the ion tracks; and annealing the diamond lattice. | 2013-01-31 |
20130026493 | SIC DEVICES WITH HIGH BLOCKING VOLTAGE TERMINATED BY A NEGATIVE BEVEL - The present disclosure relates to a Silicon Carbide (SiC) semiconductor device having both a high blocking voltage and low on-resistance. In one embodiment, the semiconductor device has a blocking voltage of at least 10 kilovolts (kV) and an on-resistance of less than 10 milli-ohms centimeter squared (mΩ·cm | 2013-01-31 |
20130026494 | SILICON CARBIDE SEMICONDUCTOR DEVICE - An SiC semiconductor device includes a semiconductor element formed in an SiC substrate, a source electrode and a gate pad formed by using an interconnect layer having barrier metal provided at the bottom surface thereof, and a temperature measuring resistive element formed by using part of the barrier metal in the interconnect line. | 2013-01-31 |
20130026495 | III-Nitride Metal Insulator Semiconductor Field effect Transistor - A field effect transistor (FET) includes a III-Nitride channel layer, a III-Nitride barrier layer on the channel layer, wherein the barrier layer has an energy bandgap greater than the channel layer, a source electrode electrically coupled to one of the III-Nitride layers, a drain electrode electrically coupled to one of the III-Nitride layers, a gate insulator layer stack for electrically insulating a gate electrode from the barrier layer and the channel layer, the gate insulator layer stack including an insulator layer, such as SiN, and an AlN layer, the gate electrode in a region between the source electrode and the drain electrode and in contact with the insulator layer, and wherein the AlN layer is in contact with one of the III-Nitride layers. | 2013-01-31 |
20130026496 | Semiconductor Device and Manufacturing Method Thereof - A method for manufacturing a semiconductor device, comprising forming a tunneling dielectric layer, a storage dielectric layer, a gate dielectric layer and a gate layer sequentially on a semiconductor substrate of a first semiconductor material; patterning the tunneling dielectric layer, the storage dielectric layer, the gate dielectric layer and the gate layer to form a gate stack; forming a groove in the semiconductor substrate on the sides of the gate stack; filling the groove with a second semiconductor material different from the first semiconductor material, meanwhile, the entire device is covered by the dielectric layer. The surface energy level in the channel is made to change by the stress generated by the second semiconductor material and the covering dielectric layer, thereby increasing tunneling current and improving the storage efficiency of the device. | 2013-01-31 |
20130026497 | SILICON CARBIDE SUBSTRATE MANUFACTURING METHOD AND SILICON CARBIDE SUBSTRATE - Silicon carbide single crystal is prepared. Using the silicon carbide single crystal as a material, a silicon carbide substrate having a first face and a second face located at a side opposite to the first face is formed. In the formation of the silicon carbide substrate, a first processed damage layer and a second processed damage layer are formed at the first face and second face, respectively. The first face is polished such that at least a portion of the first processed damage layer is removed and the surface roughness of the first face becomes less than or equal to 5 nm. At least a portion of the second processed damage layer is removed while maintaining the surface roughness of the second plane greater than or equal to 10 nm. | 2013-01-31 |
20130026498 | SUBSTRATE ASSEMBLY FOR CRYSTAL GROWTH AND FABRICATING METHOD FOR LIGHT EMITTING DEVICE USING THE SAME - A substrate assembly on which a first conduction-type semiconductor layer, an active layer and a second conduction-type semiconductor layer are formed is disclosed, the substrate assembly comprising a first substrate, a second substrate and a bonding layer interposed there between. In the substrate assembly, the thermal expansion coefficient of the bonding layer is smaller than or equal to that of at least one of the first and second substrates. | 2013-01-31 |
20130026499 | WAFER-LEVEL PACKAGING FOR SOLID-STATE TRANSDUCERS AND ASSOCIATED SYSTEMS AND METHODS - Wafer-level packaging of solid-state transducers (“SSTs”) is disclosed herein. A method in accordance with a particular embodiment includes forming a transducer structure having a first surface and a second surface opposite the first surface, and forming a plurality of separators that extend from at least the first surface of the transducer structure to beyond the second surface. The separators can demarcate lateral dimensions of individual SSTs. The method can further include forming a support substrate on the first surface of the transducer structure, and forming a plurality of discrete optical elements on the second surface of the transducer structure. The separators can form barriers between the discrete optical elements. The method can still further include dicing the SSTs along the separators. Associated SST devices and systems are also disclosed herein. | 2013-01-31 |
20130026500 | LIGHT EMITTING DEVICE PACKAGE AND LIGHTING SYSTEM USING THE SAME - A light emitting device package of the embodiment includes a body including cavities; first and second lead electrodes disposed in the cavity of the body; a light emitting device disposed in the cavities, electrically connected to at least one of the first and second lead electrodes and emitting a first main peak wavelength in the range of 410˜460 nm; and a first resin layer having first phosphor on the light emitting device, wherein the first phosphor of the first resin layer emits light of a second main peak wavelength in the range of 461 nm˜480 nm by exciting some light having the first main peak wavelength, and the first and second main peak wavelengths have the wavelength different from each other and contain the light having the same color. | 2013-01-31 |
20130026501 | TOUCH DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF - The present invention discloses a touch display device and a manufacturing method thereof, the display device comprising: an OLED display layer disposed on a lower substrate; an upper substrate; an air layer formed between the upper substrate and the lower substrate; and a touch module, disposed above the OLED display layer, wherein the touch module comprises: a first sensing circuit layer and a second sensing circuit layer, further wherein the first sensing circuit layer and the second sensing circuit layer are spaced and the distance between them is more than 2 um. The display device can reduce interference in detection circuit caused by coupling capacitance formed between the sensing circuit layers thereby improving accuracy of touch detection. | 2013-01-31 |
20130026502 | LIGHT EMITTING DEVICE PACKAGE AND LIGHT EMITTING SYSTEM - A light emitting device package according to the embodiment includes a body having a cavity; at least one light emitting device in the cavity; a resin member filled in the cavity while covering the light emitting device; and a fluorescence sheet coupled with a top surface of the body such that the fluorescence sheet is physically separable from the top surface of the body, and including a fluorescence material for converting light emitted from the light emitting device into another light. | 2013-01-31 |
20130026503 | LIGHT EMITTING DIODE DISPLAY AND MANUFACTURING METHOD THEREOF - An organic light emitting diode (OLED) display includes a substrate, an OLED on the substrate, and an encapsulation layer on the substrate with the OLED therebetween. The encapsulation layer includes a plurality of metal layers. Two of the plurality of metal layers are directly attached to each other. | 2013-01-31 |
20130026504 | LIGHTING DEVICE UTILIZING LIGHT ACTIVE SHEET MATERIAL WITH INTEGRATED LIGHT EMITTING DIODE, DISPOSED IN SEAM AND/OR IN LOW PROFILE APPLICATION - A light source includes a substrate arranged into at least two facing surfaces which form a seam therebetween; and a lighting device with light emitting diode (LED) chips embedded therein in a linear arrangement. The LED chips generate light photons. The lighting device has a first edge and a second edge opposite to the first edge, the light photons within the lighting device that are emitted by the LED chips from a top surface of the LED chips being output from the lighting device at the second edge of the device. The lighting device is sandwiched in the seam between the two facing surfaces, the second edge of the lighting device being exposed when the seam is in an opened position. | 2013-01-31 |
20130026505 | LARGE AREA ORGANIC LIGHT EMITTING DIODE DISPLAY - The invention relates to a large area organic light emitting diode display having a uniformed luminescence throughout the display area. The invention suggests an organic light emitting diode display comprising a thin film transistor substrate including a thin film transistor, a driving current line to supply an electric signal to the thin film transistor, a driving line contact hole to expose some portions of the driving current line, and an organic light emitting diode connected to the thin film transistor; a cap including a cap substrate and an auxiliary electrode disposed on a surface of the cap substrate with an area that is at least ⅓ of an area of the cap substrate; a conductive sealing material to electrically connect the auxiliary electrode and the driving current line through the driving line contact hole; and an organic adhesive joining the thin film transistor substrate and the cap. | 2013-01-31 |
20130026506 | LIGHTING DEVICES WITH PRESCRIBED COLOUR EMISSION - Optical conversion layers based on semiconductor nanoparticles for use in lighting devices, and lighting devices including same. In various embodiments, spherical core/shell seeded nanoparticles (SNPs) or nanorod seeded nanoparticles (RSNPs) are used to form conversion layers with superior combinations of high optical density (OD), low re-absorbance and small FRET. In some embodiments, the SNPs or RSNPs form conversion layers without a host matrix. In some embodiments, the SNPs or RSNPs are embedded in a host matrix such as polymers or silicone. The conversion layers can be made extremely thin, while exhibiting the superior combinations of optical properties. Lighting devices including SNP or RSNP-based conversion layers exhibit energetically efficient superior prescribed colour emission | 2013-01-31 |
20130026507 | MULTICHIP PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAME - A method of manufacturing a multichip package structure includes: providing a substrate body; placing a plurality of light-emitting chips on the substrate body, where the light-emitting chips are electrically connected to the substrate body; surroundingly forming surrounding liquid colloid on the substrate body to surround the light-emitting chips; naturally drying an outer layer of the surrounding liquid colloid at a predetermined room temperature to form a semidrying surrounding light-reflecting frame, where the semidrying surrounding light-reflecting frame has a non-drying surrounding colloid body disposed on the substrate body and a dried surrounding colloid body totally covering the non-drying surrounding colloid body; and then forming a package colloid body on the substrate body to cover the light-emitting chips, where the semidrying surrounding light-reflecting frame contacts and surrounds the package colloid body. | 2013-01-31 |
20130026508 | LED MODULE WITH PASSIVE LED - An LED module ( | 2013-01-31 |
20130026509 | THREE-DIMENSIONAL LED SUBSTRATE AND LED LIGHTING DEVICE - The invention includes one or more LED elements, a silicon substrate on which the LED elements are mounted via micro bumps and internally formed wiring is connected to the micro bumps, a heat insulation organic substrate which is stuck to the opposite side of the LED elements-mounting side of the silicon substrate and has through-holes in which the wiring goes through, a chip-mounting substrate which is stuck to the opposite side of the silicon substrate side of the heat insulation organic substrate and internally formed wiring is connected to wiring in the through-holes of the heat insulation organic substrate, and an LED control circuit chip which is connected to the wiring of the chip-mounting substrate via micro bumps, and mounted via the micro bumps on the opposite side of the heat insulation organic substrate side of the chip-mounting substrate. | 2013-01-31 |
20130026510 | LIGHT EMITTING DIODE DEVICE - A light emitting diode (LED) device includes a substrate, first and second LED chips arranged on the substrate, and a phosphor layer over the first and second LED chips. The phosphor layer includes a plurality of phosphor units, each including a phosphor particle and a silver halide layer encapsulating the phosphor particle. Light emitted from the second LED chip strikes the phosphor particles to generate a first light, which. combines with the light to generate a resultant light. The silver halide layer is reduced by the light from the first LED chip to produce silver particles around the phosphor particles. The silver particles can block the light emitted from the second LED chip from sticking the phosphor particles. By adjusting the current supplied to the first LED chip, the color temperature of the resultant light generated by the LED device can be changed. | 2013-01-31 |
20130026511 | TRANSFER-BONDING METHOD FOR THE LIGHT EMITTING DEVICE AND LIGHT EMITTING DEVICE ARRAY - A transfer-bonding method for light emitting devices including following steps is provided. A plurality of light emitting devices is formed over a first substrate and is arranged in array, wherein each of the light emitting devices includes a device layer and a sacrificial pattern sandwiched between the device layer and the first substrate. A protective layer is formed over the first substrate to selectively cover parts of the light emitting devices, and other parts of the light emitting devices are uncovered by the protective layer. The device layers uncovered by the protective layer are bonded with a second substrate. The sacrificial patterns uncovered by the protective layer are removed, so that parts of the device layers uncovered by the protective layer are separated from the first substrate and are transfer-bonded to the second substrate. | 2013-01-31 |
20130026512 | LED MIRROR LIGHT ASSEMBLY - A LED mirror light assembly comprises a body having a through hole configured subject to a predetermined shape and located on a middle part thereof, a film-coated glass configured subject to shape of the through hole and supported on a first step, a LED holder holding a plurality of light-emitting diodes, and a reflector comprising a reflective surface located on a front side thereof and facing toward the light-emitting diodes and a light-shading coating coated on a rear side thereof The reflector being kept in a non-parallel manner relative to the film-coated glass and defining with the film-coated glass a predetermined contained angle so that the light spots of the light-emitting diodes are repeatedly reflected by the reflective back face of the film-coated glass and the reflective surface of the reflector, forming a curved tunnel of light spots. | 2013-01-31 |
20130026513 | OLED ASSEMBLY AND LUMINAIRE WITH REMOVABLE DIFFUSER - An OLED assembly comprises a base and a planar OLED device mounted on the base. A planar light diffuser sheet is removably attached relative to the base and OLED device. A releasable attachment mechanism is operably configured between the light diffuser sheet and the base. The light diffuser sheet is oriented relative to the OLED device so as to provide a selected diffusive property to light emitted from the OLED device. The light diffuser sheet is removable from the base upon release of the attachment mechanism and can be substituted with a different light diffuser sheet. A luminaire may incorporate the OLED assembly, wherein the luminaire has fixture in which the OLED assembly is received. | 2013-01-31 |
20130026514 | LIGHT EMITTING DEVICE - The invention provides a light emitting device. A light emitting device includes a light emitting component capable of radiating a light. A first fluorescent layer is capable of radiating a first light of a first wavelength range while being excited by the light. A second fluorescent layer is capable of radiating a second light of a second wavelength range while being excited by the light. A first fluorescent layer is between the light emitting component and the second fluorescent layer, and the first wavelength range is longer than the second wavelength range. | 2013-01-31 |
20130026515 | LED PACKAGE WITH A FRESNEL LENS - A LED package with a Fresnel lens includes a base, a LED chip, a surrounding body and a lens. The lens is a Fresnel lens which refracts the beam of light from the LED chip to one definite direction for spotlighting the emitting light in a certain orientation. | 2013-01-31 |