06th week of 2010 patent applcation highlights part 57 |
Patent application number | Title | Published |
20100037014 | MEMORY DEVICE, MEMORY SYSTEM AND DUAL PORT MEMORY DEVICE WITH SELF-COPY FUNCTION - A memory device with a self-copy function includes a memory cell array having first and second banks, and a memory interface. The memory interface reads data from a memory area of the first bank corresponding to a source address contained in previously set self-copy information and writes the read data to a memory area of the second bank corresponding to a destination address contained in the self-copy information via a self-copy data path when a self-copy signal is activated by an external self-copy start request. | 2010-02-11 |
20100037015 | MEMORY CONTROL UNIT AND MEMORY CONTROL METHOD - An object of the invention is to provide a memory control unit and a memory control method capable of making the operation setting of SDRAM without intentionally stopping access to the SDRAM. | 2010-02-11 |
20100037016 | Method and system for processing access control lists using an exclusive-or sum-of-products evaluator - A method includes receiving input data comprising a plurality of bits and processing an access control list into an ESOP expression comprising a plurality of product terms. The method also includes storing a plurality of bits associated with the plurality of product terms in a TCAM comprising a plurality of rows and comparing the plurality of bits associated with the input data to the plurality of bits associated with the product terms stored in each row of the plurality of rows, such that each row of the TCAM outputs a plurality of signals, such that each of the plurality of signals indicate a match or no match for each bit stored in the selected row. The method includes receiving the plurality of signals from the plurality of rows by an ESOP evaluator and outputting an address associated with a selected row from the plurality of rows of the TCAM. | 2010-02-11 |
20100037017 | HYBRID STORAGE APPARATUS AND LOGICAL BLOCK ADDRESS ASSIGNING METHOD - Hybrid storage apparatus and logical block address assigning methods for the hybrid storage apparatus are provided. A hybrid storage apparatus includes a plurality of storage apparatuses having different writing methods, and a controller to combine the storage apparatuses as a single storage apparatus, to assign one or more logic block addresses to the single storage apparatus, and to access the storage apparatuses using the logic block addresses. The address assigning method of a hybrid storage apparatus includes searching and detecting one or more storage apparatuses included in a hybrid storage apparatus when an initially set condition is generated, combining the storage apparatuses as a single storage apparatus, assigning one or more logic block addresses to the single storage apparatus, and accessing the storage apparatuses using the logic block addresses. | 2010-02-11 |
20100037018 | DRIVE TRAY BASED CACHING FOR HIGH PERFORMANCE DATA STORAGE SYSTEMS - Methods and systems of drive tray based caching for high performance data storage systems are disclosed. In one embodiment, the data storage system includes a controller module with at least one storage controller for managing flow of data associated with an application software, and a plurality of drive trays. Each drive tray includes a plurality of drives for storing a respective portion of the data and at least one drive controller for managing flow of the respective portion of the data between the at least one storage controller and the plurality of drives. Also, each drive tray includes a drive cache memory coupled to each one of the at least one drive controller for caching the respective portion of the data. | 2010-02-11 |
20100037019 | METHODS AND DEVICES FOR HIGH PERFORMANCE CONSISTENCY CHECK - Methods and devices for reading data from a plurality of storage devices belonging to a plurality of spans and checking consistency (e.g., XOR parity check) of data belonging to each span independently of another span in one embodiment. Methods and devices for reading data from a plurality of stripes and checking consistency of the data from the plurality of stripes in another embodiment. | 2010-02-11 |
20100037020 | PIPELINED MEMORY ACCESS METHOD AND ARCHITECTURE THEREFORE - A memory array and a method for accessing a memory array including: receiving an address from a host related to relevant data; accessing a first module based on the address received from the host, wherein accessing the first module includes: decoding the address for the first module; enabling a wordline based on the decoded address for the first module and sensing the contents of one or more bits at the decoded address for the first module; and outputting information regarding the first module; and accessing a second module based on the address received from the host, wherein accessing the second module includes: decoding the address for the second module; enabling a wordline based on the decoded address for the second module and sensing the contents of one or more bits at the decoded address for the second module; and outputting information regarding the second module, wherein the step of decoding the address for the second module occurs while the step of enabling a wordline based on the decoded address for the first module and sensing the contents of one or more bits at the decoded address for the first module occurs. | 2010-02-11 |
20100037021 | STORAGE DEVICE, STORAGE DEVICE ARRAY AND DATA PROCESSING SYSTEM - A storage device includes a data storage section, a first control section, a communication section, a second control section and a wireless transmission/reception section. The data storage section stores data. The first control section controls reading and writing the data from and into the data storage section. The communication section transmits and receives the data through a transmission line to and from a host device. The second control section transmits and receives the data to and from the first control section and the communication section. The wireless transmission/reception section is connected to the first and second control sections, is directed toward a predetermined direction, and wirelessly transmits and receives data to and from another storage device provided in the predetermined direction. | 2010-02-11 |
20100037022 | RAID Data Protection Architecture Using Data Protection Information - A structure of redundant array of independent disks (RAID) comprising multiple parity data is provided. A data protection field is attached after each basic data access unit of the parity data sequences and each subfields of the data protection field is defined according to different applications to protect the basic data access unit of the parity data or the data protection field of the payload data from errors incurring during data transmission. | 2010-02-11 |
20100037023 | SYSTEM AND METHOD FOR TRANSFERRING DATA BETWEEN DIFFERENT RAID DATA STORAGE TYPES FOR CURRENT DATA AND REPLAY DATA - The present disclosure relates to a data storage system including a RAID subsystem having a first and second type of RAID storage. A virtual volume configured to accept I/O is stored on the first type of RAID storage, and snapshots of the virtual volume are stored on the second type of RAID storage. A method of the present disclosure includes providing an active volume that accepts I/O and generating read-only snapshots of the volume. In certain embodiments, the active volume is converted to a snapshot. The active volume includes a first type of RAID storage, and the snapshots include a second type of RAID storage. The first type of RAID storage has a lower write penalty than the second type of RAID storage. In typical embodiments, the first type of RAID storage includes RAID 10 storage and the second type of RAID storage includes RAID 5 and/or RAID 6 storage. | 2010-02-11 |
20100037024 | MEMORY INTERLEAVE FOR HETEROGENEOUS COMPUTING - A memory interleave system for providing memory interleave for a heterogeneous computing system is provided. The memory interleave system effectively interleaves memory that is accessed by heterogeneous compute elements in different ways, such as via cache-block accesses by certain compute elements and via non-cache-block accesses by certain other compute elements. The heterogeneous computing system may comprise one or more cache-block oriented compute elements and one or more non-cache-block oriented compute elements that share access to a common main memory. The cache-block oriented compute elements access the memory via cache-block accesses (e.g., 64 bytes, per access), while the non-cache-block oriented compute elements access memory via sub-cache-block accesses (e.g., 8 bytes, per access). A memory interleave system is provided to optimize the interleaving across the system's memory banks to minimize hot spots resulting from the cache-block oriented and non-cache-block oriented accesses of the heterogeneous computing system. | 2010-02-11 |
20100037025 | METHOD AND APPARATUS FOR DETECTING A DATA ACCESS VIOLATION - Machine-readable media, methods, apparatus and system for detecting a data access violation are described. In some embodiments, current memory access information related to a current memory access to a memory address by a current user thread may be obtained. It may be determined whether a cache includes a cache entry associated with the memory address. If the cache includes the cache entry associated with the memory address, then, an access history stored in the cache entry and the current memory access information may be analyzed to detect if there is at least one of an actual violation and a potential violation of accessing the memory address. | 2010-02-11 |
20100037026 | Cache Refill Control - A method and a device are disclosed for a cache memory refill control. | 2010-02-11 |
20100037027 | Transaction Manager And Cache For Processing Agent - A processing agent is used in a system that transfers data of a predetermined data line length during external transactions. The agent may include an internal cache having a plurality of cache entries. Each cache entry may store multiple data line lengths of data. The agent further may include a transaction queue system having queue entries that include a primary entry including an address portion and status portion, the status portion provided for a first external transaction of the agent, and a secondary entry including a status portion provided for a second external transaction. | 2010-02-11 |
20100037028 | Buffer Management Structure with Selective Flush - A buffer management structure for processing systems is described. In one embodiment, the buffer management structure includes a storage module and a control module. The storage module includes a read position and can store a bit indicating a valid state of a transaction request in a write entry. The control module can receive an invalidation request and modify the bit to indicate an invalid state for the transaction request and discard the transaction request when the transaction request is in the read position. | 2010-02-11 |
20100037029 | HARDWARE TASK MANAGER - A hardware task manager for managing operations in an adaptive computing system. The task manager indicates when input and output buffer resources are sufficient to allow a task to execute. The task can require an arbitrary number of input values from one or more other (or the same) tasks. Likewise, a number of output buffers must also be available before the task can start to execute and store results in the output buffers. The hardware task manager maintains a counter in association with each input and output buffer. For input buffers, a negative value for the counter means that there is no data in the buffer and, hence, the respective input buffer is not ready or available. Thus, the associated task can not run. Predetermined numbers of bytes, or “units,” are stored into the input buffer and an associated counter is incremented. When the counter value transitions from a negative value to a zero the high-order bit of the counter is cleared, thereby indicating the input buffer has sufficient data and is available to be processed by a task. | 2010-02-11 |
20100037030 | ARCHIVE APPARATUS, UNAUTHORIZED ACCESS DETECTION METHOD, AND UNAUTHORIZED ACCESS DETECTION PROGRAM - An access instruction portion that sends an access instruction to the storage apparatus in response to being accessed from the terminal; and an access management portion that sends a confirmation notification to the access instruction portion in response to receiving the access instruction, wherein the access instruction portion comprises: an access instruction distinction step of determining whether or not the sender of the access instruction related to that confirmation notification is the access instruction portion; and an unauthorized access instruction detection portion that determines, on the basis of determination result made by the access instruction distinction portion, the access instruction received by the access management portion from a sender other than the access instruction portion as an unauthorized access instruction. | 2010-02-11 |
20100037031 | PROVIDING EXECUTING PROGRAMS WITH ACCESS TO STORED BLOCK DATA OF OTHERS - Techniques are described for managing access of executing programs to non-local block data storage. In some situations, a block data storage service uses multiple server storage systems to reliably store copies of network-accessible block data storage volumes that may be used by programs executing on other physical computing systems, and snapshot copies of some volumes may also be stored (e.g., on remote archival storage systems). A group of multiple server block data storage systems that store block data volumes may in some situations be co-located at a data center, and programs that use volumes stored there may execute on other computing systems at that data center, while the archival storage systems may be located outside the data center. The snapshot copies of volumes may be used in various ways, including to allow users to obtain their own copies of other users' volumes (e.g., for a fee). | 2010-02-11 |
20100037032 | Multi-Level Storage Algorithm To Emphasize Disturb Conditions - Providing systems and methods that reduce memory device read errors and improve memory device reliability by intelligently disturbing the memory cells during storage of their characteristic states. A specification component can determine a desired characteristic state for each cell of a plurality of multi-cell memory devices. A storage component can, alternatively, successively store an equivalent characteristic state in each cell of the plurality of multi-cell memory devices in stages, based on a cell's current characteristic state, or directly store the desired characteristic state of each cell of the plurality of multi-cell memory devices, based on an ordering of desired characteristic states of cells of the multi-cell memory devices. Further, a step component can gradate the equivalent characteristic state between successive storage stages. In this way, the overlap of distributions of electrical characteristics associated with different bits of one or more memory cells can be reduced. | 2010-02-11 |
20100037033 | Exploit nonspecific host intrusion prevention/detection methods and systems and smart filters therefor - Exploit nonspecific host intrusion prevention/detection methods, systems and smart filters are described. Portion of network traffic is captured and searched for a network traffic pattern, comprising: searching for a branch instruction transferring control to a first address in the memory; provided the first instruction is found, searching for a subroutine call instruction within a first predetermined interval in the memory starting from the first address and pointing to a second address in the memory; provided the second instruction is found, searching for a third instruction at a third address in the memory, located at a second predetermined interval from the second address; provided the third instruction is a fetch instruction, indicating the presence of the exploit; provided the third instruction is a branch instruction, transferring control to a fourth address in the memory, and provided a fetch instruction is located at the fourth address, indicating the presence of the exploit. | 2010-02-11 |
20100037034 | Systems and Methods for Selectively Closing Pages in a Memory - Systems, methods and media for selectively closing pages in a memory in anticipation of a context switch are disclosed. In one embodiment, a table is provided to keep track of open pages for different processes. The table comprises rows corresponding to banks of memory and columns corresponding to cores of a multi-core processing system. When a context switch signal is received, the system unsets a bit in a column corresponding to the core from which the process is to be context-switched out. If no other process is using a page opened by the process the page is closed. | 2010-02-11 |
20100037035 | Generating An Executable Version Of An Application Using A Distributed Compiler Operating On A Plurality Of Compute Nodes - Methods, apparatus, and products are disclosed for generating an executable version of an application using a distributed compiler operating on a plurality of compute nodes that include: receiving, by each compute node, a portion of source code for an application; compiling, in parallel by each compute node, the portion of the source code received by that compute node into a portion of object code for the application; performing, in parallel by each compute node, inter-procedural analysis on the portion of the object code of the application for that compute node, including sharing results of the inter-procedural analysis among the compute nodes; optimizing, in parallel by each compute node, the portion of the object code of the application for that compute node using the shared results of the inter-procedural analysis; and generating the executable version of the application in dependence upon the optimized portions of the object code of the application. | 2010-02-11 |
20100037036 | METHOD TO IMPROVE BRANCH PREDICTION LATENCY - An apparatus to generate a branch prediction of an instruction based at least in part on the address of the previous branch instruction, wherein the previous instruction is prior to the instruction in a program order. The prediction can also based on a branch history value with respect to the previous branch instruction and one or more previous branch predictions. | 2010-02-11 |
20100037037 | METHOD FOR INSTRUCTION PIPELINING ON IRREGULAR REGISTER FILES - A method for pipelining instructions on a PAC processor includes determining a minimum initial interval, and grouping the instructions so that the operands of dependent instructions are assigned to the same local register file. The virtual registers of the instructions that have data dependency across the first functional unit and the second functional unit are assigned to a global register file. The instructions are then modulo scheduled based on a current value of initial interval. The virtual registers of the scheduled instructions are allocated to the corresponding register files. If the allocation fails, a set of virtual registers is transferred from the first or second register file to the global register file. | 2010-02-11 |
20100037038 | Dynamic Core Pool Management - Embodiments that dynamically manage core pools are disclosed. Various embodiments involve measuring the amount of a computational load on a computing device. One way of measuring the load may consist of executing a number of instructions, in a unit of time, with numerous cores of the computing device. These embodiments may compare the number of instructions executed with specific thresholds. Depending on whether the number of instructions is higher or lower than the thresholds, the computing devices may respond by activating and deactivating cores of the computing devices. By limiting execution of instructions of the computing device to a smaller number of cores and switching one or more cores to a lower power state, the devices may conserve power. | 2010-02-11 |
20100037039 | INSTRUCTION OPERATION CODE GENERATION SYSTEM - It is possible to increase the processor instruction set design job efficiency and reduce workload on designers in investigation of an instruction set. An instruction operation code generation system includes an operation code bit width decision means, an instruction sorting means, and an operation code value decision means. The operation code bit width decision means decides a bit width that can be assigned for an operation code of each instruction according to specification data associated with a processor instruction set. The instruction sorting means sorts the instructions according to the operation code bit width. The operation code value decision means decides the value of the operation code of each instruction. | 2010-02-11 |
20100037040 | METHOD AND APPARATUS FOR IMPLEMENTING VIRTUAL ENVIRONMENT - A method and apparatus for implementing virtual environment comprises: obtaining an operating instruction sent for executing an application program requiring to invoke the first dynamic link library (DLL) file, wherein the operating instruction carries a destination file position information; before the operating instruction is executed, inserting the destination file position information modification instruction sent for modifying the destination file position information requiring to make it invoke the second DLL file, and generating a virtual operating instruction; and executing the virtual operating instruction and orderly invoking the second DLL file and the first DLL file. The present invention implements the portability of application programs, system configuration information and private files in user mode, ensure the compatibility between the application programs and system configuration information of the OS and the stability of the OS under the precondition of not modifying the application programs and OS, and improve the efficiency of running the VOS. | 2010-02-11 |
20100037041 | Booting a Computer System from Central Storage - A filter driver that is loaded during an initial part of the boot process enable operating systems that are not capable of booting from central storage to be booted from central storage. According to this technique, an initial set of operating system files is loaded into system memory from a local storage volume. The initial set of files includes a small subset of all of the operating system files and includes a boot loader, a kernel, boot time drivers, a file system driver, and a filter driver. The filter driver takes control over the loading of the remainder of the operating system files, so that these files are loaded from central storage instead of the local storage volume. | 2010-02-11 |
20100037042 | SYSTEM FOR SWITCHING BIOS SET-VALUES - An exemplary system for switching BIOS set-values includes a south bridge chip, a memory unit, a switching unit, and a BIOS chip. The south bridge chip is connected to the memory unit and the switching unit, and connected to the BIOS chip via a bus. The memory unit is configured for storing a plurality of groups of predetermined BIOS set-values. The switching unit controls the south bridge chip to selectively read a group of BIOS set-values from the memory unit, and then to write the group of BIOS set-values into the BIOS chip. | 2010-02-11 |
20100037043 | STORAGE DEVICE SELECTION AND SWITCHING SYSTEM - A storage device control system is disclosed for selecting a storage device to connect to a computer from a plurality of available storage devices and for controlling the manner in which the storage devices can be connected to the computer. | 2010-02-11 |
20100037044 | Method and system for using a server management program for an error configuration table - Methods and systems are disclosed for using a server management program for an error configuration table, wherein a user loads the management program, which receives a Hardware Error Configuration Table (HECT) from baseboard management controller (BMC) firmware, the HECT table containing error control parameters for a hardware error event table. A replica of the HECT is maintained in SRAM using BMC firmware. The HECT is sent via the basic input output system (BIOS) during system power up. An interface is set up to allow the user to configure error event thresholds. The user can set preferred threshold of a system management requirement without rebooting system. If the user makes changes to the HECT, the management program sends the new HECT to BMC firmware to feedback the completion. A software SMI is issued to inform BIOS of HECT changes during the BMC completion. BIOS informs the operating system (OS) to discard and reload the new HECT. | 2010-02-11 |
20100037045 | METHOD AND APPARATUS FOR CREATING AN INSTANCE ID BASED ON A UNIQUE DEVICE IDENTIFIER - A method and apparatus for signaling between a device and network. The method comprises the step of generating, by a device, an Instance Identification (ID) that matches an Instance ID used by a network. The apparatus of the present invention includes a means of generating an ID that matches the Instance ID used by the network. | 2010-02-11 |
20100037046 | Credential Management System and Method - A centralized credential management system. Website credentials are stored at a vault storing at a vault. The website credentials are encrypted based upon a key not available to the vault and are for authenticating a user to a third party website. Through a client, a user authenticates to the vault and retrieves the encrypted website credentials and parameters and code for properly injecting the credentials into a website authentication form. The website credentials are decrypted at the client and injected into the authentication form using the parameters and code. | 2010-02-11 |
20100037047 | Method for Controlling Access to File Systems, Related System, Sim Card and Computer Program Product for Use therein - Users of mobile terminals in a communication network are provided controlled access to files in a file system through the steps of configuring the files as a file body containing a file content and a file header containing content profile information; providing a security identity module and a secure agent; storing in the security identity module user profile information identifying a set of content profiles allowed for access to the file system; extracting, via the secure agent, the content profile information from the headers of the files; retrieving, via the secure agent, the user profile information stored in the security identity module; checking the user profile information and the content profile information; and providing the user with access to those files in the file system for which the user profile information and the content profile information are found to match. | 2010-02-11 |
20100037048 | INPUT/OUTPUT CONTROL AND EFFICIENCY IN AN ENCRYPTED FILE SYSTEM - An approach for improving input/output control and efficiency in an encrypted file system (EFS) is provided. In this approach, a software application writes data to a first buffer and then requests that an encrypted file system save the data onto a nonvolatile storage device. The encrypted file system encrypts the data and stores the encrypted data in a second buffer and then writes the encrypted data from the second buffer to the nonvolatile storage area. Meanwhile, the software application is able to resume writing additional data to the buffer after the data has been copied to the second buffer even if the data has not yet been written to the nonvolatile storage area | 2010-02-11 |
20100037049 | Case study devices, methods, and systems - The present disclosure includes devices, methods, and systems for creating a case study file that includes an image file from an imaging modality, executing a hash algorithm on the case study file to produce a hash key, compressing the case study file, bundling the hash key with the compressed file, encrypting the bundled file, and moving the encrypted bundled file through an Internet connection to a storage computing system, among other embodiments. | 2010-02-11 |
20100037050 | METHOD AND APPARATUS FOR AN ENCRYPTED MESSAGE EXCHANGE - An apparatus and method for exchanging encrypted messages or data. According to an embodiment, messages are encrypted according to credentials associated with a user and the encrypted messages are stored in memory. The credentials are encrypted and stored in a key services module. To retrieve a message, the user logs onto to a server with a password, and the server retrieves the encrypted credentials associated with the user from the key services and applies the user password to decrypt or recover the encrypted credentials. If the credentials are successfully recovered, the server uses the decrypted credentials to decrypt the message and the decrypted message is made available to the user. | 2010-02-11 |
20100037051 | METHOD FOR SHARING RIGHTS OBJECTS BETWEEN USERS - Provided is a method for delivering all or part of a rights object (RO) of a user associated with the content to other users. The method includes creating a rights object to be transmitted to a second user within a limit of the rights object held by the first user, and forwarding the created rights object to the second user. The method allows each user to share its own RO with other users within the limit of the RO without server authentication. | 2010-02-11 |
20100037052 | Network Binding - In a communication network comprised of a central management entity and plurality of terminals, methods and systems for remotely binding terminals to the network and for unbinding already bind terminals when necessary. Once bind to a network, a terminal may not operate in another network, unless the two networks share a secret. | 2010-02-11 |
20100037053 | Mobile station authentication in tetra networks - A method in a communication system. The mobile station is provided with two or more separate subscriber modules having separate authentication identities. The modules are authenticated and a session key is established between these subscriber modules using the system as a trusted party. The invention improves the ability of the communication system to adjust to the varying operational conditions of the users, and user organizations. | 2010-02-11 |
20100037054 | METHOD, SYSTEM AND APPARATUS FOR TRANSMITTING DHCP MESSAGES - Methods, systems and devices for transmitting DHCP message are provided according to the present invention so that encrypted transmission of user sensitive information is achieved. The method includes receiving, by a Dynamic Host Configuration Protocol (DHCP) server, a DHCP request from a DHCP relay agent, wherein the request carries encrypted relay agent options; decrypting, by the DHCP server, the encrypted relay agent options to obtain the relay agent options. With the present invention, safe transmission of the user sensitive information in the DHCP message is ensured. | 2010-02-11 |
20100037055 | Method For Authenticated Communication In Dynamic Federated Environments - According to one embodiment of the present invention, a method for protecting authenticated communication in dynamic federated environments is provided. The method includes distributing shares of a private signature key to a group of users. When switching from an existing to a new group of users, the method includes producing a plurality of sub-shares from each of the distributed shares of existing users, with each sub-share being accompanied by a corresponding validity proof. The sub-shares from multiple existing users are combined to generate a set of shares for new users, with each new share being derived from sub-shares from multiple existing users. | 2010-02-11 |
20100037056 | METHOD TO SUPPORT PRIVACY PRESERVING SECURE DATA MANAGEMENT IN ARCHIVAL SYSTEMS - An infrastructure for archiving data among a client, a broker, and a plurality of archives, wherein the client comprises: a backup agent configured to fragment and erasure encode the data to create a set of erasure encoded data fragments; a communications agent configured to communicate the erasure encoded data fragments to the broker, issue a challenge for a challenge/response protocol to the broker, and to request data from the archives; and a restore agent configured to combine the data fragments obtained from the broker upon a data restore request. | 2010-02-11 |
20100037057 | SYSTEM AND METHOD FOR USING NETWORKED MOBILE DEVICES IN VEHICLES - A system and method for using networked mobile devices in a vehicle in a tightly integrated manner is presented. The vehicle has an OBE, a mobile device client, and vehicle components, and the mobile device has a mobile device proxy and applications, such that the mobile device client and the mobile device proxy communicate, enabling dynamic transfer of the applications to the OBE and execution of the applications on the mobile device and the OBE using the plurality of vehicle components at runtime. In one embodiment, the mobile device client and the mobile device proxy authenticate each other. The authentication can be performed using digital certificates. The mobile device client can communicate the vehicle components on the vehicle to the mobile device proxy. The mobile device client and the mobile device proxy can communicate using Bluetooth. The vehicle components can include dashboard displays, speakers, and voice I/O systems. | 2010-02-11 |
20100037058 | COLLABORATIVE SECURITY AND DECISION MAKING IN A SERVICE-ORIENTED ENVIRONMENT - A method of providing collaborative security and collaborative decision making in a service-oriented environment. The method includes validating request(s) by application(s) for service(s) in the environment, and providing each service for which an application request is validated. The method also includes monitoring a situational state exposed by services being provided in the environment. Based on the monitored state, the validating of one or more service requests is influenced. | 2010-02-11 |
20100037059 | SYSTEM AND METHOD FOR FORENSIC ANALYSIS OF MEDIA WORKS - A method and system for identifying a source of a copied work that in one embodiment includes obtaining at least some portions of a reference work, collecting at least some portions of the suspect work, matching the suspect work with the reference work, wherein the matching includes temporally aligning one or more frames of the reference work and the suspect work, spatially aligning frames of the reference work and the suspect work, and detecting forensic marks in the suspect work by spatiotemporal matching with the reference work. | 2010-02-11 |
20100037060 | FILE SYSTEM AUTHENTICATION - The present invention relates to file system authentication and, in particular, authentication of users for accessing files stored on a serverless distributed or peer-to-peer file system. Its objective is to preserve the anonymity of the users and to provide secure and private storage of data for users on a serverless distributed file system. It provides a method of authenticating access to a distributed file system comprising the steps of; receiving a user identifier; retrieving an encrypted validation record identified by the user identifier; decrypting the encrypted validation record so as to provide decrypted information; and authenticating access to data in the distributed file system using the decrypted information. | 2010-02-11 |
20100037061 | SYSTEM FOR CONTROLLING THE DISTRIBUTION AND USE OF RENDERED DIGITAL WORKS THROUGH WATERMARKING - A trusted rendering system for use in a system for controlling the distribution and use of digital works. A trusted rendering system facilitates the protection of rendered digital works which have been rendered on a system which controls the distribution and use of digital works through the use of dynamically generated watermark information that is embedded in the rendered output. The watermark data typically provides information relating to the owner of the digital work, the rights associated with the rendered copy of the digital work and when and where the digital work was rendered. This information will typically aid in deterring or preventing unauthorized copying of the rendered work to be made. The system for controlling distribution and use of digital works provides for attaching persistent usage rights to a digital work. Digital works are transferred between repositories which are used to request and grant access to digital works. Such repositories are also coupled to credit servers which provide for payment of any fees incurred as a result of accessing a digital work. | 2010-02-11 |
20100037062 | SIGNED DIGITAL DOCUMENTS - In one embodiment, a method includes adding data associated with a description of an attribute of a data set to a digital document and generating a digital signature based on the digital document. The data associated with description of the attribute is included in the generating. The data set is not included in the generating. The data set is capable of being included in the digital document. In some embodiments, a data set is a textual string. In some embodiments, an attribute is a pattern such as, for example, a pattern of characters in a textual string. | 2010-02-11 |
20100037063 | METHOD, SYSTEM AND PROGRAM PRODUCT FOR SECURING DATA WRITTEN TO A STORAGE DEVICE COUPLED TO A COMPUTER SYSTEM - A method, system and program product for securing data written to a storage device coupled to a computer system. The method includes providing a detachable data security key device for controlling access to data written to a storage within a computer system and attaching the security key device to the computer system for enabling access to the data written to the storage. Further, the method includes detaching the security key device from the computer system for disabling access to the data written to the storage, wherein removal of the security key device from the computer system renders the data written to the storage unreadable. In an embodiment, the security key device includes an encryption key module coupled to the security key device for encrypting the data written to the storage and includes a decryption key module coupled to the security key device for decrypting the data written to the storage. | 2010-02-11 |
20100037064 | Method of encryption and decryption and a keyboard apparatus integrated with functions of memory card reader and fingerprint encryption/decryption - A method of encryption and decryption and a keyboard apparatus integrated with a memory card reader and an encryption/decryption scheme using fingerprints is disclosed. The invention integrates a memory card reader and a fingerprint scan module into a keyboard apparatus. The memory card reader and fingerprint scan module are jointly using the power supply and data transmission port. Therefore, the keyboard apparatus uses the memory card reader to function data transferring, and the fingerprint scan module is used to retrieve a fingerprint of the user, which is used to encrypt or decrypt the data in the memory card by the keyboard's driver. Thereby, in the preferred embodiment, the biometric characteristic is applied to encrypt/decrypt the data in the computer system or the data in the memory card by a program installed in the computer system. The multi-functional keyboard is achieved. | 2010-02-11 |
20100037065 | Method and Apparatus for Transitive Program Verification - A method, apparatus and program storage device for program verification in an information handling system in which an application program runs on an operating system having a signature verification function for verifying a digital signature of the application program. Upon loading of the application program, the signature verification function of the operating system verifies the digital signature of the application program and, if the digital signature is verified, initiates execution of the application program. Upon initiation of execution of the application program, a verification testing function associated with the application program tests the signature verification function of the operating system by presenting to it a sequence of test digital signatures in a specified pattern of true and false signatures. If its test of the signature verification function of the operating system is successful, the application program initiates normal execution. Otherwise, the application program terminates without initiating normal execution. | 2010-02-11 |
20100037066 | INFORMATION PROCESSING APPARATUS, METHOD, PROGRAM, AND INFORMATION PROCESSING SYSTEM - An information processing apparatus, comprising: a decryption request unit that issues a decryption request for decrypting a encrypted target program at the time of the start of execution of the target program; a decryption unit that receives said decryption request from said decryption request unit, decrypts said encrypted target program and writes the so-decrypted target program into a first memory; an erasure request unit that issues an erasure request for erasing said decrypted target program at the time of the completion of execution of the target program; and
| 2010-02-11 |
20100037067 | Operating System - A new and improved operating system comprising a series of self-contained interconnected modules and service layers for connecting proprietary systems together and extracting and translating data therefrom enables existing software systems to operate and cooperate in an existing software ecosystem while allowing flexible connections with both existing and new applications. | 2010-02-11 |
20100037068 | Method to Protect Secrets Against Encrypted Section Attack - A method, system, and computer-usable medium are disclosed for controlling unauthorized access to encrypted application program code. Predetermined program code is encrypted with a first key. The hash value of an application verification certificate associated with a second key is calculated by performing a one-way hash function. Binding operations are then performed with the first key and the calculated hash value to generate a third key, which is a binding key. The binding key is encrypted with a fourth key to generate an encrypted binding key, which is then embedded in the application. The application is digitally signed with a fifth key to generate an encrypted and signed program code image. To decrypt the encrypted program code, the application verification key certificate is verified and in turn is used to verify the authenticity of the encrypted and signed program code image. The encrypted binding key is then decrypted with a sixth key to extract the binding key. The hash value of the application verification certificate associated with the second key is then calculated and used with the extracted binding key to extract the first key. The extracted first key is then used to decrypt the encrypted application code. | 2010-02-11 |
20100037069 | Integrated Cryptographic Security Module for a Network Node - A system that provides a cryptographic unit that generates secret keys that are not directly accessible to software executed by a controller. The cryptographic unit can include a restrictor device, a finite state machine, a random number generator communicatively and a memory. The memory stores values generated by the random number generator. The restrictor device and the finite state machine include hardware logic that restricts access or changes to the contents of the memory. | 2010-02-11 |
20100037070 | DEMAND BASED POWER ALLOCATION - A demand based power re-allocation system includes one or more subsystems to assign a power allocation level to a plurality of servers, wherein the power allocation level is assigned by priority of the server. The system may throttle power for one or more of the plurality of servers approaching the power allocation level, wherein throttling includes limiting performance of a processor, track server power throttling for the plurality of servers. The method compares power throttling for a first server with power throttling for remaining servers in the plurality of servers and adjusts throttling of the plurality of servers, wherein throttled servers receive excess power from unthrottled servers. | 2010-02-11 |
20100037071 | Using Internet to control delivery of power to a set of remote loads(devices) - This application describes an original concept, model, design, method and components of controlling delivery of power to one or many loads through the internet. It supports global power management as a service model. This service can be optimized with different criteria including but not limited to priority, efficiency, savings, costs, performance, season and time of the day . . . and this service can be implemented by computer software. The design consists of (i) Internet and its distributed data centers/computer clusters/databases/application software/Internet service provider (ii) a new type of web-enabled power cycler (iii) one or more gateway and another new type of wireless PAN/LAN/WAN-enabled power cyclers (iv) devices capable of accessing Internet for remote control. | 2010-02-11 |
20100037072 | Detachable Vehicle Computing Device - There is a need to have a computer system attached to a vehicle. This attached computer system controls many of the car's functions as well as provides multi-media and broadband connectivity for the passengers. A secondary detachable computer utilizing a display system needs to be able to share resources between the two computer systems. The present disclosure details how to partition such a system whereby the detachable computing device operates as a stand-alone computer and additionally is able to utilized functions from the computer attached to a vehicle. | 2010-02-11 |
20100037073 | Apparatus and Method for Selective Power Reduction of Memory Hardware - Apparatus and Method for Selective Power Reduction of Memory Hardware A method and apparatus are provided for managing delivery of power to one or more hardware memory devices in a computer system. The computer system is configured with a processor and at least two hardware memory devices. An energy exchange threshold for the computer system is set, and management of one or more of the hardware memory devices is employed when the computer system exceeds an energy exchange threshold. | 2010-02-11 |
20100037074 | POWER CONTROL FOR SERIAL BUS PERIPHERAL DEVICE - There is disclosed a method and a device connected to a serial bus, said method comprising transmitting a message that indicates a power requirement for a suspended mode of said serial bus; in response to a received authorization message, setting a first or a second operating state; entering said suspended mode; drawing a current in accordance with said indicated power requirement that may exceed a predetermined current limit if said operating state is said first state, and drawing a current at or below said predetermined current limit if said operating state is said second state. | 2010-02-11 |
20100037075 | DUAL VOLTAGE SWITCHING CIRCUIT - A dual voltage switching circuit includes a first resistor and two transistors. Each transistor has a first terminal, a second terminal, and a third terminal. The first terminals are connected to a control terminal of a computer. The second terminals are connected to a standby power supply of the computer. The third terminals are connected to a power-on terminal of the computer via the first resistor. When the first terminals receive a low level signal from the control terminal, the first and second transistors are on, and the power-on terminal receives a voltage form the standby power supply via the first resistor. | 2010-02-11 |
20100037076 | METHOD AND APPARATUS FOR FACILITATING DEVICE HIBERNATION - One embodiment of the present invention provides a system that enables a computing device to save additional power by entering a “hibernation mode,” wherein the active state of the computing device is preserved in non-volatile storage while power to volatile storage is turned off. During operation, the system reanimates a computing device from a hibernation image by restoring reanimation code from the hibernation image and then executing the reanimation code. While executing this reanimation code, the system restores the rest of the hibernation image by, reading compressed data containing the rest of the hibernation image, and decompressing the compressed data using computational circuitry within the computing device. During this process, the decompression operations are overlapped with the reading operations to improve performance. | 2010-02-11 |
20100037077 | Multiple-node system power utilization management - A multiple-node system having a number of nodes has its power utilization managed. A node power cap of a node specifies a maximum power that the node is individually able to utilize. A system-wide power cap specifies a maximum power that the multiple-node system is able to utilize overall. In response to determining that a node power cap of a selected node is to be increased, where a total of the node power caps of all the nodes is equal to the system-wide power cap, the node power caps of one or more nodes are reduced so that the total of the node power caps of all the nodes is less than the system-wide power cap. The node power cap of the selected node is then increased such that the total of the node power caps of all the nodes is equal to or less than the system-wide power cap. | 2010-02-11 |
20100037078 | TECHNIQUE FOR REGULATING POWER-SUPPLY EFFICIENCY IN A COMPUTER SYSTEM - Embodiments of a system for regulating an efficiency of a power supply in a computer system are described. During operation, the system measures an output load of the power supply using one or more telemetry monitors in the computer system. Then, the system determines if an efficiency of the power supply corresponding to the measured output load is within a predetermined range that includes an optimal efficiency of the power supply. If the efficiency is outside of the predetermined range, the system performs remedial action so that the power supply operates at an adjusted efficiency that falls within the predetermined range. | 2010-02-11 |
20100037079 | BUILT-IN SYSTEM POWER MANAGEMENT CIRCUIT AND MOTHERBOARD WITH THEREOF - The invention has disclosed a system power management circuit comprising: a printed circuit board and a hardware monitor. The printed circuit board includes at least a first power connector, a second power connector, and more than one detection circuits disposed thereon; wherein the first power connector is used for electrically connecting a power supply, the second power connector is used for electrically connecting a power connector of a motherboard, inputs of the detection circuits are electrically connected to the first power connector, respectively. The hardware monitor is electrically connected to outputs of the detection circuits, and used for converting electrical signals outputted from the outputs of the detection circuits into corresponding digital signals, as well as for transmitting the digital signals to the motherboard via a two-wire bus, the two-wire bus is bidirectional, and may be an I | 2010-02-11 |
20100037080 | PORTABLE TERMINAL DEVICE - A portable terminal device includes a supplying unit for supplying, to a CPR, an operating frequency of a clock signal used to operate the CPU, a setting unit for setting one cock level out of a plurality of clock levels assigned with the operating frequency in accordance with an operating state of the CPU and changing an operating frequency stepwise at the clock levels to set the clock level of the operating frequency, a control unit for controlling the operating frequency supplied to the CPU at the clock levels based on settings made by the setting unit, and an input accepting unit for accepting a key input. If the input accepting unit accepts the key input, the setting unit sets the clock level to a predetermined level irrespective of an operating state of the CPU. | 2010-02-11 |
20100037081 | Method and Apparatus for Maintaining Time in a Computer System - A computer system is arranged with a circular buffer that includes a piecewise linear map from a high-resolution counter arranged to maintain International Atomic Time. The piecewise linear map includes a current leg that is currently being used and also a future leg that will be used in the future. The future leg is computed while the current leg is still being used. | 2010-02-11 |
20100037082 | REMOTE CONTROLLER, ELECTRICAL APPARATUS AND WIRELESS CONTROLLING SYSTEM - In a remote controller, a startup time or a first time duration until the startup time is input into an input unit. A timer unit counts a clock time or a second time duration. A control unit generates a signal to turn on an electrical apparatus when the second time duration reaches the first time duration, or when the clock time equals to the startup time. A transmitting unit transmits the signal. In the electrical apparatus, a main unit operates main function. A transformer supplies electricity from an external power source to the main unit through a switch. A rectifier rectifies the signal. A signal identifying unit identifies it. A reservation memory unit keeps parameter for main function. A control unit turns on the switch and controls the main unit according to the parameter when the signal is received. A battery supplies electricity to above units. | 2010-02-11 |
20100037083 | Method for Controlling Time Based Signals - A method controls time based signals that are outputted from at least two processes of unit. A first signal is converted into a first signal value and indicates over a first time range of a first process with a first defined start time and a defined end time, in which present time is signalized by a spatially extensible and uniformly highlighted portion of the first time range defined between the first start time and the present time. A second signal is converted into a second signal value and indicates over a second time range of a second process with a second defined start time and free of an end time, in which the present time is signalized by a spatially extensible portion of the second time range onto which a variably highlighted and superposed section is overlaid, the section being defined between the second start time and the present time. | 2010-02-11 |
20100037084 | METHOD FOR RECOVERING A POSITION AND CLOCK PERIOD FROM AN INPUT DIGITAL SIGNAL - A method for recovering a position and clock period from an input bi-phase encoded digital signal such as an SPDIF signal counts the intervals between phase changes of the input digital signal to derive the longest interval between the phase changes. The longest interval indicates the position and period length of a preamble portion of sub-frames of the signal and is stored, and a signal indicating the position of the longest interval between phase changes and an indication of the clock period of the input digital signal is provided. | 2010-02-11 |
20100037085 | SYSTEMS AND METHODS FOR BULK RELEASE OF RESOURCES ASSOCIATED WITH NODE FAILURE - Systems and methods according to these exemplary embodiments provide for methods and systems for improving efficiency in communications systems by, for example, bulk release of resources upon a partial node failure. Bulk release messages including, for example, at least one identifier associated with a plurality of resources, can be transmitted from a node toward other nodes to release such resources after the node failure. | 2010-02-11 |
20100037086 | ROBUST CRITICAL SECTION DESIGN IN MULTITHREADED APPLICATIONS - A multithreaded computer application provides more robust mutually exclusive accesses as instantiations (threads) of a single program, such that deadlock situations are avoided. The application method uses the system primitives to implement system services that provide a ‘gate’ functionality (S | 2010-02-11 |
20100037087 | SELF-HEALING CAPABILITIES IN A DIRECTORY SERVER - A novel manner of handling an error or exception caused by the unavailability of a slot or crypto hardware or communication network between server and hardware. As per this scheme, in the event of the unavailability of a particular slot in the hardware, the server may disable the SSL request processing within the server by setting a global “SSL Unavailable” flag. All the existing SSL requests within the server can be en-queued. If the error is because of unavailability of master slot, the server can establish a connection with a backup slot. If the error is because of unavailability of crypto hardware or communication network, then server may start a healer thread that will poll for the state of the hardware. If the exception is because of hardware reset, then server may cleanup earlier connection information and re-establish connection with the hardware, and enable SSL services. | 2010-02-11 |
20100037088 | Intelligent Mobile Device Management Client - Embodiments of an intelligent agent for an OMA DM enabled mobile client device are described. The intelligent agent includes modules for storing management property values in one or more nodes of an OMA DM management tree of the mobile client device. At least some of the management values are analyzed and set in a server computer coupled to the mobile client device over a wireless network. The intelligent mobile client is configured to manage itself based on initial instructions and policies provided by a server that are transferred to the client by the OMA DM protocol. For example, a client might notice that the battery is nearly empty and so it automatically decreases its own backlight illumination level. The intelligent agent defines a set of management properties to include a status property representing a node severity value, and a property group consisting of a rule, an action property representing an action that is executed if the rule is satisfied, and a threshold value that represents a minimum value that is used as a rule parameter. | 2010-02-11 |
20100037089 | Providing Fault Tolerant Storage System to a Cluster - In one embodiment, a system comprises a plurality of nodes. On each node, a storage virtualization component may receive the I/O operations generated from local applications on the node. The storage virtualization component may transmit the I/O operation, and detect any failures that occur in the I/O operations. If a failure is detected, the storage virtualization component may cooperate with other storage virtualization components on other nodes to successfully complete an I/O operation that experiences a failure. In one embodiment, if the I/O operation is successful on a remote node, the storage virtualization component may migrate the application that sourced the I/O operation to the remote node. In other embodiments, the storage virtualization component may monitor I/O operations and migrate the application after a pattern of local failures and successes on the remote node. | 2010-02-11 |
20100037090 | STORAGE SYSTEM, CONTROL METHOD FOR STORAGE SYSTEM, AND STORAGE DEVICE - In a control method for a storage system including a plurality of storage devices connected via a network, when starting operation, a first storage device on the network determines whether data of a control program for controlling the first storage device is broken. When the data of the control program is broken, the first storage device transmits a signal indicating that the data of the control program is broken to the network. Upon receipt of the signal, a second storage device on the network determines whether it stores the same control program as that stored in the first storage device. When storing the same control program, the second storage device transmits the control program to the first storage device. The first storage device rewrites the broken control program with the control program received from the second storage device. | 2010-02-11 |
20100037091 | LOGICAL DRIVE BAD BLOCK MANAGEMENT OF REDUNDANT ARRAY OF INDEPENDENT DISKS - Methods and systems for bad data block management of redundant array of independent disks (RAID) are disclosed. In one embodiment, a method for managing a bad data block for a RAID includes filling a first logical block address (LBA) of a first disk having a media error using signature data, filling a second LBA of a second disk offlined from the RAID using the signature data, wherein the second LBA and the first LBA are on a same stripe of the RAID, storing the first LBA and the second LBA to a table in a disk data format (DDF) area associated with the first disk and the second disk, and computing and storing parity values for the stripe of the RAID associated with the first LBA and the second LBA based on data across the stripe. | 2010-02-11 |
20100037092 | SYSTEM AND METHOD FOR BACKUP, REBOOT, AND RECOVERY - The invention makes it possible to restart and effectively use a computer by connecting a machine readable backup device which is recognized by the computer as a bootable drive. The device includes an emergency operating system executable from the backup medium in the event the computer's internal storage drive (hard disk) or operating system crashes and without using data from the computer's hard disk or other internal storage (which may be affected by the crash), data backup and recovery applications, data generated by the backup and recovery applications, and a productivity suite. The productivity suite includes a word processing application, a spreadsheet application, a slide presentation application, an Internet browsing application, and/or an email handling application. The emergency operating system and productivity application make it possible to regain much of the computer's functionality and to provide access to files backed-up by the invention, even if it is not possible to access data or programs stored on the computer's internal storage drive. | 2010-02-11 |
20100037093 | REDUNDANT POWER AND DATA OVER A WIRED DATA TELECOMMUNICATIONS NETWORK - A method and apparatus for redundant power and data over a wired data telecommunications network permits power to be received at a local powered device (PD) from remote power sourcing equipment (PSE) via at least one conductor at a first time and power and/or data to be obtained by the local device from another port of the remote device or another remote device at a second different time. Power levels obtained may be adjusted from time to time in response to circumstances. | 2010-02-11 |
20100037094 | Application Failure Recovery - A method, apparatus, and article of manufacture to dynamically address and resolve an improper shut-down of an application. Internal state data of the application is stored in persistent memory. New internal state data is dynamically created and authenticated following an improper shut-down of the application. Responsive to the authentication, the application is re-started with the authenticated new internal state data, without being subject to an immediate improper shut-down. | 2010-02-11 |
20100037095 | SYSTEM AND METHOD FOR AUTOMATED AND ASSISTED RESOLUTION OF IT INCIDENTS - A computer implemented method for assisted and automated resolving of Information Technology (IT) incidents is provided. The method facilitates one or more users to define repair workflows to resolve the IT incidents. The defined repair workflows are stored in a flow repository. The stored repair workflows are accessed and invoked by the one or more users. The invoked repair workflows are interactively executed for a user assisted resolution of the IT incident. The invoked repair workflows are executed automatically for the automated resolution of the IT incident. | 2010-02-11 |
20100037096 | System-directed checkpointing implementation using a hypervisor layer - While system-directed checkpointing can be implemented in various ways, for example by adding checkpointing support in the memory controller or in the operating system in otherwise standard computers, implementation at the hypervisor level enables the necessary state information to be captured efficiently while providing a number of ancillary advantages over those prior-art methods. This disclosure details procedures for realizing those advantages through relatively minor modifications to normal hypervisor operations. Specifically, by capturing state information in a guest-operating-system-specific manner, any guest operating system can be rolled back independently and resumed without losing either program or input/output (I/O) continuity and without affecting the operation of the other operating systems or their associated applications supported by the same hypervisor. Similarly, by managing I/O queues as described in this disclosure, rollback can be accomplished without requiring I/O operations to be repeated and I/O device failures can be circumvented without losing any I/O data in the process. | 2010-02-11 |
20100037097 | VIRTUAL COMPUTER SYSTEM, ERROR RECOVERY METHOD IN VIRTUAL COMPUTER SYSTEM, AND VIRTUAL COMPUTER CONTROL PROGRAM - A virtual computer system executes a virtual computer control program on a physical computer and thereby causes guest programs on the logical partitions, respectively. The virtual computer control program includes an error recovery module to periodically recover from an error in a cache memory, an error interruption handler module responsive to an interruption notice caused by an error which has occurred in the cache memory, to recover from an error in the cache memory, and an error data initialization module to recover from an error in the cache memory with shutdown or restart of one of the logical partitions as a momentum. And the virtual computer control program conducts recovery processing from an error in the cache memory. | 2010-02-11 |
20100037098 | TERMINATE OPERATIONS FOR COMPLEX I/O LINK - Method, system and computer program product embodiments for, in an input/output (I/O) link handling complex instruction chains, a messaging scheme incorporating a method of error recovery between an initiator processor and a receiver processor, are provided. An operation initiation message is been sent from the initiator processor to the receiver processor for the receiver processor to begin work on an operation. If determined to be necessary, a terminate operation message is sent from the initiator processor to the receiver processor. The initiator processor withholds sending additional messages for the operation until a terminate operation response message is received. Once the terminate operation message is received, outstanding messages in process are flushed from the receiver processor. The receiver processor withholds sending additional messages to the initiator processor as the outstanding messages are completed. The terminate operation response message is sent from the receiver processor to the initiator processor. | 2010-02-11 |
20100037099 | DIAGNOSTIC METHOD FOR LOCATING A FAILURE IN A COMPLEX SYSTEM, AND A DEVICE FOR IMPLEMENTING SAID METHOD - A diagnostic method for locating a failure in a complex system that includes the steps of detecting operating information using a detector device; verifying a performance of the system based on the operating information; determining an operating status of the system to be one of “operational,” “non-operational” and “degraded” based on the operating information; comparing the operating information with predetermined data when the operation status is one of “operational,” “non-operational” and “degraded;” and generating at least one hypothesis as to a location of the failure of the system. | 2010-02-11 |
20100037100 | METHOD AND SYSTEM FOR ISOLATING SOFTWARE COMPONENTS - A software testing system operative to test a software application comprising a plurality of software components, at least some of which are highly coupled hence unable to support a dependency injection, each software component operative to perform a function, the system comprising apparatus for at least partially isolating, from within the software application, at least one highly coupled software component which performs a given function, and apparatus for testing at least the at least partially isolated highly coupled software component. | 2010-02-11 |
20100037101 | EXPOSING APPLICATION PERFORMANCE COUNTERS FOR .NET APPLICATIONS THROUGH CODE INSTRUMENTATION - Disclosed is a method for adding performance counters to a .NET application after compilation of the .NET application to Common Intermediate Language code without a requirement for code changes to the original .NET application code or application recompilation from the development side. With regard to a further aspect of a particularly preferred embodiment, the invention may provide a method for adding the performance counters by declarative instrumentation of a .NET application at runtime or compile time, without the need for an application developer to hardcode instrumentation logic into the application. An instrumentation configuration file provides declarative definition for performance counters that are to be added to a particular application, and particularly includes a complete list of performance counters that need to be added and settings for each performance counter. | 2010-02-11 |
20100037102 | FAULT-TOLERANT NON-VOLATILE BUDDY MEMORY STRUCTURE - Various embodiments of the present invention are generally directed to an apparatus and method for providing a fault-tolerant non-volatile buddy memory structure, such as a buddy cache structure for a controller in a data storage device. A semiconductor memory array of blocks of non-volatile resistive sense memory (RSM) cells is arranged to form a buddy memory structure comprising a first set of blocks in a first location of the array and a second set of blocks in a second location of the array configured to redundantly mirror the first set of blocks. A read circuit decodes a fault map which identifies a defect in a selected one of the first and second sets of blocks and concurrently outputs data stored in the remaining one of the first and second sets of blocks responsive to a data read operation upon said buddy memory structure. | 2010-02-11 |
20100037103 | COMMUNICATIONS ADMINISTRATION METHOD AND SYSTEM FOR AN ELECTRONIC APPARATUS - In a method, a computer-readable medium encoded with programming instructions, and a system for the administration of error messages of electronic, medical technology peripheral apparatuses (100) that are in communication via a CANopen interface, a device configuration file is extended by a message object. The message object can be configured in advance. At run time the message object is then imported and used in the processing or in the administration of a detected error message. The detected error message is parameterized (and thus specifically processed) using the detected message object. | 2010-02-11 |
20100037104 | IMAGE FORMING APPARATUS AND METHOD OF CONTROLLING APPLICATION THEREOF - A method to control an application installed on an image forming apparatus includes checking current status information of the image forming apparatus, comparing the checked current status information with executability information to execute a pre-stored application, and if the application is executable as a result of the comparing, executing the application, and if the application is not executable, displaying information that the application is not executable. | 2010-02-11 |
20100037105 | Method and Apparatus for Using Physical Layer Error Control to Direct Media Access Layer Error Control - In a system in which both the media access layer and the physical layer use error control, information from the physical layer error control process is used to provide surrogate media access layer error control messaging. In one aspect, the physical layer error control state machine in the transmitting station sends the surrogate message internally to the media access layer error control state machine based on physical layer error control results, thereby eliminating a need to transmit the error control messaging from the media access layer error control state machine of the receiving station over the wireless link. | 2010-02-11 |
20100037106 | VSB TRANSMISSION SYSTEM FOR PROCESSING SUPPLEMENTAL TRANSMISSION DATA - A VSB communication system or transmitter for processing supplemental data packets with MPEG-II data packets includes a VSB supplemental data processor and a VSB transmission system. The VSB supplemental data processor includes a Reed-Solomon coder for coding the supplemental data to be transmitted, a null sequence inserter for inserting a null sequence to an interleaved supplemental data for generating a predefined sequence, a header inserter for inserting an MPEG header to the supplemental data having the null sequence inserted therein, a multiplexer for multiplexing an MPEG data coded with the supplemental data having the MPEG header added thereto in a preset multiplexing ratio and units. The output of the multiplexer is provided to an 8T-VSB transmission system for modulating a data field from the multiplexer and transmitting the modulated data field to a VSB reception system. | 2010-02-11 |
20100037107 | Method for testing a communication connection - The invention relates to a method for testing a communication connection ( | 2010-02-11 |
20100037108 | HIGH-SPEED SEMICONDUCTOR MEMORY TEST DEVICE - A semiconductor test device includes; a tester providing a first clock signal, first test data, a control signal and a first clock signal, a reference clock generating unit generating a reference clock signal, a clock converting unit receiving the reference clock signal and converting the frequency of the reference clock signal to a second clock signal in response to the control signal, and a test data converting unit receiving the first test data, converting the first test data to second test data synchronously with the second clock signal and providing the second test data to a semiconductor memory device under test. | 2010-02-11 |
20100037109 | METHOD FOR AT-SPEED TESTING OF MEMORY INTERFACE USING SCAN - A method and a circuit of testing of a memory interface associated with an embedded memory in a semiconductor circuit involves writing to two memory locations in succession; reading the two memory locations in succession in the same order in which the two memory locations were written; capturing output data from the memory interface; and analyzing captured output data to determine whether said captured output data corresponds to expected data. | 2010-02-11 |
20100037110 | AUTOMATIC MULTICABLE ELECTRICAL CONTINUITY TESTER - An automatic multi-cable continuity tester. The multi-conductor electrical continuity tester includes a controller that is configured to generate a first serial stream of input test signals. The first serial stream of input test signals includes a plurality of signals equal in number to a plurality of conductors in a cable. A data input module is configured to convert the first serial stream of input test signals into a first parallel stream of test signals. A data output module is configured to receive and convert the first parallel stream of test signals to a first serial stream of output test signals. The controller is further configured to receive the first serial stream of output signals, store the first serial stream of output signals to a memory, generate subsequent serial streams of input test signals corresponding to each possible combination and permutation of conductors, determine whether each possible combination and permutation of conductors includes an open circuit condition and/or a short circuit condition, and determine whether at least one predefined relationship between input and output test signals includes an open circuit condition and/or a short circuit condition, wherein the predefined relationship defines a stream of output test signals that are different than a stream of input test signals. | 2010-02-11 |
20100037111 | METHOD AND APPARATUS FOR TESTING DELAY FAULTS - An apparatus or method for testing of a SOC processor device may minimize interference that is caused by interfacing a comparatively low-speed testing device with the high-speed processor during testing. Implementations may gate the input clock signal at the clock input to each domain of the SOC processor device rather than at the output of the PLL clock. The gating of the clock signal to each domain may then be controlled by clock stop signals generated by the testing device and sent to the individual domains of the processor device. Gating the clock signal at the domain may provide a more natural state for the circuit during testing as well as allow the test control unit to test the different domains of the SOC device individually. | 2010-02-11 |
20100037112 | FRACTIONAL HARQ RE-TRANSMISSION - A mechanism is provided to allow an HARQ retransmission to more closely match the receiver's need for energy with the additional energy sent over the wireless link. In one aspect, the receiver sends the transmitter qualitative feedback which indicates to the transmitter an approximate amount of additional energy that the receiver needs to successfully decode the transmission. | 2010-02-11 |
20100037113 | UTILIZING HARQ FOR UPLINK GRANTS RECEIVED IN WIRELESS COMMUNICATIONS - Systems and methodologies are described that facilitate utilizing hybrid automatic repeat/request (HARQ) in system access communications. A HARQ entity is provided that manages a plurality of HARQ processes, which can typically use new data indicators (NDI) to determine when received data is a new transmission or retransmission. For resource grants, the HARQ entity can determine whether the communication is a new transmission or retransmission based on the type of message that contains the grant. In addition, an address comprised within the message, a previous use of the HARQ process, and/or the like can further be utilized to determine whether the message is a new transmission or retransmission. Once determined, the HARQ entity can provide the message to the appropriate HARQ process along with the indication of new transmission or retransmission. | 2010-02-11 |