06th week of 2021 patent applcation highlights part 59 |
Patent application number | Title | Published |
20210043506 | METHODS AND APPARATUS FOR HYBRID FEATURE METALLIZATION | 2021-02-11 |
20210043507 | TOP VIA INTERCONNECTS WITH WRAP AROUND LINER | 2021-02-11 |
20210043508 | METHOD OF MANUFACTURING VIAS CROSSING A SUBSTRATE | 2021-02-11 |
20210043509 | BACKSIDE METAL PATTERNING DIE SINGULATION SYSTEMS AND RELATED METHODS | 2021-02-11 |
20210043510 | SEMICONDUCTOR STRUCTURE AND FORMATION METHOD THEREOF | 2021-02-11 |
20210043511 | Structure and Method for Fabricating a Computing System with an Integrated Voltage Regulator Module | 2021-02-11 |
20210043512 | SEMICONDUCTOR DIE SINGULATION | 2021-02-11 |
20210043513 | WAFER PROCESSING METHOD | 2021-02-11 |
20210043514 | WAFER PROCESSING METHOD | 2021-02-11 |
20210043515 | HYBRID WAFER DICING APPROACH USING A SPATIALLY MULTI-FOCUSED LASER BEAM LASER SCRIBING PROCESS AND PLASMA ETCH PROCESS | 2021-02-11 |
20210043516 | MULTI-DIMENSIONAL PLANES OF LOGIC AND MEMORY FORMATION USING SINGLE CRYSTAL SILICON ORIENTATIONS | 2021-02-11 |
20210043517 | SEMICONDUCTOR DEVICE HAVING PLANAR TRANSISTOR AND FINFET | 2021-02-11 |
20210043518 | METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE | 2021-02-11 |
20210043519 | HIGH DENSITY LOGIC FORMATION USING MULTI-DIMENSIONAL LASER ANNEALING | 2021-02-11 |
20210043520 | DUAL METAL SILICIDE STRUCTURES FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATION | 2021-02-11 |
20210043521 | CMOS FinFET Structures Including Work-Function Materials Having Different Proportions of Crystalline Orientations and Methods of Forming the Same | 2021-02-11 |
20210043522 | APPARATUS AND METHOD FOR SIMULTANEOUS FORMATION OF DIFFUSION BREAK, GATE CUT, AND INDEPENDENT N AND P GATES FOR 3D TRANSISTOR DEVICES | 2021-02-11 |
20210043523 | METHOD FOR FORMING SEMICONDUCTOR STRUCTURE WITH HIGH ASPECT RATIO | 2021-02-11 |
20210043524 | METHOD FOR CALIBRATING TEMPERATURE IN CHEMICAL VAPOR DEPOSITION | 2021-02-11 |
20210043525 | MEMORY DEVICE INCLUDING CIRCUITRY UNDER BOND PADS | 2021-02-11 |
20210043526 | DISPLAY DEVICE | 2021-02-11 |
20210043527 | SEMICONDUCTOR DEVICE PACKAGE | 2021-02-11 |
20210043528 | ELECTRONIC PACKAGES INCLUDING STRUCTURED GLASS ARTICLES AND METHODS FOR MAKING THE SAME | 2021-02-11 |
20210043529 | Protection Layer for Panel Handling Systems | 2021-02-11 |
20210043530 | SEMICONDUCTOR DIE WITH IMPROVED RUGGEDNESS | 2021-02-11 |
20210043531 | Electronics Assemblies and Methods of Manufacturing Electronics Assemblies with Improved Thermal Performance | 2021-02-11 |
20210043532 | CHIP PACKAGE MODULE WITH HEAT DISSIPATION FUNCTION AND MANUFACTURING METHOD THEREOF | 2021-02-11 |
20210043533 | HIGH RESISTIVITY WAFER WITH HEAT DISSIPATION STRUCTURE AND METHOD OF MAKING THE SAME | 2021-02-11 |
20210043534 | HIGH RESISTIVITY WAFER WITH HEAT DISSIPATION STRUCTURE AND METHOD OF MAKING THE SAME | 2021-02-11 |
20210043535 | POWER AMPLIFIER MODULE | 2021-02-11 |
20210043536 | SEMICONDUCTOR PACKAGE | 2021-02-11 |
20210043537 | ELECTRONIC SYSTEMS WITH INVERTED CIRCUIT BOARD WITH HEAT SINK TO CHASSIS ATTACHMENT | 2021-02-11 |
20210043538 | SEMICONDUCTOR DEVICE | 2021-02-11 |
20210043539 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | 2021-02-11 |
20210043540 | BONDED BODY, POWER MODULE SUBSTRATE, POWER MODULE, METHOD FOR MANUFACTURING BONDED BODY, AND METHOD FOR MANUFACTURING POWER MODULE SUBSTRATE | 2021-02-11 |
20210043541 | THERMAL MANAGEMENT IN INTEGRATED CIRCUIT PACKAGES | 2021-02-11 |
20210043542 | ELECTRONIC MODULE FOR MOTHERBOARD | 2021-02-11 |
20210043543 | THERMAL MANAGEMENT IN INTEGRATED CIRCUIT PACKAGES | 2021-02-11 |
20210043544 | THERMAL MANAGEMENT IN INTEGRATED CIRCUIT PACKAGES | 2021-02-11 |
20210043545 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | 2021-02-11 |
20210043546 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME | 2021-02-11 |
20210043547 | FRONT-TO-BACK BONDING WITH THROUGH-SUBSTRATE VIA (TSV) | 2021-02-11 |
20210043548 | ELECTRONIC DEVICE WITH THREE DIMENSIONAL THERMAL PAD | 2021-02-11 |
20210043549 | CLIPS FOR SEMICONDUCTOR PACKAGES | 2021-02-11 |
20210043550 | QUAD FLAT NO LEADS PACKAGE WITH LOCKING FEATURE | 2021-02-11 |
20210043551 | PACKAGE WITH STACKED POWER STAGE AND INTEGRATED CONTROL DIE | 2021-02-11 |
20210043552 | FILM STRUCTURE, CHIP CARRIER ASSEMBLY AND CHIP CARRIER DEVICE | 2021-02-11 |
20210043553 | SEMICONDUCTOR DEVICE AND METHOD OF FORMING MICRO INTERCONNECT STRUCTURES | 2021-02-11 |
20210043554 | ELECTRONIC MODULE, LEAD FRAME AND MANUFACTURING METHOD FOR ELECTRONIC MODULE | 2021-02-11 |
20210043555 | ELECTRONIC DEVICES INCLUDING ELECTRICALLY INSULATED LOAD ELECTRODES | 2021-02-11 |
20210043556 | SEMICONDUCTOR DEVICE INCLUDING VIA AND WIRING | 2021-02-11 |
20210043557 | VERTICAL INTERCONNECT ELEVATOR BASED ON THROUGH SILICON VIAS | 2021-02-11 |
20210043558 | MANUFACTURING METHOD OF A SEMICONDUCTOR DEVICE AND METHOD FOR CREATING A LAYOUT THEREOF | 2021-02-11 |
20210043559 | SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME | 2021-02-11 |
20210043560 | METAL-INSULATOR-METAL (MIM) CAPACITOR | 2021-02-11 |
20210043561 | SEMICONDUCTOR DEVICE | 2021-02-11 |
20210043562 | SEMICONDUCTOR APPARATUS AND EQUIPMENT | 2021-02-11 |
20210043563 | SEMICONDUCTOR INTERCONNECT STRUCTURE WITH DOUBLE CONDUCTORS | 2021-02-11 |
20210043564 | SEMICONDUCTOR DEVICE, PACKAGE STRUCTURE AND METHOD OF FABRICATING THE SAME | 2021-02-11 |
20210043565 | HELMET STRUCTURES FOR SEMICONDUCTOR INTERCONNECTS | 2021-02-11 |
20210043566 | METHOD OF TESTING WAFER | 2021-02-11 |
20210043567 | PLACE-AND-ROUTE RESISTANCE AND CAPACITANCE OPTIMIZATION USING MULTI-HEIGHT INTERCONNECT TRENCHES AND AIR GAP DIELECTRICS | 2021-02-11 |
20210043568 | VERTICAL SEMICONDUCTOR DEVICES | 2021-02-11 |
20210043569 | Structure and Method for a Low-K Dielectric With Pillar-Type Air-Gaps | 2021-02-11 |
20210043570 | ULTRATHIN BRIDGE AND MULTI-DIE ULTRAFINE PITCH PATCH ARCHITECTURE AND METHOD OF MAKING | 2021-02-11 |
20210043571 | Semiconductor Devices and Methods of Manufacture | 2021-02-11 |
20210043572 | SIZE AND EFFICIENCY OF DIES | 2021-02-11 |
20210043573 | THERMAL MANAGEMENT IN INTEGRATED CIRCUIT PACKAGES | 2021-02-11 |
20210043574 | PACKAGE LEVEL POWER GATING | 2021-02-11 |
20210043575 | SEMICONDUCTOR DEVICES HAVING PENETRATION VIAS | 2021-02-11 |
20210043576 | SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF | 2021-02-11 |
20210043577 | SEMICONDUCTOR DEVICE PACKAGE | 2021-02-11 |
20210043578 | EMBEDDED BALL LAND SUBSTRATE, SEMICONDUCTOR PACKAGE, AND MANUFACTURING METHODS | 2021-02-11 |
20210043579 | Protective Material Along Surfaces of Tungsten-Containing Structures; and Methods of Forming Apparatuses Having Tungsten-Containing Structures | 2021-02-11 |
20210043580 | DIELECTRIC FILLER MATERIAL IN CONDUCTIVE MATERIAL THAT FUNCTIONS AS FIDUCIAL FOR AN ELECTRONIC DEVICE | 2021-02-11 |
20210043581 | Semiconductor Device and Method of Manufacture | 2021-02-11 |
20210043582 | PACKAGE STRUCTURE AND METHOD FOR FABRICATING THE SAME | 2021-02-11 |
20210043583 | MANUFACTURING METHOD OF HIGH FREQUENCY MODULE AND HIGH FREQUENCY MODULE | 2021-02-11 |
20210043584 | SEMICONDUCTOR CHIP | 2021-02-11 |
20210043585 | HIGH FREQUENCY MODULE | 2021-02-11 |
20210043586 | SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE | 2021-02-11 |
20210043587 | SECURITY CHIP, SECURITY CHIP PRODUCTION METHOD AND ELECTRONIC DEVICE | 2021-02-11 |
20210043588 | SIGNAL ROUTING CARRIER | 2021-02-11 |
20210043589 | METHOD OF FORMING AN ELECTRONIC DEVICE STRUCTURE HAVING AN ELECTRONIC COMPONENT WITH AN ON-EDGE ORIENTATION AND RELATED STRUCTURES | 2021-02-11 |
20210043590 | PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF | 2021-02-11 |
20210043591 | SEMICONDUCTOR DEVICES INCLUDING A THICK METAL LAYER AND A BUMP | 2021-02-11 |
20210043592 | SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME | 2021-02-11 |
20210043593 | ISOLATION STRUCTURE FOR BOND PAD STRUCTURE | 2021-02-11 |
20210043594 | ASSEMBLY PLATFORM | 2021-02-11 |
20210043595 | ELECTRONIC DEVICE INCLUDING FIRST SUBSTRATE HAVING FIRST AND SECOND SURFACES OPPOSITE FROM EACH OTHER, SECOND SUBSTRATE FACING FIRST SURFACE, AND DRIVE CIRCUIT FACING SECOND SURFACE | 2021-02-11 |
20210043596 | HIGH DENSITY SUBSTRATE ROUTING IN PACKAGE | 2021-02-11 |
20210043597 | Selective Soldering with Photonic Soldering Technology | 2021-02-11 |
20210043598 | SEMICONDUCTOR DEVICE | 2021-02-11 |
20210043599 | Cu ALLOY BONDING WIRE FOR SEMICONDUCTOR DEVICE | 2021-02-11 |
20210043600 | DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME | 2021-02-11 |
20210043601 | PACKAGE STRUCTURE OF WAFER-LEVEL SYSTEM-IN-PACKAGE | 2021-02-11 |
20210043602 | INTEGRATED ELECTRONIC ELEMENT MODULE, SEMICONDUCTOR PACKAGE, AND METHOD FOR FABRICATING THE SAME | 2021-02-11 |
20210043603 | Flat Lead Package Formation Method | 2021-02-11 |
20210043604 | SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAME | 2021-02-11 |
20210043605 | Semiconductor Module Arrangement | 2021-02-11 |