09th week of 2019 patent applcation highlights part 80 |
Patent application number | Title | Published |
20190067121 | SEMICONDUCTOR DEVICE STRUCTURE WITH SEMICONDUCTOR WIRE | 2019-02-28 |
20190067122 | Semiconductor Device and Method | 2019-02-28 |
20190067123 | SEMICONDUCTOR STRUCTURES AND FABRICATION METHODS THEREOF | 2019-02-28 |
20190067124 | STRUCTURE AND FORMATION METHOD OF SEMICONDUCTOR DEVICE STRUCTURE WITH ISOLATION FEATURE | 2019-02-28 |
20190067125 | METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE | 2019-02-28 |
20190067126 | USING A METAL-CONTAINING LAYER AS AN ETCHING STOP LAYER AND TO PATTERN SOURCE/DRAIN REGIONS OF A FINFET | 2019-02-28 |
20190067127 | SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF | 2019-02-28 |
20190067128 | FIN FIELD-EFFECT TRANSISTOR DEVICE AND METHOD | 2019-02-28 |
20190067129 | METHOD FOR FORMING SEMICONDUCTOR DEVICE AND RESULTING DEVICE | 2019-02-28 |
20190067130 | Method for Source/Drain Contact Formation in Semiconductor Devices | 2019-02-28 |
20190067131 | Interconnect Structure For Fin-Like Field Effect Transistor | 2019-02-28 |
20190067132 | METHOD FOR LITHOGRAPHIC PROCESS AND LITHOGRAPHIC SYSTEM | 2019-02-28 |
20190067133 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME | 2019-02-28 |
20190067134 | METHOD OF EXAMINING DEFECTS IN A SEMICONDUCTOR SPECIMEN AND SYSTEM THEREOF | 2019-02-28 |
20190067135 | APPARATUS FOR INSPECTION OF A PACKAGE ASSEMBLY WITH A THERMAL SOLUTION | 2019-02-28 |
20190067136 | STACKED SEMICONDUCTOR APPARATUS BEING ELECTRICALLY CONNECTED THROUGH THROUGH-VIA AND MONITORING METHOD | 2019-02-28 |
20190067137 | SEMICONDUCTOR DEVICE WITH A PROTECTION MECHANISM AND ASSOCIATED SYSTEMS, DEVICES, AND METHODS | 2019-02-28 |
20190067138 | METHOD TO DECREASE FLICKER NOISE IN CONDUCTOR-INSULATOR-SEMICONDUCTOR (CIS) DEVICES | 2019-02-28 |
20190067139 | Integrated Circuit Package with Stress Directing Material | 2019-02-28 |
20190067140 | PACKAGE STRUCTURE AND ITS FABRICATION METHOD | 2019-02-28 |
20190067141 | AIR CAVITY MOLD | 2019-02-28 |
20190067142 | SEMICONDUCTOR PACKAGE DEVICE AND METHOD OF MANUFACTURING THE SAME | 2019-02-28 |
20190067143 | MOLDED WAFER LEVEL PACKAGING | 2019-02-28 |
20190067144 | INTEGRATED FAN-OUT PACKAGE, PACKAGE-ON-PACKAGE STRUCTURE, AND MANUFACTURING METHOD THEREOF | 2019-02-28 |
20190067145 | SEMICONDUCTOR DEVICE | 2019-02-28 |
20190067146 | Non-Vertical Through-via in Package | 2019-02-28 |
20190067147 | FIBER-CONTAINING RESIN SUBSTRATE, ENCAPSULATED SEMICONDUCTOR DEVICES MOUNTING SUBSTRATE, ENCAPSULATED SEMICONDUCTOR DEVICES FORMING WAFER, ENCAPSULATED SEMICONDUCTOR DEVICES MOUNTING SHEET, SEMICONDUCTOR EQUIPMENT, AND METHOD FOR MANUFACTURING SEMICONDUCTOR EQUIPMENT | 2019-02-28 |
20190067148 | Die-on-Interposer Assembly with Dam Structure and Method of Manufacturing the Same | 2019-02-28 |
20190067149 | PLANAR PASSIVATION LAYERS | 2019-02-28 |
20190067150 | DEVICES AND METHODS FOR HEAT DISSIPATION OF SEMICONDUCTOR INTEGRATED CIRCUITS | 2019-02-28 |
20190067151 | THREE-DIMENSIONAL PACKAGING STRUCTURE AND PACKAGING METHOD OF POWER DEVICES | 2019-02-28 |
20190067152 | ARRANGEMENT AND THERMAL MANAGEMENT OF 3D STACKED DIES | 2019-02-28 |
20190067153 | HEAT SPREADER EDGE STANDOFFS FOR MANAGING BONDLINE THICKNESS IN MICROELECTRONIC PACKAGES | 2019-02-28 |
20190067154 | POWER MODULE, POWER SEMICONDUCTOR DEVICE AND POWER MODULE MANUFACTURING METHOD | 2019-02-28 |
20190067155 | SEMICONDUCTOR STRUCTURES AND FABRICATION METHODS THEREOF | 2019-02-28 |
20190067156 | SEMICONDUCTOR PACKAGE WITH THERMAL FINS | 2019-02-28 |
20190067157 | Heat Spreading Device and Method | 2019-02-28 |
20190067158 | MULTI-CHIP SELF ADJUSTING COOLING SOLUTION | 2019-02-28 |
20190067159 | SEMICONDUCTOR DEVICE | 2019-02-28 |
20190067160 | POWER MODULE WITH MULTI-LAYER SUBSTRATE | 2019-02-28 |
20190067161 | SEMICONDUCTOR LASER MODULE AND METHOD FOR MANUFACTURING THE SAME | 2019-02-28 |
20190067162 | METHODS AND SYSTEMS FOR HIGH VOLTAGE COMPONENT COOLING IN ELECTRIC VEHICLE FOR FAST CHARGE | 2019-02-28 |
20190067163 | PARTIALLY MOLDED DIRECT CHIP ATTACH PACKAGE STRUCTURES FOR CONNECTIVITY MODULE SOLUTIONS | 2019-02-28 |
20190067164 | INTEGRATED PASSIVE DEVICE AND FABRICATION METHOD USING A LAST THROUGH-SUBSTRATE VIA | 2019-02-28 |
20190067165 | POWER MODULE AND METHOD OF MANUFACTURING THE SAME, AND POWER ELECTRONIC APPARATUS AND METHOD OF MANUFACTURING THE SAME | 2019-02-28 |
20190067166 | SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF | 2019-02-28 |
20190067167 | COMPONENT STRUCTURE, POWER MODULE AND POWER MODULE ASSEMBLY STRUCTURE | 2019-02-28 |
20190067168 | CHIP ON FILM PACKAGE AND MANUFACTURING METHOD OF CHIP ON FILM PACKAGE | 2019-02-28 |
20190067169 | SEMICONDCUTOR PACKAGE AND MANUFACTURING METHOD THEREOF | 2019-02-28 |
20190067170 | SURFACE MOUNTED TYPE LEADFRAME AND PHOTOELECTRIC DEVICE WITH MULTI-CHIPS | 2019-02-28 |
20190067171 | ELECTRONIC DEVICE PACKAGING WITH GALVANIC ISOLATION | 2019-02-28 |
20190067172 | PACKAGED SEMICONDUCTOR DEVICE AND METHOD FOR FORMING | 2019-02-28 |
20190067173 | TAPE CARRIER ASSEMBLIES HAVING AN INTEGRATED ADHESIVE FILM | 2019-02-28 |
20190067174 | Packaged Fast Inverse Diode Component For PFC Applications | 2019-02-28 |
20190067175 | MOLDED INTELLIGENT POWER MODULE AND METHOD OF MAKING THE SAME | 2019-02-28 |
20190067176 | VOID REDUCTION IN SOLDER JOINTS USING OFF-EUTECTIC SOLDER | 2019-02-28 |
20190067177 | SEMICONDUCTOR DEVICE | 2019-02-28 |
20190067178 | FINE PITCH AND SPACING INTERCONNECTS WITH RESERVE INTERCONNECT PORTION | 2019-02-28 |
20190067179 | Semiconductor Device and Method of Manufacture | 2019-02-28 |
20190067180 | ELECTRONIC DEVICE INCLUDING AT LEAST ONE ELECTRONIC CHIP AND ELECTRONIC PACKAGE | 2019-02-28 |
20190067181 | SEMICONDUCTOR PACKAGES | 2019-02-28 |
20190067182 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | 2019-02-28 |
20190067183 | SEMICONDUCTOR MEMORY DEVICE | 2019-02-28 |
20190067184 | INTERCONNECT STRUCTURE | 2019-02-28 |
20190067185 | Semiconductor Device and Layout Design Thereof | 2019-02-28 |
20190067186 | SEMICONDUCTOR DEVICES INCLUDING CAPACITORS, RELATED ELECTRONIC SYSTEMS, AND RELATED METHODS | 2019-02-28 |
20190067187 | STRUCTURE AND FORMATION METHOD OF SEMICONDUCTOR DEVICE WITH SELF-ALIGNED CONDUCTIVE FEATURES | 2019-02-28 |
20190067188 | INTERCONNECT STRUCTURE AND METHOD OF FORMING THE SAME | 2019-02-28 |
20190067189 | LAYOUT TECHNIQUE FOR MIDDLE-END-OF-LINE | 2019-02-28 |
20190067190 | SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING THE SAME | 2019-02-28 |
20190067191 | HYBRID MATERIAL ELECTRICALLY PROGRAMMABLE FUSE AND METHODS OF FORMING | 2019-02-28 |
20190067192 | Integrated Assemblies Having Structures Along a First Pitch Coupled with Structures Along a Second Pitch Different from the First Pitch, and Methods of Forming Integrated Assemblies | 2019-02-28 |
20190067193 | Integrated Assemblies Having Structures Along a First Pitch Coupled with Structures Along a Second Pitch Different from the First Pitch, and Methods of Forming Integrated Assemblies | 2019-02-28 |
20190067194 | INTERCONNECT STRUCTURE FOR SEMICONDUCTOR DEVICE AND METHODS OF FABRICATION THEREOF | 2019-02-28 |
20190067195 | Integrated Assemblies Having Structures Along a First Pitch Coupled with Structures Along a Second Pitch Different from the First Pitch, and Methods of Forming Integrated Assemblies | 2019-02-28 |
20190067196 | METHOD FOR FORMING THREE-DIMENSIONAL INTEGRATED WIRING STRUCTURE AND SEMICONDUCTOR STRUCTURE THEREOF | 2019-02-28 |
20190067197 | INTERCONNECT STRUCTURE FOR SEMICONDUCTOR DEVICE AND METHODS OF FABRICATION THEREOF | 2019-02-28 |
20190067198 | LOW RESISTANCE CONTACTS INCLUDING INTERMETALLIC ALLOY OF NICKEL, PLATINUM, TITANIUM, ALUMINUM AND TYPE IV SEMICONDUCTOR ELEMENTS | 2019-02-28 |
20190067199 | WIRING BOARD AND ELECTRONIC DEVICE | 2019-02-28 |
20190067200 | STRUCTURE FOR STACKED LOGIC PERFORMANCE IMPROVEMENT | 2019-02-28 |
20190067201 | SEED LAYERS FOR COPPER INTERCONNECTS | 2019-02-28 |
20190067202 | Electrically Conductive Laminate Structures | 2019-02-28 |
20190067203 | SEMICONDUCTOR METROLOGY TARGET AND MANUFACTURING METHOD THEREOF | 2019-02-28 |
20190067204 | ALIGNMENT MARK AND MEASUREMENT METHOD THEREOF | 2019-02-28 |
20190067205 | THERMAL AND ELECTROMAGNETIC INTERFERENCE SHIELDING FOR DIE EMBEDDED IN PACKAGE SUBSTRATE | 2019-02-28 |
20190067206 | APPARATUSES AND METHODS FOR SHIELDED MEMORY ARCHITECTURE | 2019-02-28 |
20190067207 | SEMICONDUCTOR PACKAGE STRUCTURE, SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME | 2019-02-28 |
20190067208 | CIRCUIT BOARD AND CHIP PACKAGE | 2019-02-28 |
20190067209 | Compressive Interlayer Having a Defined Crack-Stop Edge Extension | 2019-02-28 |
20190067210 | SEAL RING STRUCTURE OF INTEGRATED CIRCUIT AND METHOD OF FORMING SAME | 2019-02-28 |
20190067211 | SEMICONDUCTOR DEVICE PACKAGE AND A METHOD OF MANUFACTURING THE SAME | 2019-02-28 |
20190067212 | PACKAGE WITH INTERLOCKING LEADS AND MANUFACTURING THE SAME | 2019-02-28 |
20190067213 | APPARATUS AND METHOD FOR MITIGATING SURFACE IMPERFECTIONS ON DIE BACKSIDE FILM | 2019-02-28 |
20190067214 | SEMICONDUCTOR DEVICE | 2019-02-28 |
20190067215 | TRENCH STRUCTURE AND METHOD | 2019-02-28 |
20190067216 | SEMICONDUCTOR DEVICES AND SEMICONDUCTOR DICE INCLUDING ELECTRICALLY CONDUCTIVE INTERCONNECTS BETWEEN DIE RINGS | 2019-02-28 |
20190067217 | METHODS AND STRUCTURES FOR MITIGATING ESD DURING WAFER BONDING | 2019-02-28 |
20190067218 | THIN FILM TRANSISTOR SUBSTRATE AND DISPLAY DEVICE | 2019-02-28 |
20190067219 | ANTENNA-ON-PACKAGE ARRANGEMENTS | 2019-02-28 |
20190067220 | PACKAGE STRUCTURE AND METHOD OF FABRICATING PACKAGE STRUCTURE | 2019-02-28 |