09th week of 2018 patent applcation highlights part 67 |
Patent application number | Title | Published |
20180061571 | MULTILAYER CERAMIC ELECTRONIC COMPONENT AND METHOD OF MANUFACTURING THE SAME - There is provided a multilayer ceramic electronic component, including: a ceramic body having external electrodes; and internal electrodes disposed between ceramic layers within the ceramic body, the ceramic body having a width smaller than a length thereof and the number of laminated internal electrodes being 250 or more, wherein when the thickness of the ceramic layer is denoted by T | 2018-03-01 |
20180061572 | DIELECTRIC COMPOSITION AND MULTILAYER ELECTRONIC DEVICE - A dielectric composition contains barium titanate, an oxide of yttrium, and an oxide of magnesium. 0.70≦α/β≦1.10 is satisfied, where a content of the oxide of yttrium is α mol part in terms of Y | 2018-03-01 |
20180061573 | THIN-FILM CAPACITOR - A thin-film capacitor includes a body in which a plurality of dielectric layers and first and second electrode layers are alternately stacked on a substrate, first and second electrode pads are on external surfaces of the body, and a plurality of vias are within the body. Among the plurality of vias, a first via connects the first electrode layer and the first electrode pad, and a second via connects the second electrode layer and the second electrode pad. The first via and the second via are units each include a plurality of vias, and the first via unit and the second via unit are alternately disposed on an upper surface of the body. | 2018-03-01 |
20180061574 | MULTILAYER CERAMIC CAPACITOR - In an embodiment, a multilayer ceramic capacitor | 2018-03-01 |
20180061575 | Multi-Layer Ceramic Capacitor and Method of Producing the Same - A multi-layer ceramic capacitor includes a multi-layer unit and a side margin. The multi-layer unit includes a capacitance forming unit and a cover. The capacitance forming unit includes ceramic layers laminated in a first direction and internal electrodes disposed between the ceramic layers and mainly containing nickel. The cover covers the capacitance forming unit from the first direction. The side margin covers the multi-layer unit from a second direction orthogonal to the first direction. The internal electrodes each include an oxidized area adjacent to the side margin and intensively including a metal element that forms an oxide together with nickel. The capacitance forming unit includes a first portion adjacent to the cover and a second portion adjacent to the first portion in the first direction and including the oxidized area having a smaller dimension in the second direction than that of the oxidized area of the first portion. | 2018-03-01 |
20180061576 | MULTILAYER CERAMIC CAPACITOR AND MANUFACTURING METHOD OF MULTILAYER CERAMIC CAPACITOR - A multilayer ceramic capacitor includes: a multilayer chip having a parallelepiped shape in which each of a plurality of ceramic dielectric layers and each of a plurality of internal electrode layers are alternately stacked and are alternately exposed to two edge faces of the multilayer chip; and a pair of external electrodes that are formed from the two edge faces to at least one of side faces of the multilayer chip; wherein in the external electrodes, a first metal layer whose ceramic amount is 5 wt % or more contacts with the two edge faces, and a second metal layer whose ceramic amount is less than 5 wt % contacts with the at least one of the side faces. | 2018-03-01 |
20180061577 | MULTILAYER CERAMIC CAPACITOR - A multilayer ceramic capacitor includes a laminated body including ceramic layers, first internal electrode layers, and second internal electrode layers alternately laminated. First and second external electrodes provided on the laminated body include first diffusion portions defined by interdiffusion of the first internal electrode layers and the first external electrode at interfaces between the first internal electrode layers and the ceramic layers, and second diffusion portions defined by interdiffusion of the second internal electrode layers and the second external electrode at interfaces between the second internal electrode layers and the ceramic layers. | 2018-03-01 |
20180061578 | STACKED PASSIVE COMPONENT STRUCTURES - Passive component structures that may save space, are readily manufactured, and are easy to use. In one example, a passive component structure may include two capacitors, each formed as a group of plates separate and apart from the other. The two groups of plates may have a spacing layer between them. | 2018-03-01 |
20180061579 | CAPACITOR, CAPACITOR MOUNTING STRUCTURE, AND TAPED ELECTRONIC COMPONENT SERIES - In a capacitor main body, a dimension along the thickness direction of a first region where a first inner electrode and a second inner electrode are provided is t | 2018-03-01 |
20180061580 | MONOLITHIC CERAMIC CAPACITOR, MONOLITHIC CERAMIC CAPACITOR ARRAY, AND MONOLITHIC CERAMIC CAPACITOR MOUNTING STRUCTURE - A monolithic ceramic capacitor includes a plurality of first and second inner electrodes in a ceramic body. A direction in which the first and second inner electrodes are stacked is a stacking direction, a direction perpendicular or substantially perpendicular to the stacking direction in the ceramic body is a length direction, and a direction perpendicular or substantially perpendicular to the stacking direction and the first direction is a width direction. The ceramic body includes an effective portion, a first outer layer portion, a second outer layer portion, a first side portion, and a second side portion. A ratio A/B is about 0.04 or less when a dimension of each of the first side portion and the second side portion in the width direction is A and a dimension of the effective portion in the stacking direction is B. | 2018-03-01 |
20180061581 | THIN FILM CAPACITOR AND MANUFACTURING METHOD THEREOF - A thin film capacitor includes a capacitor body formed by alternately stacking first and second electrode layers and a dielectric layer on a substrate, and having the second electrode layer disposed in an uppermost portion thereof, and a stress alleviation layer formed on the uppermost second electrode layer. The stress alleviation layer is formed of a material having a coefficient of thermal expansion higher than those of the substrate and the dielectric layer. | 2018-03-01 |
20180061582 | FURUTA AND PARA-FURUTA POLYMER FORMULATIONS AND CAPACITORS - An organic polymeric compound called a Furuta or para-Furuta polymer is characterized by polarizability and resistivity has repeating units of a general structural formula: | 2018-03-01 |
20180061583 | SOLID ELECTROLYTIC CAPACITOR - A solid electrolytic capacitor that includes a structure including laminated capacitor elements, each of the capacitor elements including a valve metal base having a porous layer on a surface thereof, a dielectric layer on the porous layer, a solid electrolyte layer on the dielectric layer, and a cathode layer on the solid electrolyte layer. The cathode layers are directly bonded together on at least a portion of a surface of each of the cathode layers between the laminated capacitor elements. | 2018-03-01 |
20180061584 | SOLID ELECTROLYTIC CAPACITOR ELEMENT, SOLID ELECTROLYTIC CAPACITOR, METHOD FOR PRODUCING SOLID ELECTROLYTIC CAPACITOR ELEMENT, AND METHOD FOR PRODUCING SOLID CAPACITOR - A solid electrolytic capacitor element that includes a valve metal substrate that has an anode terminal region and a cathode-forming region; a dielectric layer on the cathode-forming region; a solid electrolyte layer on the dielectric layer; a current collector layer on the solid electrolyte layer; a masking member on the anode terminal region, the masking member partitioning between the anode terminal region and the cathode-forming region and insulating the valve metal substrate from opposite polarity; and a hydrophilic member on a surface of the masking member. | 2018-03-01 |
20180061585 | SOLID ELECTROLYTIC CAPACITOR ELEMENT, SOLID ELECTROLYTIC CAPACITOR, METHOD FOR PRODUCING SOLID ELECTROLYTIC CAPACITOR ELEMENT, AND METHOD FOR PRODUCING SOLID CAPACITOR - A solid electrolytic capacitor element that includes a valve metal substrate having an anode terminal region and a cathode-forming region; a dielectric layer on the cathode-forming region; a solid electrolyte layer on the dielectric layer; a current collector layer on the solid electrolyte layer; and a masking member between the anode terminal region and cathode-forming region to insulate the substrate from opposite polarity. The masking region includes a first coating portion, an exposed region exposing the dielectric layer, and a second coating portion arranged in this order starting from a boundary between the anode terminal region and the cathode-forming region towards the anode terminal region. The solid electrolyte layer covers the first coating portion and at least a portion of the exposed region. | 2018-03-01 |
20180061586 | Carbon Fiber Electrode, Wire-Type Supercapacitor including the Carbon Fiber Electrode and NO2 Sensor and UV Sensor Including the Supercapacitor - A wire shaped carbon fiber electrode is disclosed. The carbon fiber electrode includes braided strings of carbon fiber. The carbon fiber electrode is fabricated in a simple process, facilitating its practical application to clothes. In addition, the carbon fiber electrode possesses high capacitance and structural stability and is easily applicable to various wearable devices. Also disclosed are a wire-type supercapacitor including the carbon fiber electrode, a NO | 2018-03-01 |
20180061587 | CARBON PASTE AND CAPACITOR ELEMENT FOR A SOLID ELECTROLYTIC CAPACITOR USING CARBON PASTE - A carbon paste that includes at least a carbon filler, and a thermosetting resin including a phenoxy resin. The phenoxy ratio X in the thermosetting resin is within a range of 20 Wt %≦X≦70 Wt %, and the carbon filler content ratio Y with respect to a total of the carbon filler and the thermosetting resin is within a range of 30 Wt %≦Y≦70 Wt %. | 2018-03-01 |
20180061588 | COMBINED DISCHARGING AND GROUNDING DEVICE FOR A HIGH VOLTAGE POWER CONVERTER - Combined high voltage discharging and grounding device with a discharging unit with a first electric contact and a first counter-contact as well as a grounding unit with a second electric contact and a second counter contact. The first electric contact and the second electric contact are provided on a movable member which is movable by way of a drive along a path of movement from an open position to a close position. An electric contact between the first electric contact and the first counter-contact is established in an intermediate position between the open position and the closed position of the movable member when closing the discharging and grounding device in an operating state of the discharging and grounding device while the second electric contact is electrically still disconnected from the second counter contact. | 2018-03-01 |
20180061589 | BUS TYPE SWITCH SOCKET BRACKET - A bus type switch socket bracket includes a bracket body ( | 2018-03-01 |
20180061590 | SPACING DEVICE FOR MOUNTING AN ELECTRICAL SWITCH OR OUTLET COVER PLATE TO A MOUNTING SURFACE - The present invention is directed towards a spacer or spacing device designed to hold an electrical switch or outlet cover plate a desired distance from a mounting surface such as a wall. | 2018-03-01 |
20180061591 | CONTACTOR AND CONTACTOR SYSTEM - A contactor and a contactor system are provided. The contactor comprises: a fixed contact; a movable contact capable of moving towards or away from the fixed contact; two arc ignition sheets for the movable contact, being positioned respectively at two sides opposite to each other of the movable contact in a first direction and fixed and electrically connected to the movable contact; two arc ignition sheets for the fixed contact, being positioned respectively at two sides opposite to each other of the fixed contact in the first direction and fixed and electrically connected to the fixed contact; and two arc-extinguishing chambers being arranged respectively on extension lines extending from the movable contact to the two arc ignition sheets for the movable contact in the first direction, wherein the two arc ignition sheets for the movable contact form an incomplete encirclement for the movable contact. | 2018-03-01 |
20180061592 | MONITORING AND RESPONDING TO AN ABNORMAL CONDITION ASSOCIATED WITH ENERGIZING OF POLES OF A CIRCUIT BREAKER - A multi-pole circuit interrupter configured to be coupled between an AC source and an electric load electronically detects a hazardous condition associated with energizing of poles and responds to overcome the hazardous condition using a solenoid. The multi-pole circuit interrupter comprises a first switch to energize a first pole on a phase A conductor of the multi-pole circuit interrupter and a second switch to energize a second pole on a phase B conductor of the multi-pole circuit interrupter. The multi-pole circuit interrupter further comprises an electronic solid-state circuit coupled to the phase A conductor and the phase B conductor to detect a line voltage variation and control a current to a device in response to trip an energized pole among the first pole and the second pole if only one of the first pole and the second pole is energized when a user controls a tie bar to turn ON or turn OFF the multi-pole circuit interrupter or when a trip bar fails to trip one of the first pole and the second pole. | 2018-03-01 |
20180061593 | Push-Button Switch Capable of Adjusting Output Power - A push-button switch capable of adjusting output power includes a housing. The housing includes a contact assembly and a power adjustment assembly therein. The contact assembly includes an upper terminal, a lower terminal and a connecting elastic plate below the upper terminal. A support seat is provided in the housing. An upper end of the support seat is provided with a first bracket. The first bracket is inserted through the connecting elastic plate. The first bracket is provided with a first slot. One end of the connecting elastic plate is fixedly connected to the upper terminal. Another end of the connecting elastic plate is engaged with the first slot. A drive mechanism is provided above the connecting elastic plate for driving the connecting elastic plate downward. The push-button switch has an ergonomic design. | 2018-03-01 |
20180061594 | KEYSWITCH ASSEMBLY AND MANUFACTURING METHOD THEREOF - A keyswitch assembly and a manufacturing method thereof are disclosed. The keyswitch assembly includes a display unit, a carrier, one or more contact pads, a light-shielding layer, and a transparent keycap. The display unit includes one or more display regions. The carrier is for carrying the display unit. The contact pads are on the carrier and are electrically connected to the display regions. The light-shielding layer is positioned corresponding to the display regions. The light-shielding layer includes one or more transparent patterns. The transparent patterns are positioned respectively corresponding to the display regions. The transparent keycap is positioned on the display unit. | 2018-03-01 |
20180061595 | IMPACT ABSORBING UNITARY COVER ASSEMBLY - Apparatus and associated methods relate to a cover assembly having a plurality of ribs integrally formed within an actuator body envelope to increase the resilience of the actuator body envelope against high-pressure water cleaning. In an illustrative example, the actuator body envelope defines an actuator body chamber while an actuator envelope integrally formed with the actuator body envelope defines an actuator chamber. The actuator chamber and the actuator body chamber may adapt to receive an actuator via an insertion aperture at a proximal end of the body envelope. In some implementations, the plurality of ribs may advantageously increase the service life of the cover assembly. | 2018-03-01 |
20180061596 | Speed Control Switch - A speed control switch includes a base. An upper end of the base is provided with a switch assembly. A side of the base is provided with a PCB board and a slide terminal. The PCB board is provided with a first contact plate. The slide terminal is slidably connected with the first contact plate. The base is provided with a trigger assembly for driving the slide terminal to slide along the first contact plate and to close the switch assembly. The speed control switch can regulate the speed of a motor precisely. The structure is compact to reduce the size of the switch, so that it is convenient for operation. | 2018-03-01 |
20180061597 | SWITCHING UNIT FOR AN ELECTRICAL SWITCH, AND ELECTRICAL SWITCH - A switching unit for an electrical switch is disclosed. In an embodiment, the switching unit includes at least one fixed contact and one moveable contact with a current feed, which in order to close or open the current path are respectively brought into mechanical contact with each other or mechanically or magnetically separated from each other. The switching unit further includes at least one extinguishing plate, which affects an electrical arc created when the electrical contacts are opened. The current feed to the moveable contact is designed such that in the open position it directs the current along the electrical arc in the opposite direction to the current direction of the arc. | 2018-03-01 |
20180061598 | SWITCHING APPARATUS AND METHOD FOR SWITCHING A CURRENT - A switching apparatus is disclosed for switching a current, formed using a phase conductor and a switch arranged in the phase conductor, for the purpose of switching a transmission of current via the phase conductor. In addition, the switching apparatus includes a circuit for deriving a test current from the phase conductor via a ground conductor; a sensing apparatus for detecting the test current and an evaluation apparatus for evaluating the detected test current. A control apparatus is used to control closing of the switch arranged in the phase conductor. The evaluation apparatus is configured to detect a zero crossing for an alternating current and the control apparatus is set up to prompt closing of the switch arranged in the phase conductor in accordance with the time of the zero crossing. An embodiment reduces abrasion or wear on the switch as a result of short-circuit currents during switching-on. | 2018-03-01 |
20180061599 | CONTACT DEVICE, HOUSING CASE USED FOR CONTACT DEVICE, AND ELECTROMAGNETIC RELAY EQUIPPED WITH CONTACT DEVICE - A contact device includes: a contact block including fixed contacts and movable contacts brought into contact with and separated from the fixed contacts; and a drive block configured to bring the movable contacts into contact with the fixed contacts and separate the movable contacts from the fixed contacts. The contact block includes: a contact unit including the fixed contacts and the movable contacts; a housing case having a housing space for housing the contact unit; and a window portion provided on a wall portion of the housing case and having higher light transmission than the wall portion. | 2018-03-01 |
20180061600 | ELECTROMAGNETIC RELAY - An electromagnetic relay includes an electromagnet device, an armature and a fixed terminal. By coil current through a coil, the electromagnet device generates first magnetic flux that forces the armature and the electromagnet device together or apart in a first end in a first direction of the armature. The armature is connected with a movable contact at a second end of the first direction and forces the movable contact and a fixed contact together or apart according to coil current. The fixed terminal is electrically connected with the fixed contact, and provided around the armature so as to cross the armature as seen from a second direction perpendicular to the first direction with the armature closing the fixed and movable contacts. Electric current through the fixed terminal generates a second magnetic flux in the armature, a direction of which is opposite to that of the first magnetic flux. | 2018-03-01 |
20180061601 | MULTI-POLE MOLDED CASE CIRCUIT BREAKER WITH INSULATION BARRIER FOR ROTARY PIN - Provided is a multi-pole molded case circuit breaker (MCCB) with an insulation barrier for a rotary pin, in which an insulation barrier is provided in a rotary pin for inter-phase power transmission to prevent dielectric breakdown. The multi-pole MCCB includes a shaft assembly having a movable contactor and having a plurality of rotary pin holes formed in a penetrating manner, a base assembly to which the shaft assembly is rotatably accommodated to be coupled, a switching mechanism coupled to an upper portion of the base assembly and rotating the shaft assembly, a plurality of rotary pins coupled to the plurality of rotary pin holes in a penetrating manner, and an insulation barrier formed of an insulating material and covering the plurality of rotary pins. | 2018-03-01 |
20180061602 | TRIP MECHANISM FOR DIRECT CURRENT MOLDED CASE CIRCUIT BREAKER - Provided is a trip mechanism for DC molded case circuit breaker, in which the insulating distance between the poles increases without any increase in whole product size, thereby reliably providing a trigger output against an over current and a fault current instantaneous breaking required. The trip mechanism includes a trip mechanism part including an instantaneous trip mechanism, the instantaneous trip mechanism including a movable member to operate according to a fault current instantaneous breaking required, and a thermal trip mechanism including a bimetal to operate according to an over current, the trip mechanism part being provided for one of two adjacent poles; a crossbar that is rotatable by contacting and pressing of the movable member of the instantaneous trip mechanism or the bimetal of the thermal trip mechanism; and a shooter that is provided to be rotatable by contacting of the crossbar rotating. | 2018-03-01 |
20180061603 | REMOTE CONTROLLED CIRCUIT BREAKER PANEL SYSTEM - A electrical distribution system has been developed to provide a remote central control point for individual circuits, and methods have been developed for retrofitting it to existing service panels or installing it into new service panels. This system provides a power circuit monitoring and control system that fits inside standard residential service panels, both new and retrofitted panels. The entire system can be retrofitted into existing breaker panel systems without the need of removing any permanent structure such as a wall. During this retrofit process, the panel cover on the existing distribution panel is first removed after the power to it is disconnected. The old breaker assembly is removed from the panel, and a circuit controller is then installed in the now available space within the panel. A new service panel enclosure with a circuit breaker assembly is installed directly over top of the enclosure. | 2018-03-01 |
20180061604 | CONTROLLABLE TRIPOUT FOR AN ELECTRICAL CIRCUIT BREAKER - A controllable trip device includes a magnetic actuator, including a coupling member intended to be coupled to a switching mechanism of an electrical circuit breaker to cause the switching thereof and a coil configured to displace the coupling member towards a tripped position when it is supplied with a pulse of a current of intensity greater than a first predefined threshold for a duration greater than or equal to a predefined duration, a control device, configured to supply the coil, immediately on receipt of a control signal, with a series of pulses of duration equal to the predefined duration and of intensity greater than or equal to the first threshold and less than or equal to a second threshold equal at most to 120% of the first threshold. | 2018-03-01 |
20180061605 | GROUND FAULT CIRCUT INTERRUPTER HAVING REVERSED WIRING PROTECTION FUCTION - A ground fault circuit interrupter with a reversed wiring protection function is provided. The ground fault circuit interrupter may include a main circuit switch, a middle layer bracket, a reset button, a trip coil, an electromagnetic trip mechanism, a lifting piece, a locking piece, and an elastic reset mechanism. Sides of the lifting piece may be sleeved upon live line and neutral line metal rods, respectively. Reset springs may be sleeved upon the metal rods. In a correct wiring state, an upper end of the live line metal rod may be in conductive contact with a live line movable metal sheet of the main circuit switch, and an upper end of the neutral line metal rod may be in conductive contact with a neutral line movable metal sheet of the main circuit switch, the movable metal sheets extending from the power load end. | 2018-03-01 |
20180061606 | PLUGGABLE TOUCH-SAFE FUSE MODULE WITH BUILT-IN REMOVAL HANDLE - A touch-safe fuse module includes a built-in slidable handle movable between extended and retracted positions relating to a housing of the fuse module. In the extended position, the handle assists with removal of the fuse from a base housing assembly by improving mechanical leverage to apply extraction force to the housing. Fuse modules having high current ratings may be effectively removed by hand without separately provided tools. | 2018-03-01 |
20180061607 | FUSE AND METHOD OF FORMING A FUSE - Embodiments of the fuse include a fuse body having a first end and a second end. A fuse element is disposed within a cavity of the fuse body, an end of the fuse element extending beyond an edge of the fuse body. An arc disc is disposed on the edge of the fuse body, and includes a notch such that the end of the fuse element extends to an outer surface of the arc disc. The end of the fuse element is configured to be folded over the outer surface of the arc disc. An end cap is disposed over the end of the fuse body and the arc disc, and the end cap includes a hole at a top surface. Solder deposited within the hole provides an electrical connection between the arc disc, the fuse element, and the end cap. | 2018-03-01 |
20180061608 | WINDOW MEMBER FOR AN X-RAY DEVICE - A window member for separating an internal environment of an x-ray device from an environment external to the x-ray device is provided. The window member comprises a substrate and a coating layer disposed upon a surface of the substrate. The substrate is formed from a polycrystalline material and is substantially transparent to low-energy x-rays. The coating layer is non-porous, covers the crystal grains at the surface of the substrate and extends into the grain boundaries therebetween, such that the coating layer forms an impermeable barrier between the substrate and the external environment. | 2018-03-01 |
20180061609 | ELECTROMAGNETIC INTERFERENCE CONTAINMENT FOR ACCELERATOR SYSTEMS - An apparatus for attachment to a component of a microwave device, includes: a cage; a shield within the cage, wherein the shield is in a form of a container, at least a majority of the shield spaced away from an interior wall of the cage; and a connector at the cage, wherein the connector is configured to connect to a cable connection, and wherein the connector is electrically connected to two terminals within the shield. An apparatus for coupling to an input connection of an electron gun, the input connection having a heater terminal and a cathode terminal, the apparatus comprising: a connector having a first configured to attach to a cable, and a second end configured to connect to the input connection of the electron gun; and wherein the connector comprises an opening configured to receive the heater terminal of the input connection of the electron gun. | 2018-03-01 |
20180061610 | ENERGY RADIATION GENERATOR WITH BI-POLAR VOLTAGE LADDER - A well-logging tool may include a sonde housing, and a radiation generator carried by the sonde housing. The radiation generator may include a generator housing, a target carried by the generator housing, a charged particle source carried by the generator housing to direct charged particles at the target, and at least one voltage source coupled to the charged particle source. The at least one voltage source may include a voltage ladder comprising a plurality of voltage multiplication stages coupled in a bi-polar configuration, and at least one loading coil coupled at at least one intermediate position along the voltage ladder. The well-logging tool may further include at least one radiation detector carried by the sonde housing. | 2018-03-01 |
20180061611 | SYSTEM AND METHOD FOR REDUCING RELATIVE BEARING SHAFT DEFLECTION IN AN X-RAY TUBE - An X-ray tube is provided. The X-ray tube includes a bearing configured to couple to an anode. The bearing includes a stationary member, a rotary member configured to rotate with respect to the stationary member during operation of the X-ray tube, and a support feature configured to minimize bending moment along a surface of the stationary member to reduce deflection of the stationary member relative to the rotary member due to radial loads during operation of the X-ray tube. | 2018-03-01 |
20180061612 | PROBE LANDING DETECTION - Probe landing is detected by detecting a change in a vibration of the probe in a plane substantially parallel to the work piece surface as the probe is lowered toward the work piece. The vibration may be observed, for example, by acquiring multiple electron microscope images of the probe as it moves and analyzing the images the determine a characteristic, such as the amplitude of the vibration. When the probe contacts the work piece surface, the friction between the probe tip and the work piece surface will change the characteristic of the vibration, which can be detected to indicate that the probe has landed. | 2018-03-01 |
20180061613 | CHARGED-PARTICLE MICROSCOPE WITH EXCHANGEABLE POLE PIECE EXTENDING ELEMENT - A charged-particle microscope having a vacuum chamber comprises a specimen holder, a particle-optical column, a detector and an exchangeable column extending element. The specimen holder is for holding a specimen. The particle-optical column is for producing and directing a beam of charged particles along an axis so as to irradiate the specimen. The column has a terminal pole piece at an extremity facing the specimen holder. The detector is for detecting a flux of radiation emanating from the specimen in response to irradiation by the beam. The exchangeable column extending element is magnetically mounted on the pole piece in a space between the pole piece and the specimen holder. Methods of using the microscope are also disclosed. | 2018-03-01 |
20180061614 | CHARGED PARTICLE BEAM WRITING APPARATUS AND CHARGED PARTICLE BEAM WRITING METHOD - A charged particle beam writing apparatus includes an area density calculation unit to calculate a pattern area density weighted using a dose modulation value, which has previously been input from an outside and in which an amount of correction of a dimension variation due to a proximity effect has been included, a fogging correction dose coefficient calculation unit to calculate a fogging correction dose coefficient for correcting a dimension variation due to a fogging effect by using the pattern area density weighted using the dose modulation value having been input from the outside, a dose calculation unit to calculates a dose of a charged particle beam by using the fogging correction dose coefficient and the dose modulation value, and a writing unit to write a pattern on a target object with the charged particle beam of the dose. | 2018-03-01 |
20180061615 | PLASMA TREATMENT APPARATUS HAVING DUAL GAS DISTRIBUTION BAFFLE FOR UNIFORM GAS DISTRIBUTION - A plasma treatment apparatus includes a chamber configured to treat a substrate; a direct plasma generation region in the chamber into which process gas is introduced to directly induce plasma; a plasma inducing assembly configured to induce the plasma to the direct plasma generation region; a substrate treatment region in the chamber in which the plasma and vaporized gas introduced from the outside of the chamber are mixed with each other to form reactive species and the substrate is treated by the reactive species; a dual gas distributing baffle configured to provide the plasma to the substrate treatment region and distribute the vaporized gas to a center region and a peripheral region of the substrate treatment region; a plurality of through-holes formed through the dual gas distributing baffle so as to provide plasma to the substrate treating region; and a center buffer region configured to store the vaporized gas. | 2018-03-01 |
20180061616 | LOW PRESSURE LIFT PIN CAVITY HARDWARE - Embodiments disclosed herein generally relate to a pumping system for a plasma processing apparatus. The pumping system includes a first pump path, a second pump path, a first valve, and a second valve. The first pump path couples an opening of a substrate support assembly of the processing chamber to an exhaust port of the processing chamber. The second pump path couples the opening of the substrate support assembly to an evacuation region of the processing chamber. The first valve is positioned in the first pump path. The first valve is configurable between a first state and a second state. The second valve is positioned in the second pump path. The second valve is configurable between the first state and the second state. | 2018-03-01 |
20180061617 | METHOD TO DEPOSIT ALUMINUM OXY-FLUORIDE LAYER FOR FAST RECOVERY OF ETCH AMOUNT IN ETCH CHAMBER - Implementations of the present disclosure provide a chamber component for use in a processing chamber. The chamber component includes a body for use in a plasma processing chamber, a barrier oxide layer formed on at least a portion of an exposed surface of the body, the barrier oxide layer having a density of about 2 gm/cm | 2018-03-01 |
20180061618 | PLASMA SCREEN FOR PLASMA PROCESSING CHAMBER - Embodiments of the present disclosure relate to a plasma screen used in a plasma processing chamber with improved flow conductance and uniformity. One embodiment provides a plasma screen. The plasma screen includes a circular plate having a center opening and an outer diameter. A plurality of cut outs formed through the circular plate. The plurality of cut outs are arranged in two or more concentric circles. Each concentric circle includes equal number of cut outs. | 2018-03-01 |
20180061619 | PLASMA PROCESSING APPARATUS - A plasma processing apparatus of the present disclosure includes a chamber, a shutter, and a contact portion. The chamber has an opening in a sidewall thereof so as to carry a wafer W into the chamber through the opening, and performs therein a predetermined processing on the wafer W by plasma of a processing gas supplied thereinto. The shutter opens or closes the opening by moving along the sidewall of the chamber. The contact portion is formed of a conductive material, and is not in contact with the shutter while the shutter is moving. When the shutter is in the position for closing the opening, the contact portion is displaced in a direction different from the direction of movement of the shutter to come into contact with the shutter. | 2018-03-01 |
20180061620 | ZERO VOLTAGE MASS SPECTROMETRY PROBES AND SYSTEMS - The invention generally relates to zero volt mass spectrometry probes and systems. In certain embodiments, the invention provides a system including a mass spectrometry probe including a porous material, and a mass spectrometer (bench-top or miniature mass spectrometer). The system operates without an application of voltage to the probe. In certain embodiments, the probe is oriented such that a distal end faces an inlet of the mass spectrometer. In other embodiments, the distal end of the probe is 5 mm or less from an inlet of the mass spectrometer. | 2018-03-01 |
20180061621 | ION MANIPULATION DEVICE - An ion manipulation method and device is disclosed. The device includes a pair of substantially parallel surfaces. An array of inner electrodes is contained within, and extends substantially along the length of, each parallel surface. The device includes a first outer array of electrodes and a second outer array of electrodes. Each outer array of electrodes is positioned on either side of the inner electrodes, and is contained within and extends substantially along the length of each parallel surface. A DC voltage is applied to the first and second outer array of electrodes. A RF voltage, with a superimposed electric field, is applied to the inner electrodes by applying the DC voltages to each electrode. Ions either move between the parallel surfaces within an ion confinement area or along paths in the direction of the electric field, or can be trapped in the ion confinement area. | 2018-03-01 |
20180061622 | ATMOSPHERIC PRESSURE IONIZATION METHOD - An atmospheric pressure ionization method uses: a gas flow passage control unit ( | 2018-03-01 |
20180061623 | INTEGRATED MASS SPECTROMETRY SYSTEMS - The disclosure features mass spectrometry systems that include: an ion source; a module featuring an ion trap, an ion detector, and a module housing that at least partially surrounds the ion trap and the ion detector; and a vacuum pump featuring a housing having a recess dimensioned to receive the module, so that when the module is positioned within the recess of the vacuum pump housing, a portion of the module is surrounded by the vacuum pump housing, and during operation of the system, the ion source, ion trap, ion detector, and vacuum pump are connected along a common gas flow path and heat is transferred from the vacuum pump to the module. | 2018-03-01 |
20180061624 | SYSTEM AND METHODOLOGY FOR EXPRESSING ION PATH IN A TIME-OF-FLIGHT MASS SPECTROMETER - A system for expressing an ion path in a time-of-flight (TOF) mass spectrometer. The present invention uses two successive curved sectors, with the second one reversed, to form S-shaped configuration such that an output ion beam is parallel to an input ion beam, such that the ions makes two identical but opposed turns, and such that the geometry of the entire system folds into a very compact volume. Geometry of a TOF mass spectrometer system in accordance with embodiments of the present invention further includes straight drift regions positioned before and after the S-shaped configuration and, optionally, a short straight region positioned between the two curved sectors with total length equal to about the length of the central arc of both curved sectors. | 2018-03-01 |
20180061625 | Methods for Operating Electrostatic Trap Mass Analyzers - A method of operating an electrostatic trapping mass analyzer, comprising: introducing a sample of ions into a trapping region of the mass analyzer, wherein a trapping field within the trapping region is such that the ions exhibit radial motion with respect to a central longitudinal axis of the trapping region while undergoing harmonic motion in a dimension defined by the central longitudinal axis, the frequency of harmonic motion of a particular ion being a function of its mass-to-charge ratio; superimposing a modulation field onto the trapping field within the trapping region, the modulation field acting to either increase or reduce the harmonic motion energies of the ions by an amount varying according to the frequency of harmonic motion; and acquiring a mass spectrum of the ions in the trapping region by measuring a signal representative of an image current induced by the harmonic motion of the ions. | 2018-03-01 |
20180061626 | HIGH-INTENSITY DISCHARGE LAMP - The present invention relates to a high-intensity discharge lamp ( | 2018-03-01 |
20180061627 | ENCODER HEAD WITH BIREFRINGENT ELEMENTS FOR FORMING IMPERFECT RETROREFLECTION AND EXPOSURE SYSTEM UTILIZING THE SAME - An encoder head configured for use with a lithographic exposure tool. The head is devoid of the multiplicity of optical corner-cubes and includes, instead, a single, geometrically substantially perfect cuboid of optically-isotropic material complemented, in operation, with prismatic elements made of optically anisotropic material to form a contraption that, as a unit, splits a single beam of light delivered to the contraption into four measurement (sub-)beams of light (two in xz-plane, two in yz-plane) and causes each of these sub-beams to interact with the wafer-stage diffraction grating at the same location upon the second pass by the grating as upon the first pass by the grating, thereby solving problems of (i) structural complexity of a conventional encoder head for use in an exposure tool, (ii) burdensome alignment of the multitude of optical prisms in the process of forming such encoder head, and (iii) cyclic non-linear errors associated with measurements involving conventional corner-cubes-based encoder heads while, at the same time, reducing the geometrical footprint of the encoder head. | 2018-03-01 |
20180061628 | SELECTIVE ATOMIC LAYER DEPOSITION FOR GAPFILL USING SACRIFICIAL UNDERLAYER - Methods and apparatuses for depositing films in high aspect ratio features and trenches on substrates using atomic layer deposition and deposition of a sacrificial layer during atomic layer deposition are provided. Sacrificial layers are materials deposited at or near the top of features and trenches prior to exposing the substrate to a deposition precursor such that adsorbed precursor on the sacrificial layer is removed in an etching operation for etching the sacrificial layer prior to exposing the substrate to a second reactant and a plasma to form a film. | 2018-03-01 |
20180061629 | Low Temperature Molecular Layer Deposition Of SiCON - Methods for the deposition of a SiCON film by molecular layer deposition using a multi-functional amine and a silicon containing precursor having a reactive moiety. | 2018-03-01 |
20180061630 | VERTICAL SEMICONDUCTOR DIODE MANUFACTURED WITH AN ENGINEERED SUBSTRATE - A semiconductor diode includes an engineered substrate including a substantially single crystal layer, a buffer layer coupled to the substantially single crystal layer, and a semi-insulating layer coupled to the buffer layer. The semiconductor diode also includes a first N-type gallium nitride layer coupled to the semi-insulating layer and a second N-type gallium nitride layer coupled to the first N-type gallium nitride layer. The first N-type gallium nitride layer has a first doping concentration and the second N-type gallium nitride layer has a second doping concentration less than the first doping concentration. The semiconductor diode further includes a P-type gallium nitride layer coupled to the second N-type gallium nitride layer, an anode contact coupled to the P-type gallium nitride layer, and a cathode contact coupled to a portion of the first N-type gallium nitride layer. | 2018-03-01 |
20180061631 | SUBSTRATE PROCESSING METHOD - A substrate processing method includes a liquid film forming step of forming a liquid film of the low surface tension liquid, an opening-forming step of forming an opening in the center region of the liquid film, a liquid film removal step of removing the liquid film from the upper surface of the substrate by widening the opening, a low surface tension liquid supply step of supplying a low surface tension liquid toward a first liquid landing point which is set on the outside of the opening, a hydrophobic agent supply step of supplying a hydrophobic agent toward a second liquid landing point which is set on the outside of the opening and further from the opening than the first liquid landing point, and a liquid landing point moving step of moving the first liquid landing point and the second liquid landing point so as to follow widening of the opening. | 2018-03-01 |
20180061632 | PROCESS OF FORMING NITRIDE SEMICONDUCTOR LAYERS - A process of forming a semiconductor device is disclosed. The semiconductor device, which is made of primarily nitride semiconductor materials, includes a GaN channel layer, an AlGaN barrier layer, and a GaN cap layer on a substrate. The barrier layer and the cap layer are grown under a gradient temperature condition where the upstream side of the substrate for the flow of the source gases of the MOCVD technique is set in a higher temperature compared with a temperature in the downstream side of the substrate for the flow of the source gases. | 2018-03-01 |
20180061633 | SUBSTRATE PROCESSING METHOD - A substrate processing method includes a facing-disposing step of disposing a facing member such that the facing member faces an upper surface of the horizontally held substrate, a space forming step of forming a space where movement of the atmosphere in from and out to an outside is restricted by the horizontally held substrate, the facing member, and a guard that surrounds the horizontally held substrate and the facing member in plan view, an inert gas supplying step of supplying an inert gas to the space, an interval adjusting step of adjusting an interval between the upper surface of the substrate and the facing member by relatively raising/lowering the facing member with respect to the horizontally held substrate while maintaining the space, and a processing liquid supplying step of supplying a processing liquid to the upper surface of the horizontally held substrate after the interval adjusting step. | 2018-03-01 |
20180061634 | TOUCH SENSING UNIT AND DISPLAY DEVICE - A display device including a first film, a flexible printed circuit, and a second film. The first film includes a substrate and a non-adhesive pattern, where the substrate includes a first area and a second area adjacent to the first area, and the non-adhesive pattern is formed on at least a portion of the second area. The flexible printed circuit is disposed on the first area of the first film. The second film is disposed on the flexible printed circuit and the first film. | 2018-03-01 |
20180061635 | METHODS OF FORMING NANOSTRUCTURES USING SELF-ASSEMBLED NUCLEIC ACIDS, AND NANOSTRUCTURES THEREOF - A method of forming a nanostructure comprises forming a directed self-assembly of nucleic acid structures on a patterned substrate. The patterned substrate comprises multiple regions. Each of the regions on the patterned substrate is specifically tailored for adsorption of specific nucleic acid structure in the directed self-assembly. | 2018-03-01 |
20180061636 | Precursors and Flowable CVD Methods for Making Low-K Films to Fill Surface Features - A method for depositing a silicon-containing film, the method comprising: placing a substrate comprising at least one surface feature into a flowable CVD reactor which is at a temperature of from about −20° C. to about 400° C.; introducing into the reactor at least one silicon-containing compound having at least one acetoxy group to at least partially react the at least one silicon-containing compound to form a flowable liquid oligomer wherein the flowable liquid oligomer forms a silicon oxide coating on the substrate and at least partially fills at least a portion of the at least one surface feature. Once cured, the silicon oxide coating has a low k and excellent mechanical properties. | 2018-03-01 |
20180061637 | SN DOPED ZNS NANOWIRES FOR WHITE LIGHT SOURCE MATERIAL - According to exemplary embodiments, a method of synthesizing tin (Sn)-doped Zinc Sulfide (ZnS) nanostructures for electroluminescent white light source includes coating a substrate, including a silicon oxide layer, with Sn by vacuuming depositing Sn as catalyst nanostructures on the substrate, placing the substrate coated with Sn in a furnace, introducing a carrier flow gas into the furnace, adding a ZnS power to the furnace, growing ZnS nanostructures, and dissolving Sn in the growing ZnS nanostructures. The S vacancies are on a surface of the ZnS nanostructures. The ZnS nanostructures are grown on the substrate having a temperature in a range of 750° C. to 850° C. | 2018-03-01 |
20180061638 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - The yield of a manufacturing process of a semiconductor device is increased. The productivity of a semiconductor device is increased. A first material layer is formed over a substrate, a second material layer is formed over the first material layer, and the first material layer and the second material layer are separated from each other, so that a semiconductor device is manufactured. In addition, a stack including the first material layer and the second material layer is preferably heated before the separation. The first material layer includes one or more of hydrogen, oxygen, and water. The first material layer includes a metal oxide, for example. The second material layer includes a resin (e.g., polyimide or acrylic). The first material layer and the second material layer are separated from each other by cutting a hydrogen bond. The first material layer and the second material layer are separated from each other in such a manner that water separated out by heat treatment at an interface between the first material layer and the second material layer or in the vicinity of the interface is irradiated with light. | 2018-03-01 |
20180061639 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - The yield of a manufacturing process of a semiconductor device is increased. The mass productivity of a semiconductor device is increased. A semiconductor device is manufactured by forming a first material layer over a substrate; forming a second material layer over the first material layer; and separating the first material layer and the second material layer from each other; and heating the first material layer and the second material layer that are stacked before the separation. The first material layer includes a gas containing hydrogen, oxygen, or hydrogen and oxygen (e.g., water) in a metal oxide, for example. The second material layer includes a resin. The first material layer and the second material layer are separated from each other by a break of a hydrogen bond. Specifically water is separated out at the interface or near the interface, and then adhesion is reduced due to the water present. | 2018-03-01 |
20180061640 | IN-SITU SPACER RESHAPING FOR SELF-ALIGNED MULTI-PATTERNING METHODS AND SYSTEMS - Methods and systems for in-situ spacer reshaping for self-aligned multi-patterning are described. In an embodiment, a method of forming a spacer pattern on a substrate may include providing a substrate with a spacer. The method may also include performing a passivation treatment to form a passivation layer on the spacer. Additionally, the method may include performing spacer reshaping treatment to reshape the spacer. The method may also include controlling the passivation treatment and spacer reshaping treatment in order to achieve spacer formation objectives. | 2018-03-01 |
20180061641 | APPARATUS AND METHOD FOR TREATING SUBSTRATE - Disclosed is an apparatus for treating a substrate. The apparatus includes a process executing module and a controller. The process executing module includes a plurality of process chambers, and a transfer chamber provided with a main robot configured to transfer the substrate between the process chambers. The controller controls the process executing module to sequentially perform a first coating process of forming a first coating layer by supplying a first coating liquid onto the substrate having a pattern, an etching process of removing the first coating layer, by supplying a chemical to the substrate, and a second coating process of forming a second coating layer by supplying a second coating liquid onto the substrate. The process chambers include a first chamber configured to perform the first coating process, and a second chamber configured to perform the second coating process. | 2018-03-01 |
20180061642 | METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device includes forming a first metal layer on a semiconductor substrate and forming a second metal layer on the first metal layer. The second metal layer is formed of a different metal than the first metal layer. Microwave radiation is applied to the semiconductor substrate, first metal layer, and second metal layer to form an alloy comprising components of the first metal layer, second metal layer, and the semiconductor substrate. | 2018-03-01 |
20180061643 | METHOD FOR PRODUCING THIN FILM TRANSISTOR AND THIN FILM TRANSISTOR - A method for producing a thin film transistor and a thin film transistor that can suppress deterioration and variation in performance are provided. A method for producing a thin film transistor includes: forming an organic semiconductor layer on a first main surface of a substrate; forming a first conductive layer on the organic semiconductor layer, while forming a second conductive layer on a second main surface of the substrate; forming mask layers collectively on the first conductive layer and the second conductive layer; and bringing the first conductive layer and the second conductive layer collectively into contact with etching liquid so that partial regions of the first conductive layer and the second conductive layer are removed, so as to form a source electrode and a drain electrode on the organic semiconductor layer, while to form a gate electrode on the second main surface of the substrate. | 2018-03-01 |
20180061644 | METHODS FOR FORMING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICES - A semiconductor device and method is disclosed. In one example, the method for forming a semiconductor device includes forming a trench extending from a front side surface of a semiconductor substrate into the semiconductor substrate. The method includes forming of material to be structured inside the trench. Material to be structured is irradiated with a tilted reactive ion beam at a non-orthogonal angle with respect to the front side surface such that an undesired portion of the material to be structured is removed due to the irradiation with the tilted reactive ion beam while an irradiation of another portion of the material to be structured is masked by an edge of the trench. | 2018-03-01 |
20180061645 | ASYMMETRIC HIGH-K DIELECTRIC FOR REDUCING GATE INDUCED DRAIN LEAKAGE - An asymmetric high-k dielectric for reduced gate induced drain leakage in high-k MOSFETs and methods of manufacture are disclosed. The method includes performing an implant process on a high-k dielectric sidewall of a gate structure. The method further includes performing an oxygen annealing process to grow an oxide region on a drain side of the gate structure, while inhibiting oxide growth on a source side of the gate structure adjacent to a source region. | 2018-03-01 |
20180061646 | ASYMMETRIC HIGH-K DIELECTRIC FOR REDUCING GATE INDUCED DRAIN LEAKAGE - An asymmetric high-k dielectric for reduced gate induced drain leakage in high-k MOSFETs and methods of manufacture are disclosed. The method includes performing an implant process on a high-k dielectric sidewall of a gate structure. The method further includes performing an oxygen annealing process to grow an oxide region on a drain side of the gate structure, while inhibiting oxide growth on a source side of the gate structure adjacent to a source region. | 2018-03-01 |
20180061647 | METHOD OF FABRICATING ELECTRICALLY ERASABLE PROGRAMMABLE NON-VOLATILE MEMORY CELL STRUCTURE - A NVM cell structure includes a semiconductor substrate having a first conductivity type, a first well region having a second conductivity type, a floating gate transistor and an erase gate region. The first well region is disposed on a first OD region of the semiconductor substrate. The erase gate region disposed on a second OD region of the semiconductor substrate includes a first doped region and at least one second doped region having the second conductivity type. The first doped region is disposed in semiconductor substrate and covers the second OD region, and the second doped region is disposed in the first doped region. The first doped region encompasses the second doped region, and a doping concentration of the second doped region is larger than a doping concentration of the first doped region. | 2018-03-01 |
20180061648 | DEPOSITION OF SMOOTH METAL NITRIDE FILMS - In one aspect, methods of forming smooth ternary metal nitride films, such as Ti | 2018-03-01 |
20180061649 | APPARATUS AND METHOD FOR TREATING SUBSTRATE - Disclosed are an apparatus and a method for treating a substrate. The method includes repeatedly rotating the substrate alternately at a first speed and at a second speed while the treatment liquid is supplied, and the second speed is higher than the first speed. | 2018-03-01 |
20180061650 | HIGH DRY ETCH RATE MATERIALS FOR SEMICONDUCTOR PATTERNING APPLICATIONS - Methods and apparatuses for depositing low density spacers using atomic layer deposition for negative patterning schemes are provided herein. Methods involve one or more of: (1) exposing a substrate to a plasma for a duration less than about 300 ms in each cycle of alternating pulses of a deposition precursor and oxidizing plasma; (2) exposing the substrate to the plasma at a radio frequency power density of less than about 0.2 W/cm | 2018-03-01 |
20180061651 | METHODS OF MEASURING ELECTRICAL CHARACTERISTICS DURING PLASMA ETCHING - Wafers processed by methods of plasma etching are disclosed. In one embodiment, a wafer is prepared by a process including positioning the wafer within a chamber of a plasma etcher, generating plasma ions using a radio frequency power source and a plasma source gas, directing the plasma ions toward the wafer using an electric field, focusing the plasma ions using a plasma focusing ring to increase a flux of plasma ions arriving at a surface of the wafer, and etching a plurality of through-wafer vias in the wafer. | 2018-03-01 |
20180061652 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A trench is formed at an exposed portion of a semiconductor substrate by performing a dry etching process with a hard mask of silicon oxide film serving as an etching mask in a dry etching device. At this time, a mixed gas of tetrafluoromethane (CF | 2018-03-01 |
20180061653 | METHOD OF QUASI-ATOMIC LAYER ETCHING OF SILICON NITRIDE - A method of etching is described. The method includes providing a substrate having a first material containing silicon nitride and a second material that is different from the first material, forming a first chemical mixture by plasma-excitation of a first process gas containing H and optionally a noble gas, and exposing the first material on the substrate to the first chemical mixture. Thereafter, the method includes forming a second chemical mixture by plasma-excitation of a second process gas containing N, F, O, and optionally a noble element, and exposing the first material on the substrate to the second plasma-excited process gas to selectively etch the first material relative to the second material. | 2018-03-01 |
20180061654 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING APPARATUS - In accordance with an embodiment, a manufacturing method of a semiconductor device includes bringing a first catalyst into contact with a workpiece to form an oxide film on a surface of the workpiece, and bringing a second catalyst different from the first catalyst and the oxide film into contact with each other or moving the second catalyst and the oxide film closer to each other to elute the oxide film into a treatment liquid. | 2018-03-01 |
20180061655 | METHOD OF PROCESSING TARGET OBJECT - A method of processing a target object is provided. The target object includes a first protrusion portion, a second protrusion portion, an etching target layer and a groove portion. The groove portion is provided on a main surface of the target object, provided on the etching target layer and defined by the first and the second protrusion portions. An inner surface of the groove portion is included in the main surface. In the method, a first sequence is repeatedly performed N times (N is an integer equal to or larger than 2). The first sequence includes (a) forming a protection film conformally on the main surface in a processing vessel of a plasma processing apparatus in which the target object is accommodated; and (b) etching a bottom portion of the groove portion with plasma of a gas generated within the processing vessel after the process a is performed. | 2018-03-01 |
20180061656 | METHOD FOR FORMING SEMICONDUCTOR STRUCTURE - A method for forming a semiconductor structure includes following steps. A substrate is provided, and a semiconductor layer is formed on the substrate. Next, a SiN-rich pre-oxide layer is formed on the semiconductor layer. After forming the SiN-rich pre-oxide layer, an anneal treatment is performed to partially transfer the SiN-rich pre-oxide layer to form a SiN layer and a SiO layer. And the SiO layer is formed the on the SiN layer. Subsequently, a planarization process is performed to remove a portion of the SiO layer to expose the SiN layer. | 2018-03-01 |
20180061657 | Substrate Processing Method - There is provided a substrate processing method performed on a substrate having a recess formed in a surface thereof, a first silicon-containing film formed on a bottom surface of the recess, a second silicon-containing film formed on both sides of the recess, the method including: depositing a carbon-based deposit on the surface of the substrate; removing the first silicon-containing film by performing a COR (Chemical Oxide Removal) process in which a silicon-containing film is modified to a reaction product using a processing gas, on the substrate; and removing the deposited carbon-based deposit. | 2018-03-01 |
20180061658 | Self-Aligned Patterning Process Utilizing Self-Aligned Blocking and Spacer Self-Healing - A multiple patterning process is provided with a self-aligned blocking (SAB) technique. The SAB technique trades off difficult overlay requirements for more manageable etch selectivity requirements between the various layers utilized for the patterning process. As disclosed herein, damage to sidewalls resulting from etching at the self-aligned block masking step may still occur. Damage is repaired by providing a plug layer that fills the areas of the damaged spacers. The plug layer may be the same material as forms the spacers. In this manner, the fill process provides a self-healing mechanism for damaged spacers. | 2018-03-01 |
20180061659 | SILICON-BASED DEPOSITION FOR SEMICONDUCTOR PROCESSING - A method for processing a substrate in a processing chamber, comprising forming a deposition over the substrate is provided. A silicon containing gas is flowed into the processing chamber. A COS containing gas is flowed into the processing chamber. A plasma is formed from the silicon containing gas and the COS containing gas in the processing chamber, wherein the plasma provides the deposition over the substrate. | 2018-03-01 |
20180061660 | Barrier Layer Formation Using Thermal Processing - A method of fabricating a semiconductor device includes forming a barrier layer over a surface of a semiconductor substrate. A treated barrier layer is formed by subjecting an exposed surface of the barrier layer to a surface treatment process. The surface treatment process includes treating the surface with a reactive material. A material layer is formed over the treated barrier layer. The material layer comprises a metal. | 2018-03-01 |
20180061661 | THIN FILM TRANSISTOR SUBSTRATE, DISPLAY PANEL, AND LASER ANNEALING METHOD - A thin film transistor substrate includes a plurality of thin film transistors arranged in columns and rows respectively on a substrate. Each of the thin film transistors includes a laser annealed part in which an amorphous silicon layer that forms a channel region is laser annealed to be a polysilicon layer, each laser annealed part is disposed with a designed pitch in a scanning direction in which a laser light for laser annealing and the substrate move relatively to each other, and the laser annealed part is provided within a channel width formed in a direction orthogonal to the scanning direction and being narrower than the channel width. | 2018-03-01 |
20180061662 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device including: a semiconductor substrate; a first coil formed on the semiconductor substrate via a first insulation film; a second insulation film formed on the semiconductor substrate so as to cover the first insulation film and the first coil; a first pad formed on the second insulation film and disposed at a position not overlapped with the first coil in a planar view; a laminated insulation film formed on the second insulation film, the laminated insulation film having a first opening from which the first pad is exposed; a second coil formed on the laminated insulation film and disposed above the first coil; and a first wiring formed on the laminated insulation film including an upper portion of the first pad exposed from the first opening, the first wiring being electrically connected to the first pad. | 2018-03-01 |
20180061663 | CONTINUOUS AND PULSED RF PLASMA FOR ETCHING METALS - Methods for etching tungsten and other metal or metal-containing films using a nitrogen-containing etchant gas are provided. The methods involve exposing the film to a continuous wave (CW) plasma and switching to a pulsed plasma toward the end of the etching operation. The pulsed plasma has a lower concentration of nitrogen radicals and can mitigate the effects of nitridation on the tungsten surface. In some embodiments, subsequent deposition on etched surfaces is performed with no nucleation delay. Apparatuses for performing the methods are also provided. | 2018-03-01 |
20180061664 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device includes forming a reference pattern in an inspection pattern formation region, forming a first mask layer over a semiconductor substrate, while forming a first inspection pattern in the inspection pattern formation region, and measuring a first amount of misalignment of the first inspection pattern with respect to the reference pattern. The method further includes implanting ions into the semiconductor substrate using a first mask layer, removing the first mask layer and the first inspection pattern and then forming a second mask layer over the semiconductor substrate, while forming a second inspection pattern in the inspection pattern formation region, and measuring a second amount of misalignment of the second inspection pattern with respect to the reference pattern. In plan view, the second inspection pattern is larger than the first inspection pattern and covers the entire region where the first inspection pattern is formed. | 2018-03-01 |
20180061665 | METHODS OF FORMING SEMICONDUCTOR DEVICE STRUCTURES INCLUDING TWO-DIMENSIONAL MATERIAL STRUCTURES - A method of forming a semiconductor device structure comprises forming at least one 2D material over a substrate. The at least one 2D material is treated with at least one laser beam having a frequency of electromagnetic radiation corresponding to a resonant frequency of crystalline defects within the at least one 2D material to selectively energize and remove the crystalline defects from the at least one 2D material. Additional methods of forming a semiconductor device structure, and related semiconductor device structures, semiconductor devices, and electronic systems are also described. | 2018-03-01 |
20180061666 | Method for Producing a Metal-Ceramic Substrate with at Least One Via - A method for producing a metal-ceramic substrate with at least one electrically conductive via, in which one metal layer, respectively, is attached in a planar manner to a ceramic plate or a ceramic layer to each of two opposing surface sides of the ceramic layer is provided. The method includes introducing a metal-containing, powdery and/or liquid substance into a hole in the ceramic layer delimiting the via prior to the attachment of both metal layers, or subsequent to the attachment of one of the two metal layers to form an assembly. Prior to the attachment of the other one of the two metal layers, and the assembly is subjected to a high-temperature step above 500° C. in which the metal-containing substance wets the ceramic layer at least partially with a wetting angle of less than 90°. | 2018-03-01 |
20180061667 | SEMICONDUCTOR PACKAGE WITH MULTIPLE MOLDING ROUTING LAYERS AND A METHOD OF MANUFACTURING THE SAME - Embodiments of the present invention are directed to a method of manufacturing a semiconductor package with an internal routing circuit. The internal routing circuit is formed from multiple molding routing layers in a leadframe land grid array semiconductor package by using a laser to blast away un-designed conductive areas to create conductive paths on each molding compound layer of the semiconductor package. | 2018-03-01 |
20180061668 | Integrated Circuit Package Pad and Methods of Forming - A semiconductor device and method for forming the semiconductor device is provided. The semiconductor device includes an integrated circuit having through vias adjacent to the integrated circuit die, wherein a molding compound is interposed between the integrated circuit die and the through vias. The through vias have a projection extending through a patterned layer, and the through vias may be offset from a surface of the patterned layer. The recess may be formed by selectively removing a seed layer used to form the through vias. | 2018-03-01 |
20180061669 | Semiconductor Device and Method - A method of manufacturing a semiconductor device includes placing a polymer raw material mixture over a substrate. The polymer raw material may include a polymer precursor, a photosensitizer, and an additive. The polymer raw material mixture is exposed to radiation to form a dielectric layer and cured at a temperature of between about 150° C. and about 230° C. | 2018-03-01 |
20180061670 | ELECTRONIC COMPONENT - An electronic component capable of downsizing and narrowing of a mounting space. The electronic component includes: a laminated body made up of a plurality of laminated insulator layers and having an upper surface and a bottom surface; a plurality of inner conductors disposed in the laminated body; and a plurality of terminal electrodes electrically connected to the plurality of inner conductors and exposed from the laminated body. The electronic component has a plurality of recesses formed on a bottom surface of the laminated body. The plurality of terminal electrodes includes first conductive parts formed on wall surfaces of the plurality of recesses. | 2018-03-01 |