10th week of 2022 patent applcation highlights part 68 |
Patent application number | Title | Published |
20220077796 | MOTOR CONTROLLER - A motor controller is configured to stabilize a motor current. The motor controller is used for driving a motor, where the motor has a motor coil. The motor controller comprises a switch circuit, a control unit, a command unit, a counting unit, a comparing unit, and a phase detecting unit. The switch circuit is used for supplying the motor current to the motor coil. The phase detecting unit generates a phase signal to the control unit, so as to inform the control unit to switch phases. The control unit generates a plurality of control signals to control the switch circuit. The motor controller resets the counting unit based on the phase signal, such that the control signals are synchronized with the phase signal for stabilizing the motor current. | 2022-03-10 |
20220077797 | SYSTEM AND METHOD FOR CONTROLLING DRIVETRAIN DAMPING DURING MULTIPLE LOW-VOLTAGE RIDE THROUGH EVENTS - A method for operating a power generation system having a drivetrain connected to an electrical grid during one or more grid transient events includes receiving an indication of the one or more grid transient events occurring in the electrical grid. The method also includes selecting between a first set of drivetrain damping control settings or a different, set second set of drivetrain damping control settings based on the indication. The first set of drivetrain damping control settings is for handling a single, first grid transient event, whereas the second set of drivetrain damping control settings is for handling additional, subsequent grid transient events following the first transient event. The method also includes controlling the power generation system based on the selected first or second sets of the drivetrain damping control settings such that the power generation system can remain connected to the electrical grid during the grid transient event(s). | 2022-03-10 |
20220077798 | MULTI-STAGE SERIAL TURBO-GENERATOR SYSTEM FOR SUPERCRITICAL CO2 POWER CYCLES - A supercritical CO | 2022-03-10 |
20220077799 | APPARATUS AND METHOD FOR ASCERTAINING A ROTOR POSITION, AND ELECTRIC DRIVE SYSTEM - Signal processing for determining a rotor position without the use of encoders. To this end, test signals are applied to the electrical currents in the phase connections of an electric machine, and the total currents in the phase connections of the electric machine are measured. The current responses to the test signals are determined by establishing the difference between the measured phase currents and the setpoint-value settings for the phase currents. On the basis of this difference, any method for calculating the rotor angle position can be performed. | 2022-03-10 |
20220077800 | ADJUSTMENT SUPPORT DEVICE, SERVO DRIVER, CONTROL PARAMETERS ADJUSTMENT METHOD FOR PLURALITY OF SERVO MOTORS, AND PROGRAM - A technique enables control parameter adjustment with a more accurate estimated inertia ratio for multiple servomotors. An adjustment support apparatus ( | 2022-03-10 |
20220077801 | MAGNETIC FLUX ESTIMATE - Examples include a method for controlling a synchronous motor using a variable speed drive. The motor includes a permanent magnet rotor generating a magnetic flux. The method includes applying a predefined electrical command signal to the motor and estimating a motor speed in response to the applying of the predefined electrical command signal. The method also includes reaching a desired estimated motor speed and, in response to reaching the desired estimated motor speed, estimating a parameter related to the magnetic flux of the permanent magnet rotor. The method further includes recording the estimated parameter. | 2022-03-10 |
20220077802 | CONTROL DEVICE - A control device controls a motor which includes a first stator coil and a second stator coil insulated from each other. The control device includes: a first drive circuit that is connected to the first stator coil; a second drive circuit that is connected to the second stator coil; a first processing circuit; and a second processing circuit. The first processing circuit increases an output of an integral element according to the number of control systems when the second processing circuit performs a process of switching a first use and operation process to a second use and operation process. | 2022-03-10 |
20220077803 | VARIABLE SPEED DRIVE AND TORQUE SENSOR - Examples include a method for controlling a variable speed drive of an electric motor. The variable speed drive is connected to a torque sensor for sensing a torque supplied by the electric motor. The method includes performing, by the electric motor, a predetermined torque sequence. The method also includes measuring, by the torque sensor, a measured torque sequence corresponding to the predetermined torque sequence, and comparing the predetermined torque sequence and the measured torque sequence. As a result of the comparison, one or more torque sensor transfer function parameters are determined. | 2022-03-10 |
20220077804 | MOTOR APPARATUS FOR A SWITCH DRIVE OF AN ELECTRICAL SWITCH - A motor apparatus for a switch drive of an electric switch has an electric motor and a control apparatus for controlling the electric motor. The control apparatus has a power supply device for the electrical power supply of the electric motor. The electric power supply has a rectifier unit, a voltage measurement unit for detecting the supply voltage or a rectifier output voltage of the rectifier unit, a switch unit for generating a drive voltage for the electric motor from the supply voltage or from the rectifier output voltage, and a control unit for controlling the switch unit as a function of the supply or rectifier output voltage detected. Accordingly, the motor apparatus has a motor housing which, besides the electric motor, houses part of the power supply device and/or at least part of the control unit. | 2022-03-10 |
20220077805 | MOTOR CONTROL APPARATUS AND METHOD OF OPERATING THE SAME - A motor control apparatus receives a DC power source through a DC terminal and is coupled to a motor. The motor control apparatus includes a brake, an inverter, and a controller. The brake is coupled to the inverter. The brake includes an energy-consuming component and a switch component. The controller controls the inverter to convert the DC power source to drive the motor. When the controller determines that the DC power source is interrupted, the controller stops controlling the inverter, and the switch component is self-driven turned on so that a back electromotive force generated by the motor is consumed through the energy-consuming component. | 2022-03-10 |
20220077806 | MOTOR DRIVE DEVICE AND AIR CONDITIONER - A motor drive device that drives motors with one inverter includes a step-out control unit that detects step-out in which the operating frequency of at least one of the motors does not match the inverter output frequency, or the operating frequency of at least one of the motors does not match the operating frequency of another one of the motors, and stops the motors by switching an energization state of the inverter when at least one of the motors is out of step. | 2022-03-10 |
20220077807 | MOTOR DRIVING DEVICE AND METHOD - A motor driving device drives a motor having a plurality of windings corresponding to a plurality of phases. The motor driving device includes: a first inverter configured to include a plurality of first switching elements and connected to first stages of the plurality of windings; a second inverter configured to include a plurality of second switching elements and connected to second stages of the plurality of windings; and a controller configured to fix switching states of the second switching elements and switch the first switching elements to compose target voltage vectors if the motor is driven in an open end winding type by operating the first inverter and the second inverter in a space vector pulse width modulation mode. | 2022-03-10 |
20220077808 | MOTOR CONTROL SYSTEM AND METHOD OF CONTROLLING THE SAME - A motor control system is coupled to an input power source and a motor. The motor control system includes an inverter, a brake, and a controller. The inverter includes a plurality of upper-bridge transistors and a plurality of lower-bridge transistors, and the brake includes a plurality of loop switches. Each loop switch includes a first end, a second end, and a third end, and the third ends are respectively coupled to control ends of the lower-bridge transistors. The controller is coupled to the first end, and when the controller detects that the input power source is greater than a low-voltage protection value, the controller controls the third end to be coupled to the first end, and provides an upper-bridge drive signal assembly to operate each upper-bridge transistor, and provides a lower-bridge drive signal assembly to operate each lower-bridge transistor. | 2022-03-10 |
20220077809 | CONTROL DEVICE FOR MOTOR - A control device for a motor including a first coil and a second coil which are insulated from each other is provided. The control device includes a first circuit and a second circuit that switches a first process to a second process when the first circuit fails. The external circuit generates an instruction for performing a process of increasing an amount of operation which is calculated by one of the first circuit and the second circuit according to the number of control systems when the other of the first circuit and the second circuit fails. | 2022-03-10 |
20220077810 | THERMAL CONTROL FOR VEHICLE MOTOR - The disclosed computer-implemented method optimizes thermal control of a vehicle motor, the vehicle including a cooling device including an actuator varying cooling capacity, the method including training a reinforcement learning algorithm including the iterative steps: 1) determining an action to control an actuator by applying a control function to a current state of the thermal system, and implementing the action; 2) determining a modified state of the thermal system after implementing the action; 3) calculating, by implementing a thermodynamic reward function of the motor, a reward value based on the modified state of the thermal system, and the action; 4) updating a function for estimating thermal performance based on the current state of the thermal system, the modified state of the thermal system, the action and the reward; and 5) modifying the control function based on the update of the function for estimating thermal performance. | 2022-03-10 |
20220077811 | METHOD AND APPARATUS FOR CONTROLLING PERMANENT MAGNET MOTOR, POWER SYSTEM AND ELECTRIC VEHICLE - A method and an apparatus for controlling a permanent magnet motor, a power system and an electric vehicle. A power frequency of the permanent magnet motor is set by obtaining system parameters such as a resonance bandwidth of the permanent magnet motor and a natural frequency of a stator of the permanent magnet motor, and the permanent magnet motor is supplied power by using alternating current at the power frequency when a power battery meets a self-heating condition. Noises generated by the motor is reduced during a self-heating process of the power battery. | 2022-03-10 |
20220077812 | Electricity Generation System and Method - A system includes a solar panel unit comprising at least one solar panel connected to a respective molten salt cell, a wind motor unit comprising at least one wind motor that is powered by the solar panel unit, each wind motor having a channel, a turbine unit comprising at least one turbine, each turbine associated with a respective wind motor via the channel, the turbine unit powered by the wind motor unit, a first battery receiving and storing power generated by the turbine unit to be used by the system, a second battery receiving and storing power generated by the turbine unit for use outside of the system, and a housing that protects at least the wind motor unit and the turbine unit. | 2022-03-10 |
20220077813 | HYBRID POWER PLANT OPTIMIZATION FOR INCLEMENT WEATHER - Embodiments herein describe optimizations for hybrid power plants that include wind turbine generators and photovoltaic generators by determining solar tracking setpoints for a field of photovoltaic generators co-located with a wind turbine generator, wherein the solar tracking setpoints orient a collector face for each photovoltaic generator sunward; in response to determining based on data received from the wind turbine generator that an airborne impactor event is occurring, adjusting the solar tracking setpoints to reposition the collector face out of a trajectory for airborne impactors; and transmitting the setpoints to tracking motors for the photovoltaic generators of the field. | 2022-03-10 |
20220077814 | METALLURGICAL STEEL POST DESIGN FOR SOLAR FARM FOUNDATIONS AND INCREASED GUARDRAIL DURABILITY - A high-grade post or pile system for the foundation of a solar array, which may facilitate the installation of a solar array rack in more corrosive soils. Such a post may also satisfy the need for a foundation able to resist ground forces, in particular the effects of wind on the exterior of the array, and may reduce problems with beam refusal. The post may be used in other applications such as guardrail posts. In contrast to existing posts for solar arrays, the high-grade post may be formed from higher-grade steel. | 2022-03-10 |
20220077815 | Waterproofing Mounting System for Attaching Solar Modules to a Roof - A roof mounting system for the attachment of an article to a roof, the system comprising a plurality of PV modules each having at least one corner and a frame member, a flashing member having a top surface; an upstanding sleeve attached to the top surface of the flashing member; an elevated water seal having a borehole formed therethrough, the elevated water seal further comprising at least one screw for providing a waterproof seal between the article and the roof structure; and whereby the plurality of PV modules are interlocked in a way to provide a corner-to-corner coupling arrangement supported above the roof through the frame members of the plurality of PV modules. | 2022-03-10 |
20220077816 | DISTRIBUTED LOCKING TRACKER - A solar tracker including a torque tube, a plurality of bearings configured to receive the torque tube, a plurality of piers each configured to receive one of the plurality of bearings, and a lock-out device mounted on one of the plurality of piers and operatively associated with at least one of the plurality of bearings, the lock out device configured to periodically engage and disengage openings formed in the bearings to limit movement of the torque tube and to transfer load from the torque tube to the pier on which it is mounted. | 2022-03-10 |
20220077817 | BIFACIAL PHOTOVOLTAIC SOLAR PANEL AND SOLAR PANEL ASSEMBLY - A bifacial photovoltaic solar panel and solar panel assembly. The panel includes at least one transparent layer; bifacial photovoltaic cells positioned and arranged to absorb irradiance incident thereon on both sides; and at least one optical element. To form the assembly, the panel is connected to a mounting assembly. When in use, the mounting assembly obscures at least a portion of the panel second side, some cells receiving less irradiance via the panel second side than other cells due to the mounting assembly obscuration, and the optical element is arranged to direct irradiance incident thereon via the panel first side onto the first sides of the subset of cells whereby at least a portion of irradiance having been prevented from reaching the second sides of the cells by the mounting assembly is compensated for by irradiance reflected by the optical element onto the first sides of the cells. | 2022-03-10 |
20220077818 | PHOTOVOLTAIC MODULE - A photovoltaic module can include a solar cell module including a plurality of solar cells; a converter configured to convert a level of DC power input from the solar cell module; a DC-terminal capacitor configured to store DC power output from the converter; an inverter including a plurality of switching elements and configured to convert DC power from the DC-terminal capacitor into AC power; and a controller configured to control the inverter, in which the converter controls some switching elements among of the plurality of switching elements included in the inverter to perform switching at a third switching frequency, and controls other switching elements among the plurality of switching elements included in the inverter to perform switching at a forth switching frequency higher than the third switching frequency. | 2022-03-10 |
20220077819 | Systems and Methods for an Enhanced Watchdog in Solar Module Installations - Systems and methods for automatically or remotely rendering a solar array safe during an emergency or maintenance. A watchdog unit is disclosed for monitoring a signal from a central controller. If the signal is lost, interrupted, or becomes irregular, or if a shutdown signal is received, then the watchdog unit can shut down one or more solar modules. Shutting down a solar module can mean disconnecting it from a power bus of the solar array or lowering the solar module voltage to a safe level. | 2022-03-10 |
20220077820 | METHOD AND SYSTEM FOR SOAR PHOTOVOLTAIC POWER STATION MONITORING - Disclosed are a method and a system for solar photovoltaic power station and the system includes: an unmanned aerial vehicle flying over the sky of a plurality of solar photovoltaic panels included in a solar photovoltaic power station and obtaining and providing a monitoring image by photographing the solar photovoltaic panel; and a computing device correcting the monitoring image and obtaining the corrected monitoring image, and executing a solar photovoltaic power station monitoring application of performing a malfunction area inspection process for the solar photovoltaic panel based on the obtained corrected monitoring image. | 2022-03-10 |
20220077821 | OSCILLATING CIRCUIT - An oscillating circuit comprises a constant voltage supply circuit, a constant current supply circuit and an oscillating circuit; the constant voltage supply circuit is configured to output constant voltage; the constant current supply circuit is configured to output constant current; and the oscillating circuit is connected to the constant voltage supply circuit and the constant current supply circuit, and is configured to generate an oscillating signal with a preset frequency according to the constant voltage and the constant current. | 2022-03-10 |
20220077822 | CRYSTAL OSCILLATOR AND STARTUP METHOD FOR A CRYSTAL OSCILLATOR - A crystal oscillator and a startup method for initiating operation of a crystal oscillator, the crystal oscillator includes an oscillator structure including a crystal resonator and an electronic oscillator circuit connected to the crystal resonator, the oscillator structure having a first terminal and a second terminal, a startup controller operable to initiate an oscillation in the oscillator structure by exciting the oscillator structure with a sequence of excitation signals derivable from a clock signal and when triggered by a timing signal, the sequence of excitation signals includes at least a first excitation signal and a second excitation signal, a comparator including a first and a second input terminal and an output terminal, the first input terminal being connected to the first terminal and wherein the second input terminal is connected to the second terminal. | 2022-03-10 |
20220077823 | CRYSTAL OSCILLATOR, CHIP, AND ELECTRONIC DEVICE - Disclosed are a crystal oscillator, a chip, and an electronic device. The crystal oscillator includes: an oscillating circuit, including: a crystal, an amplification circuit, a first load capacitor, and a second load capacitor, where the first load capacitor and the second load capacitor are respectively connected to a first terminal and a second terminal of the crystal; and a first Miller multiplication circuit, where an input terminal and an output terminal of the first Miller multiplication circuit are respectively connected to two terminals of the first load capacitor, and the first Miller multiplication circuit is configured to increase a first load capacitance of the oscillating circuit, where the first load capacitance is a capacitance between the first terminal of the crystal and the ground. According to this technical solution, an area occupied by the load capacitor as well as circuit costs can be reduced. | 2022-03-10 |
20220077824 | PASSIVE WIDEBAND MIXER - The invention discloses a passive wideband mixer, including a local oscillator balun, a radio frequency balun, a first diode D | 2022-03-10 |
20220077825 | Digital Doherty Transmitter - A digital Doherty amplifier compromises a baseband signal processing block including a digital predistortion unit, a digital signal distribution unit and a digital phase alignment unit; a signal up-conversion block, an RF power amplification block, the RF power amplification block including the carrier amplifier and one or two peaking amplifiers; and a RF Doherty combining network. In another aspect, a digital Doherty amplifier compromises a baseband signal block including a digital predistortion unit, a digital signal distribution unit and an adaptive digital phase alignment unit; a signal up-conversion block; a signal up-conversion block, the signal up-conversion block including three digital-to-analog converters (DACs) and a tri-channel up-converter or three single-channel up-converters; a RF power amplification block, the RF power amplification block including the carrier amplifier and two peaking amplifiers; and an RF Doherty combining network which includes quarter wavelength impedance transformers. | 2022-03-10 |
20220077826 | Distributed Conversion of Digital Data to Radio Frequency - Provided are, among other things, systems, apparatuses methods and techniques for converting digital data to radio-frequency (RF) signals. One such apparatus includes a reactive-impedance network within which the levels of multiple binary waveforms are individually boosted, before being combined to produce a single, composite output signal. | 2022-03-10 |
20220077827 | Wideband Amplifier Tuning - Circuit and methods using a single low-noise amplifier (LNA) to provide amplification for a wide band of RF frequencies while maintaining high gain and a low noise factor. Embodiments include an amplifier circuit including an input signal path for receiving a wideband RF signal; a switched inductor tuning block coupled to the input signal path and configured to selectively couple one of a plurality of inductances to the input signal path; and an amplifier coupled to the switched inductor tuning block and configured to receive the RF signal after passage through the selected coupled inductance. The switched inductor tuning block includes a plurality of selectable branches, each including an RF input switch; an RF output switch; an inductor coupled between the RF input switch and the RF output switch; and first and second shunt switches coupled between a respective terminal of the inductor and circuit ground. | 2022-03-10 |
20220077828 | POWER AMPLIFYING CIRCUIT - A power amplifying circuit includes a first amplifier, a second amplifier, a transformer having a primary winding and a secondary winding, and a capacitor. The first amplifier amplifies a signal which is one of differential signals. The second amplifier amplifies a signal which is the other of the differential signals. The primary winding is connected, at its first end, to the first amplifier, and is connected, at its second end, to the second amplifier. The secondary winding is connected, at its first end, to an unbalanced line through which an unbalanced signal is transmitted, and is connected, at its second end, to the ground. The secondary winding is electromagnetically coupled to the primary winding. The capacitor is connected, at its first end, to the midpoint of the primary winding, and is connected, at its second end, to the ground. | 2022-03-10 |
20220077829 | CHOPPER AMPLIFIERS WITH LOW INTERMODULATION DISTORTION - Chopper amplifiers with low intermodulation distortion (IMD) are provided. To compensate for IMD, at least one distortion compensation channel is included in parallel with chopper amplifier circuitry of a main signal channel. Additionally, output selection switches are included for selecting between the output of the main signal path and the distortional compensation channel(s) over time to maintain the output current continuous. Such IMD compensation can be realized by filling in missing current of the main signal channel using the distortion compensation channel(s), or by using channel outputs only when they have settled current. | 2022-03-10 |
20220077830 | COMPENSATION OF COMMON MODE VOLTAGE DROP OF SENSING AMPLIFIER OUTPUT DUE TO DECISION FEEDBACK EQUALIZER (DFE) TAPS - A receiver including a first differential sense amplifier configured to amplify an input differential data signal to generate an output differential data signal; a first set of one or more differential decision feedback equalizer (DFE) taps configured to modify the output differential data signal based on a set of one or more differential tap signals, wherein the first set of one or more differential DFE taps affect an output common mode voltage associated with the output differential data signal; and a compensation circuit configured to adjusts the output common mode voltage to compensate for the effect on the output common mode voltage by the set of one or more differential DFE taps. The compensation circuit includes reference and replica receivers to generate reference and replica output common mode voltages, and a feedback circuit to adjust the output common mode voltage based on the reference and replica output common mode voltages. | 2022-03-10 |
20220077831 | OPERATIONAL AMPLIFIER - In an embodiment a differential pair for an input stage includes two identical branches in parallel, each branch including a first MOS transistor and a second MOS transistor arranged in series, wherein the first transistor and the second transistor have a channel of the same type, and wherein each of the first transistor and the second transistor has a gate coupled to the same corresponding input of the differential pair and a circuit configured to apply to each of the first transistors a potential difference between a source and a channel-forming region of the first transistor. | 2022-03-10 |
20220077832 | AMPLIFIER FOR A CONTACTLESS ELECTROMETER AND FEEDBACK CIRCUIT - An amplifier of a contactless electrometer, having feedback comprising an inverting integrator which is connected to the booster output, two series-connected p-n junctions connected by a common point thereof to the booster input, and a circuit for biasing the two series-connected p-n junctions in the reverse direction, wherein the mid point of the biasing circuit is connected to the output of the inverting integrator. | 2022-03-10 |
20220077833 | DRIVER CIRCUIT ARRANGEMENT FOR DRIVING LOAD AND DIFFERENTIAL DRIVE ARRANGEMENT THEREOF - A driver circuit arrangement for driving a load and a differential drive arrangement thereof are provided. The driver circuit arrangement employs a dual feedback configuration with a feedback resistor and a current sensor feedback arrangement. The current sensor feedback arrangement provides a current feedback path from the amplifier output to the amplifier input, and has a current sensor resistor connected in an output current path of the driver circuit arrangement. A current feedback amplifier is present connected to the current sensor resistor and to the amplifier input. | 2022-03-10 |
20220077834 | HYBRID PINNING PACKAGE FOR RADIO FREQUENCY FILTERS - Disclosed is a device and methods for making same. In one aspect, a device includes a package having at least four pins, and, within the package, a die that includes a filter circuit electrically coupled to the four pins. The filter can: receive, from a first pin, an input signal comprising first and second frequency components, produce, at a second pin, a first output signal of the first frequency component, and produce, at a third and fourth pin, a second output signal of the second frequency component; and/or receive, from a second pin, a first input signal comprising the first frequency component, receive, from a third or fourth pin, a second input signal comprising the second frequency component, and produce, at a first pin, an output signal comprising the first and second frequency components. The second pin is interposed between the third and fourth pins on the package. | 2022-03-10 |
20220077835 | LC FILTER - An LC filter includes a first capacitor electrode connected to one end of a first via conductor and faces a first ground electrode in a laminating direction. A second capacitor electrode is connected to one end of a second via conductor and faces the first ground electrode in the laminating direction. A third capacitor electrode is connected to one end of a third via conductor and faces the first ground electrode in the laminating direction. A fourth capacitor electrode is connected to one end of a fourth via conductor and faces the first ground electrode in the laminating direction. The second capacitor electrode faces each of the first capacitor electrode, the third capacitor electrode, and the fourth capacitor electrode in a direction orthogonal or substantially orthogonal to the laminating direction. | 2022-03-10 |
20220077836 | LC FILTER - An LC filter includes a first electrode connected to a first via conductor between two ends of the first via conductor, a second electrode connected to a second via conductor between two ends of the second via conductor, a third electrode connected to a third via conductor between two ends of the third via conductor, and a fourth electrode connected to a fourth via conductor between two ends of the fourth via conductor. In a plan view viewed from the laminating direction, the second via conductor and the fourth via conductor are disposed on two sides of a virtual line connecting the first via conductor and the third via conductor, respectively. The second electrode faces the first electrode and the third electrode. | 2022-03-10 |
20220077837 | ELECTRONIC DEVICE AND METHOD FOR OPERATING THE SAME - A wearable device and method for operating the same are provided. The wearable device includes an antenna element, a first matching circuit, a second matching circuit, and a switch element. The first matching circuit has a first impedance value. The second matching circuit has a second impedance value different from the first impedance value. The switch element is configured to determine whether the antenna element is electrically connected with the first matching circuit or the second matching circuit. | 2022-03-10 |
20220077838 | QUARTZ ORIENTATION FOR GUIDED SAW DEVICES - Guided Surface Acoustic Wave (SAW) devices with improved quartz orientations are disclosed. A guided SAW device includes a quartz carrier substrate, a piezoelectric layer on a surface of the quartz carrier substrate, and at least one interdigitated transducer on a surface of the piezoelectric layer opposite the quartz carrier substrate. The quartz carrier substrate includes an orientation that provides improved performance parameters for the SAW device, including electromechanical coupling factor, resonator quality factor, temperature coefficient of frequency, and delta temperature coefficient of frequency. | 2022-03-10 |
20220077839 | JOINED BODY AND SURFACE ACOUSTIC WAVE DEVICE - Provided is a joined body including a piezoelectric substrate and a polycrystalline spinel substrate provided on one main surface of the piezoelectric substrate, wherein a ratio T1/T2 between T1 and T2 is 0.1 or less, where the T1 represents an average thickness of the piezoelectric substrate and the T2 represents an average thickness of the polycrystalline spinel substrate, and the polycrystalline spinel substrate has a TTV of 1.5 μm or less in a main surface which contacts the piezoelectric substrate. | 2022-03-10 |
20220077840 | MULTI-LAYER PIEZOELECTRIC SUBSTRATE WITH CONTROLLABLE DELTA TEMPERATURE COEFFICIENT OF FREQUENCY - An electronic device includes a multi-layer piezoelectric substrate including a carrier substrate, a layer of piezoelectric material disposed on a front side of the carrier substrate, and a back-side layer of material disposed on a rear side of the carrier substrate, the back-side layer of material having a coefficient of thermal expansion different than a coefficient of thermal expansion of the carrier substrate, and one or more acoustic wave devices disposed on a front side of the multi-layer piezoelectric substrate, the one or more acoustic wave devices exhibiting a lesser difference in temperature coefficient of frequency at respective resonant and antiresonant frequencies than in a substantially similar device lacking the back-side layer of material. | 2022-03-10 |
20220077841 | PIEZOELECTRIC RESONATOR DEVICE - In a piezoelectric resonator device according to one or more embodiments, an internal space for hermetically sealing a vibrating part including a first excitation electrode and a second excitation electrode of a crystal resonator plate is formed by bonding a first sealing member and a second sealing member respectively to the crystal resonator plate. A through hole is formed in the second sealing member. A through electrode is formed along an inner wall surface of the through hole to establish conduction between an electrode formed on a first main surface and an external electrode terminal formed on a second main surface. A corrosion resistance structure to solder is formed on the through electrode that establishes conduction between the electrode and the external electrode terminal with a conductive metal other than Au. | 2022-03-10 |
20220077842 | INTEGRATION METHOD AND INTEGRATION STRUCTURE FOR CONTROL CIRCUIT AND BULK ACOUSTIC WAVE FILTER - The present disclosure provides an integration method and integration structure for a control circuit and a Bulk Acoustic Wave (BAW) filter. The integration method includes: providing a base, the base being provided with a control circuit: forming a first cavity on the base; providing a BAW resonating structure, an input electrode and an output electrode being arranged on a surface of the BAW resonating structure, and the BAW resonating structure including a second cavity; facing the surface of the BAW resonating structure towards the base, such that the BAW resonating structure is bonded to the base and seals the first cavity; and electrically connecting the control circuit to the input electrode and the output electrode. The present disclosure implements the control of the control circuit on the BAW filter by forming the control circuit and the cavity, required by the BAW filter, on the base, and then mounting the existing BAW resonating structure in the cavity, and thus may avoid the problems of the complex electrical connection process, large insertion loss and the like due to a fact that the existing BAW filter is integrated to the Printed Circuit Board (PCB) as a discrete device, has the high level of integration, and reduces the process cost. | 2022-03-10 |
20220077843 | SILVER-BONDED QUARTZ CRYSTAL - The disclosed technology generally relates to packaging a quartz crystal, and more particularly to bonding a quartz crystal using sintering silver paste. In one aspect, a method of packaging a quartz crystal comprises attaching a quartz crystal to a package substrate using one or more silver paste layers comprising silver particles. The method additionally comprises sintering the silver paste in a substantially oxygen-free atmosphere and at a sintering temperature sufficient to cause sintering of the silver particles. The sintering is such that the quartz crystal exhibits a positive drift in resonance frequency of the quartz crystal over time. The method further comprises hermetically sealing the quartz crystal in the package substrate. | 2022-03-10 |
20220077844 | INTEGRATION METHOD AND INTEGRATION STRUCTURE FOR CONTROL CIRCUIT AND SURFACE ACOUSTIC WAVE FILTER - The present disclosure provides an integration method and integration structure for a control circuit and a Surface Acoustic Wave (SAW) filter. The integration method includes: providing a base, the base being provided with a control circuit; forming a cavity on the base; providing an SAW resonating plate, an input electrode and an output electrode being arranged on a surface of the SAW resonating plate; facing the surface of the SAW resonating plate towards the base, such that the SAW resonating plate is bonded to the base and seals the cavity; and electrically connecting the control circuit to the input electrode and the output electrode. The present disclosure may control the SAW filter through the control circuit provided on the base, and may avoid the problems of the complex electrical connection process, large insertion loss and the like due to a fact that the existing SAW filter is integrated to the Printed Circuit Board (PCB) as a discrete device. | 2022-03-10 |
20220077845 | ELECTRONIC CIRCUIT WITH A TRANSISTOR DEVICE AND A BIASING CIRCUIT - Electronic circuits are disclosed. One electronic circuit includes: a transistor device having a load path and a drive input; a first drive circuit configured to receive a supply voltage and generate a drive signal for the transistor device based on the supply voltage; and a biasing circuit connected in parallel with the load path of the transistor device. The biasing circuit includes a bias voltage circuit configured to receive the supply voltage and generate a bias voltage higher than the supply voltage based on the supply voltage. | 2022-03-10 |
20220077846 | POWER CONTROLLER - An operation processing unit computes an amount of operation for adjusting electric power supplied to a load. A signal generator computes, based on an amount of operation, the number of switch elements to be turned on among switch elements and a duty ratio to be set for the number of switch elements to be turned on and generates, based on the determined number of switch elements and duty ratio, a signal for driving at least one of the switch elements. The signal generator includes a correction value operation unit that obtains a correction value based on a difference of an on-pulse width between a shunt current flowing through a corresponding one of the switch elements and a shunt drive signal for driving the corresponding one switch element, and a corrector that corrects, based on the correction value, an amount of operation output from the operation processing unit. | 2022-03-10 |
20220077847 | ELECTRONIC PERSISTENT SWITCH - Methods, systems, and computer readable media described herein can be operable to facilitate transitioning a device from a first state to a second state. A switch described herein allows for the use of an electronic circuit to perform the toggle and persistence functions while simultaneously giving more flexibility to the industrial design and physical switch implementation. The switch allows this preserving of the state using only a toggle on a voltage and thus allowing for a hardware only solution. The switch described herein allows for the use of smaller and less complicated mechanical switches allowing for more compact industrial designs. The switch uses a programmable voltage reference as a 1 bit non-volatile memory cell that is programmed by means of a logic pulse to the device. This allows a software independent setting of the state of the privacy switch. This state will remain through power cycles. | 2022-03-10 |
20220077848 | Microelectromechanical Tunable Delay Line Circuit - Tunable delay circuit devices have an input port, an output port, at least three parallel paths connecting the input port and the output port, on each path, an input switch and an output switch, and on each path, a plurality of shunt resonant tanks connected between the input switch and the output switch, each shunt resonant tank periodically chargeable from the input port and dischargeable to the output port by operation of the input switch and the output switch. | 2022-03-10 |
20220077849 | ELECTRONIC CIRCUITRY AND ELECTRONIC APPARATUS - According to one embodiment, electronic circuitry includes a first surge voltage detection circuit configured to detect a surge voltage generated due to switching of a switching device and generate a first signal indicating a first current; and a current generation circuit configured to generate a second current larger than the first current by amplifying a current in response to input of the first signal and output the second current to a control terminal of the switching device. | 2022-03-10 |
20220077850 | THYRISTOR CONTROL DEVICE - A control device includes a triac and a first diode that is series-connected between the triac and a first terminal of the device that is configured to be connected to a cathode gate of a thyristor. A second terminal of the control device is configured to be connected to an anode of the thyristor. The triac has a gate connected to a third terminal of the device that is configured to receive a control signal. The thyristor is a component part of one or more of a rectifying bridge circuit, an in-rush current limiting circuit or a solid-state relay circuit. | 2022-03-10 |
20220077851 | ELECTRONIC CIRCUITRY AND POWER CONVERTER - Electronic circuitry includes a control circuit controlling a drive circuit for a semiconductor device; and a delay circuit receiving a first signal instructing the drive circuit to drive the semiconductor device with first driving force and output the first signal to the control circuit. The delay circuit receives a second signal at an interval of a first time or “n” times of the first time after the first signal is received, “n” being an integer greater than or equal to 2, and the second signal instructing the drive circuit to drive the semiconductor device with second driving force, delays outputting of the second signal for a delay time shorter than the first time, and outputs the second signal to the control circuit after the first signal is outputted and further after the first time or “n” times of the first time and the delay time elapses. | 2022-03-10 |
20220077852 | METHOD AND SYSTEM OF OPERATING A BI-DIRECTIONAL DOUBLE-BASE BIPOLAR JUNCTION TRANSISTOR (B-TRAN) - Operating a bi-directional double-base bipolar junction transistor (B-TRAN). One example is a method comprising: injecting charge carriers at a first rate into an upper base of the transistor, the injecting at the first rate results in current flow through the transistor from an upper collector-emitter to a lower collector-emitter, and the current flow results in first voltage drop measured across the upper collector-emitter and the lower collector-emitter; and then, within a predetermined period of time before the end of a first conduction period of the transistor, injecting charge carriers into the upper base at a second rate lower than the first rate, the injecting at the second rate results in second voltage drop measured across the upper collector-emitter and the lower collector-emitter, the second voltage drop higher than the first voltage drop; and then making the transistor non-conductive at the end of the conduction period. | 2022-03-10 |
20220077853 | DRIVING CIRCUIT - A driving circuit, including: a pull-up transistor and a pull-down transistor, where a first terminal of the pull-up transistor is connected with a power source, a second terminal of the pull-up transistor is connected with a first terminal of the pull-down transistor to together output a driving signal, and a second terminal of the pull-down transistor is connected to ground; and a control circuit connected with a control terminal of the pull-up transistor and/or the pull-down transistor respectively and configured to control the on or off switching of the pull-up transistor and/or the pull-down transistor so as to change the driving signal. The pull-up transistor and the pull-down transistor are not switched on at the same time under the control of the control circuit. | 2022-03-10 |
20220077854 | APPROACHING DETECTION APPARATUS AND ELECTRONIC DEVICE - An approaching detection apparatus and an electronic device are provided. The apparatus for use in the electronic device includes: a first electrode, a second electrode, and a detection module configured to detect a variation of a mutual capacitance value between the first electrode and the second electrode. The variation of the mutual capacitance value is used to determine an approaching state of the electronic device. When a human body approaches the electronic device, the variation of the mutual capacitance value is a first variation. When a non-human body approaches the electronic device, the variation of the mutual capacitance value is a second variation. One of the first variation and the second variation is a positive value and the other thereof is a negative value. | 2022-03-10 |
20220077855 | TOUCH SENSING DEVICE AND ELECTRONIC DEVICE INCLUDING TOUCH SENSING DEVICE - A touch sensing device includes: a force sensing unit including a sensing coil; and a metal portion. At least a portion of the metal portion is in contact with the force sensing unit, and the touch sensing device is configured such that a region of the metal portion overlapping with the sensing coil changes in response to a touch being applied to the touch sensing device. | 2022-03-10 |
20220077856 | Circuits And Methods For Accessing Signals In Integrated Circuits - An integrated circuit includes a monitored circuit and a signal analyzer circuit. The signal analyzer circuit includes a logic circuit that determines if a condition signal satisfies a condition to generate an output signal. A first-in-first-out (FIFO) buffer circuit stores opportunistic data indicated by a monitored signal received from the monitored circuit in response to the output signal indicating if the condition signal satisfies the condition. A communication channel transmits the opportunistic data stored in the FIFO buffer circuit outside the integrated circuit. | 2022-03-10 |
20220077857 | Buried Metal Technique for Critical Signal Nets - Various implementations described herein are related to a device with a frontside power network and a backside power network. The frontside power network may include frontside supply rails coupled to logic circuitry, and also, the backside power network may include buried supply rails. Also, at least one buried supply rail of the buried supply rails may be used as a backside signal path for providing at least one critical signal net to the logic circuitry. | 2022-03-10 |
20220077858 | MEMORY IN LOGIC PHYSICAL UNCLONABLE FUNCTION - Methods and systems are directed to creating a physical unclonable function (PUF) on a Field Programmable Gate Array (FPGA) and generating a unique signature for a device. The method includes, in part, designing a PUF by taking advantages of programmable logic elements on the FPGA, and extracting uninitialized values associated with one or more storage elements comprised in the PUF when the FPGA is powered up. The extracted uninitialized values can be combined to generate the unique signature for the device. The one or more storage elements can be bi-stable memory cells that are mapped to look up tables (LUTs) on the FPGA. The coordinates of these LUTs can be determined based on hamming distance analysis. Alternatively, the one or more storage elements can be memory cells associated with boundary scan cells of a boundary scan chain. | 2022-03-10 |
20220077859 | LOW POWER CRYO-CMOS CIRCUITS WITH NON-VOLATILE THRESHOLD VOLTAGE OFFSET COMPENSATION - Systems and methods related to low power cryo-CMOS circuits with non-volatile threshold voltage offset compensation are provided. A system includes a plurality of devices configured to operate in a cryogenic environment, where a first distribution of a threshold voltage associated with the plurality of devices has a first value indicative of a measure of spread of the threshold voltage. The system further includes control logic, coupled to each of the plurality of devices, configured to modify a threshold voltage associated with each of the plurality of devices such that the first distribution is changed to a second distribution having a second value of the measure of spread of the threshold voltage representing a lower variation among threshold voltages of the plurality of devices. | 2022-03-10 |
20220077860 | CAPACITIVE DIGITAL ISOLATOR CIRCUIT WITH ULTRA-LOW POWER CONSUMPTION BASED ON PULSE-CODING - A capacitive digital isolator circuit includes: a signal emitting module; a signal receiving module; and a capacitive isolation module. The signal emitting module includes an edge Pulse-Coding modulator circuit, which modulates an input signal to generate a pair of differential modulated signals based on the input signal and transmits the pair of differential modulated signals to the signal receiving module. Each of the pair of differential modulated signals has twelve high-frequency pulses when the input signal has a rising edge and has six high-frequency pulses when the input signal has a falling edge. The signal receiving module includes an ultra-low power consumption high-speed comparator, a timer and a pulse counter. An output signal of the pulse counter has a rising edge when the pulse number of the comparator output signal is larger than nine and a falling edge when the pulse number is equal to or smaller than nine. | 2022-03-10 |
20220077861 | DELAY ESTIMATION DEVICE AND DELAY ESTIMATION METHOD - The disclosure provides a delay estimation device and a delay estimation method. The delay estimation device includes a pulse generator, a digitally controlled delay line (DCDL), a time-to-digital converter (TDC), and a control circuit. The pulse generator receives a reference clock signal, outputs a first clock signal in response to a first rising edge of the reference clock signal, and outputs a second clock signal in response to a second rising edge of the reference clock signal. The DCDL receives the first clock signal from the pulse generator and converts the first clock signal into phase signals based on a combination of delay line codes. The TDC samples the phase signals to generate a timing code based on the second clock signal. The control circuit estimates a specific delay between the first clock signal and the second clock signal based on the timing code. | 2022-03-10 |
20220077862 | SEMICONDUCTOR APPARATUS AND DATA PROCESSING SYSTEM INCLUDING THE SEMICONDUCTOR APPARATUS - A semiconductor apparatus receives a first clock signal and a second clock signal. The semiconductor apparatus configured to perform a training operation internally, the training operation being an operation of internally correcting a phase difference between the first clock signal and the second clock signal by dividing the first clock signal to generate multi-phase signals, detecting phase difference between the second clock signal and the multi-phase signals, and adjusting phases of the multi-phase signals according to a result of the detecting of the phase difference. | 2022-03-10 |
20220077863 | SPUR CANCELLATION FOR SPUR MEASUREMENT - A spur measurement system uses a first device with a spur cancellation circuit that cancel spurs responsive to a frequency control word identifying a spurious tone of interest. A device under test generates a clock signal and supplies the clock signal to the first device through an optional divider. The spur cancellation circuit in the first device generates sine and cosine weights at the spurious tone of interest as part of the spur cancellation process. A first magnitude of the spurious tone in a phase-locked loop in the first device is determined according to the sine and cosine weights and a second magnitude of the spurious tone in the clock signal is determined by the first magnitude divided by gains associated with the first device. | 2022-03-10 |
20220077864 | PHASE LOCKED LOOP AND ELECTRONIC DEVICE INCLUDING THE SAME - An electronic device includes a phase locked loop configured to perform a two-point modulation operation on a data signal by using first and second modulation paths, and the phase locked loop is configured to generate, based on a differential value of a first phase error signal generated in the first modulation path, a gain for adjusting a frequency variation of the data signal through the second modulation path so as to match with the frequency variation of the data signal through the first modulation path. | 2022-03-10 |
20220077865 | ANALOG-TO-DIGITAL CONVERTER AND CLOCK GENERATION CIRCUIT THEREOF - An analog-to-digital converter and a clock generation circuit thereof are provided. The clock generation circuit comprises cascaded clock generation modules. The clock generation module at each stage is configured to generate a corresponding internal clock signal, and each stage of the clock generation module comprises a delay module and a logic gate module. The second input end of the N-th stage of the logic gate module is connected to the output end of the previous stage of the logic gate module, and the output end of the logic gate module is configured to output an internal clock, so that each stage of the clock generation module can generate one internal clock signal. | 2022-03-10 |
20220077866 | SWITCH-MODE POWER SUPPLIES WITH IMPROVED ANALOG-TO-DIGITAL CURRENT CALIBRATION - A switch-mode power supply includes a pair of input terminals, a pair of output terminals, and at least one switch coupled between the input terminals and the output terminals. The power supply further includes an analog-to-digital converter (ADC) for converting a sensed analog current value at the output terminals to an output digital value, an interface for receiving a user configurable current setting, and a control circuit coupled with the interface, the ADC and the at least one switch. The control circuit is configured to determine a raw digital value of the ADC that corresponds to the received current setting by processing an iterative loop, and turn on and turn off the at least one switch according to the determined raw digital value and the output digital value of the ADC, to supply an output current at the pair of output terminals that corresponds to the received current setting. | 2022-03-10 |
20220077867 | ANALOG-TO-DIGITAL CONVERTER AND ANALOG-TO-DIGITAL CONVERSION METHOD THEREOF - An analog-to-digital conversion device and analog-to-digital conversion method thereof are provided. The analog-to-digital conversion device includes an analog circuit configured to output an analog input signal, and an analog-to-digital converter configured to receive the analog input signal and configured to outputting a digital output signal corresponding to the analog input signal with the use of first and second capacitor arrays, each of the first and second capacitor arrays including a first capacitor having a calibration capacitor connected thereto and a second capacitor having no calibration capacitor connected thereto, wherein the analog-to-digital converter is configured to calibrate the capacitance of the first capacitor by providing a first calibration voltage to the calibration capacitor and is configured to output the digital output signal corresponding to the analog input signal with the use of the calibrated capacitance of the first capacitor. | 2022-03-10 |
20220077868 | ANALOG-TO-DIGITAL CONVERTER WITH AUTO-ZEROING RESIDUE AMPLIFICATION CIRCUIT - Disclosed herein are some examples of analog-to-digital converters (ADCs) that can perform auto-zeroing with amplifying a signal for improvement of a signal-to-noise ratio. The ADCs may produce a first digital code to represent an analog input signal and a second digital code based on a residue from the first digital code, and may combine the first digital code and the second digital code to produce a digital output code to represent the analog input signal. The ADC may utilize a first observation and a second observation of an analog residue value representing the residue to produce the second digital code. | 2022-03-10 |
20220077869 | ANALOG-TO-DIGITAL CONVERTER, ELECTRONIC DEVICE INCLUDING THE SAME, AND OPERATING METHOD OF ANALOG-TO-DIGITAL CONVERTER - Disclosed are an analog-to-digital converter (ADC), an electronic device including the ADC, and an operating method of the ADC. The ADC includes a first stage that includes a plurality of channels, generates a first sampling signal by sequentially sampling a first analog signal based on time interleaving, and generates a first digital signal and a first residual signal corresponding to the first analog signal by performing analog-to-digital conversion based on the first sampling signal, an amplifier that amplifies the first residual signal, and a second stage that includes a plurality of channels, generates a second sampling signal by sequentially sampling the amplified first residual signal based on time interleaving, and generates a second digital signal and a second residual signal corresponding to the first analog signal by performing analog-to-digital conversion based on the second sampling signal. The number of the plurality of channels included in the first stage is odd-numbered. | 2022-03-10 |
20220077870 | ANALOG-TO-DIGITAL CONVERTER CIRCUIT AND IMAGE SENSOR - An analog-to-digital converter circuit includes: a first operation amplifier suitable for comparing a ramp voltage and a voltage to be converted so as to produce an amplification result and outputting the amplification result; a second operation amplifier suitable for comparing the amplification result transferred to a first input terminal with a reference voltage transferred to a second input terminal so as to produce a comparison result and outputting the comparison result; a leakage current measurer suitable for measuring a leakage current to the first input terminal; and a leakage current generator suitable for causing a current of the same amount as that of the leakage current measured by the leakage current measurer to flow to the second input terminal. | 2022-03-10 |
20220077871 | DEVICE AND METHOD FOR PROCESSING DIGITAL SIGNALS - The present invention provides a device for processing digital signals. The device comprises a digital signal source and a converter circuit having a current supply. The digital signal source outputs a codeword. The converter circuit receives the codeword from the digital signal source, receives a current at the current supply, and generates an output signal based on the codeword. The device generates the current based on the codeword. | 2022-03-10 |
20220077872 | MATCHED DIGITAL-TO-ANALOG CONVERTERS - A voltage ladder is used to generate reference voltages. The voltage ladder is used by multiple digital-to-analog converters (DACs). In particular, the voltage ladder is used by multiple pulse-width modulation (PWM) DACs. Having multiple DACs utilize a common voltage ladder for their reference voltages reduces mismatched output voltages between DACs. Having multiple DACs utilize the common voltage ladder helps ensure that the reference voltages used by different DACs are not affected by process, voltage, and/or temperature variations in the reference voltages that would occur when using different voltage ladders for each DAC. | 2022-03-10 |
20220077873 | DIGITAL-TO-ANALOG CONVERTER SYSTEM AND METHOD OF OPERATION - A digital-to-analog converter (DAC) system preferably includes one or more optical modulators and can optionally include one or more electronic DAC arrays. A method for digital-to analog conversion preferably includes receiving digital inputs and providing analog optical outputs. The method for digital-to analog conversion is preferably performed using the DAC system. | 2022-03-10 |
20220077874 | METHOD AND APPARATUS FOR DATA DECODING IN COMMUNICATION OR BROADCASTING SYSTEM - The disclosure relates to a communication technique for converging a 5G communication system for supporting a higher data transfer rate beyond a 4G system with an IoT technology, and a system therefor. The disclosure may be applied to intelligent services (for example, smart home, smart buildings, smart cities, smart cars or connected cars, health care, digital educations, retail business, security and safety-related services, etc.) based on a 5G communication technology and an IoT-related technology. The disclosure provides an apparatus and a method for efficiently decoding a low-density parity-check (LDPC) code in a communication or broadcasting system. Further, the disclosure provides an LDPC decoding device and method for improving decoding performance without increasing the decoding complexity by applying suitable decoding scheduling according to the structural or algebraic characteristics of the LDPC code in a process of decoding the LDPC code using layered scheduling or a scheme similar thereto. Further, a method of a low density parity check (LDPC) decoding performed by a receiving device in a wireless communication system is provided, the method comprising: receiving, from a transmitting device, a signal corresponding to input bits; performing demodulation based on the signal to determine values corresponding to the input bits; identifying a number of the input bits based on the signal; identifying a base matrix and a lifting size based on the number of the input bits; identifying a parity check matrix based on the base matrix; identifying an index corresponding to the values; determining a number of layers based on the index and the lifting size; determining an order for LDPC decoding based on the number of layers and a predetermined sequence; and performing LDPC decoding to determine the input bits based on the values, the parity check matrix and the order. | 2022-03-10 |
20220077875 | Data Transmission Method, Encoding Method, Decoding Method, Apparatus, Device, and Storage Medium - A method includes: a first chip receives a first data stream from a second chip, where the first data stream is obtained through encoding by using a first forward error correction (FEC) code type; and the first chip re-encodes the first data stream at least once, to obtain a second data stream, where the second data stream is a concatenated FEC code stream obtained through encoding by using at least the first FEC code type and a second FEC code type. This application provides a concatenated coding scheme, so that a gain is higher, an FEC code type conversion process is simplified, a delay and device power consumption that are required during FEC code type conversion are reduced, and a data transmission distance and a data transmission rate are increased. | 2022-03-10 |
20220077876 | Dynamic Multi-Stage Decoding - Methods and systems for decoding raw data may include determining a sequence of a plurality of read-level voltages based on previous decoding data and executing a multi-stage decoding operation to decode raw data read from the plurality of memory cells using the determined sequence of the plurality of read-level voltages. Decoded data is returned from the multi-stage decoding operation upon completion of the multi-stage decoding operation and the previous decoding data is updated based on results of the multi-stage decoding operation. | 2022-03-10 |
20220077877 | SOFTWARE-DEFINED RADIO LINKING SYSTEMS - The disclosed invention includes methods for linking individual software-defined radios (SDR) into a cohesive network of SDRs capable of recording a sample of radiofrequency (RF) signals emitted in an RF environment. Individual SDRs communicate with an IP network, and host a linking application that executes the recording. A user identifies a lead SDR from among the SDRs, and uses the lead SDR to task participating SDRs with reference to a clock source. Also disclosed is a system of SDRs configured to be linked into a cohesive network of SDRs capable of recording a sample of RF signals emitted in an RF environment. Embodiments of the disclosed invention include co-located and dispersed SDRs. Some embodiments use SDRs organized into a mesh network. Embodiments of the disclosed invention are configured to perform total band monitoring, total band capture, RF environment simulation, interference identification, interference simulation, and distributed quality of service evaluation of wireless networks. | 2022-03-10 |
20220077878 | MACHINE-LEARNING BASED ANALYSIS AND RESPONSE TO ELECTROMAGNETIC WAVEFORMS - A method includes determining, based at least in part on parameters of a software-defined radio (SDR), waveform data descriptive of an electromagnetic waveform. The method also includes generating feature data based on the waveform data and based on one or more symbols decoded from the electromagnetic waveform. The method further includes providing the feature data as input to a first machine-learning model and initiating a response action based on an output of the first machine-learning model. | 2022-03-10 |
20220077879 | MACHINE-LEARNING BASED ANALYSIS, PREDICTION, AND RESPONSE BASED ON ELECTROMAGNETIC WAVEFORMS - A method includes determining, based at least in part on parameters of a software defined radio (SDR), waveform data descriptive of an electromagnetic waveform. The method also includes generating feature data based on the waveform data. The method further includes providing the feature data as input to a first machine learning model to predict a future action of a device associated with at least a portion of the electromagnetic waveform and initiating a response action based on the predicted future action. | 2022-03-10 |
20220077880 | TERMINAL - The present application relates to a terminal, including: a main board, a middle frame, a radio frequency circuit layer, a screen, and a plurality of antennas, where the middle frame is located between the main board and the radio frequency circuit layer, the radio frequency circuit layer is located between the screen and the middle frame, and the plurality of antennas are connected to the main board by using radio frequency lines in the radio frequency circuit layer. | 2022-03-10 |
20220077881 | Tactical Communication Apparatus - A tactical communications apparatus is used to establish secure, reliable communications between a forward-deployed communications station and any designated second communicator during a building siege or hostage situation. At least one communications device, at least one processing unit, a transceiver array, and a power supply are mounted to a casing. The casing allows the tactical communication apparatus to be tossed into an area. The transceiver array wirelessly connects to at least one remote terminal, enabling communication via the at least one communication device. The casing also contains a plurality of discrete surveillance devices mounted into the casing to enable an operator to remotely surveil the area around the casing. Further, the tactical communication apparatus also supports at least one offensive device operated via the at least one remote terminal. The at least one offensive device may be activated as cover for responders if communications fail to resolve a situation. | 2022-03-10 |
20220077882 | SPLITTER CIRCUIT, FRONT END MODULE, AND OPERATING METHOD THEREOF - A splitter circuit includes: a signal divider configured to split and transmit a first radio frequency (RF) signal received in a first receiving mode in which a first communication scheme and a second communication scheme are simultaneously performed; a first bypass circuit configured to bypass the signal divider to transmit a second RF signal received in a second receiving mode in which the first communication scheme is performed; and a second bypass circuit configured to bypass the signal divider to transmit a third RF signal received in a third receiving mode in which the second communication scheme is performed. | 2022-03-10 |
20220077883 | HARMONIC REJECTION IN MULTIPHASE SIGNALS - A receiver circuit includes a mixer receiving an RF signal encoding an information signal. The mixer receives a number of multiphase oscillator signals and generates multiphase baseband signals. The receiver circuit also includes a variable gain circuit receives the multiphase baseband signals, generates a first output signal having a first distortion, and a second output signal having a second distortion. The variable gain circuit is configured to generate a reduced distortion output signal based on the first and second output signals. | 2022-03-10 |
20220077884 | Devices And Methods For Single Carrier Modulation Schemes - The present invention relates to single carrier modulation schemes, and presents a transmitter device, a receiver device and a transceiver device for a single carrier modulation scheme. The transmitter device is configured to generate a plurality of signature roots for a single carrier transmission, construct a Lagrange matrix and a Vandermonde matrix based on the plurality of signature roots, and generate a single carrier modulated signal based on the Lagrange and the Vandermonde matrix. The receiver device is configured to determine a plurality of signature roots, construct at least two Vandermonde matrices from the plurality of signature roots, and perform a demodulation of a single carrier modulated signal based on the at least two Vandermonde matrices. The transceiver device comprising a transmitter device configured to generate a single carrier modulated signal, and a receiver device configured to perform a demodulation of the single carrier modulated signal. | 2022-03-10 |
20220077885 | HEALTH, WELLNESS AND ACTIVITY MONITOR - Devices, systems and methods for reconfigurable and/or updatable lightweight embedded devices or systems are disclosed. Via use of such a device, system, or method, various capabilities for a user are provided, simplified, secured, and/or made more convenient. The system may interact with various other devices or systems, including those that are cloud-based or communicate through the cloud, and may utilize various local sensors, in order to provide one or more of improved access, monitoring, or diagnostics, and so forth. | 2022-03-10 |
20220077886 | Backscatter Communication Method, Excitation Device, Backscatter Device, and Receiving Device - Embodiments of this application disclose a backscatter communication method and a related apparatus. The method includes: An excitation device determines a first sequence, generates a first signal, and sends the first signal, where the first signal carries the first sequence; after receiving the first signal, a backscatter device modulates backscatter device data onto the received first signal to obtain a second signal, and backscatters the second signal, to implement first scrambling on the backscatter device data by using the first sequence; and a receiving device determines the first sequence, receives the second signal from the backscatter device, and demodulates the received second signal based on the first sequence, to obtain the backscatter device data carried on the second signal. | 2022-03-10 |
20220077887 | UNIVERSAL SMA AND FERRULE ANTENNA INTERFACE FOR COMMUNICATION DEVICES - Communication device with configurable antenna interface and method for configuring an antenna interface. One implementation of the communication device includes an RF transceiver, a threaded coaxial antenna connector, a first RF terminal, a second RF terminal, an RF signal conduit, and an interface circuit. The threaded coaxial antenna connector includes inner and outer terminals. The RF signal conduit includes a first structure that couples the first RF terminal to the inner terminal of the threaded coaxial antenna connector. The RF signal conduit further includes a second structure that couples the second RF terminal to the outer terminal of the threaded coaxial antenna connector. The interface circuit is configured to set an SMA antenna interface mode by coupling the RF transceiver to the first RF terminal. The interface circuit is also configured to set a ferrule antenna interface mode by coupling the RF transceiver to the second RF terminal. | 2022-03-10 |
20220077888 | COMMUNICATION APPARATUS FOR USE WITH ELECTRONIC COMMUNICATION ELEMENT, ELECTRONIC COMMUNICATION ELEMENT AND USES THEREOF - There is described a communication system ( | 2022-03-10 |
20220077889 | Audio Stream Detection - A method includes receiving, by an audio receiver device, a first audio stream from a first audio streaming device, wherein the first audio stream comprises a plurality of frames each comprising at least one audio packet slot for at least one audio packet; and scanning, by the audio receiver device, while receiving the first audio stream from the first audio streaming device, during at least one scan window for packets transmitted from a second audio streaming device in a second audio stream. The scanning takes place in manner so as to enable reception of at least one audio packet per frame of the first audio stream by preventing collision of the at least one scan window with at least one audio packet slot per frame of the first audio stream. | 2022-03-10 |
20220077890 | REPORTING DEVICE FOR MULTIMODAL ARTICLE INTERFACE - A reporting device for association with an article having power requirements is provided, where the reporting device is capable of performing communications operations, for example to specify the article's power requirements, and power supply using a single pair of conductors. Communications are performed at a lower voltage than the voltage intended for power supply operations. Optionally the communications interface of the reporting device may be disconnected at higher voltages, and the operational circuits of the reporting device may be disconnected at lower voltages, and circuits preventing inversion of voltages across the conductors, or reverse currents when the operational circuits are connected to the conductors may be provided. The reporting device may be used in connection with charging surfaces providing a matrix of conductive surfaces, and supports operation with a corresponding coupling manager. | 2022-03-10 |
20220077891 | METHOD AND APPARATUS FOR SURVEYING REMOTE SITES VIA GUIDED WAVE COMMUNICATIONS - Aspects of the subject disclosure may include, for example, a surveying system operable to receive a plurality of electromagnetic waves via a guided wave transceiver that include environmental data collected via a plurality of sensors at a plurality of remote sites. Weather pattern data is generated based on the environmental data. Other embodiments are disclosed. | 2022-03-10 |
20220077892 | Data Recording Device with a HART Multiplexer - A data recorder contains a HART multiplexer with channels that are provided with coupling members for capacitive coupling to multiple HART field devices supplied via current loops, wherein a HART modem is arranged downstream of the HART multiplexer, and downstream of the HART modem is a processor with an interface that controls HART communication of the data recorder, where to automatically and quickly identify changes in the connection configuration of field devices capacitively connected to the HART multiplexer, a pulse discriminator is connected at each channel that detects signal pulses induced by the loop current on the channel being interrupted and/or switched on and which differ from HART signals and upon detection generates an interrupt signal for the processor, and in response to the interrupt signal, the processor terminates HART communications on the channel and generates a HART command for requesting identification of a HART field device on the channel. | 2022-03-10 |
20220077893 | DEVICE AND METHOD FOR WIRELESSLY TRANSMITTING POWER ON BASIS OF REESTABLISHMENT OF OUT-BAND COMMUNICATION - The present specification relates to a device and method for wirelessly transmitting power on the basis of the reestablishment of out-band communication. The present specification discloses a wireless power receiving device comprising a communication/control circuit configured to carry out the operations of: performing handover from in-band communication using operating frequencies to out-band communication using any frequencies except for the operating frequencies; transmitting power characteristic information to the wireless power transmitting device or receiving power characteristic information from the wireless power transmitting device through the out-band communication before entering a power transmission phase; and saving power state information determined during the power transmission phase. By defining an out-band communication reestablishment protocol for the wireless power transmitting device or wireless power receiving device, it is possible to improve the performance of wireless power transmission throughout-band communication reestablishment that is fast and efficient. | 2022-03-10 |
20220077894 | APPARATUS AND METHOD FOR PERFORMING DATA STREAM TRANSMISSION IN WIRELESS POWER TRANSFER SYSTEM - A wireless power transmitter includes a power converter configured to transfer wireless power to a wireless power receiver, and a controller configured to communicate with the wireless power receiver to control transmission of the wireless power. The controller is configured to receive, from the wireless power receiver, an authentication request message for authentication of the wireless power transmitter, and transmit, to the wireless power receiver, a data stream including a plurality of auxiliary data transport (ADT) data packets in which at least a part of an authentication response message is divided. The data stream includes at a beginning an auxiliary data control packet informing a start of the data stream. | 2022-03-10 |
20220077895 | SYSTEMS AND METHODS FOR PROGRAMMING PLUGGABLE TRANSCEIVERS - A method for programming a network transceiver is provided. The method includes: providing a network transceiver having a programming interface; obtaining transceiver identification information via a radio-frequency transceiver programming system (RTPS); obtaining, via the RTPS, configuration data for the network transceiver based on the transceiver identification information; transmitting, via the RTPS, at least some of the configuration data via a radio-frequency (RF) interface; and programming the network transceiver via the programming interface using the at least some of the configuration data received via the RF interface. Corresponding systems, apparatuses (including smart labels, host devices, and transceivers) are also provided. | 2022-03-10 |