13th week of 2015 patent applcation highlights part 31 |
Patent application number | Title | Published |
20150085504 | Systems and Methods for Improving Service Life of Circuit Boards - In one aspect, a circuit board includes a base board and a layer of an elastic material comprising a first surface and a second surface. The layer of elastic material is adhered to the base board via the first surface. The circuit board further includes an electrical trace disposed on the second surface of the layer of elastic material. At least a portion of the layer of elastic material stretches or shrinks when the base board expands or contracts. A method of manufacturing a circuit includes obtaining an aluminum board, obtaining a layer of an elastic material, and applying a layer of adhering material to a surface of the aluminum board. The method further includes disposing the layer of the elastic material onto the layer of adhering material, and adhering the layer of the elastic material onto the aluminum board via the layer of adhering material. | 2015-03-26 |
20150085505 | LAMP POLE AND LED LAMP - A lamp pole for supporting a lamp head includes a number of movable members connected in sequence. Each movable member includes a first connecting portion and a second connecting portion. The first connecting portion and the second connecting portion are both bowl-shaped. The first connecting portion of the movable member is connected to the second connecting portion of an adjacent movable member, such that the first connecting portion is rotatably received in the second connecting portion. An LED lamp including the lamp pole is also disclosed. | 2015-03-26 |
20150085506 | METHOD FOR CONTROLLING THE ILLUMINATION OF A ROAD PROFILE - The invention relates to a method for controlling illumination of a road profile, wherein the headlamp at least one light-emitting element, wherein the at least one light-emitting element is individually drivable in order to generate an individual luminous flux, wherein the light emitted by the at least one light-emitting element has a light distribution, wherein the lateral adaptation of the light distribution is performed depending on a determined road profile, in particular as a function of the distance from the headlamp. | 2015-03-26 |
20150085507 | METHOD FOR CONTROLLING A LIGHT DISTRIBUTION OF A HEADLAMP AND HEADLAMP THEREFOR - The invention relates to a method for controlling a light distribution of a headlamp, wherein the headlamp has at least one light-emitting element, wherein the at least one light-emitting element is individually drivable in order to generate an individual luminous flux, wherein the light emitted by the at least one light-emitting element has a light distribution, wherein the light distribution is defined by means of a predefined, three-dimensional basic distribution on the basis of parameters, wherein an adapted light distribution is varied on the basis of the basic distribution using selected, changed parameters. | 2015-03-26 |
20150085508 | System for Illuminating a Bicycle - A system for illuminating a bicycle is described herein. In one embodiment the bicycle frame illuminator can comprise a plurality of LED lights, one or more holders, one or more connectors, and a battery. Each of the holders can comprise the plurality of LED lights. Moreover, each of the connectors connectable to each of the holders. Furthermore, the battery that electrically connects the holders and the connectors. | 2015-03-26 |
20150085509 | VEHICULAR INTERIOR PART - A vehicular interior part includes an interior part main body, an elongated light guide member guiding light from a light source, and a light guide member holder mounted to the interior part main body and holding the light guide member. The light guide member holder includes an elongated holder main body including a holder recess where the light guide member is arranged and having a U-shaped cross section and extending in an elongated direction of the light guide member, and at least two mount portions provided on a peripheral end portion of the holder main body and arranged along an elongated direction of the holder main body and mounted to the interior part main body. The holder main body includes a weak portion between the at least two mount portions that has mechanical strength lower than other parts of the holder main body. | 2015-03-26 |
20150085510 | MIRROR DEVICE FOR MOTOR VEHICLES AND METHOD FOR ASSEMBLING THEREOF - A mirror device for motor vehicles is provided comprising a main housing and a light guide associated with a light source and attached to the main housing. The light guide extends in at least one portion through the main housing defining at least one housing adapted for receiving the light source. The main housing may comprise a cover and a case; and a housing body may be fitted between the light guide and the cover. The light source housing may be formed at any portion of the length of the light guide. | 2015-03-26 |
20150085511 | VEHICULAR LAMP - An occupation space of a lamp including a mechanism for adjusting a reference position of an optical axis is reduced. The optical axis adjustment mechanism | 2015-03-26 |
20150085512 | LAMP DEVICE FOR VEHICLE - The present invention provides a lamp device for a vehicle including a light source and an inner lens through which light which is emitted from the light source passes, in which the inner lens includes a lens unit which diffuses light which is emitted from the light source, and a light guiding unit which protrudes toward the light source from the lens unit to guide the light which is emitted from the light source to the lens unit. Light emitted from the light source is guided by the light guiding unit to be incident onto the lens unit and then is irradiated to be diffused to the outside of the vehicle so that the light distribution performance is improved. | 2015-03-26 |
20150085513 | LIGHTING ARRANGEMENT - Lighting arrangement ( | 2015-03-26 |
20150085514 | VEHICLE HEADLAMP - A vehicle headlamp includes a light source, a projection optical member, and a light deflector. The projection optical member projects incident light ahead. The light deflector is disposed on an optical axis of the projection optical member and includes plural optical devices which are individually switchable between (i) a first state in which light emitted from the light source is reflected to a direction other than a direction toward the projection optical member and (ii) a second state in which the emitted light is reflected toward the projection optical member. An angle between a normal line to a center portion of each optical device when each optical device is in the first state and the optical axis is smaller than that between a normal line to the center portion of each optical device when each optical device is in the second state and the optical axis. | 2015-03-26 |
20150085515 | HEAD LAMP FOR VEHICLE - A head lamp for a vehicle may include a light source emitting a light, a reflective mirror reflecting the light emitted from the light source, a shield implementing a low beam by transmitting a part of the light that is emitted from the light source and/or reflected by the reflective mirror and projected toward a front of the vehicle and shielding other part of the light that is emitted from the light source and/or reflected by the reflective mirror and projected toward the front of the vehicle, a main hole formed at the shield to allow the part of the light pass through, a main lens transmitting the part of the light that has passed through the main hole of the shield toward the front of the vehicle, a reflective surface reflecting the other part of the light, and a sub lens transmitting the light reflected by the reflective surface. | 2015-03-26 |
20150085516 | LASER-OPERATED LIGHT SOURCE - A laser-operated light source encompasses a chamber for accommodating an ionizable gas and an ignition source for ionizing the gas in the chamber for generating a plasma. The light source furthermore encompasses a laser for inputting laser energy into the plasma such that, under the impact of the laser radiation, the plasma emits useful light, which forms the output signal of the light source, wherein provision is made for means for coupling the useful light into a transferring optical fiber. In the case of the light source according to the invention, at least one mode scrambler is assigned to the optical fiber or the optical fibers. | 2015-03-26 |
20150085517 | LASER-OPERATED LIGHT SOURCE - A laser-operated light source encompasses a chamber for accommodating an ionizable gas and an ignition source for ionizing the gas in the chamber for generating a plasma. The light source encompasses a laser for inputting laser energy into the plasma such that, under the impact of the laser radiation, the plasma emits useful light, which forms the output signal of the light source, wherein provision is made for means for coupling the useful light into a transferring optical fiber. An optical system for imaging the plasma onto the end of the optical fiber, which faces the optical system, is arranged between the chamber and the transferring optical fiber, wherein the optical system is corrected for reducing the chromatic aberration. | 2015-03-26 |
20150085518 | PROJECTION DEVICE AND PROJECTION-TYPE VIDEO DISPLAY DEVICE - Provided are a projection device and a projection-type video display device capable of displaying a plurality of videos, allowing speckles to be inconspicuous, and miniaturizing an optical system. A projection device includes an optical element including light diffusion elements capable of diffusing light, an irradiation device configured to irradiate the optical element with illumination light beams, each illumination light beam scanning the corresponding light diffusion element, spatial light modulators, each spatial light modulator being illuminated with illumination light beam which is incident from the irradiation device to each light diffusion element to be diffused, and projection optical systems, each projection optical system projecting modulation image obtained on each spatial light modulator on corresponding screen. The illumination light beam, which is incident to each position of each light diffusion element to be diffused, overlappedly illuminates on corresponding spatial light modulator. | 2015-03-26 |
20150085519 | OPTICAL GRADE LIGHT PIPE - A light guide system includes a light pipe and a carrier member. An outwardly extending attachment flange is disposed on an outer surface of the carrier member. In assembly, the outwardly extending attachment flange is adapted to provide an attachment feature for securing the light guide system to surrounding commodities. The outwardly extending attachment flange is disposed along a length of the carrier member to ensure uniform access to the outwardly extending attachment flange and uniform securement of the light guide system to a material substrate. | 2015-03-26 |
20150085520 | BACKLIGHT MODULE - A backlight module includes a back plate, an optical film, a light source and optical microstructures. The back plate has a supporting surface. The optical film is disposed on the back plate. The supporting surface and the optical film have a gap therebetween. The light source disposed on the supporting surface is adapted to emit light toward the optical microstructures. Each optical microstructure includes first and second transparent structures. The first transparent structure connected to the supporting surface has front and rear ends. The front end facing toward the light source has a first concave surface. The rear end facing away from the light source has a convex surface. The second transparent structure connected to the first transparent structure has front and rear surfaces tilted in relative to the supporting surface. The front surface faces toward the light source, and the rear surface faces away from the light source. | 2015-03-26 |
20150085521 | INTEGRATED BACK LIGHT UNIT - A light emitting device includes a support having an interstice and at least one LED located in the interstice and at least one of a waveguide or an optical launch having a transparent material encapsulating the at least one LED located in the interstice. | 2015-03-26 |
20150085522 | BACKLIGHT ASSEMBLY, DISPLAY APPARATUS HAVING THE SAME AND METHOD OF MANUFACTURING THE SAME - A backlight assembly includes a first light source part including a plurality of first light sources configured to generate light having a first color and a plurality of second light sources configured to generate light having a second color different from the first color, and a light guiding plate including a first incident surface and an exiting surface adjacent to the first incident surface. The exiting surface is configured to allow the light to pass therethrough. The exiting surface includes a first peripheral portion configured to absorb the light having the second color and a central portion adjacent to the first peripheral portion and configured to allow the light to pass therethrough. The first and second light sources are alternately located. | 2015-03-26 |
20150085523 | LIGHT-EMITTING UNIT FOR A PROJECTOR LAMP - The invention relates to a lighting unit ( | 2015-03-26 |
20150085524 | INTEGRATED BACK LIGHT UNIT - A light emitting device includes a support having an interstice and at least one LED located in the interstice and at least one of a waveguide or an optical launch having a transparent material encapsulating the at least one LED located in the interstice. | 2015-03-26 |
20150085525 | LIGHT GUIDE PLATE AND BACKLIGHT MODULE - A light guide plate and a backlight module are provided. The backlight module includes a light source and the light guide plate. The light source includes a light emitting surface. The light guide plate includes a light incident surface, a first surface, and a second surface, wherein the first surface is opposite to the second surface. The light guide plate is disposed at a side of the light source. The light incident surface of the light guide plate is opposite to the light emitting surface of the light source. The light incident surface is connected to the first surface and the second surface and includes a first curved surface and a second curved surface. The first curved surface is adjacent to the first surface, and the second curved surface is adjacent to the second surface. The first curved surface is a concave surface. | 2015-03-26 |
20150085526 | Light Guiding Apparatus, Light Emitting Device, Electronic Device, and Key - A light guiding apparatus, a light emitting device, an electronic device, and a key are provided. The light guiding apparatus includes a light guiding body, where a prism structure is disposed in the light guiding body, and the prism structure is configured to reflect light that enters the light guiding body; and the light guiding body has a light incident surface and a light emitting surface, where the light incident surface is an irregular surface matched with the prism structure and is configured to reflect light, which is reflected back from the prism structure, to the light emitting surface. The light guiding apparatus provided in the embodiments of the present invention can effectively scatter incident beams emitted by a light source, so that uniform emergent light can be obtained. | 2015-03-26 |
20150085527 | LIGHT SOURCE MODULE, FABRICATION METHOD THEREFOR, AND BACKLIGHT UNIT INCLUDING THE SAME - A light source module, a fabrication method therefore, and a slim backlight unit including the same. The light source module includes a light emitting diode (LED) chip electrically connected to a substrate through a lower surface thereof, a wavelength conversion layer formed on the LED chip and enclosing at least the light exit face of the LED chip, and a reflector formed on a region of the LED chip excluding the light exit face. | 2015-03-26 |
20150085528 | FLAT PANEL LIGHTING DEVICE AND DRIVING CIRCUITRY - The light fixture includes a frame, wherein at least a portion of the frame defines a first channel and a second channel, and the frame has a thickness of no more than about 1.0 inches. The light fixture includes a substantially flat light emitting diode (LED) panel disposed within the frame, and power circuitry disposed within the frame. The power circuitry includes a first LED driver sized to be positioned within the first channel, and a second LED driver sized to be positioned within the second channel. The power circuitry is configured to electrically couple the substantially flat LED panel to an external power supply. The first LED driver and the second LED driver are configured to convert an AC input into a DC output suitable for powering the substantially flat LED panel. | 2015-03-26 |
20150085529 | WHITE LIGHT EMITTING DEVICE AND DISPLAY APPARATUS - A white light emitting device includes: a blue light emitting diode (LED) which emits blue light; and a resin packing unit which encapsulates the blue LED, wherein the resin packing unit includes a first wavelength conversion material which, in response to being excited by the blue light, emits green light, a second wavelength conversion material which, in response to being excited by the blue light, emits red light, and a complex compound which absorbs light of a region in which the green light and the red light are mixed, the light of the region being included in white light implemented through a mixture of the green light and the red light excited together with the blue light. | 2015-03-26 |
20150085530 | LIGHT GUIDE - Provided a light guide ( | 2015-03-26 |
20150085531 | NONLINEAR CONTROL DEVICE FOR A DC/DC CONVERTER USED FOR CONVEYING HVDC CURRENT - The invention relates to a bidirectional multi-level DC/DC converter and its non-linear control, adapted to transfer power between at least one energy source and an electricity distribution network. | 2015-03-26 |
20150085532 | REACTOR AND POWER CONVERSION DEVICE - A reactor device includes: a magnetic core defining a predetermined axis; a first coil wound around the predetermined axis; and a second coil wound around the predetermined axis and placed opposed to the first coil, wherein: a first lead part and a second lead part formed in both ends of the first coil are placed on that side of the first coil which is opposed to the second coil. | 2015-03-26 |
20150085533 | REACTOR AND POWER CONVERTER - A reactor includes a magnetic core; a first coil wound around the magnetic core; a second coil wound around the magnetic core; and a magnetic body that is provided between the first coil and the second coil separate from the magnetic core, and that reduces a coupling coefficient between the first coil and the second coil. | 2015-03-26 |
20150085534 | REGENERATIVE AND RAMPING ACCELERATION (RARA) SNUBBERS FOR ISOLATED AND TAPPED-INDUCTOR CONVERTERS - A voltage converter circuit comprising a primary inductor; a secondary inductor, at least a portion of the second inductor being mutually coupled to the primary inductor; a rectifier diode connected to the secondary inductor such that the rectifier diode turns off when current flows in the secondary inductor in a first direction; and a snubber circuit arranged to charge a first snubber capacitor with the current flowing through the secondary inductor after the rectifier diode turns off; the snubber circuit being arranged to discharge the first snubber capacitor by complementing the current in the secondary inductor after the flow of the current in the secondary inductor is inverted. | 2015-03-26 |
20150085535 | LLC single stage power factor correction converter - A single stage PFC LLC power converter is consist of two transformer, one forward transformer, one main transformer. The first winding of the forward transformer is connected with a capacitor in series then paralleled with another capacitor and this circuit is connected with the primary winding of the main transformer in series as primary load circuit in LLC power converter, the energy through the main transformer is transferred to the secondary circuit and the energy through the first winding of the forward transformer is transferred to the second winding of the forward transformer to correct the input current waveform. | 2015-03-26 |
20150085536 | INSULATED POWER SUPPLY APPARATUS - Upper arm connection sections and lower arm connection sections are provided in parallel. An upper arm transformer and a power supply are provided in an area opposed to the lower arm connection sections with respect to the upper arm connection sections. A power supply control section is provided in at least one of an area opposed to the upper arm connection sections with respect to the upper arm transformer, and an area which is sandwiched between at least one of the upper and lower connection sections closest to one side of the substrate positioned in a direction in which the upper arm connection sections are arranged, and the one side. The lower arm transformer is provided in an area opposed to the upper arm connection sections with respect to the lower arm connection sections. The lower arm transformer is common to at least two of the lower arm switching elements. | 2015-03-26 |
20150085537 | CONTROL METHOD, POWER CONVERTING CIRCUIT AND AC-DC POWER CONVERTER USING THE SAME - In one embodiment, a method of controlling an AC-DC power converter, can include: (i) receiving, by a filter capacitor, a first branch current from an input current of the AC-DC power converter; (ii) receiving, by a power converting circuit, a second branch current from the input current; (iii) receiving, by the power converting circuit, a feedback signal that represents an output signal of the power converting circuit, and a triangular wave signal that is determined by the first branch current; (iv) generating a first conduction time based on the feedback signal such that the power converting circuit produces a first converting current; and (v) generating a second conduction time based on the triangular wave signal such that the power converting circuit produces a second converting current having a same absolute value as the first branch current. | 2015-03-26 |
20150085538 | INSULATED POWER SUPPLY APPARATUS - An insulated power supply apparatus includes an upper arm transformer which has a primary side coil and a secondary side coil, a lower arm transformer which has a primary side coil and a secondary side coil, and a power supply control section which has a voltage control switching element and an integrated circuit which turns on or off the voltage control switching element. At least one of the upper arm transformer and the lower arm transformer is adjacent to the power supply control section when viewing a surface of the substrate from a front thereof. An electric path transfers output voltage of the secondary side coil of the transformer adjacent to the power supply control section, to the integrated circuit. The integrated circuit turns on or off the voltage control switching element to perform feedback control so that the output voltage detected via the electric path reaches a target voltage. | 2015-03-26 |
20150085539 | ELECTRIC POWER CONVERTER - A processor unit in an electric power converter executes detection of an overheating predicted state that is a stage prior to overheating of the IGBTs, a short circuit predicted state that is a stage prior to a short circuit in the arms, and a voltage drop predicted state that is a stage prior to a drop in a control voltage to be supplied to a driver circuit. When none of these predicted states is detected, a determination that an abnormality is not caused in the power module based on a latch signal is made by the processor unit. When an overheating predicted state is detected, the processor unit lowers the duty ratio of a motor control signal. When a short circuit predicted state is detected, the processor unit prolongs the dead time in which the upper IGBTs and the lower IGBTs are both maintained in the off-state. | 2015-03-26 |
20150085540 | Systems and Methods for Over-Temperature Protection and Over-Voltage Protection for Power Conversion Systems - Systems and methods are provided for protecting a power conversion system. A system controller includes a first controller terminal and a second controller terminal. The first controller terminal is configured to provide a drive signal to close and open a switch to affect a first current flowing through a primary winding of a power conversion system. The second controller terminal is configured to receive first input signals during one or more first switching periods and receive second input signals during one or more second switching periods. The system controller is configured to determine whether a temperature associated with the power conversion system is larger than a predetermined temperature threshold, and in response to the temperature associated with the power conversion system being larger than the predetermined temperature threshold, generate the drive signal to cause the switch open and remain open to protect the power conversion system. | 2015-03-26 |
20150085541 | MULTI-LEVEL INVERTER AND POWER SUPPLY SYSTEM - A multi-level inverter includes two N-level inverter units with pulse width modulation waves staggered by a phase of 180 degrees, and N is an integer greater than or equal to 3; a direct current power source module, where an output end thereof is connected to input ends of the two N-level inverter units; a transformer, where the transformer includes a primary side and a secondary side, an inductor of the primary side and an inductor of the secondary side are coupled, and one end of the inductor of the primary side and one end of the inductor of the secondary side are connected to output ends of the two N-level inverter units respectively. The two N-level inverter units are reversely coupled, and the other end of the inductor of the primary side and the other end of the inductor of the secondary side are connected. | 2015-03-26 |
20150085542 | MICRO INVERTER OF SOLAR POWER SYSTEM AND METHOD OF OPERATING THE SAME - A method of operating a micro inverter of a solar power system includes following steps: First, an output power value of a solar photovoltaic module is acquired. Afterward, it is to judge whether the micro inverter executes a power boosting mode. If the power boosting mode is executed, a maximum output power of the micro inverter is boosted from a rated output power value to a maximum output power value. Finally, it is to judge whether the output power value of the solar photovoltaic module is greater than the maximum output power value. If YES, the maximum output power value is outputted from the micro inverter. | 2015-03-26 |
20150085543 | Inverter with Dual-Range Load Sensing - An inverter assembly includes an inverter and a load sensor. The inverter is configured to provide electrical power to a load. The load sensor has a first amplifier for sensing current of the load when the load is a low power load connected to the inverter and a second amplifier for sensing the load current when the load is a high power load connected to the inverter. Vehicle functionality such as start/stop functionality may be disabled while the load sensor senses that the load is connected to the inverter whereas the start/stop functionality may be disabled while the load sensor senses that the load is not connected to the inverter. | 2015-03-26 |
20150085544 | Rectifying Circuit, Electronic Circuit, and Electronic Apparatus - A rectifying circuit according to an embodiment includes a first rectifying portion and a second rectifying portion. The first rectifying portion has a positive temperature coefficient. The second rectifying portion has a negative temperature coefficient, is connected in parallel to the first rectifying portion, and has a forward voltage-forward current curve intersecting a forward voltage-forward current curve of the first rectifying portion. | 2015-03-26 |
20150085545 | CURRENT GENERATOR AND METHOD FOR GENERATING CURRENT PULSES - A method for generating current pulses and a current generator having a plurality of secondary stages. Each secondary stage has a DC voltage source and a switching circuit having four switches, connected together so as to form a line. One secondary stage being designated as a regulator stage has a regulator circuit having a smoothing inductor, a switch arranged between a terminal of the smoothing inductor and the DC voltage source, and a circuit for connecting the terminal of the smoothing inductor to the switching circuit when the switch of the regulator circuit is in a locked state. A control circuit of the current generator controls the switches of the switching circuits and the switch of the regulator circuit. | 2015-03-26 |
20150085546 | MULTI-LEVEL CONVERTER APPARATUS AND METHODS USING CLAMPED NODE BIAS - A multi-level converter includes first and second DC buses, a plurality of transistors coupled in series between the first and second DC buses and a clamp circuit configured to clamp a node joining a first transistor and a second transistor of the plurality of transistors. The converter further includes a bias circuit coupled to the clamped node, which may reduce or prevent voltage stress on the transistors. Related methods of operation are also described. | 2015-03-26 |
20150085547 | SELF-DRIVEN AC-DC SYNCHRONOUS RECTIFIER FOR POWER APPLICATIONS - Systems, methods, and devices that employ self-driven gate-drive circuitry to facilitate controlling power switches to emulate a diode bridge to synchronously rectify a power signal are presented. A single-phase or multi-phase synchronous rectifier can comprise at least a first pair of switches of a first conducting path and a second pair of switches of a second conducting path that can form or emulate a diode bridge. To facilitate emulating turn-on and turn-off conditions of a diode, a switch can be turned on when voltage across the switch is forward-biased and turned off when switch current is reversed; also, there can be at least one current-controlled switch in each conducting path. Self-driven gate-drive circuitry employs low power components that can facilitate controlling respective switching of the at least first pair and second pair of switches, wherein switching of the switches is also controlled at start-up to emulate a diode bridge. | 2015-03-26 |
20150085548 | ELECTRIC POWER CONVERSION DEVICE - An electric power conversion device of an embodiment includes the electric power conversion device expressed as an equivalent circuit including, a power supply, a first parasitic inductance, a first diode; a second parasitic inductance connected to the first diode in series, a second diode connected to the first diode in parallel, a third parasitic inductance connected to the second diode in series, a switching element, a gate circuit, and a load. The equivalent circuit includes a first circuit loop and a second circuit loop. The first circuit loop includes the power supply, the first parasitic inductance, the first diode, the second parasitic inductance, the switching element, and the gate circuit. The second circuit loop includes the power supply, the first parasitic inductance, the second diode, the third parasitic inductance, the switching element, and the gate circuit. | 2015-03-26 |
20150085549 | POWER CONVERSION APPARATUS - A power conversion apparatus includes a first power conversion circuit including a first switching element, a second power conversion circuit including a second switching element, a DC conductor which is provided in the first power conversion circuit and supplies a DC power to the first power conversion circuit, and a connection conductor which is provided in the first power conversion circuit, has a length having an inductance for inhibiting a flow of a ripple current caused by switching of the second switching element of the second power conversion circuit, and connects the DC conductor and the second power conversion circuit. | 2015-03-26 |
20150085550 | BIDIRECTIONAL CONVERTER WITH PREFERENTIAL DIRECTION AND REACTIVE POWER-CAPABLE INVERTER HAVING SAID CONVERTER - A half-bridge of a bidirectional converter is divided into a first and a second conduction path connected in parallel. In each of the conduction paths a switching element and a freewheeling diode are connected in series, and the center points of the conduction paths are connected via a second inductor. The second inductor is connected in series with a first inductor which is connected to the center point of the second conduction path. The half-bridge has two operating modes. In each of the two operating modes the switching element in one of the two conduction paths is clocked at a high frequency to cause a flow of energy in one of two directions between a pair of high voltage-side connections and a pair of low voltage-side connections to the half-bridge. The two switching elements are of different types, the switching element in the first conduction path causing higher switching losses. | 2015-03-26 |
20150085551 | MATRIX CONVERTER - A matrix converter includes a power converter and a controller. The power converter includes bidirectional switches each having a controllable conducting direction. The bidirectional switches are disposed between input terminals and output terminals. The input terminals are respectively coupled to phases of an AC power source. The output terminals are respectively coupled to phases of a load. The controller controls the bidirectional switches. A first commutation controller performs commutation control when the conducting direction is unidirectional. A second commutation controller performs the commutation control when the conducting direction is bidirectional. A selector selects between the first commutation controller and the second commutation controller to perform the commutation control based on a state of an output current from the power converter. | 2015-03-26 |
20150085552 | MATRIX CONVERTER - A matrix converter includes a power converter and a controller. The power converter includes bidirectional switches each having a conducting direction controllable by switching elements. The bidirectional switches are disposed between input terminals coupled to phases of an AC power source and output terminals coupled to phases of a load. A first commutation controller performs commutation control based on a first commutation. A second commutation controller performs the commutation control based on a second commutation. A selector selects between the first and second commutation controllers and to perform the commutation control based on a vector of an output current or an output voltage from the power converter or a vector of an input voltage or an input current from the AC power source to the power converter. | 2015-03-26 |
20150085553 | MATRIX CONVERTER - A matrix converter includes: a power convertor that includes a plurality of bidirectional switches; and a controller configured to control the plurality of bidirectional switches. The controller includes: a first commutation controller configured to perform a commutation control with a first commutation method; a second commutation controller configured to perform a commutation control with a second commutation method different from the first commutation method; and a selector configured to select a commutation controller that is configured to execute a commutation control from the first commutation controller and the second commutation controller based on any one of a phase of an output electric current from the power convertor and a phase of an input voltage to the power convertor. | 2015-03-26 |
20150085554 | STATIC NAND CELL FOR TERNARY CONTENT ADDRESSABLE MEMORY (TCAM) - A static, ternary content addressable memory (TCAM) includes a key cell and a mask cell coupled to intermediate match lines. The key cell is coupled to a first pull-down transistor and a first pull-up transistor. The mask cell is coupled to a second pull-down transistor and a second pull-up transistor. The first pull-down transistor and second pull-down transistor are connected in parallel and the first pull-up transistor and second pull-up transistor are connected in series. A match line output is also coupled to the first pull-down transistor and second pull-down transistor and further coupled to the first pull-up transistor and second pull-up transistor. | 2015-03-26 |
20150085555 | PACKAGED MEMORY DIES THAT SHARE A CHIP SELECT LINE - An apparatus includes a memory module, and the memory module includes a package. The package contains memory dies, and the memory dies share a chip select line. | 2015-03-26 |
20150085556 | THREE DIMENSIONAL DUAL-PORT BIT CELL AND METHOD OF USING SAME - A three dimensional dual-port bit cell generally comprises a first portion disposed on a first tier, wherein the first portion includes a plurality of port elements. The dual-port bit cell also includes a second portion disposed on a second tier that is vertically stacked with respect to the first tier using at least one via, wherein the second portion includes a latch. | 2015-03-26 |
20150085557 | MEMORY HAVING ONE TIME PROGRAMMABLE (OTP) ELEMENTS AND A METHOD OF PROGRAMMING THE MEMORY - A method of programming a memory includes selecting a logic state for programming a first bitcell of the memory. A first one-time-programmable (OTP) element of the first bitcell is programmed using a first set of conditions intended to achieve a first target resistance in accordance with the selected logic state which results in a first degree of programming of the first OTP element. A second OTP element of the first bitcell is programmed using a second set of conditions different from the first set of conditions intended to achieve a second target resistance in accordance with the selected logic state which results in a second degree of programming of the second OTP element, wherein the first and second degrees of programming are visually indistinguishable. | 2015-03-26 |
20150085558 | DEVICE AND METHOD FOR FORMING RESISTIVE RANDOM ACCESS MEMORY CELL - A device and method for forming resistive random access memory cell are provided. The method includes: providing a first voltage to a first word line connected to a first RRAM cell to form the first RRAM cell; and providing a negative voltage to a second word line connected to a second RRAM cell that shares a first source line and a first bit line with the first RRAM cell. An exemplary device includes: a first RRAM cell, a second RRAM cell, a first voltage source and a charge pump circuit. The first RRAM cell is connected to a first word line. The second RRAM cell is connected to a second word line. The first voltage source provides a first voltage to the first word line to form the first RRAM cell. The charge pump circuit provides a negative voltage to the second word line. | 2015-03-26 |
20150085559 | ELECTRONIC DEVICE AND METHOD FOR FABRICATING THE SAME - According to embodiments, a semiconductor memory may include: a variable resistance pattern disposed over a substrate and extended in a first direction; first and second structures including a plurality of interlayer dielectric layers and a plurality of conductive layers which are alternately stacked over the substrate, and contacted with one side surface and the other side surface of the variable resistance pattern, respectively, wherein the first stacked structure has a line shape extended in a first direction and the second stacked structure has a pillar shape; and a pillar-shaped conductive pattern contacted with one side surface of the second stacked structure, which is not contacted with the variable resistance pattern. | 2015-03-26 |
20150085560 | RERAM MEMORY CONTROL METHOD AND DEVICE - A method of controlling an array of ReRAM cells including programmable-resistance storage elements, including: during a standby period, applying a non-zero standby voltage between electrodes of the storage elements of each cell of the array. | 2015-03-26 |
20150085561 | SEMICONDUCTOR DEVICE AND WRITE METHOD - A semiconductor device includes a memory cell array including a plurality of first and second memory cells each comprising a variable resistance element that establishes an electrical resistance that changes in response to an application of a write voltage after a forming voltage has been applied, the first memory cell to which the forming voltage is applied, and the second memory cell to which the forming voltage is not applied, and the second memory cell being configured to store one of first and second logic values constituting first information, the first and second logic values being different from each other. | 2015-03-26 |
20150085562 | RESISTANCE CHANGE MEMORY - A resistance change memory includes a first conductive line extending in a first direction, a second conductive line extending in a second direction which is crossed to the first direction, a cell unit including a memory element and a rectifying element connected in series between the first and second conductive lines, and a control circuit which is connected to both of the first and second conductive lines. The control circuit controls a voltage to change a resistance of the memory element between first and second values reversibly. The rectifying element is a diode including an anode layer, a cathode layer and an insulating layer therebetween. | 2015-03-26 |
20150085563 | MEMORY AND MEMORY SYSTEM INCLUDING THE SAME - A memory includes a plurality of word lines each coupled to one or more memory cells, an address storage unit suitable for storing an address of a word line selected for access by a control unit among the plurality of word lines at a first time point; and the control unit suitable for sequentially refreshing the plurality of word lines in response to application of a refresh command, refreshing one or more adjacent word lines adjacent to a word line corresponding to the address stored in the address storage unit in response to every Nth application of the refresh command where N is a natural number and selecting one or more of the plurality of word lines for access, wherein the first time point is included in time section other than a refresh section in which the control unit refreshes one or more word lines in response to application of the refresh command. | 2015-03-26 |
20150085564 | MEMORY AND MEMORY SYSTEM INCLUDING THE SAME - A memory includes a plurality of word lines each coupled to one or more memory cells, an address storage unit suitable for storing an address of a word line selected for access by a control unit among the plurality of word lines at a first time point; and the control unit suitable for sequentially refreshing the plurality of word lines in response to application of a refresh command, refreshing one or more adjacent word lines adjacent to a word line corresponding to the address stored in the address storage unit in response to every Nth application of the refresh command where N is a natural number and selecting one or more of the plurality of word lines for access, wherein the first time point is included in time section other than a refresh section in which the control unit refreshes one or more word lines in response to application of the refresh command. | 2015-03-26 |
20150085565 | Cross-Point Memory Cells, Non-Volatile Memory Arrays, Methods of Reading a Memory Cell, Methods of Programming a Memory Cell, Methods of Writing to and Reading from a Memory Cell, and Computer Systems - Cross-point memory cells, non-volatile memory arrays, methods of reading a memory cell, methods of programming a memory cell, and methods of writing to and reading from a memory cell are described. In one embodiment, a cross-point memory cell includes a word line extending in a first direction, a bit line extending in a second direction different from the first direction, the bit line and the word line crossing without physically contacting each other, and a capacitor formed between the word line and the bit line where such cross. The capacitor comprises a dielectric material configured to prevent DC current from flowing from the word line to the bit line and from the bit line to the word line. | 2015-03-26 |
20150085566 | INPUT TRIGGER INDEPENDENT LOW LEAKAGE MEMORY CIRCUIT - Wordline-driver biasing and column-based source-biasing circuitry facilitate reduced current leakage, for example, in SoC device SRAM circuits in a manner that is independent of the read/write/standby operating mode, and without an external trigger. Wordline-driver-biasing circuitry turns off (i.e., decouples from system power) wordline-drivers that are connected to unselected wordlines during read/write operations using one of a decoder-enable signal, which is generated in response to row address values, or based on the activation of a self-timing internal clock, which is generated by the memory circuit when it is activated (i.e., switched from standby to read/write mode). Alternatively, or in addition, source-biasing circuitry applies a relatively high source-biasing voltage to the source terminals of memory cells in unselected columns during read/write operations based on column address values (i.e., a low source voltage is applied only to the selected column being written to or read from). | 2015-03-26 |
20150085567 | THREE-DIMENSIONAL TWO-PORT BIT CELL - A semiconductor memory includes a read port array disposed on a first layer of a three-dimensional integrated circuit and a bit cell array disposed on a second layer of the three-dimensional integrated circuit. The second layer being vertically positioned above or below the first layer. At least one bit cell of the bit cell array is coupled to at least one read port cell of the read port array by a via extending from the first layer to the second layer. | 2015-03-26 |
20150085568 | READ/WRITE ASSIST FOR MEMORIES - An integrated circuit includes one or more bit cells, a word line coupled to the one or more bit cells, and a dummy word line arranged with the word line to have a capacitance therebetween. The capacitance provides a voltage boost or reduction of the word line to assist read and write operations. | 2015-03-26 |
20150085569 | ELECTRIC FIELD FERROMAGNETIC RESONANCE EXCITATION METHOD AND MAGNETIC FUNCTION ELEMENT EMPLOYING SAME - To realize an electric field-driven type ferromagnetic resonance excitation method of low power consumption using an electric field as drive power, and provide a spin wave signal generation element and a spin current signal generation element using the method, a logic element using the elements, and a magnetic function element such as a high-frequency detection element and a magnetic recording device using the method. A magnetic field having a specific magnetic field application angle and magnetic field strength is applied to a laminate structure in which an ultrathin ferromagnetic layer sufficiently thin so that an electric field shield effect by conduction electrons does not occur and a magnetic anisotropy control layer are directly stacked on each other and an insulation barrier layer and an electrode layer are arranged in order on an ultrathin ferromagnetic layer side. An electric field having a high-frequency component of a magnetic resonance frequency is then applied between the magnetic anisotropy control layer and the electrode layer, thereby efficiently exciting ferromagnetic resonance in the ultrathin ferromagnetic layer. | 2015-03-26 |
20150085570 | PHASE CHANGE MEMORY MASK - Technology for writing data to a phase change memory array is disclosed. In an example, a method may include identifying mask logic for masking cells in the phase change memory array and routing the mask logic to the cells. The method may further include routing input data to the cells. Set and reset pulses for the cells may be selectively prevented or inhibited based on the mask logic. | 2015-03-26 |
20150085571 | UPDATING READ VOLTAGES - A data storage device includes a controller that is configured to determine a first read voltage for a first page of a non-volatile memory (e.g., a lower page of a Multi-Level Cell flash memory device). The controller is also configured to determine a second read voltage for a second page (e.g., an upper page) of the non-volatile memory by applying an offset value to the first read voltage. The controller is also configured to store data identifying the first read voltage and the second read voltage. | 2015-03-26 |
20150085572 | STORAGE OF READ THRESHOLDS FOR NAND FLASH STORAGE USING LINEAR APPROXIMATION - A first read threshold associated with a first page in a block and a second read threshold associated with a second page in the block are received, where the first page has a first page number and the second page has a second page number. A slope and a y intercept are determined based at least in part on the first read threshold, the second read threshold, the first page number, and the second page number. The slope and the y intercept are stored with a block identifier associated with the block. | 2015-03-26 |
20150085573 | UPDATING READ VOLTAGES - A method performed at a data storage device includes adjusting a first read voltage and a second read voltage to form sets of read voltages. First representations of data are read from a logical page in the non-volatile memory according to the sets of read voltages. The first representations of the data correspond to multiple values of the first read voltage and the second read voltage. The first representations of the data are stored in a memory and second representations of the data are generated based on the first representations. A value of the first read voltage is selected based on syndrome weights corresponding to the second representations. | 2015-03-26 |
20150085574 | Back Gate Operation with Elevated Threshold Voltage - In a three dimensional NAND memory, increased threshold voltages in back gate transistors may cause program failures, particularly along word lines near back gates. When back gate transistor threshold voltages cannot be returned to a desired threshold voltage range then modified program conditions, including increased back gate voltage, may be used to allow programming. | 2015-03-26 |
20150085575 | Multi-Word Line Erratic Programming Detection - Techniques are presented to detect word line failures (such as word line to word line shorts, control gate to substrate shorts, broken word lines, and so on) in non-volatile memory arrays. A first simultaneous read of multiple word lines is performed, followed by a second simultaneous read of the same word lines, where the read conditions of the two reads are shifted by a margin. For example, one of the read could use a standard read voltage on the word lines, while the other read could shift these levels slightly higher. The results of the two reads can then be compared on a bit line by bit line basis, XOR-ing the results to determine is the set of word lines may include any defective members. | 2015-03-26 |
20150085576 | SEMICONDUCTOR MEMORY APPARATUS - A semiconductor memory apparatus includes a memory block including memory cells coupled between a bit line and a source line and operating in response to voltages applied to word lines, and a peripheral circuit suitable for performing operations relating to data input and output of the memory cells, wherein the peripheral circuit is suitable for applying a precharge voltage to the bit line when word lines adjacent to a selected word line are set to a floating state. | 2015-03-26 |
20150085577 | FLASH MEMORY MODULE FOR REALIZING HIGH RELIABILITY - A flash memory module may include a plurality of flash memory chips. The memory chips may include one or more blocks. Each block may be a unit of erasing data. A flash controller may be coupled to the plurality of flash memory chips. The flash controller may program data to block and erase data from a block. The flash controller may manage a recent programming time for each of the plurality of blocks. The flash controller may erase data stored in a block for which an elapsed programming time is larger than a first value. | 2015-03-26 |
20150085578 | METHOD AND SYSTEM FOR PROGRAMMING NON-VOLATILE MEMORY CELLS BASED ON PROGRAMMING OF PROXIMATE MEMORY CELLS - A multi-level non-volatile memory device programs cells in each row in a manner that takes into account the coupling from the programming of cells that are proximate the row to be programmed. In one example of the invention, after the row has been programmed, the proximate cells are verified by read, comparison, and, if necessary, reprogramming operations to compensate for charge added to proximate memory cells resulting from programming the row. In another example of the invention, a row of memory cells is programmed with charge levels that take into account the charge that will be added to the memory cells when proximate memory cells are subsequently programmed. | 2015-03-26 |
20150085579 | CONTACT STRUCTURE AND FORMING METHOD - Vias are formed within a stack of alternating active and insulating layers by forming a first sub stack, a second sub stack over the first sub stack, a first buffer layer therebetween and a second buffer layer under the first sub stack. An upper layer of the first sub stack is exposed through a set of vias by first and second etching processes. The first etching process forms a first set of etch vias through the second sub stack and stops at or in the first buffer layer. The second etching process etches through the first buffer layer to the upper layer of the first sub stack. A third etching process etches through the first set of etch vias, through the first sub stack and stops at or in the second buffer layer. A fourth etching process and etches through the second buffer layer. | 2015-03-26 |
20150085580 | MEMORY DEVICE WITH MULTIPLE CELL WRITE FOR A SINGLE INPUT-OUTPUT IN A SINGLE WRITE CYCLE - A non-volatile memory device incorporates a write buffer within a multi-level column decoder to enable multiple memory cells associated with a single write driver to be written in parallel. In this manner, in a non-volatile memory such as a flash memory that performs batch write operation, a group of data bits for a single I/O can be written to the memory cells at a time, thereby reducing the number of write cycles required for writing a block of program data and increasing the speed of write operation. | 2015-03-26 |
20150085581 | NON-VOLATILE MEMORY PROGRAMMING - Some embodiments include a memory device and a method of programming memory cells of the memory device. One such method can include applying a signal to a line associated with a memory cell, the signal being generated based on digital information. The method can also include, while the signal is applied to the line, determining whether a state of the memory cell is near a target state when the digital information has a first value, and determining whether the state of the memory cell has reached the target state when the digital information has a second value. Other embodiments including additional memory devices and methods are described. | 2015-03-26 |
20150085582 | PROGRAMMING METHOD OF NONVOLATILE MEMORY DEVICE - Provided is a programming method of a nonvolatile memory device which includes a plurality of strings each including a source select transistor, a plurality of memory cells, and a drain select transistor which are connected in series between a common source line and a bit line, The programming method includes: applying a first voltage to the common source line during a first period in which a channel of a plurality of memory cells of an unselected string is floated; and applying a second voltage increased more than the first in voltage to the common source line during a second period in which a selected memory cell is programmed, when a selected word line belongs to a word line group adjacent to the common source line. | 2015-03-26 |
20150085583 | NONVOLATILE MEMORY APPARATUS, PROGRAM METHOD THEREOF, AND DATA PROCESSING SYSTEM USING THE SAME - A nonvolatile memory apparatus includes: a memory cell area including a plurality of memory cells connected to a word line and a bit line; a program time controller configured to determine a program voltage application time for a selected word line, as the selected word line is selected in response to a program command and an address signal; and a controller configured to apply a program voltage to the selected word line according to the program voltage application time determined by the program time controller. | 2015-03-26 |
20150085584 | SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD THEREOF - A semiconductor memory device and an operating method thereof are provided. The semiconductor memory device includes a memory cell array including a plurality of memory groups each including at least a drain-select transistor and a plurality of memory cells, a voltage generator suitable for generating a read voltage that is to be applied to a selected memory cell of the memory cells and a pass voltage that is to be applied to unselected memory cells other than the selected memory cell among the memory cells, and a control logic suitable for controlling the voltage generator to generate the pass voltage to have different levels depending on a distance between the drain-select transistor and the selected memory cell during a read operation. | 2015-03-26 |
20150085585 | NVM DEVICE USING FN TUNNELING WITH PARALLEL POWERED SOURCE AND DRAIN - A nonvolatile memory (“NVM”) bitcell includes a capacitor, a transistor, and a tunneling device. The capacitor, transistor, and tunneling device are each electrically coupled to different active regions and metal contacts. The three devices are coupled by a floating gate that traverses the three active regions. The tunneling device is used to program and erase the device, allowing for faster page erasure, and thus allows for rapid testing and verification of functionality. The transistor is used to read the logical state of the floating gate. The capacitor and floating gate are capacitively coupled together, removing the need for a separate selection device to perform read, write, and/or erase operations. | 2015-03-26 |
20150085586 | MEMORY DEVICE AND METHOD OF OPERATION OF SUCH A MEMORY DEVICE - A memory device having an array of memory cells connected to a core voltage level, and access circuitry used to perform a write operation in order to write data into a plurality of addressed memory cells. At least one bit line associated with at least each column in the array containing an addressed memory cell is precharged to the peripheral voltage level prior to the write operation being performed. Word line driver circuitry is then configured to assert a word line signal at the core voltage level on the word line associated with the row of the array containing the addressed memory cells. Write multiplexing driver circuitry asserts a mux control signal to write multiplexing circuitry which then couples the bit line of each addressed memory cell to the write driver circuitry in dependence on the mux control signal identifying which column contains the addressed memory cells. | 2015-03-26 |
20150085587 | PING-PONG BUFFER USING SINGLE-PORT MEMORY - A method of controlling a ping-pong buffer includes selectively providing one of a ping gated write clock signal and a ping gated read clock signal to a single-port ping buffer, and selectively providing a pong gated write clock signal or a pong gated read clock signal to a single-port pong buffer. A controller of a ping-pong buffer includes a ping multiplexer and a pong multiplexer. The ping multiplexer selectively provides a ping gated write clock signal or a ping gated read clock signal to a single-port ping buffer. The pong multiplexer selectively provides a pong gated write clock signal or a pong gated read clock signal to a single-port pong buffer. A ping-pong buffer system includes a ping buffer, a pong buffer, a ping multiplexer, and a pong multiplexer. The ping buffer and pong buffer each include a single-port memory. | 2015-03-26 |
20150085588 | METHOD AND APPARATUS FOR ADJUSTING DRAIN BIAS OF A MEMORY CELL WITH ADDRESSED AND NEIGHBOR BITS - The storage layer such as a nitride layer of a nonvolatile memory cell has two storage parts storing separately addressable data, typically respectively proximate to the source terminal and the drain terminal. The applied drain voltage while sensing the data of one of the storage parts depends on the data stored at the other storage part. If the data stored at the other storage part is represented by a threshold voltage exceeding a minimum threshold voltage, then the applied drain voltage is raised. This technology is useful in read operations and program verify operations to widen the threshold voltage window. | 2015-03-26 |
20150085589 | DATA MOVEMENT IN MEMORY DEVICES - Apparatus, systems, and methods for data movement in a memory device are described. In one embodiment, a memory controller comprises logic to move a row of data from a first row of a memory in a first section of a memory device to a second row of memory in a second section of the memory device without passing the data through a communication interface. Other embodiments are also disclosed and claimed. | 2015-03-26 |
20150085590 | SEMICONDUCTOR DEVICES AND SEMICONDUCTOR SYSTEMS INCLUDING THE SAME - Semiconductor systems are provided. The semiconductor system includes a controller and a semiconductor device. The controller is suitable for generating command signals and address signals. The semiconductor device is suitable for electrically disconnecting a first local line from a second local line in response to an input control signal enabled in a read mode. The read mode is set according to a logic combination of the command signals. Further, the semiconductor device is suitable for sensing and amplifying a data on the first local line or the second local line according to the address signals to output the amplified data through an input/output line. | 2015-03-26 |
20150085591 | ESTIMATION OF LEVEL-THRESHOLDS FOR MEMORY CELLS - Methods and apparatus are provided for determining level-thresholds for q-level memory cells. A plurality of the memory cells are read to obtain respective read signal components. The read signal components are processed in dependence on signal level to produce a signal level vector, comprising a series of elements, indicative of the distribution of read signal components in order of signal level. The signal level vector is scanned with a sliding window of length greater than the spacing of successive window positions in the scan. At each window position, a metric Mi is calculated in dependence on the elements of the signal level vector in the window. A level-threshold for successive memory cell levels is then determined in dependence on variation of the metric over the scan. | 2015-03-26 |
20150085592 | Bit-Line Discharge Assistance in Memory Devices - One embodiment is an apparatus that has a memory array, a discharge device, and a discharge assistance controller. The memory array has memory cells arranged in at least one column that is coupled to a read bit line, and the discharge device is configured to provide discharge assistance to the read bit line. The discharge assistance controller is configured to modify duration of the discharge assistance in correlation with capacitance of the read bit line. | 2015-03-26 |
20150085593 | NON-VOLATILE MEMORY (NVM) WITH DYNAMICALLY ADJUSTED REFERENCE CURRENT - A sense amplifier is configured to sense a current from a selected bit cell of a non-volatile memory array and compare the sensed current to a reference current to determine a logic state stored in the bit cell. A controller is configured to perform a program/erase operation on at least a portion of the memory array to change a logic state of at least one bit cell of the portion of the memory array; determine a number of program/erase pulses applied to the at least one bit cell during the program/erase operation to achieve the change in logic state; and when the number of program/erase pulses exceeds a pulse count threshold, adjust the reference current of the sense amplifier for a subsequent program/erase operation. | 2015-03-26 |
20150085594 | METHOD AND APPARATUS FOR REFRESHING A MEMORY CELL - Memory devices may send information related to refresh rates to a memory controller. The memory controller may instruct the memory devices to refresh based on the received information. | 2015-03-26 |
20150085595 | Protocol For Refresh Between A Memory Controller And A Memory Device - The present embodiments provide a system that supports self-refreshing operations in a memory device. During operation, the system transitions the memory device from an auto-refresh state, wherein a memory controller controls refreshing operations for the memory device, to a self-refresh state, wherein the memory device controls the refreshing operations. While the memory device is in the self-refresh state, the system sends progress information for the refreshing operations from the memory device to the memory controller. Next, upon returning from the self-refresh state to the auto-refresh state, the system uses the progress information received from the memory device to control the sequencing of subsequent operations by the memory controller. | 2015-03-26 |
20150085596 | SEMICONDUCTOR DEVICES HAVING MULTI-CHANNEL REGIONS AND SEMICONDUCTOR SYSTEMS INCLUDING THE SAME - The semiconductor device includes a first channel region suitable for including a first pad region and a first core region and receiving a first power signal through a first power line, a second channel region suitable for including a second pad region and a second core region and receiving the first power signal through a second power line, and a switch unit suitable for electrically disconnecting the second power line from a first power stabilization unit if a predetermined operation of the first channel region is performed and electrically disconnecting the first power line from the first power stabilization unit if the predetermined operation of the second channel region is performed. | 2015-03-26 |
20150085597 | SINGLE-SCREW EXTRUDER WITH GROOVED INFEED SYSTEM - A single-screw extruder includes a grooved infeed system, a cylinder, and an extruder screw rotatably supported in the cylinder. The extruder screw has a softening zone, a main plasticizing zone, and a post-plasticizing zone and is at least double-threaded in the area of the main plasticizing zone. The cylinder at least partially has at least one groove extending substantially in the longitudinal direction in the region of the main plasticizing zone. | 2015-03-26 |
20150085598 | SYSTEM AND METHOD FOR STARTING UP STIRRING MACHINES IN A SEDIMENT - A system and an associated method for starting up stirring machines in a sediment in a controlled manner are provided, which system has the following: a container for receiving materials to be processed; a stirring device with stirring blades for stirring the materials to be processed in the container; a purging device; and a device for operating stirring machines. The purging device is arranged in such a way and set up so as to feed a medium for purging to a deposited sediment. Furthermore, a control is provided which initiates controlled re-starting of stirring machines after purging. | 2015-03-26 |
20150085599 | CONTINUOUS MAGNETIC MIXING SYSTEM WITH FLEXIBLE GEOMETRIC MIXING ZONE - A mixing process and system can include a plurality of magnetic particles within a fluid such as a liquid or solid to be mixed. The fluid to be mixed is dispensed within a mixing zone that may include a mixing tube. Two or more opposing electromagnets are independently activated out of sync to affect a travel path of the magnetic particles to form a turbulence within the fluid to provide an effective mixing of the fluid. The magnetic particles may be removed from the fluid, for example by filtering, or may remain within the fluid. | 2015-03-26 |
20150085600 | Apparatus and Method for Contacting a Gas and a Liquid - A gas and a liquid are contacted in an apparatus, comprising a housing provided with: a liquid supply; at least two inclined plates that have been arranged in series and that are on a liquid side in fluid communication with the liquid supply; and a gas supply that is in fluid communication with a space at the other, gas side of the plates; | 2015-03-26 |
20150085601 | VORTEX MIXING AND RATIO ADJUSTMENT SYSTEM - A matter displacement and mixing system having a mixing chamber for material to enter, and a vortex aperture that directs air into the mixing chamber at either a high velocity for violent shearing or lower velocity for gentle mixing. This would depend on the shape of the vortex aperture, or the pressure. | 2015-03-26 |
20150085602 | SYSTEM AND METHOD FOR FINDING FISH USING A SONAR DEVICE AND A REMOTE COMPUTING SYSTEM - The present invention generally relates to a sonar fish finding system. Specifically, this invention relates to a sonar device which attaches to a fishing line and floats on the water like a fishing bubble, float, or bobber. The sonar device pairs with a wireless computing device over a Bluetooth Smart (also known as Bluetooth Low Energy) connection to provide information to a fisherman about what is under the surface of the water. In some embodiments, processing may be done on subsets of sonar data samples in order to allow for processing a complete result without requiring storage of the entire set of data samples at once. In certain embodiments of the present invention, the sonar device sends data to a remote computing system either directly or indirectly through a wireless computing device. The remote computing system also sends the wireless computing device information about both real-time fishing hotspots, and fishing hotspots predicted based on historical data and current conditions. | 2015-03-26 |
20150085603 | SYSTEMS AND METHODS FOR DETERMINING THE FAR FIELD SIGNATURE OF A SOURCE IN WIDE AZIMUTH SURVEYS - Systems and methods for determining the far field signature of a source in wide azimuth surveys are disclosed. The method includes determining a position of a first sensor and a source. The first sensor is attached to a first vessel and the source is attached to a second vessel. The method further includes calculating a reflected incidence angle between the first sensor and the source, determining a position for a second sensor based on a direct incidence angle between the second sensor and the source approximating the direct incidence angle. The method also includes determining a far field signature for the source based on the direct incidence angle. | 2015-03-26 |