13th week of 2011 patent applcation highlights part 16 |
Patent application number | Title | Published |
20110074418 | MAGNETIC RESONANCE IMAGING APPARATUS AND METHOD OF ASSISTING SETTING OF IMAGING PARAMETER - An object is to enhance usability of parameter check when an imaging parameter is changed in multistation imaging, and easily obtain a desired image with high quality. In the multistation imaging, it is determined in a lump before imaging whether an image having desired quality is obtained by using the changed value of the imaging parameter, and the result is presented to an operator. The determination is executed in the order of “possible or impossible” determination of execution of imaging itself and “possible or impossible” determination of combination of obtained images. When it is determined that it is impossible to execute the imaging itself, the determination processing is finished. At this time, a recommended value may be presented. | 2011-03-31 |
20110074419 | MAGNETIC RESONANCE IMAGING APPARATUS - An Magnetic Resonance Imaging (MRI) apparatus includes a static magnetic-field magnet that generates a static magnetic field in an imaging area in which a subject is to be placed; a main coil that is provided on the inner side of the static magnetic-field magnet, and applies a gradient magnetic field onto a subject placed in the static magnetic field; and a shield coil that is provided between the static magnetic-field magnet and the main coil, and shields a gradient magnetic field generated by the main coil. Moreover, a Radio Frequency (RF) coil side cooling system including a plurality of cooling pipes that circulates a coolant in pipe is provided on the inner side of the main coil. | 2011-03-31 |
20110074420 | MAGNETIC RESONANCE SYSTEM - A magnetic resonance system is disclosed, with a tunnel for accommodating an object under investigation and at least one local coil array. In at least one embodiment, the local coil array is arranged in a fixed position within the tunnel and in the longitudinal direction of the magnetic resonance system, where the geometry of the local coil array, in particular its diameter, can be altered. In at least one embodiment, for the purpose of arranging the local coil array on the patient's body, at least a proportion of the coils of the local coil array is attached to a fixture the volume of which can be altered, either hydraulically or pneumatically. The fixture is subdivided into chambers, the volumes of which can be altered separately in order to realize a bending of the fixture. Or, in at least one embodiment, for the purpose of arranging the local coil array on the patient's body at least a proportion of the coils of the local coil array is arranged on a lamellar structure so that they can be moved relative to each other. | 2011-03-31 |
20110074421 | MAGNETIC RESONANCE IMAGING APPARATUS - A magnetic resonance imaging apparatus according to an embodiment includes a gradient coil and a coil cooling pipe. The gradient coil applies a gradient magnetic field onto a subject placed in a static magnetic field. The coil cooling pipe is provided to the gradient coil, and cools the gradient coil by circulating a coolant inside pipe. The coil cooling pipe is provided so as to extend from one end of the gradient coil in the direction toward the other end, then to bend, and to return to the one end along the shape of the gradient coil. | 2011-03-31 |
20110074422 | METHOD AND APPARATUS FOR MAGNETIC RESONANCE IMAGING AND SPECTROSCOPY USING MULTIPLE-MODE COILS - A RF coil for use with a resonance imaging device, the RF coil comprises a conductor comprising a first conductive region, a second conductive region substantially isolated from the first portion along its length, and at least one coupling portion adjacent to ends of the first and second portions and configured to electrically couple the first and second portions at a first predetermined frequency. The coil further includes a dielectric substrate supporting the conductor. The RF coil is configured to perform one of excitation, detection, reception, or a combination thereof. A method of using one or more RF coil is further disclosed. | 2011-03-31 |
20110074423 | ANISOTROPIC DIFFUSION PHANTOM FOR CALIBRATION OF DIFFUSION TENSOR IMAGING PULSE SEQUENCES USED IN MRI - The subject matter of the invention concerns the anisotropic diffusion phantom for the calibration of any diffusion MR-DTI imaging sequence and a method for the calibration of all the MRI scanners by using anisotropic diffusion models based on the “b” matrix, which is a quantity specific for every magnetic resonance (MR) imaging sequence and the MRI scanner used. It has application in the study of solids, amorphous materials, liquids and biological tissues. The anisotropic diffusion phantom for the calibration of any MR imaging sequence is any anisotropic diffusion model of any shape for the hydrogen H | 2011-03-31 |
20110074424 | CUSHION FOR A PATIENT BED IN A MEDICAL IMAGING APPARATUS - An MRT acquisition can be simplified by a method, an MRT apparatus and a support, for example a cushion, for a magnetic resonance tomography examination, that has at least one positioning aid for a heel of the patient and that has at least one positioning aid for the head. | 2011-03-31 |
20110074425 | APPARATUS FOR FEEDING A MAGNETIC RESONANCE COIL ELEMENT AND METHOD OF MAKING SAME - A method, system, and apparatus including a magnetic resonance (MR) coil system that includes an MR coil element, a high input Pre-amplifier having a high input impedance field-effect-transistor (FET) with an impedance of one of substantially equal to 500 ohms and greater than 500 ohms, and a conductive path. The conductive path has a first end coupled to the MR coil element and a second end coupled to the high input Pre-amplifier such that the MR coil element is coupled in series with the high input Pre-amplifier. Further, the conductive path is free of a matching network intervening between the MR coil element and the high input Pre-amplifier. | 2011-03-31 |
20110074426 | Detector module for an emission tomography scanner - An emission tomography detector module and an emission tomography scanner are disclosed. In at least one embodiment, the emission tomography detector modules includes a scintillator to capture an photon, the scintillator emitting a scintillating light on capturing the photon; a first type of solid-state photodetector to detect the scintillating light; and a second type of solid-state photodetector to detect the scintillating light, wherein the first type of solid-state photodetector and the second type of solid-state photodetector are different with respect to a detecting property. | 2011-03-31 |
20110074427 | Directional Resistivity Antenna Shield - A logging while drilling tool includes a directional resistivity antenna and an antenna shield having. The shield has at least one slot having at least one electrically open end formed therein. The antenna shield may include a base portion and a plurality of spaced apart fingers extending away from the base portion such that the finger ends are electrically isolated from the tool body and from one another. The antenna shield may alternatively include a plurality of spaced apart plates that are electrically isolated from the tool body and from one another. These antenna shields have been found to provide suitable physical protection for sensitive antenna components while at the same time being substantially transparent to both z-mode and x-mode electromagnetic waves. | 2011-03-31 |
20110074428 | Apparatus and Method for Downhole Electromagnetic Measurement While Drilling - A directional resistivity tool includes a pair of transmitters deployed between at least one pair of receivers. Each of the transmitters and receivers preferably includes collocated z-mode and x-mode antennae. Exemplary embodiments may further include additional receivers, for example, additional pairs of receivers deployed axially about the transmitters or one or more deep reading receivers deployed on one axial end of the transmitters. Tools in accordance with the invention enable directional resistivity measurements to be acquired at multiple depths of investigation using fewer transmitter firings than conventional tools. | 2011-03-31 |
20110074429 | DEFECTIVE EMITTER DETECTION FOR ELECTROLUMINESCENT DISPLAY - Inoperative or defective electroluminescent (EL) emitters in an EL display having a plurality of subpixels are detected. Current flow through a drive transistor in a subpixel is turned off, a selected test current is provided through the EL emitter in the subpixel using a current source, and the voltage at a second electrode of a readout transistor in the subpixel is measured to provide a status signal representative or characteristics of the selected EL emitter. The status signal for the subpixel is compared to the respective status signals of neighboring subpixels to determine whether the EL emitter in the subpixel is defective. | 2011-03-31 |
20110074430 | METHOD FOR EVALUATING SECONDARY BATTERY - A method for evaluating a secondary battery includes repeatedly performing: an open circuit voltage measurement step of measuring the open circuit voltage of the secondary battery to be evaluated at each of a plurality of temperatures; a potential change measurement step of measuring, after the open circuit voltage measurement step, the potential change in the secondary battery while changing the state of charge of the secondary battery; and an equilibrium potential measurement step of measuring the equilibrium potential of the secondary battery after the potential change measurement step. An entropy variation in each of the different states of charge is calculated based on the open circuit voltages at the plurality of temperatures measured in the state of charge, and a chemical diffusion coefficient in each of the different states of charge is calculated based on the equilibrium potential of the secondary battery and the potential change in the secondary battery both measured in the state of charge. The secondary battery is evaluated based on the entropy variations and the chemical diffusion coefficients in the different states of charge. | 2011-03-31 |
20110074431 | CIRCUITS AND METHODS FOR MEASURING CELL VOLTAGES IN BATTERY PACKS - A circuit used to measure cell voltages in a battery pack can include a cell voltage level shifter, a sense block, and a compensation current generator. The cell voltage level shifter selects a cell and shifts the terminal voltages of the selected cell from a first voltage level to a second voltage level. The sense block monitors the current consumed by the level shifter, and generates a signal indicative of the consumed current. The compensation current generator generates compensation currents to compensate the current consumed by the level shifter. Therefore, unbalance of the cell capacities caused by the current consumed by the level shifter can be reduced or eliminated, and thus the overall capacity of the battery pack can be improved. | 2011-03-31 |
20110074432 | METHODS AND APPARATUS FOR BATTERY TESTING - Methods and apparatus for testing electrical storage batteries monitor magnetic susceptibility of components of the storage batteries. In some embodiments, magnetic susceptibility of a plate in a lead-acid battery is determined to provide an indication of the state of charge of the battery. | 2011-03-31 |
20110074433 | BATTERY CAPACITY DETECTION FOR MULTI BATTERY CELLS - A battery gas gauge includes a voltage detection unit and a processor. The voltage detection unit is coupled to a battery pack and can measure a plurality of open circuit voltages of a plurality of cells in the battery pack respectively. The processor is coupled to the voltage detection unit and can determine a minimum open circuit voltage of the open circuit voltages, and can determine a first relative state of charge of the battery pack based on a relationship between the minimum open circuit voltage and a corresponding relative state of charge of a cell having the minimum open circuit voltage. | 2011-03-31 |
20110074434 | END OF LIFE DETECTION FOR A BATTERY - One particular implementation conforming to aspects of the present invention takes the form of a method for detecting the end of life of a battery for an electronic device. The method may include calculating the voltage of the battery in an unloaded state, holding the sampled unloaded battery voltage, measuring a loaded battery voltage, calculating the difference between the unloaded and loaded battery voltages and amplifying the calculated difference. Other implementations may take the form of a circuit to perform one or more of the operations of the above method. The circuit may include a sample and hold section and a differential amplifier to provide the amplified difference to a microcontroller for analysis. The microcontroller may also provide a warning or indication to the device or to a user of the device when the battery nears the end of life. | 2011-03-31 |
20110074435 | VOLTAGE MONITOR WITH SELF DIAGNOSTIC FUNCTION - In a voltage monitor, an abnormality detecting unit receives first information outputted from a first obtaining unit and second information outputted from a second obtaining unit, and determines that an abnormality that affects on at least one of first and second diagnostic thresholds arises in the voltage monitor when the first information is different from the second information. The abnormality detecting unit receives a first forced signal outputted from a first forced-output unit and a second forced signal outputted from a second forced-output unit. The abnormality detecting unit determines whether a timing at which the level of the first diagnostic threshold is switched for each step is deviated from a timing at which the level of the second diagnostic threshold is switched for a corresponding step based on a result of a comparison between the first forced signal and the second forced signal. | 2011-03-31 |
20110074436 | IDENTIFICATION OF FALSE POSITIVES IN HIGH IMPEDANCE FAULT DETECTION - A method, system and computer program product are disclosed for identifying false positive indications of high impedance faults in an AC electric power transmission and distribution network. In one embodiment, the method comprises using a procedure to monitor a phase conductor of the network for faults, said procedure generating a fault signal indicating a specified fault in the conductor. In this embodiment, the voltage and current waveform of the electric power conducted through the conductor are monitored. When a phase shift in said waveform is detected over a defined period of time, and said detected phase shift meets one or more given criteria, a correction signal is generated indicating that said fault signal is a false indication of the specified fault. The given criteria may include, for example, that the phase shift is more than a threshold value for a specified period of time. | 2011-03-31 |
20110074437 | SYSTEM AND METHOD FOR DETECTING A LOCATION OF FAULT IN A CABLE - The present invention is related to a system and a method for detecting a location of fault in a cable. The system for detecting a location of fault in a cable in accordance with an embodiment of the present invention includes: a cable, transmitting a fault current; a current transforming unit, connected to the cable and receiving the fault current and detecting an original signal of fault current; a detecting unit, detecting a first detail signal and a second detail signal from the original signal of fault current, the first detail signal and second detail signal being detail components in a high frequency band; a comparing unit, comparing the first detail signal with a preset reference value and determining a fault in the cable; and a signal filtering unit, generating a first filtering signal and a second filtering signal by use of the first detail signal and the second detail signal and outputting a fault detection signal based on a result of comparing the first detail signal with the second filtering signal. | 2011-03-31 |
20110074438 | STACKED SEMICONDUCTOR DEVICE AND METHOD OF CONNECTION TEST IN THE SAME - A stacked semiconductor device includes a first semiconductor device equipped with a first semiconductor chip | 2011-03-31 |
20110074439 | EYEGLASS LENS PROCESSING APPARATUS AND CALIBRATION SENSOR UNIT - An eyeglass lens processing apparatus includes lens chuck shafts, processing tools for processing a lens and processing tool rotating shafts to which the processing tools are attached. A calibration sensor unit for calibrating the eyeglass lens processing apparatus includes: an attachment portion attached to the lens chuck shafts; a contact member contacting the processing tools; a support mechanism configured to movably support the contact member and has an urging member that urges the contact member in a direction separating from the attachment portion; and a sensor that detects the contact of the contact member with the processing tools. The urging member has an urging force by which the processing tool rotating shafts and the lens chuck shafts are not bent to a predetermined tolerance or more when the contact member contacts the processing tools and is moved toward the attachment portion. | 2011-03-31 |
20110074440 | METHOD AND SYSTEM FOR COMPENSATING FOR VARIATION IN ATTENUATION MEASUREMENTS CAUSED BY CHANGES IN AMBIENT TEMPERATURE - A method and apparatus for determining the attenuation of an RF signal caused by a DPF at an unknown or different ambient temperature than the temperature used for DPF sensor calibration is disclosed. The method and apparatus determine the sensor attenuation just prior to determining the DPF attenuation by disconnecting the antennas and determining the attenuation of a loopback path. This sensor attenuation can then be deducted from the attenuation determined for the normal path that includes the attenuation caused by the loopback path, the cables, and the DPF. This method compensates for variation in the attenuation of the sensor caused by changes in ambient temperature of the sensor. Further temperature compensation is be achieved by determining additional factors to account for variations caused by changes in ambient temperature. | 2011-03-31 |
20110074441 | Low Capacitance Signal Acquisition System - A low capacitance signal acquisition system has a signal acquisition probe having a low capacitance input circuit coupled to a compensation amplifier in a signal processing instrument via a signal cable. The low capacitance input circuit, the signal cable and the signal processing instrument input have mismatched time constants with the compensation amplifier having feedback loop circuitry providing adjustable gain and pole-zero pairs for maintaining flatness over the low capacitance signal acquisition system frequency bandwidth. | 2011-03-31 |
20110074442 | METHOD AND DEVICE USING SHORTENED SQUARE WAVE WAVEFORMS IN SYNCHRONOUS SIGNAL PROCESSING - A method for impedance measurements, using synchronous detecting and modified rectangular signals. The method comprises introducing a first modified rectangular signal into a bioobject, receiving a response signal from said bioobject, introducing said response signal and a second modified rectangular signal into a synchronous detector, whereas either one or both rectangular signals are modified to remove particular higher harmonics from the signal. In one embodiment, either one or both the first and the second modified rectangular signals are generated by summing at least two modified rectangular signals, wherein at least one of such rectangular signals have a zero amplitude segment introduced between rectangular half periods. | 2011-03-31 |
20110074443 | LIVE FINGER DETECTION BY FOUR-POINT MEASUREMENT OF COMPLEX IMPEDANCE - A method and sensor assembly for determining the condition of a structure, especially for confirming if a measured fingerprint is on a live finger, measures characteristics of close to the structure surface. The sensor includes a first pair of current supply electrodes coupled to a current source, providing an electrical current to the skin, at least two pickup electrodes at chosen and different positions relative to the current supply electrodes, at least a first of the pickup electrodes being coupled to an instrument for measuring the voltage between the first pickup electrode and at least one of the pickup or current supply electrodes, storage for a predetermined set of values characterizing a certain condition of the surface, and means for comparing the characteristics from each pickup electrode with the measurements of the other pickup electrodes and with the predetermined set of characteristics for determining the surface condition. | 2011-03-31 |
20110074444 | SENSOR FOR DETECTION OF CONDUCTIVE BODIES | 2011-03-31 |
20110074445 | CAPACITANCE SENSING WITH MISMATCH COMPENSATION - Systems and methods are provided for determining the value of a capacitance. A system for sensing capacitance comprises an oscillator arrangement comprising a plurality of oscillators and a mismatch compensation arrangement coupled between the oscillator arrangement and a first capacitive element having a first capacitance. The mismatch compensation arrangement is configured to selectively couple the first capacitive element to a respective oscillator of the plurality of oscillators, wherein an oscillation frequency of the respective oscillator is influenced by the first capacitance. | 2011-03-31 |
20110074446 | Capacitance Measurement Circuit and Method Therefor - A capacitance measurement circuit includes an operation amplifier; a reference capacitor having a first terminal coupled to a first input terminal of the operation amplifier and a second terminal selectively coupled to a first or second reference voltage; a sensor capacitor having a first terminal coupled to a second input terminal of the operation amplifier and a second terminal selectively coupled to the first or second reference voltage; an approximation unit having an output terminal and an input terminal coupled to an output terminal of the operation amplifier; a conversion unit having an output terminal and an input terminal coupled to the output terminal of the approximation unit; and a coupling capacitor having a first terminal coupled to the first or second input terminal of the operation amplifier and a second terminal coupled to the output terminal of the conversion unit. | 2011-03-31 |
20110074447 | Capacitive occupant sensor and capacitive occupant detection apparatus - A capacitive occupant sensor for detecting an occupant sitting on a seat cushion of a seat of a vehicle includes a capacitive sensor mat, a cushion member, and a floating electrode. The capacitive sensor mat is disposed in the seat cushion and has a surface. The cushion member is disposed on the surface of the capacitive sensor mat. The floating electrode is disposed on an opposite side of the cushion member from the surface of the capacitive sensor mat. A projected area of the floating electrode with respect to the surface is smaller than the surface. The floating electrode is in an electrically-floating state with respect to the capacitive sensor mat. The occupant is detected based on an occupant capacitance between the capacitive sensor mat and the occupant and a floating capacitance between the capacitive sensor mat and the floating electrode. | 2011-03-31 |
20110074448 | POTENTIOMETER - Fill level sensors designed as potentiometers are known, having two resistor strips on an electrically insulating carrier, on each of which a plurality of conductor segments are disposed at a distance from each other and act together with a pickup shoe that can move relative to the carrier, wherein the conductor segments of the one resistor strip are disposed offset from the resistors of the other resistor strip in the direction of motion of the pickup shoe. The pickup shoe electrically connects one conductor segment of the one resistor strip to a conductor segment of the other resistor strip. In order to contact the two conductor segments to be bridged, the pickup shoe has two contacts. When, however, one contact of the pickup shoe contacts a conductor segment of the one resistor strip, the other contact is in the intermediate space between the conductor segments of the other resistor strip, due to the offset arrangement of the conductor segments, so that, under some circumstances, no electrical connection is made between the conductor segments to be bridged, and no output signal is present. The conductor segments of the two resistor strips and the contacts of the pickup shoe are made of expensive metal alloys comprising noble metal. For the potentiometer according to the invention, the production costs are reduced. According to the invention, the conductor segments ( | 2011-03-31 |
20110074449 | APPARATUS AND METHOD FOR RECORDING ELECTRICAL ACTIVITY IN CELLS - Apparatus for recording electrical activity produced by cells in-vitro, which comprises a device having a polymeric structure ( | 2011-03-31 |
20110074450 | Method for Measuring Target Component in Erythrocyte-Containing Specimen - [Object] To provide a method for measuring a target component in an erythrocyte-containing specimen with high reliability while suppressing the influence of the Ht value of the specimen. | 2011-03-31 |
20110074451 | PARTICLE MEASURING APPARATUS - A particle measuring apparatus comprising: a detection device with an aperture through which pass particles contained in a particle suspension liquid, for detecting a signal generated when a particle passes through the aperture; and a detection device supporting part comprising an elastic body, for supporting the detection device through the elastic body is disclosed. | 2011-03-31 |
20110074452 | DEVICE FOR EVALUATING DEGREE OF DEGRADATION OF LUBRICATING OIL - Provided are a device for evaluating a degree of degradation of a lubricating oil, a method of evaluating a degree of degradation of a lubricating oil, and an on-line lubricating oil management device, which are capable of measuring the degree of degradation of the lubricating oil in a simple and stable manner. The device for evaluating a degree of degradation of a lubricating oil, the method of evaluating a degree of degradation of a lubricating oil, and the on-line lubricating oil management device using the device and the method use a pH-ISFET, and make a determination as to a state of degradation of the lubricating oil through measurement of a change in hydrogen concentration of the lubricating oil by using, as an output, a change in current flowing between a drain and a source in a case where a constant voltage is applied between the drain and the source or a change in voltage between the drain and the source in a case where a constant current is caused to flow between the drain and the source. | 2011-03-31 |
20110074453 | SEMICONDUCTOR CHIP HAVING A CRACK TEST CIRCUIT AND METHOD OF TESTING A CRACK OF A SEMICONDUCTOR CHIP USING THE SAME - A semiconductor chip includes a line structure arranged along a peripheral region of the semiconductor chip region in order to inspect a crack, a first pad and second pad arranged on different end portions of the line structure, a second pad arranged on another end portion of the line structure, an inspection device activated during a crack test mode to electrically connect the first pad, the line structure and the second pad. The inspection device may include a first switching circuit connected between the first pad and the line structure, the first switching circuit being deactivated during a normal operation mode and being activated a crack test mode; and a second switching circuit connected between the second pad and the line structure, the second switching circuit being deactivated during the normal operation mode and being activated during the crack test mode. | 2011-03-31 |
20110074454 | TEST DEVICE AND INSPECTION APPARATUS USING THE SAME - A testing device suitable for a testing apparatus with light inspection of a display panel is provided, in which the testing device includes a main part and two contact parts. The testing device is fixed to the testing apparatus with light inspection by the main part. Two contact parts are respectively extended from two ends of the main part along a first direction, and each of the contact parts has a plurality of tips. The tips of each contact part have different heights. Besides, a testing apparatus is also provided. Therefore, the abovementioned testing device and the testing apparatus are able to drastically extend the user lifetime, improve the inspection accuracy and save cost. | 2011-03-31 |
20110074455 | PROBE CARD AND SEMICONDUCTOR WAFER INSPECTION METHOD USING THE SAME - A probe card has a thin film substrate having projection electrodes on a first surface facing the semiconductor wafer and at a position facing the pad electrodes, a non-contact electrode, and first electrodes provided a second surface opposite to the first surface; and a wiring substrate having second electrodes disposed at a side opposite to the semiconductor wafer in the thin film substrate and at a position facing the first electrodes. The wiring substrate and the thin film substrate form a first sealed space and the thin film substrate and the semiconductor wafer form a second sealed space. By reducing the pressure in the first and the second sealed space, the first and the second electrodes are brought into close contact with each other and the pad electrodes and the projection electrodes are brought into close contact with each other, and the pressure of each of the first and second sealed space can be independently adjusted. | 2011-03-31 |
20110074456 | PROBE APPARATUS AND TEST APPARATUS - A probe apparatus exchanging signals with a target device, includes: a contact section electrically connected to the target device by contacting a terminal of the target device; a non-contact section that exchanges signals with the target device in a state not contacting the terminal of the target device; and a retaining section that retains the contact section and the non-contact section, in such a manner that a relative position between the contact section and the non-contact section in a connection direction connecting the non-contact section and a region corresponding to the target device is displaceable. | 2011-03-31 |
20110074457 | System For Testing Electronic Components - An improved efficiency system for testing electronic components in a motherboard/daughterboard assembly in which the daughterboard is mounted in spaced parallel relationship the to motherboard includes one or more device-under-test socket sub-assemblies having a test socket thereon for receiving a device-under-test and a connector component for disengagable connection to a complementary connector component on the daughterboard with the socket sub-assembly effecting interengagement of the complementary connector component on the daughterboard via an opening in the motherboard to allow ready access to the test socket for temporary installation, testing, and removal of a device-under-test. | 2011-03-31 |
20110074458 | Transport Apparatus for Moving Carriers of Test Parts - One embodiment is a transport apparatus for moving carriers of microelectronic devices along a track, the transport apparatus including: (a) a track with two rails adapted to support the carriers; (b) a trolley adapted to be transported in a direction along the track by a linear actuator; and (c) a first and a second engagement feature attached to the trolley wherein the first engagement feature is adapted to engage temporarily with a first of the carriers, and the second engagement feature is adapted to engage temporarily with a second of the carriers; wherein a predetermined movement of the trolley slidably moves the first carrier onto a test position and slidably moves the second carrier off the test position simultaneously. | 2011-03-31 |
20110074459 | STRUCTURE AND METHOD FOR SEMICONDUCTOR TESTING - An embodiment of a test structure in accordance with the present invention comprises a pair of interdigitated comb portions of a metallization layer present in a recess of an inter-layer dielectric (ILD) formed over a polysilicon heater element. A third portion of the metallization layer comprises a serpentine metal line interposed between the comb portions. Application of force voltages, and detection of sense voltages, at various nodes of the metallization portions allows identification of the following: (1) electromigration of metal in the metallization portions; (2) extrusion of metal from one metallization portion to contact another; (3) breakdown voltage (V | 2011-03-31 |
20110074460 | DATA TRANSMISSION CIRCUIT AND SEMICONDUCTOR APPARATUS INCLUDING THE SAME - A data transmission circuit includes a data transmission unit and a data receiving unit. The data transmission unit generates transmission data based on first chip data and transmit the transmission data via a Through Silicon Via (TSV). The data receiving unit differentially amplifies the transmission data with respect to a reference voltage to generate second chip data. | 2011-03-31 |
20110074461 | SERIAL OUTPUT CIRCUIT, SEMICONDUCTOR DEVICE, AND SERIAL TRANSMISSION METHOD - In an output circuit having a de-emphasis for use in high-speed serial transmission, a circuit for suppressing a fluctuation of a common mode potential which occurs in output amplitude is provided. A positive pole and a negative pole of an output circuit in a serial transmission device for differential transmission having de-emphasis are connected to the respective outputs of a differential circuit that differentially receives outputs of a detector device for a pattern of data to be transmitted, and a detector device for an inverted pattern of the data to be transmitted. When a specific pattern of data to be transmitted and its reverted pattern appear, a current of the output circuit is compensated by the connected differential circuit, thereby enabling a common mode noise to be prevented. | 2011-03-31 |
20110074462 | DATA DRIVING IMPEDANCE AUTO-CALIBRATION CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT USING THE SAME - A data driving impedance auto-calibration circuit includes: a detection block configured to calibrate a characteristic voltage generated by detecting an operation characteristic variation of an element, according to a code signal, and generate a calibrated characteristic voltage; a comparison block configured to compare the calibrated characteristic voltage with a reference voltage and output a comparison result signal; and a code calibration block configured to calibrate the code signal according to the comparison result signal. | 2011-03-31 |
20110074463 | ON-DIE SYSTEM AND METHOD FOR CONTROLLING TERMINATION IMPEDANCE OF MEMORY DEVICE DATA BUS TERMINALS - A system for controlling the termination impedance of memory device data bus terminals is fabricated on the same die as the memory device. The system includes a termination resistor connected to each data bus terminal, which is connected in parallel with several transistors that are selectively turned on to adjust the termination impedance. The transistors are controlled by a circuit that determines the resistance of the termination resistor and turns on the correct number of transistor to properly set the termination impedance. In one example, the resistance of the termination resistor is determined by directly measuring a resistor of the same type as the termination resistor. In another example, the resistance of the termination resistor is determined indirectly by measuring parameters that affect the resistance of the termination resistor. In either case, the system can maintain the termination impedance of the data bus terminals constant despite changes in the termination resistor. | 2011-03-31 |
20110074464 | LOW POWER PROGRAMMABLE LOGIC DEVICES - Circuits and power up sequences to reduce power consumption in programmable logic devices is disclosed. A multiplexer (MUX) for a programmable logic device comprising: a plurality of inputs and an output; and a configuration circuit comprising a plurality of memory elements, each memory element generating a control signal, the configuration circuit comprising a first mode of operation to force each of said control signals to a first voltage level regardless of the memory state in the memory element; and a first device coupling a power supply voltage to the output, said first device having a gate electrode controlled by a said control signal of the configuration circuit; and one or more second devices coupling one or more inputs to the output, each said second device having a gate electrode controlled by a said control signal of the configuration circuit; wherein, the first device is in a conducting state to couple the power supply voltage to the MUX output during the first mode of operation of the configuration circuit. | 2011-03-31 |
20110074465 | DATA COMMUNICATION CIRCUIT, TRANSMISSION APPARATUS, RECEPTION APPARATUS, AND TRANSMISSION/RECEPTION SYSTEM - A driver supplies data signal via a supply node. A voltage-relaxing transistor has a source connected to the supply node of the driver, a drain connected to a signal node connected to a signal line, and a gate to which the voltage at the signal node is applied. | 2011-03-31 |
20110074466 | APPARATUS FOR METASTABILITY-HARDENED STORAGE CIRCUITS AND ASSOCIATED METHODS - A metastability-hardened storage circuit includes at least one inverting circuit. The inverting circuit has a logical input. The logical input of the inverting circuit is split into a pair of physical inputs. | 2011-03-31 |
20110074467 | Power Supply Method, Apparatus, and System for a Radio Frequency Power Amplifier - A power supply apparatus for a radio frequency power amplifier (RFPA) is provided, where the output end of a voltage controlled voltage source (VCVS) and the output ends of N current controlled current sources (CCCSs) are coupled in parallel to supply power to the RFPA. The apparatus further includes an n | 2011-03-31 |
20110074468 | FREQUENCY GENERATOR - A frequency generator is used for generating a frequency within a frequency range. The frequency generator includes a variable current source, a voltage drop generation unit, a voltage source, a detection unit, a conversion unit, and an oscillating circuit. The variable current source is used for outputting a current according to a control signal. The voltage drop generation unit is used for generating a voltage drop according to the current. The voltage source is used for outputting a voltage range. The detection unit is used for outputting the control signal to the variable current source according to a relationship between the voltage drop and the voltage range. The conversion unit is used for outputting a digital code according to the relationship between the voltage drop and the voltage range. The oscillator circuit is used for generating the frequency according to the digital code. | 2011-03-31 |
20110074469 | Frequency Generation Circuitry And Method - A method includes generating a plurality of reference phases of a reference signal and selecting a sub-phase from each of the plurality of reference phases to form a set of selected sub-phases. In the method selecting operates in response to synchronized outputs of a multi-phase phase accumulator that operates synchronously in accordance with one of the sub-phases of the set of sub-phases, and where the outputs of the multi-phase phase accumulator may be synchronized using at least one additional sub-phase. | 2011-03-31 |
20110074470 | Low current power-on reset circuit and method - A power-on reset (POR) circuit includes a first transistor (MP | 2011-03-31 |
20110074471 | SEMICONDUCTOR APPARATUS AND METHOD FOR CONTROLLING THE SAME - A semiconductor apparatus comprises a power-up signal generation section configured to generate a power-up signal, a driver configured to drive and output the power-up signal, and a main circuit block configured to perform predetermined functions in response to an output from the driver, wherein the power-up signal generation section and an input terminal of the driver are connected by a disconnectable element. | 2011-03-31 |
20110074472 | SEMICONDUCTOR DEVICE AND POWER CONTROL METHOD USED FOR SAME - A semiconductor device includes an internal circuit; a plurality of power switches arranged in parallel configured to supply a current to the internal circuit; an instruction circuit configured to output a instruction signal for controlling power supply to the internal circuit; a variation detection circuit configured to detect the current and to output a detection result; and a logic circuit configured to control a timing when the plurality of power switches becomes a conducting state in accordance with the detection result and the instruction signal. | 2011-03-31 |
20110074473 | RESET CIRCUIT - In some embodiments, a reset circuit for an electronic circuit equipped with a backup power capacitor includes a first detector arranged to detect a predetermined first voltage of the backup capacitor, a second detector arranged to detect a predetermined second voltage of the backup capacitor, the second voltage being lower than the first voltage, and a controller arranged to control an output of a reset request signal based on detection results of the first detector and the second detector. The controller is configured to output the reset request signal when the first detector detects the first voltage after the second detector detected the second detector. | 2011-03-31 |
20110074474 | PHASE-LOCKED-LOOP CIRCUIT - A phase-locked loop circuit comprises a phase error detector for receiving a multi-phase reference signal and a synchronized phase signal of the phase-locked-loop circuit, and for performing a rotational transformation to convert the multi-phase reference signal into two-phase quantities at a synchronous rotation d-q reference frame. A monotonic transfer module receives the two-phase quantities, and generates a monotonic phase error signal which is monotonic when a phase difference between the multi-phase reference signal and the synchronized phase signal ranges from −180 degrees to 180 degrees. A regulator receives the monotonic phase error signal, and generates a synchronized rotation frequency. An integrator receives the synchronized rotation frequency, and generates the synchronized phase signal. | 2011-03-31 |
20110074475 | Frequency synthesizer - There is provided a frequency synthesizer capable of improving phase noise. A sinusoidal signal with a frequency set by a frequency setting part is output as a digital signal from a set signal output part, and the digital signal is D/A-converted. A difference between a sinusoidal signal with a frequency corresponding to an output frequency of a voltage controlled oscillating part and a sinusoidal signal output from a D/A converting part is amplified by a differential amplifier, and an amplified signal is input via an A/D converting part to a means for extracting a phase difference between the aforesaid sinusoidal signals. A voltage corresponding to a signal being the result of integration of the phase difference is input as a control voltage to the voltage controlled oscillating part. Then, a gain of the differential amplifier is set larger than a maximum value of phase noise degradation of the A/D converting part, whereby the phase noise degradation of the A/D converting part is cancelled. | 2011-03-31 |
20110074476 | APPARATUS FOR LOCK-IN AMPLIFYING AN INPUT SIGNAL AND METHOD FOR GENERATING A REFERENCE SIGNAL FOR A LOCK-IN AMPLIFIER - Apparatus ( | 2011-03-31 |
20110074477 | Techniques for Providing Reduced Duty Cycle Distortion - A feedback loop circuit includes a phase detector and delay circuits. The phase detector generates an output signal based on a delayed periodic signal. The delay circuits are coupled in a delay chain that delays the delayed periodic signal. Each of the delay circuits comprises variable delay blocks and fixed delay blocks that are coupled to form at least two delay paths for an input signal through the delay circuit to generate a delayed output signal. Delays of the variable delay blocks in the delay circuits vary based on the output signal of the phase detector. Each of the delay circuits reroutes the input signal through a different one of the delay paths to generate the delayed output signal based on the output signal of the phase detector during operation of the feedback loop circuit. Each of the variable delay blocks and the fixed delay blocks is inverting. | 2011-03-31 |
20110074478 | SEMICONDUCTOR APPARATUS - A semiconductor apparatus for reducing unnecessary current consumption disclosed. The semiconductor apparatus includes: a clock signal transmission unit that selectively transmits a clock signal in accordance with the frequency of the clock signal at an operation standby mode. A delay locked loop generates a DLL clock signal on the basis of the clock signal inputted through the clock signal transmission unit. The delay locked loop generates the DLL clock signal during a period where the clock signal is transmitted. | 2011-03-31 |
20110074479 | DELAY LOCKED LOOP APPARATUS - A delay locked loop (DLL) apparatus includes a first delay unit converting a reference clock into a rising clock. A second delay unit converts the reference clock into a falling clock, and a replica delay unit replica-delays the rising clock. A first phase detector compares the phases of the reference clock and the delayed rising clock to output a first detection signal corresponding to the compared phases. A controller synchronizes the rising edge of the rising clock with the rising edge of the reference clock according to the first detection signal of the first phase detector. A second phase detector compares the phases of the synchronized rising clock and the synchronization clock to output a second detection signal corresponding to the compared phases. The DLL apparatus compensates for a skew between an external clock and data and between external and internal clocks by employing a single replica delay unit. | 2011-03-31 |
20110074480 | Method and Apparatus for the Controlled Delay of an Input Signal - An apparatus for the controlled delay of an input signal includes a signal input for receiving an input signal. The input signal is supplied to a delay line with a multiplicity of delay elements. Outputs of the delay elements allow respective differently delayed phase signals to be tapped off. Furthermore, a register line with a multiplicity of register elements is provided. The register elements are each associated with one of the delay elements. Each of the register elements has a reset input and a clock input. The reset inputs are coupled to the signal input. The outputs of the delay elements are each coupled to the clock input of the register element associated therewith. | 2011-03-31 |
20110074481 | NEGATIVE CHARGE PUMP WITH CURRENT PROTECTION - A charge pump circuit includes a first power transistor selectively actuated by a first control signal to deliver relatively higher amounts of current to a capacitor and a second non-power transistor connected in parallel with the first power transistor and selectively actuated by a second control signal to deliver relatively lower amounts of current to the capacitor. The charge pump circuit includes a pumped voltage output that is sensed to generate a sensed voltage output. A comparison circuit compares the sensed voltage output to a threshold voltage. A logic circuit receives an output of the comparison circuit and enables the first power transistor and disables the second non-power transistor in a first mode of operation if the comparison is not satisfied. The logic circuit further disables the first power transistor and enables the second non-power transistor in a second mode of operation if the comparison is satisfied. The logic circuit returns from the second mode of operation to the first mode of operation after the comparison is subsequently not satisfied. | 2011-03-31 |
20110074482 | OSCILLATION SIGNAL GENERATOR FOR COMPENSATING FOR I/Q MISMATCH AND COMMUNICATION SYSTEM INCLUDING THE SAME - An oscillation signal generator for compensating for an in-phase (I)/quadrature-phase (Q) mismatch and a communication system including the same are provided. The oscillation signal generator includes a first latch configured to generate an I oscillation signal, a second latch that is cross-coupled with the first latch and generates a Q oscillation signal, and a phase compensator connected to at least one of the first latch or the second latch. The phase compensator complementarily adjusts bias currents of the first and second I differential transistor pairs of the first latch and/or complementarily adjusts bias currents of the first and second Q differential transistor pairs of the second latch. Accordingly, the I/Q mismatch is compensated for without an additional device, so that the phase match between an I signal and a Q signal is improved in the communication system. | 2011-03-31 |
20110074483 | TECHNIQUE TO REDUCE CLOCK RECOVERY AMPLITUDE MODULATION IN HIGH-SPEED SERIAL TRANSCEIVER - A method is provided for improving clock recovery signal jitter in digital communication based on a phase adjustment technique in a phase interpolation. A clock signal is expressed as the combination of two sinusoidal signals. The phase interpolating process determines the amplitude of the first sinusoidal signal, and the amplitude of the second sinusoidal signal that is 90° out of phase from the first sinusoidal signal. The clock signal is then formed by combining first sinusoidal signal with the second sinusoidal signal by choosing the first and second amplitude such that the amplitude of the clock signal is substantially a constant. Modulation of the clock signal amplitude is significantly improved by the disclosed technique over the conventional technique when the sum of the first and second amplitudes of the two sinusoidal functions is kept a constant. | 2011-03-31 |
20110074484 | SIGNAL INPUT CIRCUIT AND SEMICONDUCTOR DEVICE HAVING THE SAME - A signal input circuit includes an input unit, a first compensation circuit, a second compensation circuit, and an enable circuit. The input unit receives a first input signal to output an output signal to an output node. The first compensation circuit is connected to the output node and discharges the output node in response to a second input signal. The second compensation circuit is connected to the output node and supplies a current to the output node in response to the second input signal. The enable circuit enables the input unit and the first and second compensation circuits in response to at least one operation mode selection signal. | 2011-03-31 |
20110074485 | SEMICONDUCTOR CIRCUIT - A semiconductor circuit is provided in which no error signal is generated even when the circuit is exposed to a transient voltage noise that occurs with a transition from a first state indicating a conduction of a high-potential side switching device to a second state indicating a non-conduction of the high potential side switching device, or vice versa. A high potential switching device drive circuit | 2011-03-31 |
20110074486 | METHOD AND APPARATUS FOR TRACKING POWER SUPPLIES - A method for tracking power supplies includes the following steps: receiving, by a controller, a signal to be tracked and outputting, according to the signal to be tracked, a control signal. The control signal controls at least two sets of voltage level selection circuits in selecting at least one tracking voltage level from at least two groups of isolation voltage levels and controls each set of the voltage level selection circuits selecting at most one tracking voltage level from a group of isolation voltage levels. An isolation power supply provides the at least two groups of isolation voltage levels according to the voltage level interval of the signal to be tracked. Each group of isolation voltage levels includes at least two tracking voltage levels. The voltage level selection circuits provide the selected tracking voltage level to supply power to a load circuit. An apparatus for tracking power supplies is also provided. The present disclosure is applicable to the power supply tracking on a reference signal. | 2011-03-31 |
20110074487 | OPTICAL MODULATOR DRIVE CIRCUIT - A modulator drive circuit provides a modulator drive signal, representative of a data waveform, to modulate an optical signal for transport across a network infrastructure. The modulator drive circuit includes a broadband Bias-T circuit insensitive to the frequency range of the data waveform. The Bias-T circuit provides for an adjustable bias level to maintain proper operation of a modulator used to modulate the optical signal. One or more modulator drive circuits may be provided on a single substrate. | 2011-03-31 |
20110074488 | PSEUDO-DIFFERENTIAL RECEIVING CIRCUIT - The invention relates to a receiving circuit for transmission through interconnections used for sending a plurality of electrical signals. | 2011-03-31 |
20110074489 | INVERTER - A two-level or multi-level inverter are supplied with a positive auxiliary voltage (Ug+) and a negative auxiliary voltage (Ug−). A bootstrap technique provides a first positive auxiliary voltage and a first negative auxiliary voltage from the supplied potentials. The bootstrap technique provides at least one additional negative auxiliary voltage to a switch driver of at least one semiconductor switch from the first negative auxiliary voltage. At the start up of an inverter, the inverter can perform a startup sequence to provide auxiliary voltages to the respective auxiliary voltage inputs of the switch drivers by turning the power semiconductors sequentially on and off. | 2011-03-31 |
20110074490 | INPUT/OUTPUT CIRCUIT - In some embodiments, an input/output (I/O) circuit sends and receives a high-level signal and a low-level signal via a coupling capacitance provided on a communication line. The I/O circuit includes a receiving portion including a first detection circuit arranged to detect one of the signals and a second detection circuit arranged to detect the other signal, a transmitting portion including a three-value output circuit configured to output one of signals consisting of a high-level signal, a low-level signal, and a high impedance signal, and a control circuit configured to control the receiving portion and the transmitting portion. The control circuit judges a level of an inputted signal depending on detection results of the first detection circuit and the second detection circuit in a receiving state and controls an output value of the three-value output circuit in a transmitting state. | 2011-03-31 |
20110074491 | PHOTOELECTRIC CONVERSION DEVICE, PHOTOELECTRIC CONVERSION DEVICE MATERIAL, PHOTOSENSOR AND IMAGING DEVICE - A photoelectric conversion device comprising an electrically conductive film, an organic photoelectric conversion film, and a transparent electrically conductive film, wherein the organic photoelectric conversion film contains a compound represented by the following formula (1) and an n-type organic semiconductor: | 2011-03-31 |
20110074492 | Charge Pump Circuit And A Novel Capacitor For A Memory Integrated Circuit - A novel capacitor for use in a charge pump circuit has a substrate with a planar surface. A first electrode is in a first plane spaced apart from the planar surface. A second electrode is adjacent to and is spaced apart from the first electrode in the first plane and is capacitively coupled thereto. A third electrode is in a second plane, spaced apart from the first plane and is capacitively coupled to the first electrode. A fourth electrode is adjacent to and spaced apart from the third electrode in the second plane and is capacitively coupled to the third electrode and capacitively coupled to the second electrode. The first and fourth electrodes are electrically connected together and the second and third electrodes are electrically connected together. In addition, a cylindrical shape electrode, and a great wall electrode, and charge pump capacitor-by-pattern-filling is disclosed. A charge pump circuit using the foregoing described capacitor has a plurality of transistors for charging the capacitor and discharging the capacitor thereby increasing the voltage of the charge pump circuit. | 2011-03-31 |
20110074493 | CONFIGURABLE NP CHANNEL LATERAL DRAIN EXTENDED MOS-BASED TRANSISTOR - An integrated circuit containing a configurable dual n/p-channel 3-D resurf high voltage MOS field effect transistor (MOSFET) is disclosed. An n-channel drain is coterminous with a p-channel source in an n-well, and a p-channel drain is coterminous with an n-channel source in a p-well. A lateral drift region including n-type drift lanes and p-type drift lanes extends between the n and p wells. A resurf layer abuts the lateral drift region. The n-channel MOS gate is separate from the p-channel MOS gate. The p-channel MOS gate may be operated as a field plate in the n-channel mode, and vice versa. An n-channel MOS transistor may be integrated into the n-channel MOS source to provide an n-channel cascode transistor configuration, and similarly for a p-channel cascode configuration, to debias parasitic bipolar transistors under the MOS gates. Circuits using the MOSFET with various loads are also disclosed. | 2011-03-31 |
20110074494 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY TESTER - A semiconductor device, a semiconductor memory tester, and a multi-chip package are provided. The semiconductor device includes a plurality of nonvolatile semiconductor memories; a boosting circuit which generates a boosted voltage for operating the plurality of nonvolatile semiconductor memories; and a boosting circuit controller which controls the operation of the boosting circuit to generate the boosted voltage on the basis of an operation sequence of the plurality of nonvolatile semiconductor memories. | 2011-03-31 |
20110074495 | COMPENSATED BANDGAP - An integrated circuit has an untrimmed bandgap generation circuit; and a bandgap generation circuit coupled to the untrimmed bandgap generation circuit. The bandgap generation circuit has a current source controlled by the untrimmed bandgap generation circuit and coupled in series with a resistor and a first bipolar diode device, one or more of bipolar diode devices, each bipolar diode device coupled in parallel with the first bipolar diode device, wherein a trimmed bandgap reference voltage output of the integrated circuit is a function of the number of bipolar diode devices. | 2011-03-31 |
20110074496 | REFERENCE VOLTAGE CIRCUIT - Provided is a reference voltage circuit in which a temperature characteristic of a reference voltage is excellent and a circuit scale is small. In the reference voltage circuit, for example, a temperature correction circuit separated from the reference voltage circuit is not used and a difference voltage between threshold voltages of two E-type NMOS transistors ( | 2011-03-31 |
20110074497 | POWER SUPPLY STABILIZING CIRCUIT, ELECTRONIC DEVICE AND TEST APPARATUS - A test apparatus that tests a device under test, comprising a signal input section that supplies a test signal to a device under test and a judging section that judges acceptability of the device under test based on a response signal output by the device under test in response to the test signal. The signal input section includes an operation circuit that operates to generate the test signal and a power supply stabilizing circuit provided in the same chip to stabilize power supply voltage supplied to the operation circuit. The power supply stabilizing circuit includes a high-speed compensating section compensating for a change in the power supply voltage supplied to the operation circuit, at a predetermined compensation speed, and a low-speed compensating section compensating for the change in the power supply voltage supplied to the operation circuit, at a predetermined compensation speed lower than that of the high-speed compensating section. | 2011-03-31 |
20110074498 | Electronic Devices and Systems, and Methods for Making and Using the Same - A suite of novel structures and methods is provided to reduce power consumption in a wide array of electronic devices and systems. Some of these structures and methods can be implemented largely by reusing existing bulk CMOS process flows and manufacturing technology, allowing the semiconductor industry as well as the broader electronics industry to avoid a costly and risky switch to alternative technologies. As will be discussed, some of the structures and methods relate to a Deeply Depleted Channel (DDC) design, allowing CMOS based devices to have a reduced σV | 2011-03-31 |
20110074499 | SEMICONDUCTOR DEVICE AND METHOD FOR CONTROLLING THE SAME - A semiconductor device according to an exemplary aspect of the invention is capable of being selectively switched between an oscillation circuit and a signal input-output circuit, and includes first and second external connecting terminals that are connectable to an oscillation device; an inverting amplifier an input side of which is electrically connected to the first external connecting terminal through a coupling capacitor and an output side of which is electrically connected to the second external connecting terminal; a feedback resistor connected to the input side and the output side of the inverting amplifier; a bias stabilization circuit that stabilizes a bias applied to the coupling capacitor; a first signal input-output portion connected to the first external connecting terminal; and a second signal input-output portion connected to the second external connecting terminal. | 2011-03-31 |
20110074500 | APPARATUS AND METHOD FOR DETERMINATION OF SIGNAL FORMAT - The determination of the signal modulation format for a channel is an important aspect of the operation of a signal receiver. A method ( | 2011-03-31 |
20110074501 | DEMODULATOR AND DEMODULATION METHOD - A demodulator according to the present invention is the demodulator that demodulates a plurality of received symbols having different amplitude of carrier wave. The demodulator includes an amplitude value calculation unit that calculates a received symbol amplitude value by adding an absolute value of in-phase component and an absolute value of quadrature component determined from the amplitude of the carrier wave in the received symbol. Further, the demodulator includes a demodulation unit that detects a change of the received symbol amplitude value calculated by the amplitude value calculation unit, and demodulates the received symbol based on the detection result. | 2011-03-31 |
20110074502 | MULTIPLE-INPUT AND MULTIPLE-OUTPUT AMPLIFIER HAVING PSEUDO-DIFFERENTIAL INPUTS - The invention relates to an amplifier capable of delivering a plurality of output signals, these output signals being controlled by a plurality of input signals. | 2011-03-31 |
20110074503 | OPERATIONAL AMPLIFIER - Provided is an operational amplifier capable of correcting an offset voltage of an element to be connected to an input terminal. The operational amplifier includes a main amplifier and an offset correction amplifier, which include input terminals connected in common. The main amplifier includes: a first transconductance amplifier for measurement; a second transconductance amplifier for offset correction; and a first capacitor connected to an input terminal of the second transconductance amplifier. The offset correction amplifier includes: a third transconductance amplifier for measurement; a fourth transconductance amplifier for offset correction; and a second capacitor connected to one input terminal of the fourth transconductance amplifier. An offset voltage adjustment circuit is provided to another input terminal of the fourth transconductance amplifier included in the offset correction amplifier. | 2011-03-31 |
20110074504 | MULTI MODE POWER OUTPUT MODULE AND METHOD OF USE WITH AN RF SIGNAL AMPLIFICATION SYSTEM - A multi mode power output module for use with RF signal amplification system. The multi mode power output module includes at least two power sources; a multiple of output power circuits associated with each of the at least two power sources; a first switch to switch between the at least two power sources, where the first switch provides power from at least two power sources to the output power circuit to amplify an RF signal associated with a lowest power output level; and second switch to switch between an RF output and the multiple of output power circuits to select a output power circuit associated with one of the at least two power sources that is also connected to the RF output. | 2011-03-31 |
20110074505 | Offset Voltage Calibration Method and Apparatus and Amplifier Thereof - An offset voltage calibration method is disclosed, which is utilized for calibrating an offset voltage of an electronic device during a calibration period. The offset voltage calibration method includes generating a control signal according to an output signal of the electronic device, counting a count value and generating an offset indication signal according to the control signal, stopping counting and generating a final count value according to a compensation value after the output signal changes state, generating a calibration signal according to the count value or the final count value, and calibrating the offset voltage according to the offset indication signal and the calibration signal. | 2011-03-31 |
20110074506 | CANCELLING NON-LINEAR POWER AMPLIFIER INDUCED DISTORTION FROM A RECEIVED SIGNAL BY MOVING INCORRECTLY ESTIMATED CONSTELLATION POINTS - A method and system are provided for reducing power amplifier induced distortion. Power amplifier induced distortion is iteratively estimated and cancelled. When the difference between the current estimated power amplifier distortion and the previous estimated power amplifier distortion is less than a convergence threshold, particular M-QAM constellation points that are still in error are determined A M-QAM constellation point correction routine is provided that can move the incorrectly estimated M-QAM constellation points that are in error towards their expected quadrants by generating updated M-QAM constellation points. The remaining estimated non-linear power amplifier induced distortion in the received signal can then be estimated and canceled. | 2011-03-31 |
20110074507 | DIFFERENTIAL AMPLIFIER - A Provided is a differential amplifier in which a current flowing into an output transistor may be adjusted to a constant value even when a voltage of a non-inverting input terminal changes. A current flowing through the differential amplifier circuit is controlled by a current source, a current value of which is changed depending on the voltage of the non-inverting input terminal. | 2011-03-31 |
20110074508 | VOLTAGE REGULATOR - Provided is a voltage regulator having a structure in which an output terminal of a first differential amplifier circuit is connected to a second differential amplifier circuit to control an output transistor by the second differential amplifier circuit. When low current consumption is required, the first differential amplifier circuit is suspended. When high-speed response is required, the first differential amplifier circuit is activated. The low-current consumption operation and the high-speed operation are switched with a minimum circuit area. | 2011-03-31 |
20110074509 | NON-LINEAR CAPACITANCE COMPENSATION - Embodiments are directed to capacitance compensation via a compensation device coupled to a gain device to compensate for a capacitance change occurring due to an input signal change, along with a controller coupled to the compensation device to receive the input signal and to control an amount of compensation based on the input signal. In some embodiments, banks may be formed of multiple compensation devices, where each of the banks has a different size and is coupled to receive a different set of bias voltages. | 2011-03-31 |
20110074510 | SYMMETRICALLY OPERATING SINGLE-ENDED INPUT BUFFER DEVICES AND METHODS - Embodiments are described including those pertaining to an input buffer having first and second complementary input terminals. One such input buffer has a symmetrical response to a single input signal applied to the first input terminal by mimicking the transition of a signal applied to the second input terminal in the opposite direction. The aforementioned input buffer includes two amplifier circuits structured to be complementary with respect to each other. Each of the amplifier circuits includes a first transistor having a first input node that receives an input signal transitioning across a range of high and low voltage levels, and a second transistor having a second input node that receives a reference signal. The first input node is coupled to the second transistor through a capacitor that charges and discharges the drain of the second transistor responsive to the input signal transitioning to mimic the second input node transitioning in the direction opposite to the transition of the input signal, while the reference signal at the second input node is maintained at a constant voltage level. | 2011-03-31 |
20110074511 | LAYOUT AND PAD FLOOR PLAN OF POWER TRANSISTOR FOR GOOD PERFORMANCE OF SPU AND STOG - A power transistor for use in an audio application is laid out to minimize hot spots. Hot spots are created by non-uniform power dissipation or overly concentrated current densities. The source and drain pads are disposed relative to each other to facilitate uniform power dissipation. Interleaving metal fingers and upper metal layers are connected directly to lower metal layers in the absence of vias to improve current density distribution. This layout improves some fail detection tests by 17%. | 2011-03-31 |
20110074512 | CIRCUIT AND METHOD FOR BIASING A GALLIUM ARSENIDE (GaAs) POWER AMPLIFIER - A circuit for biasing a gallium arsenide (GaAs) power amplifier includes a reference voltage generator circuit implemented in a gallium arsenide (GaAs) material system, a field effect transistor (FET) bias circuit implemented in the gallium arsenide material system and adapted to receive an output of the reference voltage generator circuit and adapted to provide an output to a radio frequency (RF) amplifier stage. | 2011-03-31 |
20110074513 | Dual-Band Voltage-Controlled Oscillator Arrangement - In a dual-band capable voltage-controlled oscillator (VCO) device at least two voltage-controlled oscillator units (VCO1, VCO2) are coupled via a reactive component (A) and each said at least one voltage-controlled oscillator unit (VCO1, VCO2) further being connected to at least a respective external switching device (B1, B2) adapted to control an operating frequency of the A (VCO) device. | 2011-03-31 |
20110074514 | FREQUENCY MEASUREMENT CIRCUIT AND PLL SYNTHESIZER PROVIDED THEREWITH - A frequency measurement circuit includes: a first counter that counts a number of edges of a clock signal; a counter latch circuit that stores a first count value of the first counter in response to a reference edge corresponding to a reference clock; a first delay circuit that includes a plurality of first unit delay circuits coupled in series and receives the clock signal; a plurality of first delay latch circuits that latch a respective output among the plurality of first unit delay circuits; a first edge detection circuit that detects the edge in the first delay circuit based on the outputs of the plurality of first delay latch circuits; and a first calculator that calculates a cycle or a frequency of the clock signal based on the first count value between two reference edges and position information corresponding to a edge detected between the two reference edges. | 2011-03-31 |
20110074515 | PIEZOELECTRIC RESONATOR, OSCILLATOR AND OSCILLATOR PACKAGE - Provided is a piezoelectric resonator having a structure in which the piezoelectric resonator chip is mounted on a silicon substrate without deteriorating a characteristic. The piezoelectric resonator includes a silicon substrate ( | 2011-03-31 |
20110074516 | PIEZOELECTRIC CERAMIC COMPOSITION, PIEZOELECTRIC CERAMIC, PIEZOELECTRIC ELEMENT, AND OSCILLATOR - A piezoelectric ceramic composition is provided which contains Perovskite oxides expressed by General Formula 1 below and an aluminum compound, and in which the content ratio of the aluminum compound to the Perovskite oxides is from 1% by mass to 11% by mass, | 2011-03-31 |
20110074517 | Hybrid system having a non-MEMS device and a MEMS device - A hybrid system having a non-MEMS device and a MEMS device is described. The apparatus includes a non-MEMS device and an integrated circuit including a MEMS device, the integrated circuit formed on a substrate. The integrated circuit includes a control circuit for the non-MEMS device and a MEMS control circuit for the MEMS device. | 2011-03-31 |