13th week of 2011 patent applcation highlights part 26 |
Patent application number | Title | Published |
20110075418 | Illuminating optical lens for light emitting diode (LED) - An illuminating optical lens article of manufacture for use with a light emitting diode (LED) mounted on a circuit board is provided. The lens has (a) a base portion defining a rim on a plane having a bottom surface around a longitudinal axis for mounting over the LED; (b) an integral refractory outer surface of the lens extending towards the longitudinal axis from the base; (c) an integral refractory inner surface of the lens extending from the base forming a cavity shaped and sized to receive an LED; and optionally (d) a plurality of grooved sections for receiving an adhesive formed on the bottom surface of the base portion. The base is adapted to be mounted on the circuit board onto which the LED is mounted. The integral refractory outer and inner surfaces each define a predetermined geometry adapted to direct and focus light emitting from the LED to a predetermined path. The lens is fabricated with a tolerance range of within 0.15 mm or better. The lens can be incorporated into a luminaire system and mounted on to a circuit board using adhesive polymers. The assembly of the lens into the luminaire system can be automated using robotics. | 2011-03-31 |
20110075419 | LED LIGHTING APPARATUS - The lighting device is provided with lamp housing, LED module, terminal cover, and light penetrating hood. Lamp housing comprises base, heat sink on the base, thermal dissipation channel between neighboring two heat sinks, and the base inner container. LED module comprises base for fixing, lamp cover attached to the side of the base, multiple LED lamp being inside the lamp cover, and connecting part connected to the corresponding container on the base. Each terminal cover seals the forward and reward part of the lamp housing, and the light penetrating hood is connected below the lamp housing, and the container for LED module is surrounded with the lamp housing, the terminal cover, and the light penetrating hood. This utility model can simplify the manufacturing process and cut down the cost and time to research and develop. | 2011-03-31 |
20110075420 | LIGHT OUTPUT DEVICE AND METHOD - The present invention relates to a light output device ( | 2011-03-31 |
20110075421 | ILLUMINATING DEVICE AND METHOD FOR MANUFACTURING THE SAME - A method for manufacturing an illuminating device includes steps of: forming an electrical conductive circuit on a metallic substrate, arranging light-emitting elements on the metallic substrate to be electrically connected with the electrical conductive circuit, covering a transparent cap on each of the light-emitting elements, fixing an electrical connector to the metallic substrate to be electrically connected to the electrical conductive circuit, forming a transparent body outside the transparent caps, the metallic substrate and the electrical conductive circuit by means of an over-molding process; forming a lamp cover outside the transparent body, the metallic substrate and the electrical connector by means of an over-molding process. An illuminating device is further provided, thereby prevents the light-emitting elements from suffering damage due to the temperature and pressure of the over-molding process, and increasing the brightness of the light emitted by the light-emitting elements. | 2011-03-31 |
20110075422 | LIGHTING DEVICES COMPRISING SOLID STATE LIGHT EMITTERS - A lighting device comprising a trim element, an electrical connector and at least one solid state light emitter, the lighting device weighing less than one kilogram. If current of about 12 watts (or in some cases about 15 watts, or in some cases not more than about 15 watts) is supplied to the electrical connector, the at least one solid state light emitter will illuminate so that the lighting device will emit white light of at least 500 lumens. Also, a lighting device that weighs less than one kilogram and can generate white light of at least 500 lumens using a current of not more than about 15 watts. Also, a lighting device for mounting in a recessed housing, comprising a unitary structure trim element that conducts heat away from at least one solid state light emitter and dissipates at least some of the heat outside of the recessed housing. | 2011-03-31 |
20110075423 | LIGHTING DEVICE WITH POSITION-RETAINING ELEMENT - A lighting device comprising a first element that comprises an electrical connector, a second element that comprises at least a first light source, and a position-retaining element (or means) that holds the second element in any of at least two positions relative to the first element. Also, a lighting device comprising a first element that comprises an electrical connector, a second element that comprises at least a first trim element, and a position-retaining element (or means) that holds the second element in any of at least two positions relative to the first element. The electrical connector is electrically connected to at least a first light source, and the second element is movable relative to the first element among the positions while maintaining electrical connection between the electrical connector and at least the first light source. | 2011-03-31 |
20110075424 | STREET LAMP USING LEDS - The present invention relates to a street lamp which uses LEDs as a light source and has a freely adjustable lighting direction and an adjustable lighting range. The street lamp of the present invention includes a housing | 2011-03-31 |
20110075425 | WIDE-SPAN REFLECTION STRUCTURE - A wide-span reflection structure has a reflection cup, a metal heat sink and a heat conductive base. The heat conductive base has an embedded trough to provide the metal heat sink to be embedded firmly. The outer ring of the metal heat sink is embedded firmly with the reflection cup suitable to a plane-shining character of a LED light. At least a reflection light element is installed in the reflection cup. The reflection light element has a curved surface. Considering a LED character of facade shining, the over-strong light in the middle of a LED light can be reflected towards another side by through the curved surface of the reflection light element so as to increase a wide-span of shining area. The wide-span reflection structure is capable of spreading evenly out light so as to reach goals of higher light efficiency and saving energy. | 2011-03-31 |
20110075426 | LED ILLUMINATION DEVICE - An LED lamp illumination device includes an upper lid, an LED illumination module, a lower lid and two side lids. The upper lid is formed with a top surface and a bottom surface, a plurality of dissipation holes are penetrated the top surface to the bottom surface of the upper lid. The LED illumination module is fixed at the bottom surface of the upper lid. The lower lid is covered with the bottom surface of the upper lid to encapsulate the LED illumination module, wherein the lower lid is formed with an illumination hole corresponds to the LED illumination module. And two side lids are covered at the two sides of the upper lid and the lower lid. | 2011-03-31 |
20110075427 | LIGHTING APPARATUS - According to one embodiment, a lighting apparatus includes a main body including a flat thermal conduction surface. The thermal conduction surface contacts a back surface of a board. Light-emitting devices are mounted on a front surface of the board. An optical member is opposed to a peripheral part of the board on the front surface side of the board. The optical member is fastened to the main body by fastening members, to push the peripheral part of the board against the heat conduction surface of the main body. | 2011-03-31 |
20110075428 | LED MODULE - An LED module includes an LED having a central axis I, and a lens. The lens has an incident face for incidence of the light of the LED and an opposite emitting face for refracting the light of the LED out of the lens. The emitting face of the lens has a central axis II. The central axis II is offset from the central axis I and located at one side of a plane ZOX of an XYZ coordinate with an original O which is located at a center of the LED, in which the central axis I is coincident with the Z axis. The light beams emitted from the one side of the plane ZOX are stronger than the light beams emitted from the another side of the plane ZOX after the light beams emitted from the LED pass through the lens. | 2011-03-31 |
20110075429 | COLLIMATOR - A collimator ( | 2011-03-31 |
20110075430 | LAMP ARRANGEMENT - A lamp arrangement with a lamp housing with at least one housing surface having at least one module connecting device, and at least one module set including at least two housing connecting modules. The housing connecting modules have a correspondingly configured connecting device for connection to the module connecting device. | 2011-03-31 |
20110075431 | Heat dissipation structure for LED lamp - A heat dissipation structure for LED lamp includes at least one mounting plate connected to and between a top and a bottom locating plate, and a roll-shaped heat radiating member arranged beneath the top locating plate. The mounting plate and the top and bottom locating plates each are provided with a metal layer, to which LEDs are welded. When the heat dissipation structure is assembled to a lamp holder to form an LED lamp and the LEDs are lightened, heat produced by the LEDs is radiated from the metal layers and the heat radiating member, which together provide a large heat radiating area; meanwhile, perforations on the top locating plate allow convection of air in the LED lamp, and openings provided on the lamp holder allow exchange of air inside and outside the LED lamp, allowing the LED lamp to have reduced volume and increased heat dissipation efficiency. | 2011-03-31 |
20110075432 | LED recessed light with transparent board - An LED recessed light with transparent board includes a heat sink base, an LED illumination module, a sleeve, a transparent board and a positioning element. The heat sink base has a first surface and a second surface. The LED illumination module is mounted on the first surface of the heat sink base thereof. The sleeve is mounted on the first surface of the heat sink, so as to the LED illumination module is located within the sleeve, and the sleeve is formed with an open end, which has an internal flange. The transparent board is arranged at internal flange of the sleeve for covering the sleeve. And the positioning element is mounted at the sleeve for positioning the transparent board. | 2011-03-31 |
20110075433 | LED LIGHT BULB - A light emitting diode-based bulb and method of use are described. The LED bulb comprises a bracket and a housing. The bracket comprises a connector. The housing is rotatably coupled with the bracket and comprises a light emitting diode connected to the connector; and a fan connected to the connector. | 2011-03-31 |
20110075434 | ILLUMINATING DEVICE - An illuminating device includes a light source body and a lens array. The light source body includes a plurality of light sources. The lens array includes an opposed surface, a reverse surface, a plurality of lenses, a recess, and a projection. The plurality of lenses corresponds respectively to the plurality of light sources. The plurality of lenses includes a first lens and a second lens, which is located adjacent to the first lens. The recess is formed at an end portion of the first lens adjacent to the second lens. The projection is formed at an end portion of the second lens adjacent to the first lens. The projection is coupled with the recess, so that at least a part of a boundary line between the first lens and the second lens is formed in a concave-convex shape as a result of a combination of the recess and the projection. | 2011-03-31 |
20110075435 | METHOD FOR CONTROLLING A VEHICLE HEADLAMP - A system and method for controlling a vehicle headlamp, the headlamp being equipped with an automatic switching unit between high beam and low beam lighting modes and with a bending light function (DBL). The method comprises a step of making the bending light function (DBL) change from a first active state to a second state for detecting a combination of conditions comprising an active state of the automatic switching unit between high beam and low beam lighting modes and an active state of the high beam lighting mode. | 2011-03-31 |
20110075436 | VEHICLE LAMP - A vehicle lamp can include a light source, a reflector and a lens. The reflector can be formed in a slender shape so as to include a parabolic reflex surface in a longitudinal direction and an ellipsoidal reflex surface in a direction substantially perpendicular to the longitudinal direction. A focus of the parabolic reflex surface and one of the focuses of the ellipsoidal reflex surface can be located at the light source, and other focuses of the ellipsoidal reflex surface can be substantially parallel with a central axis of the lens. The reflector can reflect light emitted from the light source toward the lens with a wide angle so that light use efficiency of the light source can improve as compared with certain conventional vehicle lamps. Thus, the vehicle lamp can provide a favorable light distribution even when it is formed in a slender shape. | 2011-03-31 |
20110075437 | VEHICLE HEADLIGHT APPARATUS - A vehicle headlight apparatus includes a lamp device having an optical axis and generating light beams. A lens device has a plurality of lenses disposed in front of the lamp device. A reflector unit has a plurality of reflecting surfaces. Any two adjacent ones of the reflecting surfaces are spaced apart from each other along a transverse direction perpendicular to the optical axis. The reflecting surfaces reflect the light beams generated by the lamp device, and face respectively the lenses. The light beams reflected from each of the reflecting surfaces intersect at a focal point of a corresponding one of the lenses, and are subsequently transmitted into the lenses so that the light beams are parallel after they pass through the corresponding one of the lenses. | 2011-03-31 |
20110075438 | LED LIGHT SOURCE AND VEHICLE LIGHT - An LED light source can include a radiating substrate, a sub mount substrate, at least one white LED and a side wall. The sub mount substrate can be mounted on the radiating substrate, and the at least one white LED can be mounted on the sub mount substrate. The side wall can be mounted on the radiating substrate so as to face the at least one white LED. The side wall can be configured with a black mat material and, therefore, can absorb an upward light that may give a glaring type light to an oncoming car and the like. The number of the white LED and a shape of the side wall can be selected in accordance with a particular type of vehicle to match various headlights. Thus, a vehicle headlight using the LED light source can provide a favorable light distribution without the glaring type light for various vehicles. | 2011-03-31 |
20110075439 | LIGHTING AND/OR SIGNALLING DEVICE FOR A MOTOR VEHICLE COMPRISING A VENTILATION DUCT - A lighting and/or signalling device for a motor vehicle, comprising an enclosure which is formed by a housing and glass, an opening being provided in the enclosure, wherein it comprises a ventilation duct which extends from the opening, the ventilation duct being closed by a filtering means which is impermeable to fluids and dust, and permeable to gases. | 2011-03-31 |
20110075440 | LIGHT PEN - A light pen includes a case, a light source, a pen-nib structure, a first lens device, an elastic piece, a hollow knob, and a linkage pipe. The pen-nib structure is disposed through the case. The first lens device is disposed between the light source and the pen-nib structure. The elastic piece is connected to the first lens device. The hollow knob rotatably sheathes the first lens device. The linkage pipe sheathes the first lens device and is connected to the hollow knob for driving the elastic piece to move away from the pen-nib structure when the hollow knob rotates to a first position, so that the pen-nib structure can move relative to the case. The linkage pipe is further used for being separate from the elastic piece when the hollow knob rotates to a second position, so that the elastic piece can be engaged with the pen-nib structure. | 2011-03-31 |
20110075441 | LIGHT FIXTURES FOR DOORWAYS AND OTHER AREAS - Example light fixtures include one or more light transmitting illuminated rods that emit a series or array of discrete spots of light. Some example light fixtures disclosed herein include optical features that provide an intriguing, attention-getting affect that can be useful particularly in alerting personnel of certain conditions at a doorway of a truck loading dock. In some examples, the light transmitting rods are mechanically coupled to a housing that contains an LED light source. The mechanical coupling allows the illuminated rods to be readily replaced without disrupting with the operation or wiring of the light source. Some example light fixtures illuminate the cargo bay of a vehicle at the loading dock. | 2011-03-31 |
20110075442 | PORTABLE ELECTRONIC DEVICE - A portable electronic device includes a motherboard including at least one illuminator disposed thereon, a display screen parallel to the motherboard, and a light guide component disposed between the illuminator and the display screen. The light guide component includes a main body attached to a bottom surface of the display screen, and at least one foot portion extending from an edge of the main body corresponding to the at least one illuminator. The main body includes a light output surface facing the display screen. Each foot portion includes a distal end surface facing the illuminator to receive light emitted therefrom. | 2011-03-31 |
20110075443 | LIGHT EMITTING UNIT, BACKLIGHT MODULE AND DISPLAY DEVICE - A light emitting unit includes a light bar set, a connecting mechanism and a closed-loop terminal. The light bar set includes a plurality of light bars, wherein each light bar includes a plurality of light emitting elements and a circuit board, and the light emitting elements are disposed on the circuit board. The connecting mechanism includes a plurality of connecting elements for electrically connecting the first one to the last one of the light bars in order. The connecting mechanism has a front end and a rear end. The closed-loop terminal is electrically connected to the rear end of the connecting mechanism, whereby the light bar set, the connecting mechanism and the closed-loop terminal are formed to a closed loop. | 2011-03-31 |
20110075444 | BACKLIGHT AND LIQUID CRYSTAL DISPLAY DEVICE - A side light type backlight includes a light source including a plurality of LEDs, and a light guide plate. One of the end surfaces of the light guide plate is a light incidence surface at which a plurality of R-LEDs, a plurality of G-LEDs and a plurality of B-LEDs are arranged. LEDs satisfy the relationship of: a distribution range of light emitted from G-LEDs | 2011-03-31 |
20110075445 | Wide range DC power supply with bypassed multiplier circuits - A power supply provides dc power over a wide range of output voltages at full operating power by utilizing multiplying circuits ( | 2011-03-31 |
20110075446 | Circuit for Converting a Pulsed Input Voltage to a DC Voltage - The present disclosure presents a circuit for converting a pulsed input voltage to a DC output voltage. The circuit comprises input nodes for receiving the pulsed input voltage and output nodes for outputting the DC output voltage. The circuit further comprises a first transistor and a second transistor connected between the input and the output nodes in a synchronous rectifier configuration. The first and second transistors each have a gate connected to a driving circuit configured for alternately charging the gates of the transistors whereby the driving circuit comprises an auxiliary circuit not directly connected to the input nodes and configured for providing a predetermined auxiliary supply voltage to the gates. In an embodiment, the auxiliary circuit comprises a buck DC-DC converter of which an input node is connected to the output nodes and of which an output node is connected to the gates. | 2011-03-31 |
20110075447 | SINGLE STAGE POWER CONVERSION UNIT WITH CIRCUIT TO SMOOTH AND HOLDUP DC OUTPUT VOLTAGE - The Power Conversion Unit includes a single stage rectifier circuit that generates a DC voltage which is stored on a first capacitor. A circuit arrangement connected to the first capacitor monitors the DC voltage at the capacitor and other predefined signals to generate signals for smoothing ripples associated with the DC voltage and maintains the DC voltage at a predefined level for a predefined time interval. The holdup and smoothing voltages are generated by developing and storing a high voltage on a second capacitor. A switching device connected to the second capacitor causes energy to flow from the second capacitor into the primary winding of a transformer whose secondary winding are switched to deposit the energy stored in said transformer onto the first capacitor. A circuit for charging the second capacitor is also provided. | 2011-03-31 |
20110075448 | SWITCHING POWER CONVERTER CONTROLLER WITH DIRECT CURRENT TRANSFORMER SENSING - A power control system includes a current transformer to step down a switch current of a switching power converter. In at least one embodiment, the stepped down current is received by a switching power converter controller. Since the current is received by the controller, the current is not converted into a voltage prior to receipt by the controller in order for the controller to monitor an inductor current of the switching power converter. In at least one embodiment, the controller compares the stepped down switch current with a reference current. In at least one embodiment, the controller includes a voltage converter to convert the switch current into a voltage within the controller. The controller compares the voltage representing the switch current with a reference voltage. The controller can use the current or voltage comparisons to control power factor correction and output voltage regulation of a switching power converter. | 2011-03-31 |
20110075449 | Compact Power Transformer Components, Devices, Systems and Methods - Disclosed herein are various embodiments of compact coil power transformers configured to provide high voltage isolation and high voltage breakdown performance characteristics in small packages. Compact coil transformers are provided across which power may be transmitted and received by primary and secondary coils disposed on opposing sides of a substrate without high voltage breakdowns occurring therebetween. At least portions of the compact coil transformer are formed of an electrically insulating, non-metallic, non-semiconductor, low dielectric loss material. The compact coil transformers may be formed in small packages using, by way of example, printed circuit boards, flex circuits, lead frames, CMOS and other fabrication and packaging processes. | 2011-03-31 |
20110075450 | SWITCHING POWER SUPPLY DEVICE - During a soft start period at the time of startup, a PWM control is carried out. After the soft start period ends, the PWM control is converted into a frequency control, so that stress of a switching element is suppressed and the audible oscillation frequency is removed. As a result, it is possible to obtain a switching power supply device having high power conversion efficiency. | 2011-03-31 |
20110075451 | Power Semiconductor Module and Method for Operating a Power Semiconductor Module - A power semiconductor module is provided in which power semiconductor chips with an aluminum-based chip metallization and power semiconductor chips with a copper-based chip metallization are included in the same module, and operated at different barrier-layer temperatures during use. | 2011-03-31 |
20110075452 | DETECTING DEVICE FOR THE MIDPOINT VOLTAGE OF A TRANSISTOR HALF BRIDGE CIRCUIT - A detecting device detects the midpoint voltage of a half bridge circuit of transistors. The circuit comprises a bootstrap capacitor having one terminal connected to the midpoint node of the half bridge circuit and another terminal connected to a supply circuit. The device comprises a further capacitor connected between a second terminal of the bootstrap capacitor and circuit means adapted to form a low impedance node for a current signal circulating in said further capacitor during the transitions from the low value to the high value and from the high value to the low value of the midpoint voltage. The device comprises a detector to detect said current signal circulating in said further capacitor and to output at least a first signal indicating the transitions from the low value to the high value or from the high value to the low value according to said current signal. | 2011-03-31 |
20110075453 | DYNAMIC CONVERSION OF VARIABLE VOLTAGE DC TO AC - An apparatus for power conversion includes an inverter; a converter configurable to function as a DC voltage booster; and a controller for selectively causing the converter to provide a boosted DC voltage to the inverter. | 2011-03-31 |
20110075454 | POWER SUPPLY - A power supply includes two or more input waveforms being shaped or selected so that after being separately level-shifted and rectified, their additive combination results in a DC output waveform with substantially no ripple. The power supply may comprise a waveform generator, a level conversion stage for step up or down conversion, a rectification stage, and a combiner. The waveform generator may generate complementary waveforms, preferably identical but phase offset from each other, such that after the complementary waveforms are level-converted, rectified and additively combined their sum will be constant, thus requiring no or minimal smoothing for generation of a DC output waveform. The level conversion may be carried out using transformers or switched capacitor circuits. Feedback from the DC output waveform may be used to adjust the characteristics of the input waveforms. | 2011-03-31 |
20110075455 | DC-AC Inverters - A method of operating a DC-AC inverter to produce AC power having alternating positive and negative half cycles is disclosed. The inverter includes an input connected to a DC power source, an output, a first buck converter coupled between the input and the output and a second buck converter coupled between the input and output. The method includes alternately operating the first buck converter and the second buck converter to alternately produce the positive and negative half cycles at the output. | 2011-03-31 |
20110075456 | POWER CONVERSION CONTROL SYSTEM - A power distribution system comprises a power conversion module for performing power conversion between a DC voltage at a DC side and an AC power at an AC side, and a conversion control system. The AC side of the power conversion module is electrically coupled to a grid. The conversion control system includes a phase-locked-loop circuit for receiving a multi-phase reference signal of a grid voltage and for generating a synchronized signal, a regulator for receiving reference commands, a two-phase grid feedback signal, and the synchronized signal and for generating a control signal for the power conversion module, and a phase compensation circuit for receiving the synchronized signal and the multi-phase reference signal of the grid voltage, for obtaining a phase displacement signal, and for generating a phase compensation signal for compensating the reference commands or for compensating the synchronized signal when the phase displacement signal exceeds a threshold value. | 2011-03-31 |
20110075457 | Capacitor startup apparatus and method with failsafe short circuit protection - Electronic circuits couple energy storage devices, such as double layer capacitors or rechargeable battery cells, to a power supply output, thereby improving noise suppression and extending ride-through capability of the power supply. In a typical circuit, an energy storage device is coupled in series with a switch that controls the charging current into the energy storage device. The switch is controlled by a comparator that receives a signal related to the voltage level of the power supply. In some embodiments, the comparator also receives a feedback signal related to a charging current flowing into the energy storage device. The circuit is configured so that the switch limits the charging current to a predetermined current level, or does not allow the charging current to flow until the output voltage of the power supply reaches a predetermined voltage level. | 2011-03-31 |
20110075458 | AC-DC Switching Power Converters With Frequency Variation in Response to Load Changes - A method of operating a switching power converter having at least one power switch controlled by a drive signal having a switching frequency is disclosed. The method includes monitoring an output power of the switching power converter, determining whether the output power has decreased below a threshold level and, in response to the output power decreasing below the threshold level, changing the switching frequency of the drive signal from a first switching frequency to a second switching frequency when an operating condition of the switching power converter is satisfied. Also disclosed are controllers and switching power converters (including PFC converters). | 2011-03-31 |
20110075459 | Power Factor Correction Circuits, Systems and Power Supplies Operable With Different Input Voltages - A cost effective solution for power factor correction in power devices operating at two widely separated input voltages comprises two unequal power rails. One power rail is optimized for operation at high line voltage only, while the other power rail is designed only for low line voltage. When operating at high line voltage, the second rail is disabled. At low line, both power rails are enabled but by virtue of unequal boost inductors, the high line power rail handles only about 30% of the power while the low line power rail handles the remaining power. Hence, the efficiency at high line voltage is maximized. As the inductance used in the high line power rail is much higher in value, it stays in continuous conduction mode for all load conditions and hence the power factor is significantly improved. | 2011-03-31 |
20110075460 | THREE-PHASE LOW-LOSS RECTIFIER - A three-phase bridge rectifier circuit (TPBRC) connectable to an AC voltage source ( | 2011-03-31 |
20110075461 | THREE-PHASE LOW-LOSS RECTIFIER WITH ACTIVE GATE DRIVE - A three-phase bridge rectifier circuit (BRC) connectable to an AC voltage source (ACVS) via input lines ( | 2011-03-31 |
20110075462 | Bridgeless Boost PFC Circuits and Systems - Bridgeless boost PFC circuits and systems providing an improved method of current sensing using two current sensing resistors is envisaged. Analog switches are provided to select one of the two current sensing resistors based on the polarity of the AC line. An amplifier is provided to eliminate use of resistors with large values, thus resulting in lower power loss and efficient systems. | 2011-03-31 |
20110075463 | POWER CONVERSION APPARATUS AND CONTROLLER THEREOF - A power conversion apparatus includes a converter having an input power source Vin, a reactor L | 2011-03-31 |
20110075464 | Synchronous rectification control device, method for synchronous rectification control, and insulated type switching power supply - A synchronous rectification control device achieves high power conversion efficiency without supplying additional signal to a secondary side from a primary side. An insulated type switching power supply provides such a synchronous rectification control device. An output power is regulated based on a phase difference between two half bridges in the primary side. In the secondary side of the full bridge converter circuit, a center tap is lead out from the secondary windings of a transformer to obtain two symmetrical sections of windings. A device for detecting winding voltage observes winding voltages at terminals of the sections of windings. The synchronous rectification control circuit controls transistors and MOSFETs connected to the secondary windings to make the transistor in the ON or OFF state depending on the current flow in the secondary windings. | 2011-03-31 |
20110075465 | DIRECT CONVERTER AND SYSTEM INCLUDING A DIRECT CONVERTER - A direct converter includes n input phase connections and p output phase connections, where n≧2 and p≧2. The direct converter also includes (n·p) two-pole switching cells for switching at least one positive voltage and at least one negative voltage between the poles. Each output phase connection is connected in series with each input phase connection, respectively, via a switching cell. To enable any desired and continuous current flow setting from an input phase connection to an output phase connection of the direct converter and, moreover, to exchange electrical energy between the two-pole switching cells of the direct converter, at least one inductance is connected into each series connection. A system including a direct converter is also provided. | 2011-03-31 |
20110075466 | METHODS AND APPARATUS FOR USING A CONFIGURATION ARRAY SIMILAR TO AN ASSOCIATED DATA ARRAY - Methods, apparatus, and systems in accordance with this invention include memories that include a data array and a configuration array adapted to store configuration information for configuring the data array. The data array and the configuration array include a plurality of wordlines and a plurality of bitlines. The plurality of wordlines in the data array extend in the same direction as the plurality of wordlines in the configuration array. Likewise, the plurality of bitlines in the data array extend in the same direction as the plurality of bitlines in the configuration array. Numerous other aspects are disclosed. | 2011-03-31 |
20110075467 | Ferroelectric memory devices and operating methods thereof - A ferroelectric memory device having a NAND array of a plurality of ferroelectric memory cells includes: a fully depleted channel layer; a gate electrode layer; and a ferroelectric layer located between the channel layer and the gate electrode layer. The data of the plurality of ferroelectric memory cells is erased by applying a first erase voltage to a bit line and a common source line and applying a second erase voltage to a string selection line and a ground selection line. | 2011-03-31 |
20110075468 | REVERSE SET WITH CURRENT LIMIT FOR NON-VOLATILE STORAGE - A storage system includes a substrate, control circuitry on the substrate, a three dimensional memory array (above the substrate) that includes a plurality of reversible resistance-switching elements, and circuits for limiting the SET current for the reversible resistance-switching elements. The memory cell is SET in a reverse biased fashion. | 2011-03-31 |
20110075469 | RESISTANCE VARIABLE NONVOLATILE MEMORY DEVICE - Each of memory cells (MC) includes one transistor and one resistance variable element. The transistor includes a first main terminal, a second main terminal and a control terminal. The resistance variable element includes a first electrode, a second electrode and a resistance variable layer provided between the first electrode and the second electrode. A first main terminal of one of two adjacent memory cells is connected to a second main terminal of the other memory cell, to form a series path (SP) sequentially connecting main terminals of the plurality of memory cells in series. Each of the memory cells is configured such that the control terminal is a part of a first wire (WL) associated with the memory cell or is connected to the first wire associated with the memory cell, the second electrode is a part of a second wire (SL) associated with the memory cell or is connected to the second wire associated with the memory cell; and the first electrode is a part of a series path (SP) associated with the memory cell or is connected to the series path associated with the memory cell. | 2011-03-31 |
20110075470 | EMBEDDED SRAM STRUCTURE AND CHIP - An embedded SRAM chip in a 32 nm or smaller technology generation includes a first SRAM array of first SRAM unit cells. Each first SRAM unit cell includes a data latch for data storage and at least two pass gates for data reading and writing access. The cell area is defined by a first X-pitch and a first Y-pitch, the X-pitch being longer than the Y-pitch. A plurality of logic transistors are formed outside of the first SRAM array, the plurality of logic transistors including at least first and second logic transistor having first and second gate pitches defined between their source and drain contacts. The second gate pitch is the minimum logic gate pitch for the plurality of logic transistors. The first Y-pitch is equal to twice the first gate pitch and the ratio of the first Y-pitch to twice the second logic gate pitch is greater than one. | 2011-03-31 |
20110075471 | Enhancing Read and Write Sense Margins in a Resistive Sense Element - An apparatus and method for enhancing read and write sense margin in a memory cell having a resistive sense element (RSE), such as but not limited to a resistive random access memory (RRAM) element or a spin-torque transfer random access memory (STRAM) element. The RSE has a hard programming direction and an easy programming direction. A write current is applied in either the hard programming direction or the easy programming direction to set the RSE to a selected programmed state. A read circuit subsequently passes a read sense current through the cell in the hard programming direction to sense the selected programmed state of the cell. | 2011-03-31 |
20110075472 | MAGNETORESISTIVE DEVICE HAVING SPECULAR SIDEWALL LAYERS - A multilayered magnetoresistive device includes a specular layer positioned on at least one sidewall and a copper layer positioned between the specular layer and the sidewall. | 2011-03-31 |
20110075473 | CIRCUIT AND METHOD FOR GENERATING REFERENCE VOLTAGE, PHASE CHANGE RANDOM ACCESS MEMORY APPARATUS AND READ METHOD USING THE SAME - A circuit for generating a reference voltage includes at least one reference cell, a reference cell write driver, a reference cell sense amplifier, and a voltage compensation unit. The reference cell is a variable resistance memory cell. The reference cell write driver writes data to the reference cell. The reference cell sense amplifier reads out the data stored in the reference cell on the basis of a predetermined reference voltage. A voltage compensation unit outputs a compensation reference voltage by controlling the reference voltage in accordance with the output value of the sense amplifier. | 2011-03-31 |
20110075474 | PHASE CHANGE RANDOM ACCESS MEMORY APPARATUS AND WRITE CONTROL METHOD FOR THE SAME - The disclosed phase change random access memory apparatus is configured to program a predetermined phase change memory cell in the phase change memory apparatus in response to a plurality of write instructions applied at independent points of time. | 2011-03-31 |
20110075475 | SET ALGORITHM FOR PHASE CHANGE MEMORY CELL - Memory devices and methods for operating such devices are described herein. A method is described herein for operating a memory cell comprising phase change material and programmable to a plurality of resistance states including a high resistance state and a lower resistance state. The method comprises applying a first bias arrangement to the memory cell to establish the lower resistance state, the first bias arrangement comprising a first voltage pulse. The method further comprises determining whether the memory cell is in the lower resistance state, and if the memory cell is not in the lower resistance state then applying a second bias arrangement to the memory cell. The second bias arrangement comprises a second voltage pulse having a pulse height greater than that of the first voltage pulse. | 2011-03-31 |
20110075476 | SPINTRONIC DEVICE AND INFORMATION TRANSMITTING METHOD - A concrete means for making transmission over long distances possible using a spin-wave spin current is provided in a spintronic device and an information transmitting method. | 2011-03-31 |
20110075477 | REDUCING THE IMPACT OF INTERFERENCE DURING PROGRAMMING - A system for programming non-volatile storage is proposed that reduces the impact of interference from the boosting of neighbors. Memory cells are divided into two or more groups. In one example, the memory cells are divided into odd and even memory cells; however, other groupings can also be used. Prior to a first trigger, a first group of memory cells are programmed together with a second group of memory cells. Subsequent to the first trigger and prior to a second trigger, the first group of memory cells are programmed separately from the second group of memory cells. Subsequent to the second trigger, the first group of memory cells are programmed together with the second group of memory cells. Before and after both triggers, the first group of memory cells are verified together with the second group of memory cells. | 2011-03-31 |
20110075478 | NONVOLATILE MEMORY DEVICE AND SYSTEM, AND METHOD OF PROGRAMMING A NONVOLATILE MEMORY DEVICE - A nonvolatile memory includes a plurality of N-bit multi-level cell (MLC) memory cells and a controller. The plurality of N-bit MLC memory cells are for storing N pages of data, each of the MLC memory cells programmable into any one of 2 | 2011-03-31 |
20110075479 | MULTI-LEVEL CELL COPYBACK PROGRAM METHOD IN A NON-VOLATILE MEMORY DEVICE - A multi-level cell copyback program method in a non-volatile memory device is disclosed. The method includes performing a multi-level cell copyback program operation; performing selectively a first verifying operation, a second verifying operation or a third verifying operation in accordance with data stored in an MSB node of the first register or data stored in an LSB node of the second register. The first verifying operation is based on a first verifying voltage. The second verifying operation is based on a second verifying voltage higher than the first verifying voltage. And the third verifying operation is based on a third verifying voltage higher than the second verifying voltage. The copy back program operation is performed repeatedly in accordance with result of the verifying operation. | 2011-03-31 |
20110075480 | Non-Volatile Memory With Improved Sensing By Reducing Source Line Current - One or more sense amplifiers for sensing the conduction current of non-volatile memory is controlled by signals that are timed by a reference sense amplifier having similar characteristics and operating conditions. In one aspect, a sensing period is determined by when the reference sense amplifier sensing a reference current detects an expected state. In another aspect, an integration period for an amplified output is determined by when the reference sense amplifier outputs an expected state. When these determined timings are used to control the one or more sense amplifiers, environment and systemic variations are tracked. | 2011-03-31 |
20110075481 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - A nonvolatile semiconductor memory device comprises: a bit line; a source line; a memory string having a plurality of electrically data-rewritable memory transistors connected in series; a first select transistor provided between one end of the memory string and the bit line; a second select transistor provided between the other end of the memory string and the source line; and a control circuit configured to control a read operation. A plurality of the memory strings connected to one bit line via a plurality of the first select transistors. During reading of data from a selected one of the memory strings, the control circuit renders conductive the first select transistor connected to an unselected one of the memory strings and renders non-conductive the second select transistor connected to unselected one of the memory strings. | 2011-03-31 |
20110075482 | MAINTAINING INTEGRITY OF PRELOADED CONTENT IN NON-VOLATILE MEMORY DURING SURFACE MOUNTING - A non-volatile memory chip package is prepared for surface mounting to a substrate in a solder reflow process by programming erased blocks to higher threshold voltage levels, to improve data retention for blocks which are preloaded with content, such as by an electronic device manufacturer. Following the surface mounting, the previously-erased blocks are returned to the erased state. The threshold voltage of storage elements of the preloaded blocks can change during the surface mounting process due to a global charge effect phenomenon. The effect is most prominent for higher state storage elements which are surrounded by erased blocks, in a chip for which the wafer backside was thinned and polished. The erased blocks can be programmed using a single program pulse without performing a verify operation, as a wide threshold voltage distribution is acceptable. | 2011-03-31 |
20110075483 | NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE AND METHOD OF CONTROLLING THE SAME - According to one embodiment, a non-volatile semiconductor storage device includes a control circuit. When performing a read operation, the control circuit is configured to: apply a first voltage to a selected word line that is connected to a selected memory cell, the first voltage being a voltage between a plurality of threshold voltage distributions; apply a second voltage to a first unselected word line adjacent to the selected word line, the second voltage being not more than the first voltage; apply a third voltage to a second unselected word line adjacent to the first unselected word line, the third voltage being not less than a read pass voltage at which non-volatile memory cells become conductive; and apply the read pass voltage to a third unselected word line, the third unselected word line being an unselected word line other than the first unselected word line and the second unselected word line. | 2011-03-31 |
20110075484 | NONVOLATILE MEMORY DEVICE AND NONVOLATILE MEMORY SYSTEM EMPLOYING SAME - A nonvolatile memory device comprises a memory cell array, a row selection circuit and a voltage generator. The memory cell array comprises a first dummy memory cell, a second dummy memory cell, and a NAND string comprising a plurality of memory cells coupled in series between a string selection transistor and a ground selection transistor through the first dummy memory cell and the second dummy memory cell. During a read-out operation mode, a dummy read-out voltage is applied to a first dummy wordline coupled to the first dummy memory cell, and to a second dummy wordline coupled to the second dummy memory cell. The dummy read-out voltage has a lower magnitude than a read-out voltage applied to an unselected memory cell during the read-out operation mode. | 2011-03-31 |
20110075485 | NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE - A non-volatile semiconductor storage device according to one aspect of the present invention includes a plurality of sense amplifier circuit that are configured to carry out a plurality of read cycles on a plurality of bit lines connected to those memory cells that are selected by a selected one of the word lines. During the second and subsequent read cycles, supply of a read current is ceased to those bit lines when it is determined in the preceding read cycle that a current not less than a certain determination current level flows therethrough, and the read current is supplied only to the remaining bit lines. A setup time of the bit lines in the first read cycle is set shorter than a setup time of the bit lines in the second and subsequent read cycles. | 2011-03-31 |
20110075486 | CHARGE TRAPPING MEMORY CELL HAVING BANDGAP ENGINEERED TUNNELING STRUCTURE WITH OXYNITRIDE ISOLATION LAYER - A band gap engineered, charge trapping memory cell includes a charge storage structure including a trapping layer. a blocking layer, and a dielectric tunneling structure including a thin tunneling layer, a thin bandgap offset layer and a thin isolation layer comprising silicon oxynitride. The memory cell is manufactured using low thermal budget processes. | 2011-03-31 |
20110075487 | BOOSTER CIRCUIT AND SEMICONDUCTOR MEMORY - A booster circuit includes a first capacitor and a second capacitor serially coupled between a first node and a second node through a third node; a third capacitor and a fourth capacitor serially coupled between a fourth node and a fifth node through a sixth node; a first switch coupling the third node with a power supply line when the fourth node is set to a first level; a second switch coupling the sixth node with the power supply line when the first node is set to the first level; a third switch transferring a plurality of electric charges of the sixth node to the second node; a fourth switch transferring a plurality of electric charges of the third node to the fifth node; a fifth switch coupling the second node with a voltage line; and a sixth switch coupling the fifth node with the voltage line. | 2011-03-31 |
20110075488 | Non-Volatile Semiconductor Memory - A non-volatile semiconductor device has a memory cell array having electrically erasable programmable non-volatile memory cells, reprogramming and retrieval circuits that temporarily store data to be programmed in the memory cell array and sense data retrieved from the memory cell array. Each reprogramming and retrieval circuit has first and second latches that are selectively connected to the memory cell array and transfer data. A controller controls the reprogramming and retrieval circuits on a data-reprogramming operation to and a data-retrieval operation from the memory cell array. Each reprogramming and retrieval circuit has a multilevel logical operation mode and a caching operation mode. In the multilevel logical operation mode, re-programming and retrieval of upper and lower bits of two-bit four-level data is performed using the first and the second latches to store the two-bit four-level data in one of the memory cells in a predetermined threshold level range. In the caching operation mode, data transfer between one of the memory cells selected in accordance with a first address and the first latch is performed while data transfer is performed between the second latch and input/output terminals in accordance with a second address with respect to one-bit two-level data to be stored in one of the memory cells. | 2011-03-31 |
20110075489 | NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE - Two or more writing prohibition voltages are applied to bit lines connected to memory cell transistors corresponding to the writing voltage of word lines in a writing operation to write data in the memory cell transistors, while increasing the writing voltage of the word line in a stepwise. Two or more selection gate line voltages, corresponding to the writing prohibition voltages applied to the bit lines, are applied to the gates of selection gate transistors. | 2011-03-31 |
20110075490 | DATA STRIPES AND ADDRESSING FOR FLASH MEMORY DEVICES - Data stripes and addressing for flash memory devices are provided. Flash memory devices illustratively have a plurality of programmable devices that are capable of simultaneously storing data. A plurality of erasure blocks are within each of the programmable devices, and each erasure block has pages of transistors. The flash memory devices are logically organized as a plurality of stripes. Each stripe has a height and a width. In an embodiment, the stripe height is greater than one page. In another embodiment, the stripe width is less than all of the programmable devices within the flash memory device. | 2011-03-31 |
20110075491 | SEMICONDUCTOR MEMORY APPARATUS AND METHOD OF DRIVING BIT-LINE SENSE AMPLIFIER - Disclosed is a semiconductor memory apparatus which improves the time to transmit write data to a memory cell and improves data retention time of the memory cell. To this end, the semiconductor memory apparatus includes a bit-line sense amplifier that senses and amplifies data of bit-line pairs by driving power supplied through a pull up power line and a pull down power line and transmits the amplified data to a memory cell. A bit-line sense amplification power supply unit supplies pull up driving voltage and pull down driving voltage to the pull up and pull down power lines in an active mode and supplies an over driving voltage and the pull down driving voltage having a higher voltage level than the pull up driving voltage to the pull up and pull down power lines until the memory cell is deactivated in a precharge mode. | 2011-03-31 |
20110075492 | MEMORY DEVICE BIT LINE SENSING SYSTEM AND METHOD THAT COMPENSATES FOR BIT LINE RESISTANCE VARIATIONS - Systems, devices and methods are disclosed, such as a system and method of sensing the voltage on bit lines that, when respective memory cells coupled to the bit lines are being read that compensates for variations in the lengths of the bit lines between the memory cells being read and respective bit line sensing circuits. The system and method may determine the length of the bit lines between the memory cells and the sensing circuits based on a memory address, such as a block address. The system and method then uses the determined length to adjust either a precharge voltage applied to the bit lines or the duration during which the bit lines are discharged by respective memory cells before respective voltages on the bit lines are latched. | 2011-03-31 |
20110075493 | NONVOLATILE MEMORY DEVICES AND METHODS OF CONTROLLING THE WORDLINE VOLTAGE OF THE SAME - A nonvolatile memory device includes an array of memory cells arranged in rows and columns, the array of memory cells having wordlines associated therewith. A wordline voltage controller determines the levels of wordline voltages to be supplied to the respective wordlines and a wordline voltage generator generates the wordline voltages at the determined levels. Related methods are also provided. | 2011-03-31 |
20110075494 | DATA TRANSFER CIRCUIT - A data transfer circuit includes: an asynchronous memory to which transfer data is written from a first clock domain with a first clock and from which the written transfer data is read to a second clock domain with a second clock; a scan flip-flop whose input terminal is connected to a first position located on a data path, of the transfer data, from the asynchronous memory to the second clock domain, and whose output terminal is connected to a second position located on a data path, of the transfer data, from the asynchronous memory to the first position; and a clock selector which selects a clock to drive the scan flip-flop from the first clock and the second clock. | 2011-03-31 |
20110075495 | SEMICONDUCTOR MEMORY APPARATUS AND DRIVING METHOD USINGTHE SAME - Various embodiments of a semiconductor memory apparatus and a related driving method are disclosed. According to one exemplary embodiment, a semiconductor memory apparatus may include a switching unit and a switching control unit. The switching unit couples or decouples a cell plate voltage line to or from a cell plate electrode in response to a control signal. The switching control unit is configured to enable the control signal at a first timing and disable the control signal at a second timing. | 2011-03-31 |
20110075496 | Memory Controller Comprising Adjustable Transmitter Impedance - Memory controllers, memory devices and methods are provided in which test data is transmitted and signal parameters are varied. The transmitted test data is read, and based on a comparison between transmitted test data and read test data a transmitter impedance is adjusted. | 2011-03-31 |
20110075497 | MEMORY SYSTEM AND METHOD USING STACKED MEMORY DEVICE DICE, AND SYSTEM USING THE MEMORY SYSTEM - A memory system and method uses stacked memory device dice coupled to each other and to a logic die. The logic die may include a timing correction system that is operable to control the timing at which the logic die receives signals, such as read data signals, from each of the memory device dice. The timing correction controls the timing of the read data or other signals by adjusting the timing of respective strobe signals, such as read strobe signals, that are applied to each of the memory device dice. The memory device dice may transmit read data to the memory device at a time determined by when it receives the respective strobe signals. The timing of each of the strobe signals is adjusted so that the read data or other signals from all of the memory device dice are received at the same time. | 2011-03-31 |
20110075498 | SEMICONDUCTOR MEMORY APPARATUS AND TEST METHOD USING THE SAME - A semiconductor memory apparatus includes: a precharge voltage control unit configured to selectively output a bit line precharge voltage or a core voltage as a control voltage in response to a test signal; a bit line equalization unit configured to precharge a bit line to the control voltage; a sense amplifier driving control unit configured to generate a first voltage supply control signal, a second voltage supply control signal and a third voltage supply control signal in response to the test signal, a sense amplifier enable test signal, a first voltage supply signal, a second voltage supply signal and a third voltage supply signal; and a voltage supply unit configured to provide the core voltage, an external voltage and a ground voltage to a sense amplifier with an open bit line structure in response to the first to third voltage supply control signals. | 2011-03-31 |
20110075499 | SEMICONDUCTOR MEMORY DEVICE COMPRISING SENSING CIRCUITS WITH ADJACENT COLUMN SELECTORS - A semiconductor memory device comprises a substrate comprising a first cell array region, a first sense circuit region, a second sense circuit region, and a second cell array region that are arranged in order from a first side to a second side. First and second bit lines are coupled to a plurality of memory cells in the first cell array region, and first and second complementary bit lines are coupled to a plurality of memory cells in the second cell array region. A first column selector is formed in the first sense circuit region and is coupled to the first bit line and the first complementary bit line. A second column selector is formed in the second sense circuit region and is coupled to the second bit line and the second complementary bit line. The first column selector and the second column selector are formed directly adjacent to each other. | 2011-03-31 |
20110075500 | SEMICONDUCTOR MEMORY DEVICE AND A METHOD OF CONTROLLING A SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device includes a first anti-fuse element and a second anti-fuse element, respectively composed of a transistor, wherein the first anti-fuse element and the second anti-fuse element are configured so as to be concomitantly programmable, respectively formed in P-wells on a substrate, and the adjacent P-wells are isolated by N-wells of an opposite conductivity type, formed therebetween. | 2011-03-31 |
20110075501 | Multi-Channel Semiconductor Integrated Circuit Devices for Controlling Direct Current Generators and Memory Systems Including the Same - Multi-channel semiconductor integrated circuit devices are provided including a plurality of memory devices that are independently accessible, each of the plurality of memory devices including at least one power generation unit and a control unit for controlling an operation of the at least one power generation unit, a detection unit for detecting an operation state of the plurality of memory devices, and a common control unit for commonly controlling an operation of the at least one power generation unit of the plurality of memory devices, according to the operation state of the plurality of memory devices detected by the detection unit. The control unit of each of the plurality of memory devices controls the operation of the at least one power generation unit of a corresponding one of the plurality of memory devices. | 2011-03-31 |
20110075502 | BANK ACTIVE SIGNAL GENERATION CIRCUIT - The bank active signal generation circuit comprises a decoded signal generator and an active signal generator. The decoded signal generator generates decoded signals from a first bank access signal, a second bank access signal and a row address signal in response to when a prefetch signal at a first mode. The decoded signal generator also generates decoded signals from the first bank access signal, the second bank access signal, and a third bank access signal in response when the prefetch signal at a second mode. The active signal generator generates bank active signals in response to receiving the decoded signals, an active pulse and a precharge pulse. | 2011-03-31 |
20110075503 | MAIN DECODING CIRCUIT AND SEMICONDUCTOR MEMORY APPARATUS INCLUDING THE SAME - A main decoding circuit includes a shared column selection signal generating unit and a switching unit. The shared column selection signal generating unit receives a column decoding signal to generate a shared column selection signal. The switching unit selectively provides the shared column selection signal to one of a column selection line of a first memory bank and a column selection line of a second memory bank in response to a bank selection signal. | 2011-03-31 |
20110075504 | Dual Beta Ratio SRAM - A static random access memory (SRAM) cell includes a first read port, the first read port having a first beta ratio; and a write port, the write port having a second beta ratio that is substantially lower than the first beta ratio. A static random access memory (SRAM) array includes a plurality of SRAM cells, an SRAM cell including a first read port, the first read port having a first beta ratio; and a write port, the write port having a second beta ratio that is substantially lower than the first beta ratio. | 2011-03-31 |
20110075505 | SEMICONDUCTOR MEMORY DEVICE AND LAYOUT STRUCTURE OF SUB-WORD LINE CONTROL SIGNAL GENERATOR - A semiconductor memory device and a layout structure of sub-word line control signal generators. The sub-word line control signal generators are configured to supply a sub-word line control signal of a predefined voltage level to a sub-word line driver to enable a sub-word line of a memory cell array. At least two sub-word line control signal generators are disposed, respectively, at edge areas of the memory cell array, to directly supply the sub-word line control signal to one selected sub-word line driver, thereby reducing the power consumption, including for example, VPP voltage. Embodiments of the present invention also reduce the number of VPP power lines, thereby lessening a noise disturbance. | 2011-03-31 |
20110075506 | KNEADING DEVICE FOR KNEADING INGREDIENTS INTO DOUGH AND A KNEADING TOOL - A kneading device ( | 2011-03-31 |
20110075507 | DIFFUSER/EMULSIFIER - A diffuser provides the ability to diffuse one or more infusion materials into a host material. A rotor and stator rotate relative to one another. The infusion materials are drawn through openings in the rotor and stator. These openings are also causing turbulence within the host material, which is flowing through an area between the rotor and stator. As aligned openings pass one another, succussion occurs, which provides energy to diffuse the infusion materials into the host material to an extremely high degree. The opening patterns in the rotor and stator can be designed to operate at a single frequency or at multiple frequencies. The frequencies of operation may affect bonding between the infusion materials and the host material and may also be effective in break down of complex molecular structures. | 2011-03-31 |
20110075508 | REFRIGERATED AGITATOR ASSEMBLY FOR MIXERS - An agitator assembly for use with mixers is provided. This agitator assembly includes an agitator shaft adapted to receive a flow of liquid coolant therethrough; a first hub assembly mounted on the agitator shaft; a second hub assembly mounted on the agitator shaft; at least one agitator bar connecting the first hub extension to the second hub extension, wherein the agitator bar further includes a conduit for delivering liquid coolant from the first hub extension to the second hub extension; and at least one agitator bar connecting the second hub extension to the first hub extension, wherein the agitator bar further includes a conduit for returning liquid coolant from the second hub extension to the first hub extension. | 2011-03-31 |
20110075509 | MIXING BOWL COOLING JACKET WITH TURBULENCE INDUCING STRUCTURES - A cooling jacket for use with mixing bowls is provided. This cooling jacket includes a plurality of channel forming structures, wherein each of the plurality of channel forming structures further includes a least one substantially vertical portion and a substantially horizontal portion, and wherein each channel forming structure defines a channel for receiving liquid coolant; and a plurality of pins positioned within the channels either in a predetermined, regular manner or randomly. | 2011-03-31 |
20110075510 | MODULAR DYE METER AND METHOD OF PREPARING COMPOUNDS - A method of preparing compounds comprising a plurality of components, the method comprising providing a modular dye meter, introducing component into one or more than one modular batching member of the modular dye meter, where the compound to be prepared comprises the one or more than one component, activating the internal rotor of one or more than one of the batching and delivering devices, thereby causing the internal rotors to rotate in the first direction, where rotation of the internal rotor moves component through the progressive recesses of the batching and delivering device through the corresponding delivery duct and through the dispenser, and thereby into a vessel for containing the compound, causing the rotation of the internal rotor in the first direction to cease, causing the internal rotor to rotate in a second direction, where the second direction is opposite to the first direction, thereby moving component back through the delivery duct into the corresponding batching and delivering device, and causing the rotation of the internal rotor in the second direction to cease. | 2011-03-31 |
20110075511 | METHOD FOR CONSTRUCTING CO-ROTATING, CONTIGUOUS BODIES AND COMPUTER PROGRAM PRODUCT FOR CARRYING OUT SAID METHOD - The invention relates to a method of constructing elements which wipe each other during corotation about two parallel axes in such a manner that they constantly touch each other at at least one point. | 2011-03-31 |
20110075512 | CROSS FLOW INVERSION BAFFLE FOR STATIC MIXER - A cross flow inversion mixing baffle that mixes a fluid flow and addresses the streaking phenomenon of the fluid flow in a motionless mixer, the cross flow inversion baffle including a divider wall having first and second sides. On each side of the divider wall, the cross flow inversion baffle includes a perimeter flow diverter, a center-to-perimeter flow portion, and a perimeter-to-center flow portion. The cross flow inversion baffle acts to split the fluid flow so that the fluid in opposing halves of the perimeter of the fluid flow are directed towards opposing halves of the center of the fluid flow, while the center of the fluid flow is split and directed towards opposing halves of the perimeter of the fluid flow. | 2011-03-31 |
20110075513 | LOCATOR SYSTEM AND METHOD INCLUDING NODE AND TARGET ACQUISITION - The present disclosure relates to a method and system for finding and physically altering underground targets. Multiple nodes are dispersed into the ground and determine their spatial orientation using seismic waves, and then operate as an array to locate and properly time kinetic pulses to focus seismic waves on the target. | 2011-03-31 |
20110075514 | APPARATUS AND METHODS FOR ATTENUATING SEISMIC NOISE ASSOCIATED WITH ATMOSPHERIC PRESSURE FLUCTUATIONS - Apparatus and methods are described for attenuating noise associated with atmospheric pressure fluctuations in a seismic signal during seismic data acquisition using at least a pair of sensors comprising a seismic sensor and a pressure sensor for concurrently receiving a seismic signal and a pressure signal respectively, the sensors being adapted individually to transmit the respective seismic and pressure signals to a remote recording station which is adapted to record a plurality of seismic and pressure signals; and a filter for removing, at least partly, noise associated with atmospheric pressure fluctuations in the seismic signal, the filter employing an input signal from the pressure sensor; and a model of the coupling between the atmosphere and the ground to generate a reference signal which is combined with the seismic signal to produce an output signal. | 2011-03-31 |
20110075515 | ESTIMATION OF TIME SHIFT BASED ON MULTI-VINTAGE SEISMIC DATA - The invention is a method of calculating seismic time shifts Δ{right arrow over (t)}(t), comprising:
| 2011-03-31 |
20110075516 | Seismic Imaging Systems and Methods Employing Tomographic Migration-Velocity Analysis Using Common Angle Image Gathers - In at least some embodiments, the system obtains shot gathers for a survey region and migrates the shot gather data with an initial velocity model to obtain angle-domain common image gathers. The system processes the common image gathers to determine depth residuals and corresponding angle-dependent time deviations throughout a seismic survey region. The system solves a set of tomographic equations which employ ray theory to establish a relationship between a travel time deviation and the depth residual of a reflector in the depth-offset ray parameter (z,p) domain. The resulting updates are applied to the velocity model and can be used to re-migrate the shot gather data. The system generates a representation of the survey region that can be displayed to a user. | 2011-03-31 |
20110075517 | CORRECTING AN ACOUSTIC SIMULATION FOR ELASTIC EFFECTS - A technique includes simulating seismic wave propagation based on an acoustic model and based on a result of the simulation, estimating an error between the result and another result obtained if the seismic wave propagation were simulated based on an elastic model. The technique includes based at least in part on the estimated error predicting the other result without performing the simulation based on the elastic model. | 2011-03-31 |