14th week of 2015 patent applcation highlights part 20 |
Patent application number | Title | Published |
20150091606 | Method for Checking an Exciting Current of a Synchronous Machine in Generator Operation - The method includes operating the synchronous machine in idle operation; recording a phase voltage measured value of the synchronous machine; ascertaining a phase voltage expected value by allocating stored characteristics map values for the phase voltage, for the exciting current and the recorded rotational speed of the synchronous machine; and comparing the phase voltage expected value to the phase voltage measured value. Also described is a diagnostic device for carrying out this method, as well as a corresponding computer program product. | 2015-04-02 |
20150091607 | SEQUENTIAL LOGIC CIRCUIT AND METHOD OF PROVIDING SETUP TIMING VIOLATION TOLERANCE THEREFOR - A sequential logic circuit comprising a first latch component comprising a data input arranged to receive an input signal, a data output arranged to output a current logical state of the first latch component and a clock input arranged to receive a clock signal; the first latch component being arranged to comprise a transparent state upon the clock signal received thereby comprising a first logical state, and to comprise a latched state upon the clock signal received thereby comprising a second logical state, and a second latch component comprising a data input arranged to receive an input signal, a data output operably coupled to an output of the sequential logic circuit and arranged to output a current state of the second latch component and a clock input arranged to receive a clock signal; the second latch component being arranged to comprise a transparent state upon the clock signal received thereby comprising a second logical state, and to comprise a latched state upon the clock signal received thereby comprising a first logical state. The sequential logic circuit is arranged to operate in at least a first operating mode in which the data input of the first latch component and the data input of the second latch component are operably coupled to a first input of the sequential logic circuit, and in which the clock signals provided to the first and second latch components are such that a transition of the second latch component from a transparent state to a latched state is delayed relative to a corresponding transition of the first latch component from a transparent state to a latched state for a time period for receiving late data. | 2015-04-02 |
20150091608 | METHOD TO ACHIEVE TRUE FAIL SAFE COMPLIANCE AND ULTRA LOW PIN CURRENT DURING POWER-UP SEQUENCING FOR MOBILE INTERFACES - An input/output (IO) circuit powered by an input/output (IO) supply voltage. The IO circuit includes a supply detector cell that detects a core supply voltage and generates a supply detect signal. A driver circuit is connected to a PAD and the driver circuit receives the supply detect signal. A failsafe circuit receives a PAD voltage. The failsafe circuit and the supply detector cell controls a leakage current from the PAD based on the IO supply voltage and the PAD voltage. | 2015-04-02 |
20150091609 | INTEGRATED CIRCUIT WITH SIGNAL ASSIST CIRCUITRY AND METHOD OF OPERATING THE CIRCUIT - An integrated circuit has signal assist circuitry for assisting with pulling a signal on the signal line towards the logical low or high signal level. The signal assist circuitry comprises first and second assist circuits. The first assist circuit couples the signal line to the logical high signal level following a pullup transition of the signal and provides a floating signal level following a pulldown transition, while the second assist circuit provides the floating signal level following the pullup transition and provides the logical low signal level following the pulldown transition. By providing complementary first and second assist circuits, each circuit can be optimized for the opposite transition to achieve improved performance or power consumption. | 2015-04-02 |
20150091610 | Self-Leveling Logic Receiver - Various implementations include circuits, devices and/or methods that provide closed-loop feedback crowbar current limiting for logic level-shifting between circuits with different voltage supplies. Some implementations include a level-shift circuit assembly including an input buffer and a current limiter. The input buffer is configured to receive an incoming logic signal that is set relative to a first electrical level, and in response, provide a level-shifted logic signal that is set relative to a second electrical level and is logically consistent with the incoming logic signal. The current limiter is configured to suppress the generation of current associated with the input buffer by providing a bias modification condition to the input buffer, in order to adjust the operation of the input buffer, in response to sensing a voltage difference between the first electrical level and the second electrical level. | 2015-04-02 |
20150091611 | IMPEDANCE CALIBRATION CIRCUITS - Impedance calibration circuits are provided. The impedance calibration circuit includes an operation control signal generator and an impedance calibrator. The operation control signal generator receives temperature code signals to generate an operation control signal enabled when an internal temperature is changed from a first temperature to a second temperature. The impedance calibrator receives an external command signal or the operation control signal to generate pull-up code signals for pulling up an output signal and pull-down code signals for pulling down the output signal according to an external resistor. | 2015-04-02 |
20150091612 | NOISE ELIMINATION CIRCUIT OF SEMICONDUCTOR APPARATUS - A semiconductor apparatus includes a pulse generation unit configured to detect a transition of an input signal and generate a preliminary pulse signal, and an error elimination unit configured to determine error of the preliminary pulse signal and output a signal as a pulse signal. | 2015-04-02 |
20150091613 | Flexible Logic Unit - A flexible logic unit (FLU) is targeted to be primarily, but not exclusively, used as an embedded field programmable gate array (EFPGA). The unit is comprised of a plurality of programmable building block tiles arranged in an array of columns and rows of tiles, and programmed by downloading a bit stream, done tile by tile and column by column, using latches that are sequentially programmed and locked using a lock bit as part of the bit stream provided. A scheme of odd and even clocks prevent latch transparency and ensures that once data has arrived at its destination it is properly locked, not to be unintentionally overwritten. | 2015-04-02 |
20150091614 | Robust Flexible Logic Unit - A robust flexible logic unit (FLU) is targeted to be primarily, but not exclusively, used as an embedded field programmable gate array (EFPGA). The unit is comprised of a plurality of programmable building block tiles arranged in an array of columns and rows of tiles, and programmed by downloading a bit stream, done tile by tile and column by column, using latches that are sequentially programmed and locked using a lock bit as part of the bit stream provided. A scheme of odd and even clocks prevent latch transparency and ensures that once data has arrived at its destination it is properly locked, not to be unintentionally overwritten. The robust FLU is further equipped with cyclic redundancy check capabilities to provide indication of faulty column configuration. | 2015-04-02 |
20150091615 | Embedded Non-volatile Memory Circuit for Implementing Logic Functions Across Periods of Power Disruption - A circuit having an autonomous ferroelectric memory latch (AML) is disclosed. An AML characterized by an AML input, an AML output, a first AML power contact, a second AML power contact and an AML state, and a first switch in series with one of the AML input or the AML output. The switch is positioned to prevent the state of the AML from changing when power is provided between the first and second AML power contacts. In one aspect of the invention, the circuit could include a second switch in series with the other of the AML input or the AML output and a latch in series with the AML input or the AML output. The latch is positioned such that a direct path back does not exist between the AML output and the AML input. | 2015-04-02 |
20150091616 | TECHNIQUE TO REALIZE HIGH VOLTAGE IO DRIVER IN A LOW VOLTAGE BICMOS PROCESS - An IO circuit capable of high voltage signaling in a low voltage BiCMOS process. The IO circuit includes a voltage rail generator circuit that receives a reference voltage and generates a voltage rail supply. A BJT (bi-polar junction transistor) buffer circuit is coupled to the voltage rail generator circuit and a pad. The BJT buffer circuit includes a pull-up circuit and a pull-down circuit. The pull-up circuit receives the voltage rail supply. The pull-down circuit is coupled to the pull-up circuit. The pad is coupled to the pull-up circuit and the pull-down circuit. | 2015-04-02 |
20150091617 | LOW-LATENCY, FREQUENCY-AGILE CLOCK MULTIPLIER - In a first clock frequency multiplier, multiple injection-locked oscillators (ILOs) having spectrally-staggered lock ranges are operated in parallel to effect a collective input frequency range substantially wider than that of a solitary ILO. After each input frequency change, the ILO output clocks may be evaluated according to one or more qualifying criteria to select one of the ILOs as the final clock source. In a second clock frequency multiplier, a flexible-injection-rate injection-locked oscillator locks to super-harmonic, sub-harmonic or at-frequency injection pulses, seamlessly transitioning between the different injection pulse rates to enable a broad input frequency range. The frequency multiplication factor effected by the first and/or second clock frequency multipliers in response to an input clock is determined on the fly and then compared with a programmed (desired) multiplication factor to select between different frequency-divided instances of the frequency-multiplied clock. | 2015-04-02 |
20150091618 | SAMPLE AND HOLD CIRCUIT AND SOURCE DRIVER INCLUDING THE SAME - A sample and hold circuit may include: a main sample and hold circuit configured to sample and hold pixel information of an organic light emitting diode (OLED) cell, and output a first output signal; and a dummy sample and hold circuit configured to sample and hold a reference voltage in synchronization with the main sample and hold circuit, and output a second output signal for offsetting a switching noise signal contained in the first output signal. | 2015-04-02 |
20150091619 | SEMICONDUCTOR APPARATUS - A semiconductor apparatus include a signal level switching decision unit and a transmitter unit. The signal level switching decision unit generates a switching control signal according to off-current of transistors included therein. The transmitter unit outputs a transmitter input signal as a transmitter output signal in response to a switching control signal. | 2015-04-02 |
20150091620 | REDUCING CURRENT VARIATION WHEN SWITCHING CLOCKS - An apparatus includes a glitchless divider and a glitchless multiplexer. The glitchless divider may be configured to generate a first system clock in response to a divider value and a clock signal received from a first source. The divider value changes from a first value to a second value in a predetermined number of steps. The glitchless multiplexer may be configured to select between said first system clock and a second system clock in response to a control signal. | 2015-04-02 |
20150091621 | ADVANCED CLOCK SYNCHONIZATION CIRCUIT - A circuit and method for switching between a system's internal clock and an external synchronization clock when a stable external clock has been detected, and for switching back to operating the system using said internal clock when a predetermined number of sequential external clock pulses exceed a predetermined switching period dropout threshold or are otherwise missing. | 2015-04-02 |
20150091622 | SYSTEM AND METHOD FOR ENABLING MAXIMUM PERFORMANCE OPERATION WITHIN AN EXTENDED AMBIENT TEMPERATURE RANGE - A system method of initializing operation of a semiconductor device including detecting de-assertion of an external reset signal while the semiconductor device in a reset state, monitoring a temperature level of the semiconductor device, and while the temperature level is below a predetermined minimum operating temperature level that allows the semiconductor device to operate at a maximum performance level, keeping the semiconductor device in the reset state and asserting at least one operating parameter on the semiconductor device at an elevated level to generate heat on the semiconductor device, and releasing the reset condition when the temperature level is at least the predetermined minimum operating temperature level. The operating parameter may be clock frequency or supply voltage level or a combination of both. Different elevated clock frequencies and/or different minimum operating temperature levels are contemplated. Additionally turning off an external cooling system during the heating process is contemplated. | 2015-04-02 |
20150091623 | CLOCK MULTIPLEXING AND REPEATER NETWORK - A system on chip (SOC) includes a clock generator to provide one or more on-chip reference clocks to a number of physical medium attachments (PMAs) across a common clock bus. The clock generator receives one or more external, off-chip clock lines, from which it generates the on-chip reference clocks. Each of the PMAs may operate data input/output (I/O) channels under a variety of different communications protocols, which can have common or distinct reference clock frequencies. Accordingly, the on-chip reference clocks are generated to provide the required reference clocks to each of the PMAs. | 2015-04-02 |
20150091624 | SYSTEM AND METHOD FOR AN ACCURACY-ENHANCED DLL DURING A MEASURE INITIALIZATION MODE - A clock generator having a delay locked loop and a delay control circuit. The delay locked loop receives an input clock signal and adjusts an adjustable delay circuit to generate an output clock signal that is synchronized with received input clock signal. The delay control circuit coupled to the delay locked loop generates a control signal to initialize the delay measure operation to adjust the adjustable delay circuit, after comparing the phase difference of the input clock signal and the output clock signal. The delay control circuit further generates a start measure control signal to start measuring a delay applied to the measurement signal propagating through the adjustable delay circuit, and generates a stop measure control signal to stop the delay measurement of the measurement signal. The delay adjustment of the delay locked loop is then adjusted to apply the delay measurement when synchronizing the input and output clock signals. | 2015-04-02 |
20150091625 | HIGH SPEED, LOW POWER, ISOLATED BUFFER - Methods and apparatuses have been disclosed for a high speed, low power, isolated buffer having architecture and operation that control current flow to minimize coupling and power consumption. Buffer architecture may include one or more of BiCMOS components, an input disabling circuit operated to additionally disable an input circuit when it is also disabled by a selection circuit and a buffer disabling circuit operated to disable the buffer when the input circuit is disabled by the selection circuit. Any one or more of these features may be implemented to improve isolation performance. The selection circuit, input disabling circuit and buffer disabling circuit may be operated by the same control signal. | 2015-04-02 |
20150091626 | STATE RETENTION POWER GATED CELL - A state retention power gated cell includes a logic cell arranged in two or more rows. The logic cell has an active layer including at least a first well and a second well disposed in first and second rows, respectively. In a normal operation mode, the first well is powered with a first bias voltage, the second well is powered with a second bias voltage, the first power supply line is powered with VDDC, and the second power supply line is powered with VDD. In a standby mode, the first well preferably is powered down, the second well is powered with the second bias voltage, the first power supply line is powered with VDDC, and the second power supply line is powered down. | 2015-04-02 |
20150091627 | VARIABILITY RESISTANT CIRCUIT ELEMENT AND SIGNAL PROCESSING METHOD - A sequential circuit arrangement and method are provided in which a latch input signal and a latched version of the input signal are compared to derive a difference signal. This difference signal can detect when changes in the input are not propagated to the output. A second logic gate arrangement derives an error signal from the product of difference signal and a delayed version of the difference signal. This means that normal operation of the circuit is not detected as an error—only when the latched output fails to follow the input after the normally expected delay is the error signal created. The latch element output or an inverted version of the latch element output is selected in dependence on the error signal. | 2015-04-02 |
20150091628 | GLITCH-FREE INPUT TRANSITION DETECTOR - A circuit for detecting a signal transition on an input signal includes a mirror delay circuit and an input blocking circuit to prevent signal glitches or undesired signal pulses from being passed to the output signal node, thereby preventing signal distortions from being detected as a valid signal transition. The input transition detection circuit generates stable and correct transition detection pulses having a consistent pulse width. | 2015-04-02 |
20150091629 | Bootstrap Circuit and Semiconductor Device Having Bootstrap Circuit - A bootstrap circuit of which the capacitance of a bootstrap capacitor is small and which requires a shorter precharge period is provided. The bootstrap circuit includes transistors M | 2015-04-02 |
20150091630 | RF POWER DETECTOR AND DETECTION METHOD - The invention provides an RF detection circuit and method using an envelope detector having an output connected to a first input of a differential amplifier and a reference storage capacitor to a second input of the differential amplifier. In a preferred implementation of the calibration mode, there is initial discharging of a reference storage capacitor, high speed charging of the reference storage capacitor until the differential amplifier output toggles, then slower discharging of the reference storage capacitor until the differential amplifier output toggles again. The resulting voltage is stored on the reference storage capacitor for use in a subsequent detection mode. This provides storage of an offset voltage which calibrates both the envelope detector differential amplifier functions. | 2015-04-02 |
20150091631 | Method and Apparatus for Reference Voltage Calibration in a Single-Ended Receiver - According to at least one example embodiment, a method and corresponding system, or circuit, for calibrating a reference voltage of a single-ended receiver, include applying a clock signal and a reference voltage signal as inputs to the differential amplifier of the single-ended receiver. The differential amplifier provides an output signal, the output signal is processed, and an indication of a duty cycle associated with an output signal of the amplifier is evaluated. Based on the evaluated indication of the duty cycle, a control logic module, or circuit, adjusts a level of the reference voltage signal. The process of evaluating the indication of the duty cycle and adjusting the reference voltage level is repeated for a number of iterations. | 2015-04-02 |
20150091632 | TRAVELING WAVE MIXER, SAMPLER, AND SYNTHETIC SAMPLER - An electronic device comprises an input transmission line that receives an input signal, an output transmission line that transmits an output signal, a local oscillator transmission line that transmits a local oscillator signal, multiple amplification and mixing stages arranged in parallel between the input and output transmission lines and each amplifying a received portion of the input signal and mixing the amplified portion of the input signal with the local oscillator signal to produce a portion of the output signal, and multiple amplification stages arranged in parallel between the input and output transmission lines and each amplifying a received portion of the input signal to produce a portion of the output signal. The amplification stages are located proximate an output side of the electronic device, and the amplification and mixing stages are located proximate an input side of the electronic device. | 2015-04-02 |
20150091633 | DESIGN METHOD AND DESIGN DEVICE - A design method is executed by a computer. The design method includes grouping logical modules in each of power domains arranged on a chip; provisionally arranging regular cells in each of logical module groups formed by the grouping; and arranging power switches around each of the logical module groups. | 2015-04-02 |
20150091634 | GATE CONTROL CIRCUIT FOR MOS SWITCH - A gate drive circuit is disclosed that charges the gate of a switching transistor to a voltage that is high enough to turn the switching transistor fully on and then prevent the charge from flowing back into the gate drive circuit. The gate drive circuit works with a ground rectifier switch by providing a fully differential connection of the switching transistor and its capacitor and resistor in parallel with the antenna. | 2015-04-02 |
20150091635 | HIGH SPEED, LOW POWER, ISOLATED MULTIPLEXER - Methods and apparatuses are disclosed for a high speed, low power, isolated multiplexer having architecture and operation that control current flow to minimize coupling and power consumption. Multiplexer architecture may include one or more of BiCMOS components, an input disabling circuit operated to additionally disable an input circuit when it is also disabled by a selection circuit, a multiplexer disabling circuit operated to disable a multiplexer when input circuits are disabled by the selection circuit, a buffer having a buffer input disabling circuit operated to additionally disable a buffer input circuit when it is also disabled by a buffer selection circuit and a buffer disabling circuit operated to disable a buffer when the buffer input circuit is disabled by the buffer selection circuit. Any one or more of these features may be implemented to improve isolation performance. The architecture may be operated by a one-hot coding scheme. | 2015-04-02 |
20150091636 | ENERGY-HARVESTING DEVICE AND METHOD OF FORMING THE SAME - A method of fabricating a device includes forming a moveable plate over a substrate. The method further includes forming an energy harvesting coil in the moveable plate. The method further includes forming at least one connector connecting the movable plate with the substrate, wherein a portion of the energy harvesting coil extends along the at least one connector. The method further includes enclosing the movable plate using a capping wafer. | 2015-04-02 |
20150091637 | Amplitude Modulation for Pass Gate to Improve Charge Pump Efficiency - Techniques are presented for improving the efficiency of charge pumps. A charge pump, or a stage of a charge pump, provides its output through a pass gate. For example, this could be a charge pump of a voltage doubler type, where the output is supplied through pass gate transistors whose gates are connected to receive the output of an auxiliary section, also of a voltage doubler type of design. The waveforms provided to the gates of the pass gate transistors are modified so that their low values are offset to a higher value to take into account the threshold voltage of the pass gate transistors. In a voltage doubler based example, this can be implemented by way of introducing diodes into each leg of the auxiliary section. | 2015-04-02 |
20150091638 | Dynamically Adjusting Supply Voltage Based On Monitored Chip Temperature - In an embodiment, a method includes monitoring a temperature of a semiconductor chip and adjusting a supply voltage to the semiconductor chip based on the monitored temperature. The temperature may be monitored by a temperature sensor located on-chip or off-chip. Adjusting the supply voltage includes increasing the supply voltage as a function of the monitored temperature decreasing. The increase to the supply voltage occurs only if the monitored temperature is below a threshold temperature. The supply voltage adjustment is determined by a linear relationship having a negative slope with temperature. | 2015-04-02 |
20150091639 | SEMICONDUCTOR DEVICE - A semiconductor device includes conducting lines of a first group and a second group arranged in parallel, a plurality of first internal elements respectively coupled to the conducting lines of the first group and the second group and a plurality of first contact pads arranged between and along the conducting lines of the first group and the second groups, wherein at least a part of the plurality of first contact pads are respectively coupled to control terminals of the plurality of first internal elements, and the part of the plurality of first internal elements receive a plurality of first control signals through corresponding control terminals, respectively. | 2015-04-02 |
20150091640 | RECONFIGURABLE PASSIVE FILTER - A passive filter for connection between an AC source and a load, in either three-phases or in a single-phase arrangement. The filter includes, for each phase, a trap circuit having an inductor in series with a capacitor, the trap circuit having at least two terminals. A line reactor is connected between the AC source and the load, the line reactor having at least an input terminal, an output terminal and a tap terminal. A switch selectively connects at least one of the trap circuit terminals to a selected one of the line reactor terminals. The switch is capable of selecting which of the trap circuit terminals to connect to which of the line reactor terminals on the basis of a level of voltage distortion being experienced by the AC source, or on the basis of a calculated level of background voltage total harmonic distortion. | 2015-04-02 |
20150091641 | Integrated Circuit with a Power Transistor and a Driver Circuit Integrated in a Common Semiconductor Body - An integrated circuit includes a power transistor and a drive circuit. The drive circuit includes at least one drive transistor. The power transistor and the at least one drive transistor are integrated in a common semiconductor body. The power transistor includes at least one transistor cell with a source region, a body region, a drift region, a drain region, and a gate electrode adjacent the body region and dielectrically insulated from the body region by a gate dielectric. The at least one drive transistor includes active device regions integrated in a well-like structure comprising dielectric sidewall layers. | 2015-04-02 |
20150091642 | METHOD AND CIRCUITRY FOR MULTI-STAGE AMPLIFICATION - In an amplifier, a first stage receives a differential input voltage, which is formed by first and second input voltages, and outputs a first differential current in response thereto on first and second lines having respective first and second line voltages. A second stage receives the first and second line voltages and outputs a second differential current in response thereto on third and fourth lines having respective third and fourth line voltages. A transformer includes first and second coils. A first terminal of the first coil is coupled through a first resistor to the first line. A second terminal of the first coil is coupled through a second resistor to the second line. A first terminal of the second coil is coupled through a third resistor to the third line. A second terminal of the second coil is coupled through a fourth resistor to the fourth line. | 2015-04-02 |
20150091643 | Using Fractional Delay Computations to Improve Intermodulation Performance - Enhancing the intermodulation performance of an RF power amplifier by determining a coarse time delay represented by an integer T1; determining a reference point for a transmitted signal waveform of the RF power amplifier; shifting the waveform by a set of offsets comprising a plurality of non-integer fractional steps from (T1−Xd) to (T1+Xd) where T1 is the integer and Xd is a non-integer fractional step size value for defining fractional steps about the integer T1 such that the non-integer fractional steps progress in a positive direction as well as a negative direction; correlating the transmitted signal waveform with a feedback signal waveform to obtain a respective correlation value for each of corresponding fractional steps; obtaining an accurate fractional delay value by selecting a fractional step having a highest respective correlation value; applying the obtained correct fractional delay value to the transmitted signal waveform to provide a compensated transmitted signal waveform, and combining the compensated transmitted signal waveform with the feedback signal waveform to reduce at least one intermodulation product of the RF power amplifier. | 2015-04-02 |
20150091644 | CLASS HD POWER AMPLIFIER - A multi-level amplifier including a converter circuit being supplied with a supply voltage and operable to generate at least two output voltages, a voltage comparator circuit adapted to compare each of the output voltages with the supply voltage to generate a driving signal, and an amplifier circuit being supplied with an analog input signal, the amplifier circuit including an analog-to-digital converter coupled to a power stage driver and power stage, wherein the power stage driver receives the driving signal from the voltage comparator. | 2015-04-02 |
20150091645 | ENVELOPE TRACKING POWER TRANSMITTER USING COMMON-GATE VOLTAGE MODULATION LINEARIZER - An envelope tracking power transmitter includes an envelope amplifier, a common-gate power modulation linearizer and a power amplifier. The envelope amplifier may receive a first envelope voltage to generate a power supply voltage that is amplified in proportion to change of the first envelope voltage. The common-gate power modulation linearizer may receive a second envelope voltage to amplify the second envelope voltage according to change of the second envelop voltage. The power amplifier may receive a first output of the envelope amplifier as a power supply voltage and a drain bias voltage, may receive a second output of the common-gate power modulation linearizer as a common gate bias voltage, and may amplify a radio frequency (RF) input signal to provide a RF output signal by maintaining an output capacitance according to an envelope of the RF input signal. | 2015-04-02 |
20150091646 | CURRENT MODE CLASS AB LOW-NOISE AMPLIFIER AND METHOD OF ACTIVE CABLE TERMINATION - This invention relates to medical ultrasonic imaging systems and, in particular, phased array imaging systems operating in different scan formats and imaging modalities. More specifically, the invention relates to the front-end processing of ultrasonic echoes. | 2015-04-02 |
20150091647 | REDUCING A SETTLING TIME AFTER A SLEW CONDITION IN AN AMPLIFIER - In an amplifier, a first stage receives a differential input voltage, which is formed by first and second input voltages, and outputs a first differential current in response thereto on first and second lines having respective first and second line voltages. A second stage receives the first and second line voltages and outputs a second differential current in response thereto on third and fourth lines having respective third and fourth line voltages. A third stage receives the third and fourth line voltages and outputs an output voltage in response thereto. A slew boost circuit detects a slew condition, in which a threshold difference arises between the first and second input voltages, and outputs a slew current in response thereto for maintaining a slew rate of the output voltage during the slew condition. The first stage includes circuits for reducing a variable difference between the first and second line voltages. | 2015-04-02 |
20150091648 | AMPLIFIER CIRCUIT AND OPERATION METHOD THEREOF - An amplifier circuit and an operation method thereof are provided. The amplifier circuit includes two stages of amplifiers. When the amplifier circuit is operated in a high gain mode, the two stages of amplifiers are operated normally to provide high gain. When the amplifier circuit is operated in a low gain mode, the second stage of amplifier is turned off, and the first stage of amplifier is coupled to output terminals of the amplifier circuit through signal isolation elements so as to form a single stage of amplifier. Therefore, the amplifier circuit can change the total gain value thereof according to a requirement of gain. | 2015-04-02 |
20150091649 | PULSED DYNAMIC LOAD MODULATION POWER AMPLIFIER CIRCUIT - A power amplifier circuit for amplifying an envelope modulated Radio Frequency (RF) signal with improved linearity and efficiency includes a power amplifier, and a variable load matching circuit coupled to an output port of the power amplifier. The input impedance of the variable load matching circuit is changed such that an output power of the power amplifier is at a first output power level, or a second output power level which is higher than the first output power level. | 2015-04-02 |
20150091650 | Amplifier with Variable Feedback Impedance - A variable feedback impedance is presented capable of providing high linearity (e.g. as represented by 1P2 and 1P3) and high linear range (e.g. as represented by P1dB) when used in a feedback path of an RF amplifier in the presence of high voltage amplitudes. | 2015-04-02 |
20150091651 | WIDEBAND DOHERTY AMPLIFIER - Embodiments of a low-complexity and potentially physically small wideband impedance transformer that can be used in a combining network of a wideband Doherty amplifier are disclosed. In one embodiment, a wideband Doherty amplifier includes Doherty amplifier circuitry and a wideband combining network. The wideband combining network includes a wideband quarter-wave impedance transformer that includes a quarter-wave impedance transformer and compensation circuitry connected in parallel with the quarter-wave impedance transformer at a low-impedance end of the quarter-wave impedance transformer. The compensation circuitry is configured to reduce a total quality factor of the wideband quarter-wave impedance transformer as compared to a quality factor of the quarter-wave impedance transformer, which in turn increases a bandwidth of the wideband quarter-wave impedance transformer, and thus a bandwidth of the wideband Doherty amplifier. | 2015-04-02 |
20150091652 | SEMICONDUCTOR DEVICE - A semiconductor device includes a power amplifier for amplifying RF signals in multiple frequency bands, an output matching circuit connected to an output of the power amplifier, a first capacitor connected at a first end to an output of the output matching circuit, multiple output paths, a switch connected to a second end of the first capacitor and directing each of the RF signals to a respective one of the output paths in accordance with frequency band of the each of the RF signals, and multiple second capacitors. Each second capacitor is connected in series to a respective one of the output paths. The switch and either the first capacitor or the second capacitors, or both the first and second capacitors, are integrated as a single monolithic microwave integrated circuit. | 2015-04-02 |
20150091653 | RECONFIGURABLE LOAD MODULATION AMPLIFIER - A reconfigurable load modulation amplifier having a carrier amplifier and a peak amplifier that are coupled in parallel is disclosed. The peak amplifier provides additional power amplification when the carrier amplifier is driven into saturation. A quadrature coupler coupled between the carrier amplifier and the peak amplifier is configured to combine power from both the carrier amplifier and the peak amplifier for output through an output load terminal. The reconfigurable load modulation amplifier further includes control circuitry coupled to an isolation port of the quadrature coupler and configured to provide adjustable impedance at the isolation port of the quadrature coupler. As such, impedance at the isolation port of the quadrature coupler is tunable such that at least a carrier or peak amplifier is presented with a quadrature coupler load impedance that ranges from around about half an output load termination impedance to around about twice the output load termination impedance. | 2015-04-02 |
20150091654 | HIGH VOLTAGE WIDE BANDWIDTH AMPLIFIER - A high voltage amplifier and a method of assembling and of operating a high voltage amplifier are described. The device includes a first metal-oxide-semiconductor field-effect transistor (MOSFET) driven by a first gate drive circuit. The device also includes a second MOSFET driven by a second gate drive circuit and a first optocoupler coupled to the second gate drive circuit. The first MOSFET and the second MOSFET of the high voltage amplifier drive a first output voltage. | 2015-04-02 |
20150091655 | Optimal Envelope Tracking Reference Waveform Generation - A method and apparatus is provided to improve upon the efficiency of a power amplifier. Suitable hardware/software in the form of circuitry, logic gates, and/or code functions to construct an envelope tracking waveform of an input communications signal and modulate the input supply voltage based on power amplifier circuitry operational parameters such as slew rates. | 2015-04-02 |
20150091656 | Methods and Devices for Impedance Matching in Power Amplifier Circuits - Methods of turning on and/or turning off amplifier segments in a scalable periphery amplifier architecture are described in the present disclosure. The turning on and/or turning off the amplifier segments according to the various embodiments of the present can reduce spectral splatter in adjacent channels. In some embodiments, amplifier performance and efficiency can be improved by dissipating heat more uniformly. | 2015-04-02 |
20150091657 | Methods and Devices for Thermal Control in Power Amplifier Circuits - Methods of turning on and/or turning off amplifier segments in a scalable periphery amplifier architecture are described in the present disclosure. The turning on and/or turning off the amplifier segments according to the various embodiments of the present can reduce spectral splatter in adjacent channels. In some embodiments, amplifier performance and efficiency can be improved by dissipating heat more uniformly. | 2015-04-02 |
20150091658 | INJECTION LOCKED OSCILLATOR - An injection locked frequency divider includes a ring oscillator, an input terminal, an output terminal and a control voltage terminal. The ring oscillator has a three-stage cascade connection of a first amplification circuit including an N-channel MOS type transistor and P-channel MOS type transistors, a second amplification circuit configured in the same manner as the first amplification circuit and a third amplification circuit configured likewise. A high frequency signal is input to a gate terminal of each P-channel MOS type transistor. A predetermined DC control voltage is supplied to a gate terminal of each P-channel MOS type transistor. | 2015-04-02 |
20150091659 | ATOMIC OSCILLATOR, ELECTRONIC APPARATUS, MOVING OBJECT, AND MANUFACTURING METHOD OF ATOMIC OSCILLATOR - An atomic oscillator includes a gas cell, a semiconductor laser, and a frequency modulation signal generator generating a frequency modulation signal causing the semiconductor laser to generate frequency-modulated light including a first-order sideband light pair causing an electromagnetically induced transparency phenomenon in metal atoms. When a modulation level of frequency modulation changes from low to high, a modulation level at a time when the first-order sideband light is maximized for the first time is represented as m | 2015-04-02 |
20150091660 | ATOMIC OSCILLATOR, ELECTRONIC APPARATUS, AND MOVING OBJECT - An atomic oscillator includes a gas cell, a semiconductor laser, a light detector, a bias current control section controlling a bias current based on intensity of light detected by the light detector, a memory, and an MPU. The MPU sweeps the bias current and stores a value of the bias current and a value of the intensity of the light when the intensity of the detected light shifts from a decrease to an increase and re-sweeps to set the bias current based on the value of the bias current stored in the memory after the sweep, compares the value of the intensity of the detected light with the value of the intensity of the light stored in the memory while the bias current control section controls the bias current, and determines whether to perform the sweep again in accordance with the comparison. | 2015-04-02 |
20150091661 | ATOMIC OSCILLATOR, FREQUENCY ADJUSTING METHOD OF ATOMIC OSCILLATOR, ELECTRONIC APPARATUS, AND MOVING OBJECT - An atomic oscillator includes a gas cell into which a metal atom and a buffer gas are sealed, a light source that emits light for exciting the metal atom in the gas cell, and a light detection unit (light reception unit) that detects the light which has been transmitted through the gas cell, in which the buffer gas includes neon (Ne) and argon (Ar), and a pressure ratio of Ar to the total of Ne and Ar is greater than 0 and less than 0.5. | 2015-04-02 |
20150091662 | QUANTUM INTERFERENCE DEVICE, ATOMIC OSCILLATOR, ELECTRONIC APPARATUS, AND MOVING OBJECT - An atomic oscillator includes a gas cell having an internal space in which alkali metal atoms are entrapped, and a light output part that outputs excitation light containing a pair of resonance lights in resonance with the alkali metal atoms toward the internal space. Further, a width of the internal space along a direction perpendicular to an axis of the excitation light is W1, a width of the excitation light along the same direction in the internal space is W2, and a relation of 40%≦W2/W1≦95% is satisfied. | 2015-04-02 |
20150091663 | System and Method for a Voltage Controlled Oscillator - In accordance with an embodiment, a voltage controlled oscillator (VCO) includes a VCO core having a plurality of transistors, a bias resistor coupled between collector terminals of the VCO core and a first supply node, and a varactor circuit coupled to emitter terminals of the VCO core. The bias resistor is configured to limit a self-bias condition of the VCO core. | 2015-04-02 |
20150091664 | CIRCUIT DEVICE, OSCILLATOR, ELECTRONIC APPARATUS, AND MOVING OBJECT - A circuit device includes an oscillation circuit that includes a variable capacitance circuit and performs an operation of oscillating an oscillation element; and a control unit. The variable capacitance circuit includes a plurality of variable capacitance elements. When an operation mode is a first operation mode, the control unit supplies applied voltages in which at least one thereof is a variable voltage to the plurality of variable capacitance elements, and when the operation mode is a second operation mode, the control unit supplies applied voltages which are all fixed voltages to the plurality of variable capacitance elements. | 2015-04-02 |
20150091665 | RESONATOR ELEMENT, RESONATOR, ELECTRONIC DEVICE, ELECTRONIC APPARATUS, AND MOVING OBJECT - A resonator element includes a substrate that vibrates in a thickness shear vibration, a first excitation electrode that is provided on one main surface of the substrate and has a shape in which at least three corners of a virtual quadrangle are cut out, and a second excitation electrode that is provided on the other main surface of the substrate, and a ratio (S2/S1) of an area S1 of the virtual quadrangle and an area S2 of the first excitation electrode satisfies a relationship of 69.2%≦(S2/S1)≦80.1%. | 2015-04-02 |
20150091666 | TRANSMISSION MODULE - As a capacitor Cj is connected in parallel to a non-reciprocal circuit | 2015-04-02 |
20150091667 | WIDEBAND IMPEDANCE TRANSFORMER - Embodiments of a low-complexity and potentially physically small wideband impedance transformer that can be used in a combining network of a wideband Doherty amplifier are disclosed. In one embodiment, a wideband Doherty amplifier includes Doherty amplifier circuitry and a wideband combining network. The wideband combining network includes a wideband quarter-wave impedance transformer that includes a quarter-wave impedance transformer and compensation circuitry connected in parallel with the quarter-wave impedance transformer at a low-impedance end of the quarter-wave impedance transformer. The compensation circuitry is configured to reduce a total quality factor of the wideband quarter-wave impedance transformer as compared to a quality factor of the quarter-wave impedance transformer, which in turn increases a bandwidth of the wideband quarter-wave impedance transformer, and thus a bandwidth of the wideband Doherty amplifier. | 2015-04-02 |
20150091668 | System and Method for a Radio Frequency Coupler - In accordance with an embodiment, a directional coupler includes a coupler circuit and at least one amplifier coupled between a coupler circuit isolated port and a directional coupler isolated port and/or between a coupler circuit coupled port and a directional coupler coupled port. In various embodiments, the directional coupler is disposed over and/or in a substrate. | 2015-04-02 |
20150091669 | LOW PASS FILTER HAVING ATTENUATION POLE AND WAVE SPLITTER - A low pass filter having an attenuation pole includes at least inductors disposed on a series arm which connects an input terminal and an output terminal. The inductors are wound inductors mounted on a first surface of a multilayer body. A winding axis of one of the wound inductors is perpendicular or substantially perpendicular to a winding axis of the other one of the wound inductors. | 2015-04-02 |
20150091670 | STRUCTURES FOR REGISTRATION ERROR COMPENSATION - Metallization layer structures for reduced changes in radio frequency characteristics due to registration error and associated methods are provided herein. An example resonator includes a first conductive layer defining an error limiting feature and a second conductive layer. The resonator further includes at least one communication feature configured to electrically couple the first conductive layer and the second conductive layer at a communication position. The error limiting feature is configured to reduce changes in radio frequency characteristics of the resonator due to registration error. Methods of manufacturing resonators are also provided herein. | 2015-04-02 |
20150091671 | INNER-TUBE WITH OPPOSING SHALLOW-CAVITIES FOR USE IN A COAXIAL POLARIZER - A coaxial polarizer is provided. The coaxial polarizer includes an outer-conductive tube, an inner-conductive tube positioned within and axially aligned with the outer-conductive tube, and two dielectric bars each having a flat-first surface. The inner-conductive tube has two shallow-cavities on opposing portions of an outer surface of the inner-conductive tube. The shallow-cavities each have at least one planar area having a cavity length parallel to a Z axis and a cavity width, including a minimum width, perpendicular to the Z axis and to a radial direction of the inner-conductive tube. The flat-first surface has a dielectric length and width that are parallel and perpendicular to the Z axis, respectively. The dielectric length and dielectric width are less than the cavity length and the minimum width, respectively. The two flat-first surfaces of the respective two dielectric bars contact at least a portion of the respective two planar areas of the two shallow-cavities. | 2015-04-02 |
20150091672 | MULTI RESONATOR NON-ADJACENT COUPLING - A coupling is provided for coupling non-adjacent resonators of a radio frequency filter. The coupling joins together non-adjacent resonators with a metal strip. The metal strip is physically connected to but electrically isolated from resonators located between the connected non-adjacent resonators. The metal strips include tabs the length of which may be varied. The coupling works with different resonator configurations including horizontally aligned resonators. The coupling allows for the jumping of an even number of resonators can produce zeros at high and low bands. A single coupling of this configuration enables two negative couplings. | 2015-04-02 |
20150091673 | LEAKY FEEDER ARRANGEMENT - A leaky co-axial cable arrangement, including a co-axial cable, a plurality of radiation slots arranged on the co-axial cable and an activation arrangement configured for affecting predetermined regions on the cable to selectively activate or deactivate at least one of the plurality of radiation slots to provide the leaky co-axial cable arrangement. | 2015-04-02 |
20150091674 | HIGH-FREQUENCY TRANSMISSION LINE AND ELECTRONIC DEVICE - A transmission line portion of a flat cable includes first regions and second regions connected alternately. In the first region, the transmission line portion is a flexible tri-plate transmission line including a dielectric element including a signal conductor, a first ground conductor including opening portions, and a second ground conductor which is a solidly filled conductor. In the second region, the transmission line portion is a hard tri-plate transmission line including a wide dielectric element including a meandering conductor, and a first ground conductor and a second ground conductor which are solidly filled conductors. A variation width of the characteristic impedance in the second region is larger than a variation width of the characteristic impedance in the first region. | 2015-04-02 |
20150091675 | HIGH-FREQUENCY SIGNAL LINE - A high-frequency signal line includes a dielectric body including a first dielectric layer and one or more other dielectric layers laminated together. A first signal line is provided on a first main surface, which is a main surface located on one side in a direction of lamination, of the first dielectric layer. A second signal line is provided on a second main surface, which is a main surface located on another side in the lamination direction, of the first dielectric layer so as to face the first signal line via the first dielectric layer. The second signal line is electrically connected to the first signal line. A first ground conductor is located on one side in the lamination direction than the first signal line. A second ground conductor is located on another side in the lamination direction than the second signal line. | 2015-04-02 |
20150091676 | FIXING STRUCTURE OF CABLE TO WIRING SUBSTRATE, AND CABLE, AND MANUFACTURING METHOD OF CABLE - A transmission line includes an insulator as a base member, a transmission conductor, and a ground layer. A connector is provided at a wiring substrate to fix the transmission line. The transmission line includes a signal columnar conductor having a solid columnar shape integrated with the transmission conductor, and ground columnar conductors having solid columnar shapes integrated with the ground layer. The connector has a through hole corresponding to the signal columnar conductor, and through holes corresponding to the ground columnar conductors. Conductive films are respectively provided on the inner peripheral surfaces of the through holes. The signal columnar conductor is inserted into the through hole, and the ground columnar conductors are respectively inserted into the through holes. | 2015-04-02 |
20150091677 | Gas Circuit Breaker - An object is to provide a gas circuit breaker having improved reliability. To solve the above-described problem, a gas circuit breaker is characterized by having a fixed contact, a movable contact configured to come into contact with or separate from the fixed contact, an insulating enclosure internally having the fixed contact and the movable contact, the inside of the insulating enclosure being filled with an insulating gas, and an operating mechanism configured to allow drive force for movement of the movable contact to be generated, wherein the operating mechanism includes a mover including permanent magnets or magnetic bodies disposed in a direction along which the operating mechanism allows the drive force to be generated, and a magnetic pole disposed to be opposed to the mover, and having a winding. | 2015-04-02 |
20150091678 | CONTACT STRUCTURE OF LOW-VOLTAGE ELECTRICAL APPARATUS - The present invention discloses a contact structure of a low-voltage electrical apparatus. The contact structure is in a dual-breakpoint form, and comprises: two U-shaped static contacts, the U-shaped static contact enabling the current direction in the static contact to be opposite to the current direction in a movable contact; a contact bridge; two movable contacts, disposed on the contact bridge, and respectively corresponding to the two static contacts; a contact support member, disposed on the movable contacts and connected to the movable contacts; two main contact springs, symmetrically disposed under the movable contacts and forming an angle with the contact bridge; and a spring support member, disposed under the two movable contacts and connected to the two main contact springs. At a contact position of the static contact and the movable contact and at a repulsed open position of the static contact and the movable contact, the angle between the main contact spring and the contact bridge is between −β and +α. | 2015-04-02 |
20150091679 | CONTACTLESS SWITCH - A switch includes a button which is connected to a ring-shaped permanent magnet that is magnetized along a z-axis, a guide member made from an non-ferromagnetic material inside which the button and the ring-shaped permanent magnet are arranged so as to be moveable along the z-axis, as well as at least one sensor that has a sensitive area that is arranged inside the ring-shaped permanent magnet and that is configured to measure a change in a magnetic field in the radial direction within a x-y-plane, wherein the x-axis and the y-axis lie orthogonally to the z-axis, respectively. | 2015-04-02 |
20150091680 | MULTI-POLE MAGNETIZATION OF A MAGNET - A method of magnetizing a multi-pole magnet includes the steps of obtaining a magnetization coil having a magnetization zone and a central axis, and positioning a magnet within the magnetization zone. The method also includes positioning at least one pair of shield bodies including a conductive material proximate the first and second surfaces of the magnet, with the shield bodies being aligned together to cover both sides of at least a first region of magnet and expose both sides of at least a second region of the magnet. The method further includes energizing the magnetization coil to generate an applied magnetic field within the magnetization zone that is sufficient to induce eddy currents in the at least one pair of shield bodies and to magnetize the exposed second region of the magnet. | 2015-04-02 |
20150091681 | PERMANENT MAGNETIC COUPLING DEVICE - A permanent magnetic coupling device includes an conductor rotor, an permanent magnet rotor and permanent magnets. The permanent magnet rotor includes a magnetic ring. The magnetic ring includes protrusions and recesses arranged alternately, in which first airflow channels are formed between the protrusions and the conductor rotor respectively, and second airflow channels are formed between the recesses and the conductor rotor respectively. A cross-sectional area of each of the second airflow channels is greater than a cross-sectional area of each of the first airflow channels. The permanent magnet rotor further includes cavities disposed at the recesses, and the permanent magnets are engaged into the cavities respectively. | 2015-04-02 |
20150091682 | REINFORCEMENT-FREE TANK FOR AN ELECTROMAGNETIC APPARATUS - A reinforcement-free tank for an electromagnetic apparatus, as may be immersed in a fluid is provided. The tank may include a pair of mutually-opposite side walls. Each side wall may have at least one curved segment defining a vertically-curving profile between a top edge and a bottom edge of a side wall. A pair of mutually-opposite end walls. Each end wall may have a substantially vertically-extending semi-cylindrical shape defining a vertically-straight profile between a top edge and a bottom edge of an end wall. A plurality of vertically-extending joining members. Each joining member may be configured to provide a transition between the vertically-curving profile of a side wall and the vertically-straight profile of a corresponding end wall. The walls can withstand vacuum and overpressure conditions which can develop in the tank, without a reinforcing member connected to the walls. | 2015-04-02 |
20150091683 | SLOW WAVE INDUCTIVE STRUCTURE AND METHOD OF FORMING THE SAME - A slow wave inductive structure includes a first substrate, a first conductive winding over the first substrate, and a second substrate over the first substrate. The second substrate has a thickness ranging from about 50 nanometers (nm) to about 150 nm. A distance between the first conductive winding and the second substrate ranges from about 1 micron (μm) to about 2 μm. A slow wave inductor includes a first substrate and a first conductive winding over the first substrate. The slow wave inductor further includes a second substrate over the first substrate and a plurality of switches in the second conductive substrate. The first conductive winding is connected to each switch of the plurality of switches. | 2015-04-02 |
20150091684 | ON-LOAD TAP CHANGER - The present invention relates to an on-load tap changer for uninterrupted switching between different winding taps of a tapped transformer according to the first claim. The general inventive concept is that of arranging the on-load tap changer on the underside of the transformer cover by means of a gear module. | 2015-04-02 |
20150091685 | ELECTRONIC COMPONENT AND METHOD FOR MANUFACTURING THE SAME - An electronic component includes a first magnetic substrate provided with a first notch portion and a second notch portion, a multilayer body, a coil which includes a coil portion, a first lead portion, and a second lead portion. The first lead portion and the second lead portion are connected to the two end portions of the coil portion and overlap the first notch portion and the second notch portion, respectively. The electronic component further includes a first outer electrode and a second outer electrode, a first connection portion and a second connection portion which connect the outer electrodes to the lead portions. Particles are disposed at joint portions of the lead portions and the connection portions and have a coefficient of linear expansion smaller than the coefficients of linear expansion of the first lead portion, the second lead portion, the first connection portion, and the second connection portion. | 2015-04-02 |
20150091686 | INDUCTOR STRUCTURE HAVING EMBEDDED AIRGAP - Various embodiments include inductor structures including at least one air gap for reducing capacitance between windings in the inductor structure. One embodiment includes an inductor structure having: a substrate; an insulation layer overlying the substrate; a conductive winding overlying the substrate within the insulation layer, the conductive winding wrapped around itself to form a plurality of turns substantially concentric about a central axis; an insulating structural support containing an air gap between the conductive winding and the insulation layer, the insulating structural support at least one of under, over or surrounding the plurality of turns of the conductive winding or between adjacent turns in the conductive winding; and at least one insulation pocket located radially inside a radially innermost turn in the plurality of turns with respect to the central axis. | 2015-04-02 |
20150091687 | WINDING AND METHOD FOR PREPARING A WINDING APPLIED TO AN INDUCTIVE DEVICE - The present invention relates to a winding and a method for preparing a winding of inductive devices. The winding includes at least a plurality of layers, where each layer includes at least one conductive loop; the conductive loops are electrically connected to form a winding; and the conductive loop or the portion of the conductive loop of at least one layer is not spatially aligned with the conductive loop or the portion of the conductive loop of at least one another layer. Preferably, except for the conductive loop that includes a center tap, other conductive loops are each divided into 2N loop sections, each loop section is electrically connected to a corresponding loop section of another layer through a pair of crossover conductive via plugs, so as to form N windings, where N is an integer greater than or equal to 1. The winding may be prepared by adopting a PCB process or semiconductor process, which can effectively consume less of surface area on the integration substrate, have a symmetric trace and reduce the parasitic coupling capacitance while acquiring a high Q-factor value. The windings of the present invention may be used for making an inductor or a transformer. | 2015-04-02 |
20150091688 | COIL SHEET AND METHOD OF MANUFACTURING THE SAME - There is provided a coil sheet including: a base sheet, and a coil unit disposed on the base sheet and including a central conductive part and a surface conductive part formed on surfaces of the central conductive part, wherein when a thickness of the surface conductive part formed on lateral surfaces of the central conductive part is ‘a’ and a thickness of the surface conductive part formed on an upper surface of the central conductive part is ‘b’, a | 2015-04-02 |
20150091689 | THERMAL CUT-OFF DEVICE - A thermal cut-off device can include a case, a first electrically conductive lead disposed at a first end of the case, a thermally responsive pellet housed within the case, a second electrically conductive lead disposed at a second end of the case and having a distal end including a contact surface, an electrically conductive contact disposed between the pellet and the second lead, a first biasing member disposed between the pellet and the contact, and a second biasing member disposed between the contact and the second end of the case. | 2015-04-02 |
20150091690 | LAMINATED PTC THERMISTOR ELEMENT - A laminated PTC thermistor element that includes a ceramic substrate including a plurality of ceramic layers, a plurality of internal electrodes within the ceramic substrate, and external electrodes on the surface of the ceramic substrate that provide electrical conduction to the internal electrodes. The ceramic substrate is 0.3 [μm] or more and 1.2 [μm] or less in average porcelain grain size. Furthermore, the relative density of the ceramic substrate has a lower limit of 70 [%], and an upper limit of −6.43 | 2015-04-02 |
20150091691 | Capacitive Proximity Sensor Configuration Including a Speaker Grille - Embodiments of a capacitive sensor configuration for proximity detection by a playback device are provided. The playback device may include a capacitive proximity sensor configured to detect physical movement in a first direction, and a speaker grille on a surface of the playback device oriented at a relative angle to the capacitive proximity sensor. The capacitive proximity sensor includes a first metal electrode coupled to the speaker grille such that the capacitive proximity sensor may be further configured to detect physical movement in a second direction that is substantially at the relative angle to the first direction. The playback device may be configured to determine based on a detection of physical movement by the capacitive proximity sensor, a physical approach of an entity towards the playback device from one or more of the first direction and the second direction. | 2015-04-02 |
20150091692 | Zone Configurations Maintained by Playback Device - Systems and methods to control a plurality of multimedia players in one or more groups are disclosed. For example, in a network including a plurality of independent playback devices, an example method includes maintaining, by an independent playback device, a zone configuration, the zone configuration characterizing one or more zone scenes. Each zone scene identifies a group configuration associated with two or more of the plurality of independent playback devices. The example method includes transmitting, by the independent playback device via a network interface, the zone configuration to a controller device. Additionally, an example playback device is disclosed which is configured to maintain a zone configuration, the zone configuration characterizing one or more zone scenes, each zone scene identifying a group configuration associated with two or more of a plurality of independent playback devices; and transmit, via a network interface, the zone configuration to a controller device. | 2015-04-02 |
20150091693 | REUSABLE ELECTRONIC SEAL - A container including a reusable electronic seal, as well as a system and method for using the electronic seal are described. The container includes a closure member configured to detachably affix to a portion of the container, thereby sealing the container. In response to the closure member sealing the container, a signal generating component generates an electronic signal and transmits the electronic signal to a processing circuit operably connected to the signal generating component. The processing circuit includes a processing device configured to generate a unique code when the closure member is manipulated to open or close the container and an output device operably connected to the processing device and configured to output the unique code. The unique code is updated each time the container is opened, thereby providing a recipient with a way to determine whether the container has been opened during delivery. | 2015-04-02 |
20150091694 | Mobile Device Controllable With User Hand Gestures - A mobile device includes a body, at least one drive wheel coupled with the body, a control structure configured to automatically control rotational movements of the at least one drive wheel so as to selectively control movement of the body, and a motion detection system coupled with the control structure and configured to detect a plurality of different movements of a user. the control structure controls rotational movements of the at least one drive wheel to effect different movements of the body based upon different detected movements of the user. | 2015-04-02 |
20150091695 | ELECTRONIC ACCESS SYSTEM - Methods and systems are described herein for remotely or wirelessly controlling access to dwellings, buildings and/or properties. In one aspect, an electronic access system comprises: a plurality of independent access control devices ( | 2015-04-02 |
20150091696 | ELECTRONIC KEY LOCKOUT CONTROL IN LOCKBOX SYSTEM - An electronic lockbox system includes a wireless portable transponder that communicates with an electronic lockbox using a low power radio link. The portable transponder includes: a wide area network radio to communicate to a central clearinghouse computer, a motion sensor to activate its wide area network radio, and a connector to communicate with a secure memory device. The electronic lockbox sends a hail message that is intercepted by the portable transponder; the hail message includes identification information. The portable transponder responds with a message that includes a time sensitive encryption key; the lockbox authenticates this response message using its own time sensitive encryption key. If an electronic key is used to access the lockbox, the improved system effectively disables the electronic key during a showing, so that the electronic key cannot be used to access another lockbox until the correct dwelling key has been placed back into the lockbox. | 2015-04-02 |
20150091697 | Radio Control Transmitter - A trigger includes a segment for exercising throttle control and a segment for exercising brake control. A switch is provided in a radio control transmitter. The switch can be depressed by pulling the trigger in a direction of an arrow A. Setting of full throttle can be assigned to the switch. Full throttle can be turned on only when the switch is depressed by the trigger. It is possible to control on/off of the full throttle easily. | 2015-04-02 |
20150091698 | ELECTRIC VEHICLES AND METHOD FOR MANAGING ELECTRIC VEHICLES - An electric vehicle and method for controlling an electric vehicle are disclosed. The electric vehicle includes a battery management system, a wireless communicating module, and a control module. The battery management system is configured for monitoring and managing a battery in the electric vehicle. The wireless communicating module coupled to the battery management system, is configured for establishing a wireless link with a portable device and for receiving an instruction associated with an access credential from the portable device through the wireless link. The control module coupled with the wireless communicating module, is configured for determining whether the access credential provides a right to control the electric vehicle based on the instruction received by the wireless communicating module and for controlling the electric vehicle according to the instruction from the portable device if the access credential provides the right to control the electric vehicle. | 2015-04-02 |
20150091699 | METHOD FOR DETECTING THAT CONTACTLESS CPU CARD LEAVES RADIO-FREQUENCY FIELD - A method for detecting that a contactless CPU card leaves a radio-frequency field relates to the field of smart cards. The method comprises: receiving and judging whether a valid instruction sent by an upper computer is received, and conducting a corresponding operation according to the received instruction; as a notification card search instruction, conducting a card search operation, and judging whether returned information is received; obtaining card number information about a contactless card according to the returned information; as an APDU instruction, sending A data to the card in accordance with a designated format, judging whether a response is received, and sending the operation result to the upper computer; as an extension instruction, executing a corresponding operation, and sending the operation result to the upper computer; when a valid instruction is not received, judging the mark of the card in the radio-frequency field, and if the card is in the radio-frequency field, conducting a card detection operation, and sending the operation result to the upper computer; and if the card is not in the radio-frequency field, conducting a card search operation. The present invention can detect the problem that a CPU card leaves a radio-frequency field in real time. | 2015-04-02 |
20150091700 | Backscatter interrogators, communication systems and backscatter communication methods - The present invention provides backscatter interrogators, communication systems and backscatter communication methods. According to one aspect of the present invention, a backscatter interrogator includes a data path configured to communicate a data signal; a signal generator configured to generate a carrier signal; and a modulator coupled with the data path and the signal generator, the modulator being configured to spread the data signal to define a spread data signal and amplitude modulate the carrier signal using the spread data signal, the modulator being further configured to phase modulate the carrier signal. | 2015-04-02 |
20150091701 | RADIO FREQUENCY IDENTIFICATION TAG IDENTIFICATION SYSTEM - A conveyor system for processing items on which radio frequency identification tags are disposed has a conveyor that conveys items through a path of travel, and an antenna disposed proximate the path of travel. Circuitry in communication with the antenna may associate RFID tag data with a package on the conveyor based on a difference signal from elements in the antenna. | 2015-04-02 |
20150091702 | POWER EFFICIENT AND FLEXIBLE UPDATE RATE POSITIONING SYSTEM - Methods, systems, and devices for automatically changing the manner in which a tag unit communicates with one or more access points based on the tag unit's mobility state are described. A tag unit may transmit ultra-wideband (UWB) signals in a low update mode while in a stationary state. The tag unit may transmit UWB signals in a high update mode while in a mobile state. The tag unit, an access point, and/or a tracking management server may determine a tag unit's mobility state and adjust an update mode based on the mobility state. | 2015-04-02 |
20150091703 | SYSTEMS AND METHODS OF USING A READABLE SAFETY TAG - A safety tag network communication method is provided that comprises receiving, from an electronic device, a first communication having identifier information identifying a tag user, the identifier information being disposed on a tag accompanying the tag user. The method also includes identifying, via a computer, one or more portions of safety information in a database associated with the identifier information disposed on the tag. The one or more portions of safety information are associated with the tag user. The method also includes retrieving, via a computer, the one or more portions of safety information associated with the tag user from the database. The method further includes transmitting, to the electronic device, a second communication having the one or more portions of safety information associated with the tag user and providing the one or more portions of retrieved safety information associated with the tag user at the electronic device. | 2015-04-02 |
20150091704 | Method and System for Initiating a Function in an Electronic Device - A method, performed by a tag device that is coupled to an electronic device, for initiating a function in the electronic device includes receiving a signal from an interrogator device. The method also includes determining from the signal to initiate a function in the electronic device, and signaling the electronic device to initiate the function. | 2015-04-02 |
20150091705 | SYSTEMS, METHODS, APPARATUSES, AND COMPUTER PROGRAM PRODUCT FOR INVENTORY TRACKING AND CONTROL - A system, method, apparatus, and computer program product are provided for tracking and controlling inventory with a container. A container that defines a cavity may include an access detection system configured to detect when the cavity of the container is accessed, a radio frequency identification reader configured to be activated in response to the access detection system detecting that the cavity has been accessed, and a communications interface configured to transmit a signal identifying the contents of the cavity in response to the radio frequency identification reader identifying a change in contents of the cavity. The container may also include a lid movable between an open position in which the cavity is accessible, and a closed position in which the cavity is inaccessible, where the access detection system is configured to detect when the lid is moved to the open position. | 2015-04-02 |