17th week of 2017 patent applcation highlights part 52 |
Patent application number | Title | Published |
20170117147 | FACET-SELECTIVE GROWTH OF NANOSCALE WIRES | 2017-04-27 |
20170117148 | SEMICONDUCTOR DEVICE, DISPLAY SUBSTRATE, DISPLAY DEVICE, AND METHOD FOR MANUFACTURING POLYSILICON FILM | 2017-04-27 |
20170117149 | METHOD OF FORMING NON-CONTINUOUS LINE PATTERN AND NON-CONTINUOUS LINE PATTERN STRUCTURE | 2017-04-27 |
20170117150 | SEMICONDUCTOR DEVICE | 2017-04-27 |
20170117151 | INTEGRATED CIRCUIT AND PROCESS THEREOF | 2017-04-27 |
20170117152 | THERMAL PROCESSING METHOD THROUGH LIGHT IRRADIATION | 2017-04-27 |
20170117153 | SYSTEMS AND METHODS FOR LOW RESISTIVITY PHYSICAL VAPOR DEPOSITION OF A TUNGSTEN FILM | 2017-04-27 |
20170117154 | SEMICONDUCTOR STRUCTURES AND FABRICATION METHOD THEREOF | 2017-04-27 |
20170117155 | METHOD OF FORMING LOW RESISTIVITY FLUORINE FREE TUNGSTEN FILM WITHOUT NUCLEATION | 2017-04-27 |
20170117156 | FINFET DEVICES HAVING FINS WITH A TAPERED CONFIGURATION AND METHODS OF FABRICATING THE SAME | 2017-04-27 |
20170117157 | GAPFILL FILM MODIFICATION FOR ADVANCED CMP AND RECESS FLOW | 2017-04-27 |
20170117158 | Method for thinning samples | 2017-04-27 |
20170117159 | INTEGRATING ATOMIC SCALE PROCESSES: ALD (ATOMIC LAYER DEPOSITION) AND ALE (ATOMIC LAYER ETCH) | 2017-04-27 |
20170117160 | SUBSTRATE PROCESSING DEVICE | 2017-04-27 |
20170117161 | NOVEL TERMINATIONS | 2017-04-27 |
20170117162 | Method For Mounting An Electrical Component, Wherein A Hood Is Used, And Hood Suitable For Use In Said Method | 2017-04-27 |
20170117163 | SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING METHOD | 2017-04-27 |
20170117164 | DISPLACEMENT LIQUID FOR SEMICONDUCTOR CIRCUIT PATTERN DRYING, AND THE METHOD | 2017-04-27 |
20170117165 | SUBSTRATE PROCESSING APPARATUS AND PIPE CLEANING METHOD FOR SUBSTRATE PROCESSING APPARATUS | 2017-04-27 |
20170117166 | APPARATUS FOR PLASMA DICING | 2017-04-27 |
20170117167 | METAL ETCH SYSTEM | 2017-04-27 |
20170117168 | BOND HEAD ASSEMBLIES, THERMOCOMPRESSION BONDING SYSTEMS AND METHODS OF ASSEMBLING AND OPERATING THE SAME | 2017-04-27 |
20170117169 | SUBSTRATE COOLING METHOD, SUBSTRATE TRANSFER METHOD, AND LOAD-LOCK MECHANISM | 2017-04-27 |
20170117170 | Front Opening Ring Pod | 2017-04-27 |
20170117171 | ROBOT ASSEMBLIES, SUBSTRATE PROCESSING APPARATUS, AND METHODS FOR TRANSPORTING SUBSTRATES IN ELECTRONIC DEVICE MANUFACTURING | 2017-04-27 |
20170117172 | Automated Replacement of Consumable Parts Using Interfacing Chambers | 2017-04-27 |
20170117173 | ANTIREFLECTION MEMBER AND ORIENTER APPARATUS | 2017-04-27 |
20170117174 | ELECTRO-STATIC CHUCK WITH RADIOFREQUENCY SHUNT | 2017-04-27 |
20170117175 | CERAMIC STRUCTURE, MEMBER FOR SUBSTRATE-HOLDING APPARATUS, AND METHOD FOR PRODUCING THE CERAMIC STRUCTURE | 2017-04-27 |
20170117176 | Methods of Forming Strained-Semiconductor-on-Insulator Device Structures | 2017-04-27 |
20170117177 | SELF ALIGNED VIA AND PILLAR CUT FOR AT LEAST A SELF ALIGNED DOUBLE PITCH | 2017-04-27 |
20170117178 | PROCESS FOR PRODUCING A CONTACT ON AN ACTIVE ZONE OF AN INTEGRATED CIRCUIT, FOR EXAMPLE PRODUCED ON AN SOI SUBSTRATE, IN PARTICULAR AN FDSOI SUBSTRATE, AND CORRESPONDING INTEGRATED CIRCUIT | 2017-04-27 |
20170117179 | METHOD INCLUDING A FORMATION OF A DIFFUSION BARRIER AND SEMICONDUCTOR STRUCTURE INCLUDING A DIFFUSION BARRIER | 2017-04-27 |
20170117180 | METHODS FOR REDUCING COPPER OVERHANG IN A FEATURE OF A SUBSTRATE | 2017-04-27 |
20170117181 | LOW RESISTANCE CONTACT STRUCTURES INCLUDING A COPPER FILL FOR TRENCH STRUCTURES | 2017-04-27 |
20170117182 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME | 2017-04-27 |
20170117183 | METHOD AND APPARATUS FOR SEPARATING SEMICONDUCTOR DEVICES FROM A WAFER | 2017-04-27 |
20170117184 | DEVICES AND METHODS RELATED TO FABRICATION OF SHIELDED MODULES | 2017-04-27 |
20170117185 | METHODS FOR SINGULATING SEMICONDUCTOR WAFER | 2017-04-27 |
20170117186 | SEMICONDUCTOR AND METAL ALLOY INTERCONNECTIONS FOR A 3D CIRCUIT | 2017-04-27 |
20170117187 | SYSTEM ON CHIP MATERIAL CO-INTEGRATION | 2017-04-27 |
20170117188 | SEMICONDUCTOR STRUCTURE AND FABRICATING METHOD THEREOF | 2017-04-27 |
20170117189 | METHOD OF FORMING FIELD EFFECT TRANSISTORS (FETS) WITH ABRUPT JUNCTIONS AND INTEGRATED CIRCUIT CHIPS WITH THE FETS | 2017-04-27 |
20170117190 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME | 2017-04-27 |
20170117191 | METHOD AND STRUCTURE FOR CMOS METAL GATE STACK | 2017-04-27 |
20170117192 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME | 2017-04-27 |
20170117193 | SEMICONDUCTOR DEVICES WITH SIDEWALL SPACERS OF EQUAL THICKNESS | 2017-04-27 |
20170117194 | ASPECT RATIO FOR SEMICONDUCTOR ON INSULATOR | 2017-04-27 |
20170117195 | NANO DEPOSITION AND ABLATION FOR THE REPAIR AND FABRICATION OF INTEGRATED CIRCUITS | 2017-04-27 |
20170117196 | A GATE INTEGRATED DRIVING CIRCUIT AND A RESTORING METHOD THEREOF, A DISPLAY PANEL AND A DISPLAY APPARATUS | 2017-04-27 |
20170117197 | METHOD FOR REDUCING LIGHT-INDUCED-DEGRADATION IN MANUFACTURING SOLAR CELL | 2017-04-27 |
20170117198 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR PACKAGE COMPRISING THE SAME | 2017-04-27 |
20170117199 | SEMICONDUCTOR DEVICES WITH BUMP ALLOCATION | 2017-04-27 |
20170117200 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | 2017-04-27 |
20170117201 | SEMICONDUCTOR DEVICE | 2017-04-27 |
20170117202 | SYSTEM AND METHOD FOR GAS-PHASE PASSIVATION OF A SEMICONDUCTOR SURFACE | 2017-04-27 |
20170117203 | SYSTEM AND METHOD FOR GAS-PHASE PASSIVATION OF A SEMICONDUCTOR SURFACE | 2017-04-27 |
20170117204 | SOLDER BUMP PLACEMENT FOR THERMAL MANAGEMENT IN FLIP CHIP AMPLIFIERS | 2017-04-27 |
20170117205 | SEMICONDUCTOR DEVICE PACKAGES WITH IMPROVED THERMAL MANAGEMENT AND RELATED METHODS | 2017-04-27 |
20170117206 | INTEGRATED CIRCUIT HEAT DISSIPATION USING NANOSTRUCTURES | 2017-04-27 |
20170117207 | ELECTRONIC DEVICE HAVING A HEAT DISSIPATION UNIT AND METHOD OF MANUFACTURING AN ELECTRONIC DEVICE | 2017-04-27 |
20170117208 | Thermal interface material having defined thermal, mechanical and electric properties | 2017-04-27 |
20170117209 | CARRIER AND CLIP EACH HAVING SINTERABLE, SOLIDIFIED PASTE FOR CONNECTION TO A SEMICONDUCTOR ELEMENT, CORRESPONDING SINTERING PASTE, AND CORRESPONDING PRODUCTION METHOD AND USE | 2017-04-27 |
20170117210 | LEADFRAME | 2017-04-27 |
20170117211 | CLIP AND RELATED METHODS | 2017-04-27 |
20170117212 | SEMICONDUCTOR DEVICE | 2017-04-27 |
20170117213 | SEMICONDUCTOR PACKAGE WITH INTEGRATED DIE PADDLES FOR POWER STAGE | 2017-04-27 |
20170117214 | SEMICONDUCTOR DEVICE WITH THROUGH-MOLD VIA | 2017-04-27 |
20170117215 | SEMICONDUCTOR DEVICE HAVING FLEXIBLE INTERCONNECTION AND METHOD FOR FABRICATING THE SAME | 2017-04-27 |
20170117216 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME | 2017-04-27 |
20170117217 | ISOLATION DEVICE | 2017-04-27 |
20170117218 | CONTACT VIA STRUCTURE AND FABRICATING METHOD THEREOF | 2017-04-27 |
20170117219 | INDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME | 2017-04-27 |
20170117220 | Integrated circuit inductor | 2017-04-27 |
20170117221 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD | 2017-04-27 |
20170117222 | VERTICAL MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME | 2017-04-27 |
20170117223 | LOGIC SEMICONDUCTOR DEVICES | 2017-04-27 |
20170117224 | LOW RESISTANCE CONTACT STRUCTURES FOR TRENCH STRUCTURES | 2017-04-27 |
20170117225 | LOW RESISTANCE CONTACT STRUCTURES INCLUDING A COPPER FILL FOR TRENCH STRUCTURES | 2017-04-27 |
20170117226 | LOW RESISTANCE CONTACT STRUCTURES FOR TRENCH STRUCTURES | 2017-04-27 |
20170117227 | LITHOGRAPHY ENGRAVING MACHINE | 2017-04-27 |
20170117228 | SUSCEPTOR FOR HOLDING A SEMICONDUCTOR WAFER HAVING AN ORIENTATION NOTCH, A METHOD FOR DEPOSITING A LAYER ON A SEMICONDUCTOR WAFER, AND SEMICONDUCTOR WAFER | 2017-04-27 |
20170117229 | CIRCUIT PACKAGE WITH TRENCH FEATURES TO PROVIDE INTERNAL SHIELDING BETWEEN ELECTRONIC COMPONENTS | 2017-04-27 |
20170117230 | CIRCUIT PACKAGE WITH SEGMENTED EXTERNAL SHIELD TO PROVIDE INTERNAL SHIELDING BETWEEN ELECTRONIC COMPONENTS | 2017-04-27 |
20170117231 | WIRE BOND WIRES FOR INTERFERENCE SHIELDING | 2017-04-27 |
20170117232 | SEMICONDUCTOR PACKAGE AND METHOD FOR FORMING THE SAME | 2017-04-27 |
20170117233 | IN-SITU PACKAGING DECAPSULATION FEATURE FOR ELECTRICAL FAULT LOCALIZATION | 2017-04-27 |
20170117234 | Semiconductor Device Having Features to Prevent Reverse Engineering | 2017-04-27 |
20170117235 | METHOD AND APPARATUS FOR A DESTROY ON-DEMAND ELECTRICAL DEVICE | 2017-04-27 |
20170117236 | SEMICONDUCTOR CHIP HAVING TAMPERING FEATURE | 2017-04-27 |
20170117237 | SEMICONDUCTOR CHIP HAVING TAMPERING FEATURE | 2017-04-27 |
20170117238 | INTEGRATED POWER PACKAGE | 2017-04-27 |
20170117239 | OUTPUT IMPEDANCE MATCHING CIRCUIT FOR RF AMPLIFIER DEVICES, AND METHODS OF MANUFACTURE THEREOF | 2017-04-27 |
20170117240 | REDISTRIBUTION LAYER STRUCTURE, SEMICONDUCTOR SUBSTRATE STRUCTURE, SEMICONDUCTOR PACKAGE STRUCTURE, CHIP STRUCTURE, AND METHOD OF MANUFACTURING THE SAME | 2017-04-27 |
20170117241 | MASKLESS SELECTIVE RETENTION OF A CAP UPON A CONDUCTOR FROM A NONCONDUCTIVE CAPPING LAYER | 2017-04-27 |
20170117242 | CHIP PACKAGE AND METHOD FOR FORMING THE SAME | 2017-04-27 |
20170117243 | ANCHORING STRUCTURE OF FINE PITCH BVA | 2017-04-27 |
20170117244 | BONDING WIRE FOR SEMICONDUCTOR DEVICE | 2017-04-27 |
20170117245 | Interconnection Structure and Method of Forming Same | 2017-04-27 |
20170117246 | METHOD AND APPARATUS FOR CREATING A BOND BETWEEN OBJECTS BASED ON FORMATION OF INTER-DIFFUSION LAYERS | 2017-04-27 |