18th week of 2013 patent applcation highlights part 17 |
Patent application number | Title | Published |
20130105897 | Nanowire FET and FINFET Hybrid Technology | 2013-05-02 |
20130105898 | Recessed Single Crystalline Source and Drain For Semiconductor-On-Insulator Devices | 2013-05-02 |
20130105899 | INPUT/OUTPUT ELECTROSTATIC DISCHARGE DEVICE WITH REDUCED JUNCTION BREAKDOWN VOLTAGE | 2013-05-02 |
20130105900 | Methods of Forming PFET Devices With Different Structures and Performance Characteristics | 2013-05-02 |
20130105901 | SEMICONDUCTOR DEVICE WITH METAL GATE ELECTRODE AND HIGH-K DIELECTRIC MATERIAL AND METHOD FOR FABRICATING THE SAME | 2013-05-02 |
20130105902 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE | 2013-05-02 |
20130105903 | SEMICONDUCTOR DEVICE HAVING METAL GATE AND MANUFACTURING METHOD THEREOF | 2013-05-02 |
20130105904 | RADIATION HARDENED INTEGRATED CIRCUIT | 2013-05-02 |
20130105905 | SEMICONDUCTOR DEVICE WITH METAL GATE AND HIGH-K DIELECTRIC LAYER, CMOS INTEGRATED CIRCUIT, AND METHOD FOR FABRICATING THE SAME | 2013-05-02 |
20130105906 | CMOS Device Having Dual Metal Gates and Method of Manufacturing the Same | 2013-05-02 |
20130105907 | MOS DEVICE AND METHOD OF MANUFACTURING THE SAME | 2013-05-02 |
20130105908 | SEMICONDUCTOR DEVICE | 2013-05-02 |
20130105909 | HIGH VOLTAGE CMOS WITH TRIPLE GATE OXIDE | 2013-05-02 |
20130105910 | Remote Doped High Performance Transistor Having Improved Subthreshold Characteristics | 2013-05-02 |
20130105911 | SEMICONDUCTOR DEVICE | 2013-05-02 |
20130105912 | SEMICONDUCTOR DEVICE | 2013-05-02 |
20130105913 | Current Control Semiconductor Element and Control Device Using the Same | 2013-05-02 |
20130105914 | STRUCTURE OF FIELD EFFECT TRANSISTOR WITH FIN STRUCTURE AND FABRICATING METHOD THEREOF | 2013-05-02 |
20130105915 | METAL OXIDE SEMICONDUCTOR DEVICE HAVING A PREDETERMINED THRESHOLD VOLTAGE AND A METHOD OF MAKING | 2013-05-02 |
20130105916 | HIGH SELECTIVITY NITRIDE ETCH PROCESS | 2013-05-02 |
20130105917 | Methods of Epitaxially Forming Materials on Transistor Devices | 2013-05-02 |
20130105918 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | 2013-05-02 |
20130105919 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME | 2013-05-02 |
20130105920 | SEMICONDUCTOR STRUCTURE | 2013-05-02 |
20130105921 | MICROSYSTEM DEVICE AND METHODS FOR FABRICATING THE SAME | 2013-05-02 |
20130105922 | SEMICONDUCTOR PRESSURE SENSOR AND METHOD OF MANUFACTURING SEMICONDUCTOR PRESSURE SENSOR | 2013-05-02 |
20130105923 | DEEP WELL PROCESS FOR MEMS PRESSURE SENSOR | 2013-05-02 |
20130105924 | SOLID-STATE IMAGING APPARATUS AND MANUFACTURING METHOD OF SOLID-STATE IMAGING APPARATUS | 2013-05-02 |
20130105925 | Integrated Die-Level Cameras And Methods Of Manufacturing The Same | 2013-05-02 |
20130105926 | BACK SIDE ILLUMINATION IMAGE SENSOR AND MANUFACTURING METHOD THEREOF | 2013-05-02 |
20130105927 | PHOTOELECTRIC CONVERSION ELEMENT | 2013-05-02 |
20130105928 | BACKSIDE-THINNED IMAGE SENSOR USING Al2O3 SURFACE PASSIVATION | 2013-05-02 |
20130105929 | RESIN COMPOSITION | 2013-05-02 |
20130105930 | METHOD FOR MAKING SEMICONDUCTOR LIGHT DETECTION DEVICES | 2013-05-02 |
20130105931 | SOLID-STATE IMAGING APPARATUS | 2013-05-02 |
20130105932 | METHOD FOR MOLECULAR ADHESION BONDING AT LOW PRESSURE | 2013-05-02 |
20130105933 | SEMICONDUCTOR APPARATUS | 2013-05-02 |
20130105934 | SEMICONDUCTOR DEVICE | 2013-05-02 |
20130105935 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND METHOD FOR DESIGNING THE SAME | 2013-05-02 |
20130105936 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE HAVING IMPROVED INTERCONNECT ACCURACY NEAR CELL BOUNDARIES | 2013-05-02 |
20130105937 | SIMPLIFIED PITCH DOUBLING PROCESS FLOW | 2013-05-02 |
20130105938 | DEVICE MATCHING LAYOUT AND METHOD FOR IC | 2013-05-02 |
20130105939 | SEMICONDUCTOR DEVICE | 2013-05-02 |
20130105940 | SEMICONDUCTOR DEVICE HAVING A FUSE ELEMENT | 2013-05-02 |
20130105941 | SEMICONDUCTOR DEVICE INCLUDING IN WAFER INDUCTORS, RELATED METHOD AND DESIGN STRUCTURE | 2013-05-02 |
20130105942 | FINFET DEVICES | 2013-05-02 |
20130105943 | PACKAGING SUBSTRATE HAVING EMBEDDED CAPACITORS AND FABRICATION METHOD THEREOF | 2013-05-02 |
20130105944 | METAL CAPACITOR DESIGN FOR IMPROVED RELIABILITY AND GOOD ELECTRICAL CONNECTION | 2013-05-02 |
20130105945 | MULTI-JUNCTION PHOTODIODE IN APPLICATION OF MOLECULAR DETECTION AND DISCRIMINATION, AND METHOD FOR FABRICATING THE SAME | 2013-05-02 |
20130105946 | SEMICONDUCTOR DEVICE INCLUDING GROUP III-V COMPOUND SEMICONDUCTOR LAYER, AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE | 2013-05-02 |
20130105947 | HIGH ASPECT RATIO AND REDUCED UNDERCUT TRENCH ETCH PROCESS FOR A SEMICONDUCTOR SUBSTRATE | 2013-05-02 |
20130105948 | PROCESS FOR IMPROVING CRITICAL DIMENSION UNIFORMITY OF INTEGRATED CIRCUIT ARRAYS | 2013-05-02 |
20130105949 | LAMINATED SEMICONDUCTOR SUBSTRATE, SEMICONDUCTOR SUBSTRATE, LAMINATED CHIP PACKAGE AND METHOD OF MANUFACTURING THE SAME | 2013-05-02 |
20130105950 | 3D CHIP PACKAGE WITH SHIELDED STRUCTURES | 2013-05-02 |
20130105951 | BLOCK POWER SWITCH WITH EMBEDDED ELECTROSTATIC DISCHARGE (ESD) PROTECTION AND ADAPTIVE BODY BIASING | 2013-05-02 |
20130105952 | SHIELDED ENCAPSULATING STRUCTURE AND MANUFACTURING METHOD THEREOF | 2013-05-02 |
20130105953 | POWER MODULE PACKAGE | 2013-05-02 |
20130105954 | SEMICONDUCTOR PACKAGE | 2013-05-02 |
20130105955 | SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME AND SEMICONDUCTOR PACKAGE MODULE HAVING THE SAME | 2013-05-02 |
20130105956 | POWER MODULE PACKAGE AND METHOD FOR MANUFACTURING THE SAME | 2013-05-02 |
20130105957 | LEAD FRAME SEMICONDUCTOR DEVICE | 2013-05-02 |
20130105958 | Compact Wirebonded Power Quad Flat No-Lead (PQFN) Package | 2013-05-02 |
20130105960 | Low Stray Inductance Power Module | 2013-05-02 |
20130105961 | LOW INDUCTANCE POWER MODULE | 2013-05-02 |
20130105962 | THERMAL DISSIPATION IN CHIP | 2013-05-02 |
20130105963 | Semiconductor Device and Method of Forming Thermal Interface Material and Heat Spreader Over Semiconductor Die | 2013-05-02 |
20130105964 | Semiconductor Device | 2013-05-02 |
20130105965 | CHIP | 2013-05-02 |
20130105966 | THREE-DIMENSIONAL CHIP-TO-WAFER INTEGRATION | 2013-05-02 |
20130105967 | Semiconductor Die and Method of Forming Sloped Surface in Photoresist Layer to Enhance Flow of Underfill Material Between Semiconductor Die and Substrate | 2013-05-02 |
20130105968 | TSV Backside Processing Using Copper Damascene Interconnect Technology | 2013-05-02 |
20130105969 | SOLDER BONDING PROCESS FORMING A SEMICONDUCTOR CHIP IN MULTIPLE STAGES ON A 3-DIMENSIONAL STACKED ASSEMBLY | 2013-05-02 |
20130105970 | Semiconductor Device and Method of Forming Conductive Posts and Heat Sink Over Semiconductor Die Using Leadframe | 2013-05-02 |
20130105971 | Solder Interconnect Pads with Current Spreading Layers | 2013-05-02 |
20130105972 | STACKED PACKAGES USING LASER DIRECT STRUCTURING | 2013-05-02 |
20130105973 | EMBEDDED WAFER LEVEL PACKAGE FOR 3D AND PACKAGE-ON-PACKAGE APPLICATIONS, AND METHOD OF MANUFACTURE | 2013-05-02 |
20130105974 | SEMICONDUCTOR PACKAGE FEATURING FLIP-CHIP DIE SANDWICHED BETWEEN METAL LAYERS | 2013-05-02 |
20130105975 | SEMICONDUCTOR CHIP DEVICE WITH THERMAL INTERFACE MATERIAL FRAME | 2013-05-02 |
20130105976 | METHOD TO ALIGN MASK PATTERNS | 2013-05-02 |
20130105977 | Electronic Device and Method for Fabricating an Electronic Device | 2013-05-02 |
20130105978 | SILICON SUBMOUNT FOR LIGHT EMITTING DIODE AND METHOD OF FORMING THE SAME | 2013-05-02 |
20130105979 | Package on Package Devices and Methods of Packaging Semiconductor Dies | 2013-05-02 |
20130105980 | SINTERABLE BONDING MATERIAL USING COPPER NANOPARTICLES, PROCESS FOR PRODUCING SAME, AND METHOD OF BONDING ELECTRONIC COMPONENT | 2013-05-02 |
20130105981 | FLATTENED SUBSTRATE SURFACE FOR SUBSTRATE BONDING | 2013-05-02 |
20130105982 | LAND GRID ARRAY SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURE | 2013-05-02 |
20130105983 | SEMICONDUCTOR DEVICE AND METHOD FORMING PATTERNS WITH SPACED PADS IN TRIM REGION | 2013-05-02 |
20130105984 | SEMICONDUCTOR DEVICE PACKAGE ADAPTER | 2013-05-02 |
20130105985 | SEMICONDUCTOR DEVICE | 2013-05-02 |
20130105986 | SEMICONDUCTOR DEVICE WITH VIAS ON A BRIDGE CONNECTING TWO BUSES | 2013-05-02 |
20130105987 | LAMINATE INTERCONNECT HAVING A COAXIAL VIA STRUCTURE | 2013-05-02 |
20130105988 | SEMICONDUCTOR PACKAGE INCLUDING SEMICONDUCTOR CHIP WITH THROUGH OPENING | 2013-05-02 |
20130105989 | Semiconductor Device and Method of Forming Interposer Frame Over Semiconductor Die to Provide Vertical Interconnect | 2013-05-02 |
20130105990 | SEMICONDUCTOR DEVICE | 2013-05-02 |
20130105991 | EMBEDDED WAFER LEVEL PACKAGE FOR 3D AND PACKAGE-ON-PACKAGE APPLICATIONS, AND METHOD OF MANUFACTURE | 2013-05-02 |
20130105992 | SEMICONDUCTOR COMPONENT HAVING A STACK OF SEMICONDUCTOR CHIPS AND METHOD FOR PRODUCING THE SAME | 2013-05-02 |
20130105993 | SEMICONDUCTOR DEVICE INTERCONNECT | 2013-05-02 |
20130105994 | HEATSINK ATTACHMENT MODULE | 2013-05-02 |
20130105995 | SEMICONDUCTOR DEVICE STRUCTURES AND THEIR FABRICATION | 2013-05-02 |
20130105996 | LOW ENERGY ETCH PROCESS FOR NITROGEN-CONTAINING DIELECTRIC LAYER | 2013-05-02 |
20130105997 | SILICONE RESIN COMPOSITION, SILICONE RESIN SHEET, OPTICAL SEMICONDUCTOR ELEMENT DEVICE, AND PRODUCING METHOD OF SILICONE RESIN SHEET | 2013-05-02 |