21st week of 2012 patent applcation highlights part 67 |
Patent application number | Title | Published |
20120131322 | System and Method for Authenticating a Gaming Device - A method and system are provided for authenticating and securing an embedded device using a secure boot procedure and a full non-volatile memory encryption process that implements Elliptic Curve Pinstov-Vanstone Signature (ECPV) scheme with message recovery on a personalized BIOS and master boot record. The signature includes code that is recovered in order to unlock a key that is in turn used to decrypt the non-volatile memory. The use of ECPVS provides an implicit verification that the hardware is bound to the BIOS since the encrypted memory is useless unless properly decrypted with the proper key. | 2012-05-24 |
20120131323 | SYSTEM INCLUDING A VIRTUAL DISK - A client configured to be connected and disconnected from a network includes: a memory storing a local mirrored copy of an image stored on a virtual disk server connected to the network; and a driver configured to access both the image stored on the virtual disk server and the local mirrored copy of the image when the client is connected to the network and to access only the local mirrored copy of the image when the client is disconnected from the network without requiring a reboot of the client after connecting or disconnecting from the network. | 2012-05-24 |
20120131324 | SYSTEM AND METHOD OF COMMUNICATION USING A SMART METER - Described herein are embodiments of methods and systems of communicating with smart appliances through a smart grid and smart meter infrastructure. In one aspect, a method is described comprising a smart meter connected to a first network receiving via the first network registration information for an appliance operably connected to the first network, wherein the registration information includes a unique identifier for the appliance; transmitting at least a portion of the registration information and a smart meter identifier that uniquely identifies the smart meter to a second computing device connected to a second network; receiving, by the second computing device, update information for the appliance; transmitting, by the second computing device, the update information to the smart meter via the second network using the unique identifier for the device and the smart meter identifier; transmitting, by the smart meter, the update information to the appliance; and updating the appliance with the update information. | 2012-05-24 |
20120131325 | NONDESTRUCTIVE TESTING SYSTEM - A nondestructive testing apparatus includes a storage section which stores a plurality of predetermined functions which are executable by the nondestructive testing apparatus, each of the predetermined functions being initially set to one of a permitted state and a disabled state; an input section which includes a plurality of input portions respectively corresponding to the predetermined functions; and a control section which is adapted to receive permission information including information which unlocks at least one of the predetermined functions initially set in the disabled state so as to be set to the permitted state. The control section automatically assigns the at least one predetermined function which has been unlocked to the corresponding input portion of the input section. | 2012-05-24 |
20120131326 | SECURING PARTNER-ENABLED WEB SERVICE - The claimed subject matter provides a method for securing a partner-enabled web service. The method includes receiving a request to access the partner-enabled web service. The request is received from a browser client for a partner application. The browser client is associated with a user. Additionally, the method includes determining that the user is authorized to access the partner application. The method further includes generating a token that associates the user with the partner application. Also, the method includes sending the token to the browser client. | 2012-05-24 |
20120131327 | METHOD OF AND APPARATUS FOR DISTRIBUTING SOFTWARE OBJECTS - A method of distributing software objects from a first entity to at least one second entity, the method comprising: using a distribution entity to accept a software object from the first entity, the software object including an identifier for a specific second entity, and wherein the at least one second entity is operable to contact the distribution entity and to enquire if a software object has been deposited for it, and if a software object has been deposited, to accept it from the distribution entity. | 2012-05-24 |
20120131328 | SYSTEM AND METHOD FOR SECURE COMMERCIAL MULTIMEDIA RENTAL AND DISTRIBUTION OVER SECURE CONNECTIONS - A method for securing intellectual property includes establishing contact between an IP server and a client. At least two component codes are shared and pre-stored in both the player and the server prior to ordering the intellectual property. The IP server accepts an order for an intellectual property product from the client. The IP server creates a shared private key based on the pre-stored shared component codes and an additional shared component code at the time the intellectual property product is ordered. The shared private key is not distributed to the player software. The IP server encrypts the intellectual property product with the created shared private key prior to distribution to the client. The intellectual property product further comprises content data and rights data in digital form. The IP server electronically distributes the intellectual property product to the client in encrypted form without the shared private key. | 2012-05-24 |
20120131329 | Method and System for Accessing 3rd Generation Network - A for accessing a 3G network. includes: a terminal accessing a wireless local area network by adopting a WAPI protocol, and notifying an AAA server of a 3G network through an AP of the wireless local area network that the terminal intends to access the 3G network; the AAA server obtaining identity information of the terminal through the AP, and performing an EAP-TLS negotiation process with the terminal through the AP after determining that the terminal is a subscription terminal of the 3G network according to the identity information; and the terminal accessing the 3G network after finishing the EAP-TLS negotiation process. A system for accessing a 3G network includes an AP of a wireless local area network and an AAA server of a 3G network. The present invention reduces unnecessary processes (the message interacting, the certificate verification, the signature verification, and so on) and improves the system efficiency. | 2012-05-24 |
20120131330 | System and Method for Processing Secure Transmissions - Secured transmissions between a client and a server are detected, a policy formulated whether encrypted material needs to be decrypted, and if content is to be decrypted it is, using decrypting information obtained from the client and server. Resulting plain test is then deployed to an entity such as a processor, store or interface. The plain text can be checked or modified. The transmission between client and server could be blocked, delivered without being decrypted, decrypted and then re-encrypted with or without modification. Each transmission is given an ID and a policy tag. | 2012-05-24 |
20120131331 | System And Method For End To End Encryption - Systems and methods for end-to-end encryption are disclosed. According to one embodiment, a method for device registration includes (1) an application executed by a computer processor receiving a user password from a user; (2) using the computer processor, the application combining the user password and a password extension; (3) using the computer processor, the application cryptographically processing the combined user password and password extension, resulting cryptographic public information; and (4) providing the cryptographic public information to a server. The user password is not provided to the server. In another embodiment, a method for user authentication includes (1) using a computer processor, receiving a login page from a server; (2) sending a Hash-based Message Authentication Code to the server; and (3) receiving an authentication from the server. In one embodiment, the login page may include a transkey and a value B. | 2012-05-24 |
20120131332 | Method and Apparatus for Authenticating Online Transactions Using a Browser - A computer-implemented method for authenticating a user using a service provider server and an authentication server, the user communicating with at least one of the service provider server and the authentication server using a user browser. The method includes requesting, using the user browser, the authenticating with the service provider server. The method also includes authenticating, using the user browser, a secure communication channel with the authentication server. The method also includes receiving, using the user browser, a Next Pre-Authentication Anchor (NPAA) value from the authentication server. The method additionally includes temporarily storing the Next Pre-Authentication Anchor (NPAA) value in a user browser cookie associated with the user browser, wherein the Next Pre-Authentication Anchor (NPAA) value is protected by employing Same Origin Policy (SOP). | 2012-05-24 |
20120131333 | SERVICE KEY DELIVERY IN A CONDITIONAL ACCESS SYSTEM - A method is provided by which a client device obtains authorized access to content delivered over a content delivery network. The method includes receiving an entitlement management message (EMM). The EMM includes at least one cryptographic key and a device registration server certificate ID (DRSCID) identifying a currently valid device registration server (DRS) public key certificate. The DRSCID obtained from the EMM is compared to a stored DRSCID value. An entitlement control message (ECM), which includes an encrypted traffic key for decrypting content, is received. If the DRSCID obtained from the EMM is determined to match the stored DRSCID, the traffic key is decrypted with the cryptographic key or a key derived from the cryptographic key to thereby access the content. | 2012-05-24 |
20120131334 | Method for Attesting a Plurality of Data Processing Systems - A technique for attesting a plurality of data processing systems. The method includes: configuring a chain of data processing systems wherein a first data processing system is responsible for retrieving attestation data associated with a second data processing system; sending a request for attestation of the first data processing system; in response to receiving the request, retrieving a list of associated one or more children, wherein the one or more children comprise the second data processing system; retrieving and storing attestation data associated with each child; retrieving and storing attestation data associated with the first data processing system; and sending to the requester a concatenated response containing the attestation data associated with the first and second data processing systems, such that the attestation data associated with the first and second data processing systems can be used to attest the first and second data processing systems, respectively. | 2012-05-24 |
20120131335 | Collaborative Agent Encryption And Decryption - A method for securely transmitting data from a sender computer system to a receiver computer system comprises receiving a cleartext message by a first intelligent agent environment; splitting said message into a plurality of message fragments; creating an intelligent agent for each message fragment; generating a key for each message fragment; encrypting each said message fragment to produce a respective encrypted message fragment; and transmitting each intelligent agent with said respective encrypted message fragment as a data payload. The method may further comprise receiving each intelligent agent with its respective encrypted message fragment as a data payload by a second intelligent agent environment at the receiver computer system; locating each of a set of agents; decrypting each encrypted respective message fragment to produce a respective cleartext message fragment; and collaborating by the set of agents to recombine cleartext message fragments to form a cleartext message. | 2012-05-24 |
20120131336 | Automatic Secure Escrowing of a Password for an Encrypted File or Partition Residing on an Attachable Storage Device that the Device can be Unlocked Without User Intervention - External data storage device queries the user for a password on at least the first attachment. The password is escrowed in encrypted form. If the user elects this option, the password is then passed to an encryption module which unlocks the encrypted file or partition and upon subsequent attachments of the external data storage device may automatically unlock the encrypted file or partition using the securely escrowed password. The escrow of the encrypted password is managed in an external storage device containing the encrypted file or partition. | 2012-05-24 |
20120131337 | DEVICE ARCHIVING OF PAST CLUSTER BINDING INFORMATION ON A BROADCAST ENCRYPTION-BASED NETWORK - Provided are techniques for the creation and storage of an archive for binding IDs corresponding to a cluster of devices that render content protected by a broadcast encryption scheme. When two or more clusters are merged, a binding ID corresponding to one of the clusters is selected and a new management key is generated. Binding IDs associated with the clusters other than the cluster associated with the selected binding ID are encrypted using the new management key and stored on a cluster-authorized device in a binding ID archive. Content stored in conformity with an outdated binding ID is retrieved by decrypting the binding ID archive with the management key, recalculating an old management key and decrypting the stored content. | 2012-05-24 |
20120131338 | AUTHENTICATION AND AUTHORIZATION OF A DEVICE BY A SERVICE USING BROADCAST ENCRYPTION - Provided are techniques to enable a device that provides a service to authorize a second device for receiving the service and the delivery of the service to the second device and other devices within a trusted network. A signed Management Key Block (MKB) is generated and transmitted over a network. Devices authorized to access a particular service parse the MKB and transmit a request. A server associated with the service determines whether or not the device is authorized to access the service based upon data included in the request. The first device may issue a challenge to the second device for authentication purposes. If service is approved, service is initiated, either from the first device or another authorized device. Devices may be organized into classes such that devices of a specific class are authorized to access the service. | 2012-05-24 |
20120131339 | SYSTEM AND METHOD FOR SECURE BI-DIRECTIONAL COMMUNICATION - An aspect of the present invention provides a method of communicating within a system having a first device, a second device, a key distribution device and an interactive service portal device. The method includes: storing a tag within the interactive service portal device; associating the tag with the first device; registering the first device with the key distribution device; associating, by way of the key distribution device, an encryption key with the first device; accessing, by way of the second device, the tag; providing information to the second device; and establishing secure bi-directional interactive communication, corresponding to the tag, between the first device and the second device based on a relationship between the information and the encryption key. | 2012-05-24 |
20120131340 | Enrollment of Physically Unclonable Functions - Aspects of the present disclosure are directed toward a method that includes a physically-unclonable function (PUF) device that receives a communication that includes a first challenge value, a second challenge value and a remote message authenticity value. The method includes the generation of additional challenge-response pairs in a secure manner. The additional challenge-response pairs are securely communicated between the PUF device and an authenticating server or other device for subsequent use in authentication. | 2012-05-24 |
20120131341 | METHOD AND SYSTEM FOR IMPROVING STORAGE SECURITY IN A CLOUD COMPUTING ENVIRONMENT - A method of improving storage security in a cloud environment includes interfacing a secure microcontroller with a storage controller associated with a client device in the cloud environment to authenticate a platform associated with the storage controller and registering the storage controller with an authentication server configured to be set up in the cloud environment. The method also includes authenticating the storage controller based on a communication protocol between the client device, the authentication server and the storage controller, and obtaining, at the client device, a signature data of the storage controller following the authentication thereof. The signature data is configured to be stored in the secure microcontroller interfaced with the storage controller. | 2012-05-24 |
20120131342 | METHOD AND APPARATUS FOR CONTROLLING ACCESS TO DATA BASED ON LAYER - Disclosed is an access control apparatus and method for giving access authority with respect to data. The access control apparatus may encrypt, using a Public Key (PK) of a terminal, a Node Key (NK) of a target layer in which the access authority is to be granted to the terminal, and produce an Access Control List (ACL) of the target layer based on the encrypted NK and ID information of the terminal. Also, the access control apparatus may produce a copy of the ACL based on the produced ACL, and store the produced copy of the ACL in a lower layer. | 2012-05-24 |
20120131343 | SERVER FOR SINGLE SIGN ON, DEVICE ACCESSING SERVER AND CONTROL METHOD THEREOF - Disclosed are a server, a device accessing the server and a control method thereof, the server for single sign on including: a storage unit which stores user information of a second device; and a controller which identifies a second device which is accessed by a same user as a user of a first device and which stores account information, if the first device requests the account information for a content provider. With this configuration, there are provided a server which shares account information for a content provider, a device accessing the server and a control method thereof. | 2012-05-24 |
20120131344 | IDENTIFYING AND LOCATING AUTHENTICATED SERVICES USING BROADCAST ENCRYPTION - Provided are techniques to enable, using broadcast encryption, a device to locate a service offered by a server with the knowledge that the service offered by the server is a trusted service. A signed enhanced Management Key Block (eMKB) includes a trusted service locator (TSL) that includes one or more records, or “trusted service data records” (TSDRs), each identifying a particular service and a corresponding location of the service is generated and transmitted over a network. Devices authorized to access a particular service parse the eMKB for the end point of the service, connect to the appropriate server and transmit a request. | 2012-05-24 |
20120131345 | SECURE SOFTWARE LICENSING AND PROVISIONING USING HARDWARE BASED SECURITY ENGINE - Provisioning a license and an application program from a first server to a computing platform over a network. The host application derives a symmetric key at least in part from a user password, and sends the license to a license management firmware component of a security engine, in a message signed by the symmetric key. The license management firmware component derives the symmetric key at least in part from the user password stored in a secure storage of the security engine, verifies the signature on the message using the symmetric key, verifies the first server's signature on the license, decrypts the license using a first private key of the license management firmware component corresponding to the first public key to obtain the second key, and sends the second key to the host application, which decrypts the application program using the second key. | 2012-05-24 |
20120131346 | SECURING PRIVATE KEY ACCESS FOR CROSS-COMPONENT MESSAGE PROCESSING - Often, for reasons of wireless bandwidth conservation, incomplete messages are provided to wireless messaging devices. Employing cryptography, for secrecy or authentication purposes, when including a received message that has been incompletely received can lead to lack of context on the receiver's end. By automatically obtaining the entirety of the message to be included, an outgoing message that includes the received message can be processed in a manner that securely and accurately represents the intended outgoing message. Alternatively, a server can assemble a composite message from a new message and an original message and, in cooperation with a wireless messaging device, sign the composite message. Since signing the composite message involves access to a private key, access to that private key is secured such that such access to the private key can only be arranged responsive to an explicit request for a hash that is to be signed using the private key. | 2012-05-24 |
20120131347 | SECURING OF ELECTRONIC TRANSACTIONS - A method in an approval service and a corresponding method in a user identity unit for securing of an electronic transaction. The method comprises a number of steps that begins with receiving of a request of approving a business transaction associated with at least one user identity and one business service, after which a check of the authority of the user identity to use the business service is performed. An exchange with the user identity is then performed of an encrypted and signed verification document that comprises at least information about the business transaction. The business transaction is then approved depending on the contents of the verification document. | 2012-05-24 |
20120131348 | METHOD FOR SIGNING DOCUMENTS USING A PC AND A PERSONAL TERMINAL DEVICE - A method for obtaining a digital signature is disclosed. Upon receipt of request for a digital signature within a customer computer, a Mobile electronic transaction proxy within the customer PC notifies a web browser of the request for the digital signature and assists in obtaining a digital signature on a data string included within the request. After the digital signature is obtained, the data string along with an appended digital signature is transmitted back to a requesting party. | 2012-05-24 |
20120131349 | SECURE SOFTWARE PRODUCT IDENTIFIER FOR PRODUCT VALIDATION AND ACTIVATION - Systems, methods, and apparatus for generating and validating product keys. In some embodiments, a product key includes security information and identification information identifying at least one copy of a software product. The identifying information may be used to access validation information from at least one source other than the product key, and the validation information may be used to process the identification information and the security information to determine whether the product key is valid. In some further embodiments, the security information includes a first portion to be processed by a first validation authority using first validation information and a second portion to be processed by a second validation authority using second validation information, wherein the second validation information is stored separately from the first validation information. | 2012-05-24 |
20120131350 | BIOMETRIC IDENTIFICATION METHOD - A biometric and cryptographic processing unit includes a biometric receiver receiving biometric information of a BCU user. A biometric unit of the BCU has a store of biometric information of an authorized BCU user and compares received biometric information with the stored biometric information to determine if the user is an authorized BCU user. A cryptographic unit generates/stores an asymmetric cryptographic public/private key pair associated with each authorized BCU user. An input/output port allows encrypted/unencrypted data to be input to/output from the BCU. The cryptographic unit operates in response to a specific authorized user giving permission to undertake a specific cryptographic operation on data input to the BCU only upon the specific authorized user being determined as an authorized BCU user, whereby a specific private key corresponding to the specific authorized user is enabled for use in the specific cryptographic operation after which the specific private key is disabled. | 2012-05-24 |
20120131351 | MANAGING ACCESS TO A SECURE DIGITAL DOCUMENT - In a method for managing access to a secure digital document by workflow participants, in which a respective public key is associated with each of the workflow participants, an entry table is populated with a participant entry for each of the workflow participants. Each of the participant entries includes a map entry identifier that corresponds to a map entry tag in a map file, and a first label associated with the map entry identifier. In addition, symmetric keys for the workflow participants are accessed and each of the first labels is encrypted using a respective symmetric key to generate a plurality of second labels, the entry table is populated with the plurality of second labels, each of the plurality of symmetric keys is encrypted with the public key of a respective workflow participant, and the entry table is incorporated into the digital document. | 2012-05-24 |
20120131352 | INCREMENTAL AND BULK STORAGE SYSTEM - A method for storing electronic data. A first set of electronic data may be copied from a computing device to a capsule. The capsule then may be transferred or located to a location other than that of the computing device. The capsule and the computing device may be in electronic communication. The first set of electronic data may be updated on the capsule when changes are made to the first set of electronic data on the computing device. | 2012-05-24 |
20120131353 | PERIPHERAL AUTHENTICATION - This document describes techniques ( | 2012-05-24 |
20120131354 | METHOD AND SYSTEM FOR PROVISION OF CRYPTOGRAPHIC SERVICES - An encryption service system comprises an API for receiving requests from one or more calling applications. Each request comprises information identifying the operations to be performed on data to be processed and information identifying the origin and target of the data. The encryption service system further comprises a cryptographic server for processing the requests and determining, for each request, an encryption policy to be applied. | 2012-05-24 |
20120131355 | RANGE SEARCH SYSTEM, RANGE SEARCH METHOD, AND RANGE SEARCH PROGRAM - In case of a range search to the encryption DB (database), conventionally, because there is a correlation between a value of the data and the number of search keys for the range search, the contents of the encrypted data can be inferred and are not safe. Also, it is not efficient sufficiently in case of insertion of the data, and search. In the present invention, the search keys related by the data are generated for a predetermined number without depending on the value of the data. Also, when the search keys showing a range are generated, the search keys are provided from the search key having a narrow width to the search key having a wide range, and the widths have a relation of a power series length, to suppress the number of necessary search keys. | 2012-05-24 |
20120131356 | APPARATUS FOR CONTROLLING POWER OF MULTI CORE PROCESSOR AND METHOD THEREOF - The present invention relates to an apparatus for controlling power of mufti core processor, which includes a power control device by core unit, controls a plurality of power-related parameters by core unit, and thus decreases a load for power management and enables realization of a low power multi core processor through minute power control. The apparatus includes a processor core adapted to provide code information on an application program for executing to a power regulation controller, and a power regulation controller adapted to receive the code information on the application program from the processor core to determine an operation frequency of the processor core, set an operation voltage, a clock-gating value and a power-gating value according to the determined operation frequency, and provide the set values and voltage to the processor core. | 2012-05-24 |
20120131357 | POWERED DEVICE CLASSIFICATION IN A WIRED DATA TELECOMMUNICATIONS NETWORK - In a wired data telecommunication network power sourcing equipment (PSE) coupled to a powered device (PD) carries out an inline power discovery process to verify that the PD is adapted to receive inline power, then a plurality of classification cycles are carried out to convey a series of inline power classes back to the PSE. The series of inline power classes may all be the same, in which case the PD is legacy equipment and is adapted to receive the power level corresponding to that class. If they are not all the same, information is thus conveyed to the PSE which may, for example, correspond to a specific power level to be applied or to other information. | 2012-05-24 |
20120131358 | COMPUTER STORAGE COMPONENTS THAT PROVIDE EXTERNAL AND INTERNAL ACCESS - A primary computing device and a secondary computing device couple with an internal storage component of the primary device powered by, and data accessed by either the first or secondary computing device. The internal storage component includes multiple connectors for connecting internal buses and external buses over which data can be accessed, internally or externally. It includes an internal storage unit (in general, at least one storage unit, and multiple storage units are supported) to which data can be written and from which data can be read. It also includes arbitration and isolation circuitry that makes it possible to access the internal storage unit (for read/write data access, etc.) over one of the buses. The arbitration and an isolation circuitry also facilitates powering the internal storage component employing power supplied by an internal power source, or via an external power source, such as power from an USB connection. | 2012-05-24 |
20120131359 | DIGITAL IMAGE DISPLAY DEVICE WITH REDUCED POWER MODE - A digital image display device for displaying a collection of digital images, comprising: a display screen; a processor; a power control circuit for enabling an active display mode for displaying digital images on the display screen and a reduced power mode wherein the display screen does not display digital images; a network interface for communicating with a network; an image memory for storing digital images; and a processor-accessible program memory. The program memory stores executable instructions for causing the processor to execute the steps of: receiving one or more digital images from a network server using the network interface; storing the received digital images in the image memory; if the power control circuit is in the reduced power mode when the digital images are received setting it to operate in the active display mode; and displaying the stored received digital images on the display screen. | 2012-05-24 |
20120131360 | PATH CHARACTERISTIC BASED ASSOCIATION OF COMMUNICATION DEVICES - Associating service agents in communication over a network to one or more respective clients coupled to the network at respective ports of the network is described. At a first service agent, a first signal is received from a first client coupled to the network at a first port. The first signal propagates over a first signal propagation path between the first service agent and the first port. An association between the first service agent and the first client is established based at least in part on a difference between: the first signal propagation path between the first service agent and the first port, and a second signal propagation path between the first service agent and a second port or between a second service agent and the first port. | 2012-05-24 |
20120131361 | REMOTE CONTROLLER AND METHOD FOR REMOTELY CONTROLLING MOTHERBOARD USING THE REMOTE CONTROLLER - A remote controller is connected to one or more server via an intelligent platform management bus (IPMB). The controller includes a redundant power supply and a remote control module. Once the remote controller receives a control command to power on one of the servers from a system administer, the remote control module powers on the server, and sends an operation command to control a motherboard of the server to run. By utilizing the remote controller, the system administrator can remotely control baseboard management controllers of the servers when the power supply of the server does not have an AC power. | 2012-05-24 |
20120131362 | BATTERY POWER CONTROL DEVICE, PORTABLE DEVICE AND METHOD FOR CONTROLLING PORTABLE DEVICE - Disclosed are a battery power control device, a portable device and a method of controlling the portable device. The disclosed portable device includes a workload calculator which calculates a workload necessary to provide the specific service to the user according to at least one of time request information related to a desired time during which the specific service is provided to the user and QoS (Quality of Service) request information related to a quality of the specific service, the necessary workload being smaller than a default workload that is preset for providing the specific service; a task performer which performs a task for providing the specific service according to the necessary workload during a time that is reduced to be shorter than a task performance time according to the default workload and stop the task performance during the reduced time; and a battery unit which supplies a power for performing the task to the task performer. | 2012-05-24 |
20120131363 | HEAT DISSIPATING DEVICE AND METHOD THEREOF - A heat dissipating device and the method thereof are provided. The heat dissipating device includes at least one fan, a temperature detecting unit, a fan control unit, and a power consumption control unit. The temperature detecting unit detects a temperature inside the host. The fan control unit controls the rotating speed of the fan. The power consumption control unit calculates the total power consumption of the host, and outputs a control signal to the fan control unit according to the temperature inside the host and the total power consumption of the host, so as to adjust the rotating speed of the fan. | 2012-05-24 |
20120131364 | Method For Managing the Charge Level of a Battery in a Mobile Terminal, Corresponding Management System and Computer Program - The present disclosure relates to a method for managing the charge level of a battery of a mobile terminal connected to a network of transmission of information. The method comprises measuring the charge level of the battery. If the charge level of the battery is lower than a predefined threshold of charge level, the method controls the operation of the terminal to reduce its power consumption during an operation of transmission of information from or toward the terminal. | 2012-05-24 |
20120131365 | Delayed Shut Down of Computer - A computer-implemented computer shut-down method includes identifying that a computing device has been moved from an open configuration in which input and output mechanisms on the computing device are accessible to a user, to a closed configuration in which at least some of the input and output mechanisms are inaccessible to a user; starting a shut-down timer in response to identifying that the computing device has been moved from the open configuration to the closed configuration; waiting a predefined time period, as established by the shut-down timer, and determining from the shut-down timer that the computing device can be transitioned from an active state into a sleep state in which power consuming components of the computing device are powered down; and transitioning the computing device from the active state to the sleep state upon determining that the computing device can be transitioned. | 2012-05-24 |
20120131366 | LOAD BALANCING FOR MULTI-THREADED APPLICATIONS VIA ASYMMETRIC POWER THROTTLING - A first execution time of a first thread executing on a first processing unit of a multiprocessor is determined. A second execution time of a second thread executing on a second processing unit of the multiprocessor is determined, the first and second threads executing in parallel. Power is set to the first and second processing units to effectuate the first and second threads to finish executing at approximately the same time in future executions of the first and second threads. Other embodiments are also described and claimed. | 2012-05-24 |
20120131367 | DEVICE AND METHOD FOR CONTROLLING SECONDARY BATTERY - A secondary battery control device having a sleep mode includes a current detection element for detecting a charging/discharging current value of a battery, a voltage detection element for detecting an open-circuit voltage value of the battery, and a control section for calculating the remaining capacity of the battery based on the detected values. When the control section enters the sleep mode, the control section sets, in a wake timer, based on the remaining battery capacity and the discharging current value at this time, an amount of time required for the remaining battery capacity to reach a predetermined value (about 5%), as an amount of time required for the control section to be restored to a normal mode. When the set amount of time has passed, the control section is restored to the normal mode, and corrects the remaining battery capacity to obtain an accurate remaining battery capacity. | 2012-05-24 |
20120131368 | ELECTRONIC DEVICE AND POWER SAVING METHOD THEREOF - An electronic device includes an input unit, a memory, a page flipping control unit, a buffer, a display, a processor and a switching unit. The input unit generates flipping commands in response to operations of a user. The memory stores a document. The processor displays the document in response to a document opening operation of the user, retrieves a predetermined page range of pages of the document from the memory, and stores the retrieved pages of the document in the buffer. The page flipping control unit receives the flipping commands, accesses the buffer, and flips pages on the display. The switching unit is connected to the memory, the display, and the buffer, and establishes a connection between the display, the buffer and the processor or establishes a connection between the display, the buffer, and the page flipping control unit under control of the processor. | 2012-05-24 |
20120131369 | SYSTEMS AND METHODS FOR WAKING WIRELESS LAN DEVICES - A system and method for wireless waking computing devices over a computer network is provided. A signal is broadcast over the network that includes one or more device specific wake-up data sequences. Each device specific wake-up data sequence includes multiple iterations of the hardware address of the wireless network card associated with that device. While in a reduced power or “sleep mode”, the wireless network card monitors wireless channels for packets containing a wake-up data sequence. If a wake-up data sequence is received, the sequence is matched against the hardware address information for that network card. If a match is determined, the network card sends a signal to the computing device causing full system power to be restored. A signal is sent to the network confirming that the device has been successfully woken from the sleep mode. | 2012-05-24 |
20120131370 | CONSERVING POWER IN A COMPUTER SYSTEM - A power management unit (PMU) may determine an optimal power saving state using a break-even period of a power saving state and an expected idle duration based on a first policy. The PMU may determine the optimal power saving state using a first break even period and actual idle duration based on a second policy. The break-even period may equal a minimum time a computer system should remain in a power saving state to compensate for the power consumed by the system to enter and exit that power saving state. The expected idle time duration is determined as an average of idle duration and a recent sample of idle duration. The actual idle duration is the difference of a first and second time point that represents entry and exit points to and from the power saving state. The PMU may transition the system to the optimal power saving state. | 2012-05-24 |
20120131371 | METHOD FOR OBTAINING POWER STATES OF A COMPUTER - A method for obtaining a power state of an advanced configuration and power interface (ACPI) of a computer starting a baseboard management controller (BMC) after a power supply system of the computer is powered on. The BMC detects if a power signal from the power supply system is high level or low level. If the power signal is high level, the BMC determines that the power state of the ACPI is in a power state S0. If the power signal is low level, the BMC determines that the system power state of the ACPI is in a power state S5. A basic input output system (BIOS) detects if the system power state has changed. If the system power state has changed, the BIOS sends a current power state to the BMC. The BMC sends the power state to a system management software (SMS) of the operating system. Users can obtain the power states through an interface provided by the SMS. | 2012-05-24 |
20120131372 | PoE POWER SOURCING EQUIPMENT AND POWER SUPPLYING METHOD - A Power over Ethernet (PoE) power sourcing equipment that optimizes power supplied to a PoE powered device connected to one of a plurality of power supplying ports of the PoE equipment. The Power over Ethernet (PoE) power sourcing equipment includes a plurality of power supplying ports, a consumed power monitoring unit that monitors the consumed power of the PoE powered device connected to one of the plurality of power supplying ports, and a supply power determining unit that determines the set supply power to the PoE powered device connected to the one of the power supplying ports. | 2012-05-24 |
20120131373 | Method for Sensing Input Signal Changes - A method for sensing input signal changes at an input of an input/output module operated in an automation system in which a signal is sampled by an input/output module. A change event and a timestamp associated with the change event are generated when a change in the sampled signal occurs and a value pair comprising the change event and the timestamp is stored in a higher-ranking automation component to the input/output module. The input/output module and the higher-ranking automation component are operated clock-synchronously with respect to one another by a clock pulse, and the timestamp is calculated centrally on the higher-ranking automation component based on the clock-synchronous operation. | 2012-05-24 |
20120131374 | JITTER REDUCTION METHOD AND APPARATUS FOR DISTRIBUTED SYNCHRONISED CLOCK ARCHITECTURE - A method of reducing jitter in a local clock of a synchronised USB device attached to a USB Hub, the USB Hub having a local clock and repeater circuitry, comprising: observing a USB data stream with the USB Hub, the data stream having a data stream bit rate; the USB Hub decoding a periodic signal structure in the USB data stream; the USB Hub generating an event signal in response to decoding of the periodic signal structure; and the USB Hub locking a frequency of the local clock of the USB Hub to the periodic event signal. The local clock of the USB Hub is adapted to be a clocking source for the repeater circuitry of the USB Hub at substantially an integer multiple of a frequency of the data stream bit rate. | 2012-05-24 |
20120131375 | Executing a Kernel Device Driver as a User Space Process - A method, including receiving, by a user space driver framework (UDF) library executing from a user space of a memory over a monolithic operating system kernel, a kernel application programming interface (API) call from a device driver executing from the user space. The UDF library then performs an operation corresponding to the kernel API call. | 2012-05-24 |
20120131376 | METHOD AND SYSTEM FOR CELL RECOVERY IN TELECOMMUNICATION NETWORKS - A method and system that helps to ensure that any cell crash (i.e., an involuntarily action occurring as a result of a software bug or malfunction) is localized to a single cell on a single modem board that supports multi-cell configuration. In this regard, the control plane and the remaining cells that are configured on the modem board should remain operational. Further the operator should be able to choose to take corrective action (i.e., reboot, reconfigure, delete, or create) with regard to a cell on the modem board without impacting the operations of the other configured cells. | 2012-05-24 |
20120131377 | Support for Virtualized Unified Communications Clients When Host Server Connectivity is Lost - Techniques are provided for establishing a Virtual Desktop Interface (VDI) connection at a virtual desktop thin client (VDTC) device, between a VDI client in the VDTC device and a VDI server in a hosted virtual desktop server (HVDS). A unified communications (UC) control connection is established between a UC protocol stack on the VDTC device and a primary call agent, where the UC control connection is configured to allow the UC protocol stack to register with the primary call agent, and to send or receive commands from the primary call agent that are based on signals from a UC control application running on the HVDS. A UC control backup application is started on the virtual desktop thin client device in a standby mode that is configured to switch to an active mode in response to a failure to establish or maintain the UC control connection, or a failure to establish or maintain the VDI connection. A user interface is launched on the virtual desktop thin client device that is configured to perform UC backup functions. | 2012-05-24 |
20120131378 | MESSAGE SYNCHRONIZATION METHOD, APPARATUS AND SYSTEM - Embodiments of the present invention relate to a message synchronization method, apparatus and system. The method includes: obtaining a first sending time stamp transmitted on a main link and a second sending time stamp transmitted on a backup link respectively; calculating to obtain a time difference according to the first sending time stamp and the second sending time stamp; adding bytes to the first message transmitted on the main link and the first message transmitted on the backup link, and form second messages to be transmitted on the main link and the backup link respectively; and sending the second messages to a receiving end on the main link and the backup link respectively. | 2012-05-24 |
20120131379 | COMPUTER SYSTEM AND AVAILABILITY METHOD THEREOF - High availability computer system and fault correction method. If a fault occurs in the current-system physical device allocated to the current-system virtual device of the virtual server, the virtualization mechanism of the physical server configures, for the standby-system virtual device of the virtual server, the standby-system physical device, as a physical device which is used at a high priority, and the virtualization mechanism distributes the request issued from the standby-system virtual device of another virtual server to a standby-system physical device, but, when such a standby-system physical device does not exist, the virtualization mechanism distributes the request to a standby-system physical device configured for high priority usage. | 2012-05-24 |
20120131380 | CRASH RECOVERY MEMORY RESERVATION BASED ON DEVICE DRIVERS FOR AN OPERATIONAL KERNEL - A computing system stores actual memory usage data in a user memory space. The actual memory usage data represents memory usage of a plurality of device drivers that are loaded by a first kernel. The computing system generates an estimate of memory space to be reserved for a second kernel based on the actual memory usage data for the plurality of device drivers that are loaded by the first kernel and reserves memory space for the second kernel using the estimate. | 2012-05-24 |
20120131381 | Operating a Data Storage System - A data storage system including at least one memory device array including memory devices for storing data; and a storage subsystem controller for performing a method for operating the memory devices within the memory device array by relocating parity entities from a first memory device to a spare memory device replacing a failed memory device, and by storing one or more of reconstructed data entities on the first memory device. | 2012-05-24 |
20120131382 | MEMORY CONTROLLER AND INFORMATION PROCESSING SYSTEM - A information processing system comprises a memory module having a plurality of unit memory regions, a memory controller, connected to the memory module via memory interface, configured to control access to the memory module, an error detector, which is in the memory controller, configured to perform an error detection on data read from the memory module, a failure inspection controller configured to switch a mode of the memory controller from a normal mode to a failure inspection mode, read data from an address, where data was written, to be inspected for each of the plurality of unit memory regions, causes the error detector to detect an error in the read data and perform a failure inspection and a determining unit configured to determine a memory failure or a transmission path failure on the basis of the state of the error detected from the unit memory regions. | 2012-05-24 |
20120131383 | METHOD AND SYSTEM FOR PROTECTING AGAINST MULTIPLE FAILURES IN A RAID SYSTEM - Embodiments of methods of protecting RAID systems from multiple failures and such protected RAID systems are disclosed. More particularly, in certain embodiments of a distributed RAID system each data bank has a set of associated storage media and executes a similar distributed RAID application. The distributed RAID applications on each of the data banks coordinate among themselves to distribute and control data flow associated with implementing a level of RAID in conjunction with data stored on the associated storage media of the data banks. Furthermore, one or more levels of RAID may be implemented within one or more of the data banks comprising the distributed RAID system. | 2012-05-24 |
20120131384 | COMPUTER SYSTEM - A computer system including a first processor, an error detecting circuit and a south bridge chip is provided. The first processor outputs a first catastrophic error signal. The error detecting circuit is coupled to the first processor to receive the first catastrophic error signal. When the first catastrophic error signal changes to a first level and is maintained for a period exceeding a first predetermined time, the error detecting circuit outputs an internal error reset signal. When the first catastrophic error signal changes to a first level and passes a second predetermined time, the error detecting circuit outputs a machine error reset signal. Here, the second predetermined time is greater than the first predetermined time. The south bridge chip is coupled to the error detecting circuit and reboots the computer system according the internal error reset signal or the machine error reset signal. | 2012-05-24 |
20120131385 | TESTING MEHTOD FOR UNIT UNDER TEST - A testing method for a unit under test is provided. At least one unit under test is electrically connected to a testing machine. The testing machine creates a test script and executes the test script, so as to perform a non-operating system (OS) test and an OS test on the unit under test, and the testing machine is capable of combining the testing results, so a testing process is simplified, a test time is shortened, and test accuracy is improved. | 2012-05-24 |
20120131386 | VERIFICATION OF SPECULATIVE EXECUTION - A Design-Under-Test (DUT) may be designed to perform speculative execution of a branch path prior to determination whether the branch path is to be performed. Verification of the operation of DUT in respect to the speculative execution is disclosed. A template may be used to generate a plurality of tests. In addition to standard randomness of the tests to various parameters in accordance with the template, the tests may also differ in their respective speculative execution paths. The tests are partitioned by a generator into portions to be placed in speculative paths and portions to be placed in non-speculative paths. The generator may provide for a variance in portions. The generator may provide for nested speculative paths. | 2012-05-24 |
20120131387 | MANAGING AUTOMATED AND MANUAL APPLICATION TESTING - An application for which approval is requested is identified and multiple automated tests are applied to the application in groups of automated tests. Each of the groups of automated tests includes multiple ones of the multiple automated tests. If one or more automated tests in a group of automated tests returns an inconclusive result, then a manual check is initiated for the application based on the one or more automated tests that returned the inconclusive result. If one or more automated tests in a group, or a manual test applied in the manual check, returns a fail result then an indication that the application is rejected is returned, the indication that the application is rejected including an identification of why the application is rejected. If none of the multiple automated tests returns a fail result, then a manual testing phase is initiated. | 2012-05-24 |
20120131388 | ASSISTING FAILURE MODE AND EFFECTS ANALYSIS OF A SYSTEM - A system and method of assisting with failure mode and effects analysis of a system includes obtaining data describing a set of symptoms and a set of faults, and symptom-fault association data describing which of the symptoms are indicative of which of the faults. Data describing a set of measurements, and measurement-symptom association data describing which of the measurements detect which of the symptoms is also obtained. User input representing a selection of at least one of the faults and at least one of the measurements is received and data representing a graphical display is generated to simultaneously show relationships between the selected fault(s) and the symptoms associated with the selected fault(s), and relationships between the selected measurement(s) and the symptoms associated with the selected measurement(s). | 2012-05-24 |
20120131389 | CROSS-LAYER SYSTEM ARCHITECTURE DESIGN - Methods and systems for cross-layer forgiveness exploitation include executing one or more applications using a processing platform that includes a first reliable processing core and at least one additional processing core having a lower reliability than the first processing core, modifying application execution according to one or more best-effort techniques to improve performance, and controlling parameters associated with the processing platform and the best-effort layer that control performance and error rate such that performance is maximized in a region of low hardware-software interference. | 2012-05-24 |
20120131390 | Detecting System Component Failures In A Computing System - Detecting system component failures in a computing system, including: detecting, by an illumination detector, the occurrence of an illumination event in the computing system; determining, by an illumination event identifier, whether the illumination event is associated with a suspected component failure in the computing system; and sending, by a notification system, a failure event notification upon determining that the illumination event is associated with a suspected component failure in the computing system. | 2012-05-24 |
20120131391 | MIGRATION OF DATA IN A DISTRIBUTED ENVIRONMENT - Embodiments of the invention migrate dynamically changing data sets in a distributed application environment. Writes to a source device are intercepted and it is determined whether data in the source device is being migrated to a target device. If data is being migrated, then the intercepted write is mirror written synchronously to both the source and the target. Data being migrated is read from a region of the source and written to a region of the target and also to a minor writing memory location. The source region data is re-read and compared to the originally read data that is written to the mirror writing memory location. If the compared data does not match, the data migration from the source region to the target region (and to the minor writing memory location) is repeated until the originally read data and the re-read data match. | 2012-05-24 |
20120131392 | SYSTEMS AND METHODS PROVIDING AN EXCEPTION BUFFER TO FACILITATE PROCESSING OF EVENT HANDLER ERRORS - According to some embodiments, an application may call an event handler. The event handler may determine that an error has occurred within the event handler and store information associated with the error into an exception buffer. A pulling mechanism of the application may detect the stored information associated with the error, and, as a result, information associated with the error may be retrieved from the exception buffer. | 2012-05-24 |
20120131393 | Detecting System Component Failures In A Computing System - Detecting system component failures in a computing system, including: capturing, by a digital imaging device, an image of a component in the computing system; comparing, by a digital imaging comparator, the image of the component in the computing system to a graphical template for the component in the computing system; determining, by the digital imaging comparator, whether the image matches the graphical template for the computing system within a predetermined threshold; and sending, by a notification system, a failure event notification upon determining that the image does not match the graphical template for the computing system within the predetermined threshold. | 2012-05-24 |
20120131394 | DETECTION METHOD FOR CONFIGURATION OF POWER SUPPLY UNITS AND DETECTION SYSTEM USING THE SAME - A detection method for configuration of power supply units and a detection system using the same are provided. The detection method includes: storing a production information setting about configuration of power supply units in a field replace unit, in which the production information setting includes a number setting and a location setting; sensing actual configuration number and location of the power supply units by a sensing unit so as to obtain an actual configuration information; and reading the production information setting and the actual configuration information and comparing them by a controller, in which the controller determines that the detection is passed when the actual configuration information matches the number setting and the location setting; and the controller outputs an unusual message when the actual configuration information does not match the number setting and the location setting. | 2012-05-24 |
20120131395 | METHOD AND APPARATUS FOR REDUCING BIT ERRORS - An apparatus and method for reduction of bit errors in continuous data transmission via a data transmission medium comprising. The apparatus ( | 2012-05-24 |
20120131396 | DEVICE AND METHOD FOR REPAIR ANALYSIS - A device for repair analysis includes a selection unit and an analysis unit. The selection unit is configured to select a part of the row addresses of a plurality of spare pivot fault cells and a part of the column addresses of the spare pivot fault cells in response to a control code. The analysis unit is configured to generate an analysis signal indicating whether row addresses of a plurality of non-spare pivot fault cells are included in selected row addresses and column addresses of the non-spare pivot fault cells are included in selected column addresses. | 2012-05-24 |
20120131397 | SEMICONDUCTOR DEVICE HAVING TEST MODE AND METHOD OF CONTROLLING THE SAME - When an update disable signal is at an inactivation level, a latch signal is activated in accordance with an active signal and a mode register set signal. When the update disable signal is at an activation level, the latch signal is activated in accordance with the active signal while being not activated in accordance with the mode register set signal. Based on the latch signal, the address signal is latched. Based on the latched address signal, an internal test signal is generated. With this structure, a target chip can be selectively controlled simply by activating the update disable signal in the target chip. | 2012-05-24 |
20120131398 | METHOD OF performing A CHIP BURN-IN SCANNING with increased EFFICIENCY - Utilize a pattern generator to write a predetermined logic voltage to each memory cell of a memory chip. Read a predetermined logic voltage stored in the memory cell. Compare the predetermined logic voltage stored in the memory cell with the predetermined logic voltage to determine if the memory cell is a good memory cell or not and store a determination result corresponding to the memory cell in a data latch of the memory chip. And determine if the memory chip is a good memory chip or not according to determination results of all memory cells of the memory chip stored in the data latch of the memory chip. | 2012-05-24 |
20120131399 | APPARATUS AND METHODS FOR TESTING MEMORY CELLS - Apparatus and methods are provided for concurrently selecting multiple arrays of memory cells when accessing a memory element. A memory element includes a first array of one or more memory cells coupled to a first bit line node, a second array of one or more memory cells coupled to a second bit line node, access circuitry for accessing a first memory cell in the first array, a first transistor coupled between the first bit line node and the access circuitry, and a second transistor coupled between the second bit line node and the access circuitry. A controller is coupled to the first transistor and the second transistor, and the controller is configured to concurrently activate the first transistor and the second transistor to access the first memory cell in the first array. | 2012-05-24 |
20120131400 | SYSTEM AND METHOD FOR CORRECTING PROGRAMMING FAILURES IN A PROGRAMMABLE FUSE ARRAY - A system for correcting programming failures in an M-bit primary array of programmable fuses. The address of the failed fuse is stored in a secondary fuse array. Correction logic coupled to the primary and secondary arrays propagates the programming states of the good fuses, and corrects the programming state of the failed fuse, if any. The correction logic preferably comprises a decoder coupled to the secondary array which produces a one-hot M-bit word representing the failed fuse, and combinatorial logic arranged to receive the programming states of the primary array fuses and the one-hot M-bit word at respective inputs and to produce the correction logic output. Multiple failures can be accommodated using multiple secondary arrays, each storing the address of a respective failed fuse, or a tertiary array which stores the address of a failed fuse in either the primary or secondary arrays. | 2012-05-24 |
20120131401 | SYSTEM AND METHOD FOR SHARING A COMMUNICATIONS LINK BETWEEN MULTIPLE COMMUNICATIONS PROTOCOLS - A system and method for sharing a communications link between multiple protocols is described. A system includes a communications interface configured to exchange information with other systems using at least one of a plurality of protocols; a protocol select register that stores a value that selects a protocol from among the plurality of protocols to become an active protocol; and a state machine accessible to the communications interface, the state machine used to control the exchange of information through the communications interface according to the active protocol. The active protocol is used by the communications interface to exchange information while the remaining protocols of the plurality of protocols remain inactive. The state machine sequences through a series of states that cause the communications interface to operate according to the active protocol, and that are designated as inert sequences under the remaining protocols. | 2012-05-24 |
20120131402 | TEST MODE SETTING CIRCUIT - Provided is a test mode setting circuit with a smaller number of terminals. A detector having a low threshold voltage and a detector having a high threshold voltage are provided to a test terminal for controlling a test mode of a semiconductor device, and the detector having the low threshold voltage releases a reset of a logic circuit while the detector having the high threshold voltage controls switching of the test mode. This configuration uses the test terminal, a reset terminal, and test mode control terminals in common between a normal state and a test state, thus reducing a large number of the terminals. | 2012-05-24 |
20120131403 | MULTI-CHIP TEST SYSTEM AND TEST METHOD THEREOF - A multi-chip test system and a method thereof utilize a Complex Programmable Logic Device (CPLD) to be connected in series to multiple chips having a Joint Test Action Group (JTAG) interface for function inspection. The test system includes a device to-be-tested and a control device. The device to-be-tested includes multiple chips, a CPLD, and a second JTAG interface. Each of the chips has a first JTAG interface. The CPLD is coupled to the chips through the first JTAG interfaces. The second JTAG interface is connected to the CPLD. The control device is connected to the second JTAG interface and used for sending a switching instruction to the CPLD. In the test method, firstly, a switching instruction is received to select a chip to-be-tested; then, a test signal is sent to the chip to-be-tested according to the chip to-be-tested; and the chip to-be-tested transfers a test result back to a CPLD according to the test signal. | 2012-05-24 |
20120131404 | Providing An On-Die Logic Analyzer (ODLA) Having Reduced Communications - In one embodiment, the present invention is directed to a logic analyzer such as may be implemented on a system-on-chip or another semiconductor device. The analyzer can include multiple lanes each having a filter to receive and filter debug data, a compressor to compress the debug data passed by the filter, a buffer, and a controller to store the compressed debug data into the buffer, where the compressed debug data can be stored without timing information. Other embodiments are described and claimed. | 2012-05-24 |
20120131405 | METHOD AND APPARATUS FOR DEFECT RECOVERY - A signal processing circuit includes a plurality of processing-circuit modules and a logic control circuit. The plurality of processing-circuit modules is configured to process an electrical signal. The plurality of processing-circuit modules has at least one processing parameter that is adaptively adjusted based on the electrical signal. The logic control circuit is configured to receive signals from the plurality of processing-circuit modules, validate the processing based on the received signals, and control a storage circuit to sample and store a value of the processing parameter when the processing is validated. Further, the logic control circuit is configured to control the storage circuit to maintain the value of processing parameter when the processing fails validation, and to control the storage circuit to recover the processing parameter in the plurality of processing-circuit modules to the stored value when the plurality of processing-circuit modules is disturbed by a defect. | 2012-05-24 |
20120131406 | METHOD AND APPARATUS FOR TIME EFFICIENT RETRANSMISSION USING SYMBOL ACCUMULATION - A method for communicating data is provided. In the method, an encoder receives an input bit stream. The encoder generates, based on the input bit stream, a first output bit stream based on at least a first polynomial and a second output bit stream based on at least a second polynomial. The first and second polynomials are each different from each other. The encoder forms a first packet of code symbols, having a first code rate, based on bits from the first output bit stream. A transmitter transmits the first packet. A receiver receives a first negative acknowledgment indicating unsuccessful decoding of the first packet after said transmitting of the first packet. The encoder punctures bits from the second output bit stream and forms a second packet of code symbols having a second code rate. The second code rate is different from the first code rate. The transmitter transmits the second packet in response to the receiver receiving the first negative acknowledgment. | 2012-05-24 |
20120131407 | LAYER-AWARE FORWARD ERROR CORRECTION ENCODING AND DECODING METHOD, ENCODING APPARATUS, DECODING APPARATUS, AND SYSTEM THEREOF - A layer-aware Forward Error Correction (FEC) encoding and decoding method for encoding and decoding an information content, an encoding apparatus, a decoding apparatus, and a system thereof are provided, wherein the information content has a plurality of layer source symbol sets. In the encoding method, source symbols of each layer are encoded into encoding symbols corresponding to the layer by using an FEC encoder. In addition, final encoding symbols of an upper layer are generated by aggregating encoding symbols of both the upper layer and a lower layer. Thereby, the layer-aware FEC encoding method can maintain the encoding/decoding dependency between different layers of data without increasing the complexity of the encoding/decoding operations. | 2012-05-24 |
20120131408 | COMPUTER READABLE STORAGE MEDIUM STORING ERROR CORRECTION PROGRAM AND COMMUNICATION APPARATUS - A computer-readable medium storing a program causing a computer to execute a process includes, acquiring a plurality of data units that belong to a first block in a certain hierarchy among hierarchical blocks defined by a plurality of hierarchies; generating error correction information corresponding to the first block that equals to an exclusive-OR of the plurality of data units; generating, in each individual hierarchy of one or more individual hierarchies that are continuous from and are lower than the certain hierarchy, error correction information corresponding to each individual block that equals to the exclusive-OR of all data units that belong to the individual block among the plurality of data units, where the individual block is one or more individual blocks other than one specific block in two or more blocks in the individual hierarchy that are included in the same block in a hierarchy. | 2012-05-24 |
20120131409 | RATE-COMPATIBLE PROTOGRAPH LDPC CODE FAMILIES WITH LINEAR MINIMUM DISTANCE - Digital communication coding methods are shown, which generate certain types of low-density parity-check (LDPC) codes built from protographs. A first method creates protographs having the linear minimum distance property and comprising at least one variable node with degree less than 3. A second method creates families of protographs of different rates, all structurally identical for all rates except for a rate-dependent designation of certain variable nodes as transmitted or non-transmitted. A third method creates families of protographs of different rates, all structurally identical for all rates except for a rate-dependent designation of the status of certain variable nodes as non-transmitted or set to zero. LDPC codes built from the protographs created by these methods can simultaneously have low error floors and low iterative decoding thresholds. | 2012-05-24 |
20120131410 | ERROR CORRECTION CODE DECODING DEVICE - An error correction code decoding device comprises a first memory having a memory space like a matrix, a first decoding unit writing a first information into the first memory along a first direction, a second decoding unit reading the first information from the first memory along a second direction and a plurality of turbo decoders included in the second decoding unit, and differentiating access timing to a same row or same column with each other. | 2012-05-24 |
20120131411 | MODULATION METHOD AND DEVICE IMPLEMENTING A DIFFERENTIAL MODULATION, CORRESPONDING DEMODULATION METHOD AND DEVICE, SIGNAL AND COMPUTER SOFTWARE PRODUCTS - A method and apparatus are provided for modulating a binary source sequence including of a plurality of source words to generate modulated symbols. The method implements error-correction encoding of the plurality of source words, implementing one or more encoding modules, each implementing a separate error-correction code to generate a plurality of code words, the source words being encoded in series. The code words are interlaced to generate an interlaced sequence. The interlaced sequence is differentially modulated to generate modulated symbols. Each code word is broken down into at least one group with a number of bits equal to the base-2 logarithm of a number of states of a modulation implemented by the step of differentially modulating. The interlacing step distributes the groups such that two adjacent groups in the interlaced sequence belong to separate code words. | 2012-05-24 |
20120131412 | TRANSMISSION APPARATUS, TRANSMISSION METHOD, RECEPTION APPARATUS, RECEPTION METHOD, PROGRAM AND TRANSMISSION SYSTEM - Disclosed herein is a transmission apparatus, including: an error correction code calculation section adapted to calculate an error correction code from data of a transmission object as an information word; a division section adapted to allocate coded data which configure a codeword obtained by adding the error correction code determined by the calculation by the error correction code calculation section to the data of the transmission object for each predetermined number of units to a plurality of transmission lines; and a plurality of transmission sections provided corresponding to the plural transmission lines and adapted to transmit the coded data allocated by the division section to a reception apparatus through the transmission lines. | 2012-05-24 |
20120131413 | APPARATUS, SYSTEM, AND METHOD TO INCREASE DATA INTEGRITY IN A REDUNDANT STORAGE SYSTEM - An apparatus, system, and method are disclosed to increase data integrity in a redundant storage system. The receive module receives a read request to read data from an ECC chunk spanning N storage elements of an array of N+P storage elements. The N storage elements each store a portion of the ECC chunk and the P storage elements store parity data. The data read module reads data from each of X number of storage elements of the N+P storage elements where (N+P)>X≧N. The ECC correction module corrects the read data of the ECC chunk using Error Correcting Code (“ECC”) in response to the ECC chunk comprising a number of bit errors below a correctable bit error threshold. The substitution module may correct the read data with substitute data from a substitute storage element. | 2012-05-24 |
20120131414 | RELIABILITY, AVAILABILITY, AND SERVICEABILITY SOLUTION FOR MEMORY TECHNOLOGY - Embodiments of the invention are generally directed to systems, methods, and apparatuses for reliability, availability, and serviceability solutions for memory technology. In some embodiments, a host determines the configuration of the memory subsystem during initialization. The host selects a write cyclic redundancy code (CRC) mechanism and a read CRC mechanism based, at least in part, on the configuration of the memory subsystem. Other embodiments are described and claimed. | 2012-05-24 |
20120131415 | METHOD OF SETTING NUMBER OF ITERATION COUNTS OF ITERATIVE DECODING, AND APPARATUS AND METHOD OF ITERATIVE DECODING - A method of setting a number of iteration counts of iterative decoding, and an apparatus and method of iterative decoding. The iterative decoder including a signal-to-noise ratio (SNR) estimation unit that estimates an SNR of a received signal, an iterative decoding count setting unit that sets a minimum number of iteration counts for the received signal based on the estimated SNR, and a decoding unit that iteratively decodes the received signal using tentative decoding and error check, and selectively performs the error check based on the minimum number of iteration counts. | 2012-05-24 |
20120131416 | Facilitating User Support of Electronic Devices Using Matrix Codes - An electronic device detects occurrence of an error condition and selects a matrix code to include in an error message to transmit to a display device based on the error condition. A reader device decodes the displayed matrix code to present information regarding resolution of the error condition. The electronic device may select the matrix code by looking up the error condition in a table or by dynamically generate the matrix code. In various implementations, the electronic device may determine that the information regarding resolution of the error condition has been utilized to unsuccessfully resolve the error condition. If so, the electronic device may select and transmit and additional matrix code that may be decoded by the reader device to access and present an additional set of information regarding resolution of the error condition or to initiate an electronic device support request. | 2012-05-24 |
20120131417 | CLASSIFYING A CRITICALITY OF A SOFT ERROR AND MITIGATING THE SOFT ERROR BASED ON THE CRITICALITY - Methods and systems mitigate a soft error in an integrated circuit. A map is stored in a memory, and the map specifies a criticality class for each storage bit in the integrated circuit. A mitigative technique is associated with each criticality class. The soft error is detected in a corrupted one of the storage bits. The mitigative technique is performed that is associated with the criticality class specified in the map for the corrupted storage bit. | 2012-05-24 |
20120131418 | MEMORY DEVICE - According to one embodiment, a memory device comprises a writing device that writes data bits, check bits for error corrections, and overhead bit(s) into a memory, each bit of the overhead bit(s) corresponding to each group of bit group(s) including at least one bit of the data bits and/or the check bits, each bit of the overhead bit(s) indicating whether the corresponding bit group has been inverted, a reading unit that reads the data bits, the check bits, and the overhead bit(s) from the memory, a correcting unit that corrects an error in the data bits and overhead bit(s) read from the memory, based on the check bits, and an inverting unit that inverts the data bits contained in the bit group corresponding to the overhead bit and outputs the inverted data bits as data read from the memory when the error-corrected overhead bit indicates that inversion has been performed. | 2012-05-24 |
20120131419 | MEMORY APPARATUS AND METHOD USING ERASURE ERROR CORRECTION TO REDUCE POWER CONSUMPTION - Data bits stored in memory cells are recognized by an ECC generator as data bit strings in a first direction and data bit strings in a second direction such that each data bit string in the first direction and each data bit string in the second direction share one data bit in common. The ECC controller identifies a data bit string in the first direction having more than one data bit in error based on a respective correction code in the first direction and identifies a data bit string in the second direction having more than one data bit in error based on a respective correction code in the second direction, and causes the data bit shared by the identified data bit string in the first direction and the identified data bit string in the second direction to be changed. | 2012-05-24 |
20120131420 | Method and Apparatus for Non-uniform Redundancy Packet Error Correction - A method for correcting at least one error in a data transmission over a packet-based communication network includes the steps of: generating a sequence of data packets for transmission over the packet-based communication network, the sequence of data packets being arranged into a plurality of packet frames, each of at least a subset of the packet frames including at least a primary data packet and a number of redundant data packets which is a function of a prescribed redundancy pattern, the subset of packet frames having a non-uniform distribution of redundant data packets therein; transmitting the sequence of data packets over the communication network; and recovering at least one missing data packet in the sequence of data packets using at least one corresponding redundant data packet in at least one subsequently received packet frame when the missing data packet is identified in a receiver of the sequence of data packets. | 2012-05-24 |
20120131421 | Receiving Apparatus, Receiving Method and Non-Transitory Computer Readable Recording Medium for Recording Receiving Program - According to one embodiment, a receiving apparatus includes a data packet receiver, a quality reinforcement packet receiver, an information setting module, a packet processor, a recovery processor. The data packet receiver is configured to receive a data packet comprising a data portion. The quality reinforcement packet receiver is configured to receive a quality reinforcement packet comprising a quality reinforcement portion. The information setting module is configured to set the data portion corresponding to a part of information included in the data packet as a recovery process target. The packet processor is configured to determine whether there is a lost data packet based on the received data packet and the quality reinforcement packet. The recovery processor is configured to recover, when there is the lost data packet, at least the data portion set as the recovery process target in the lost data packet by using the data portion set as the recovery process target in a non-lost data packet and the quality reinforcement portion corresponding thereto. | 2012-05-24 |