25th week of 2012 patent applcation highlights part 19 |
Patent application number | Title | Published |
20120153452 | Double-Sided Semiconductor Device and Method of Forming Top-Side and Bottom-Side Interconnect Structures - A semiconductor device is made by forming a first active device on a first side of a semiconductor wafer. A first insulating layer is formed over the first side of the wafer. A first conductive layer is formed over the first insulating layer. A first interconnect structure is formed over the first insulating layer and first conductive layer. A temporary carrier is mounted to the first interconnect structure. A second active device is formed on a second side of the semiconductor wafer. A second insulating layer is formed over the second side of the wafer. A second conductive layer is formed over the second insulating layer. A second interconnect structure is formed over the second insulating layer and second conductive layer. The temporary carrier is removed, leaving a double-sided semiconductor device. The double-sided semiconductor device is enclosed in a package with the first and second interconnect structures electrically connected. | 2012-06-21 |
20120153453 | METALLIC THERMAL JOINT FOR HIGH POWER DENSITY CHIPS - A method for the assembly of a semiconductor package that includes cleaning a surface of a chip and a surface of a heat removal device by reverse sputtering is given. The method includes sequentially coating the surface of the chip and the surface of the heat removal device with an adhesive layer, a barrier layer, and a protective layer over a target joining area. The chip and the heat removal device are placed into carrier fixtures and preheated to a target temperature. Then a metallic thermal interface material (TIM) preform is mechanically rolled onto the surface of the chip and the first and the second carrier fixtures are attached together such that the metallic TIM layer on the surface of the chip is joined to the coated surface of the heat removal device through a fluxless process. The method includes heating the joined carrier fixtures in a reflow oven. | 2012-06-21 |
20120153454 | SEMICONDUCTOR DEVICE - A semiconductor device including a silicon substrate, a plurality of silicon nanowire clusters, a first circuit layer and a second circuit layer. The silicon substrate has a first surface, a second surface opposite to the first surface and a plurality of through holes. The silicon nanowire clusters are disposed in the through holes of the silicon substrate, respectively. The first circuit layer is disposed on the first surface and connected to the silicon nanowire clusters. The second circuit layer is disposed on the second surface and connected to the silicon nanowire clusters. | 2012-06-21 |
20120153455 | SEMICONDUCTOR DEVICE, COOLING DEVICE, AND COOILNG DEVICE FABRICATION METHOD - A semiconductor device includes a semiconductor chip having an electric circuit; and a cooling device including at least one channel serving as a flow path through which coolant flows, an external surface including projections, and a metallic layer formed over the external surface including the projections. In the semiconductor device, the projections of the external surface of the cooling device are brought into contact with a first surface of the semiconductor chip via the metallic layer such that the semiconductor chip is cooled by allowing the coolant to flow through the channel formed in the cooling device. | 2012-06-21 |
20120153456 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device is manufactured by etching a semiconductor substrate including an active region, forming a bit line contact hole from which the active region is protruded, forming a first spacer exposing a top of the active region at each of an inner wall and a bottom of the bit line contact hole, forming a bit line contact plug and a bit line over the exposed active region, and forming a second spacer over the semiconductor substrate including not only the bit line contact plug but also the bit line. | 2012-06-21 |
20120153457 | SEMICONDUCTOR PACKAGE MANUFACTURING METHOD AND SEMICONDUCTOR PACKAGE - According to one embodiment, there is provided a semiconductor package manufacturing method utilizing a support body in which a first layer is stacked on a second layer, the method including: a first step of forming an opening in the first layer to expose the second layer therethrough; a second step of arranging a semiconductor chip on the second layer through the opening; a third step of forming a resin portion on the first layer to cover the semiconductor chip; and a fourth step of forming a wiring structure on the resin portion so as to be electrically connected to the semiconductor chip. | 2012-06-21 |
20120153458 | IC DEVICE HAVING ELECTROMIGRATION RESISTANT FEED LINE STRUCTURES - An integrated circuit (IC) device includes an electromigration resistant feed line. The IC device includes a substrate including active circuitry. A back end of the line (BEOL) metallization stack includes an interconnect metal layer that is coupled to a bond pad by the EM resistant feed line. A bonding feature is on the bond pad. The feed line includes a uniform portion and patterned trace portion that extends to the bond pad which includes at least three sub-traces that are electrically in parallel. The sub-traces are sized so that a number of squares associated with each of the sub-traces are within a range of a mean number of squares for the sub-traces plus or minus twenty percent or a current density provided to the bonding feature through each sub-trace is within a range of a mean current density provided to the bonding feature plus or minus twenty percent. | 2012-06-21 |
20120153459 | METHOD FOR CHIP SCALE PACKAGE AND PACKAGE STRUCTURE THEREOF - This invention provides a method for chip scale package and a chip scale package structure. The chip scale package structure includes: a semiconductor substrate, on which sets a plurality of contact bonding pads being connected with semiconductor devices; and a plurality of bumps respectively attached to all of the contact bonding pads. The semiconductor substrate is divided into several regions according to different distances from a central point. The contact bonding pads and the bumps in the region which is closest to the central point are the smallest, while the contact bonding pads and the bumps in the region which is farthest to the central point are the largest. The invention effectively improves the situation that the bumps at the edge tend to flake off easily; in addition, it avoids short-circuit caused by bridging between the bumps. | 2012-06-21 |
20120153460 | BUMP STRUCTURE AND MANUFACTURING METHOD THEREOF - A manufacturing method of a bump structure is provided. A substrate having at least one pad and a passivation layer is provided. The passivation layer has at least one first opening exposing the pad. An insulating layer is formed on the passivation layer. The insulating layer has at least one second opening located above the first opening. A metal layer is formed on the insulating layer. The metal layer electrically connects the pad through the first and second openings. A first bump is formed in the first and second openings. A second bump is formed on the first bump and a portion of the metal layer. The metal layer not covered by the second bump is partially removed by using the second bump as a mask, so as to form at least one UBM layer. The first bump is completely covered by the UBM layer and the second bump. | 2012-06-21 |
20120153461 | SEMICONDUCTOR COMPONENT, SEMICONDUCTOR WAFER COMPONENT, MANUFACTURING METHOD OF SEMICONDUCTOR COMPONENT, AND MANUFACTURING METHOD OF JOINING STRUCTURE - A semiconductor component of the present invention includes a semiconductor element and a joining layer formed on one surface of the semiconductor element and consisting of a joining material containing Bi as an essential ingredient, and projecting sections are formed on a surface of the joining layer on a side opposite to a surface in contact with the semiconductor element. By joining the semiconductor component to an electrode arranged so as to face the joining layer, the generation of a void can be suppressed. | 2012-06-21 |
20120153462 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A semiconductor device includes a semiconductor element; a pad electrode that is formed on the semiconductor element; an alignment mark that is formed on the semiconductor element; a connection electrode that is formed on the pad electrode; and an underfill resin that is formed to cover the connection electrode. The height of the alignment mark from the semiconductor element is greater than that of the connection electrode. | 2012-06-21 |
20120153463 | MULTILAYER WIRING SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - To provide a multilayer wiring substrate in which the connection reliability of via conductors is enhanced, via holes are formed in a resin interlayer insulation layer which isolates a lower conductor layer from an upper conductor layer, and via conductors are formed in the via holes for connecting the lower conductor layer and the upper conductor layer. The surface of the resin interlayer insulation layer is a rough surface, and the via holes open at the rough surface of the resin interlayer insulation layer. Stepped portions are formed in opening verge regions around the via holes such that the stepped portions are recessed from peripheral regions around the opening verge regions. The stepped portions are higher in surface roughness than the peripheral regions. | 2012-06-21 |
20120153464 | LOCALIZED ALLOYING FOR IMPROVED BOND RELIABILITY - Methods of forming gold-aluminum electrical interconnects are described. The method may include interposing a diffusion retardant layer between the gold and the aluminum, the diffusion retardant layer including regions containing and regions substantially devoid of a diffusion retardant material; bringing into contact the diffusion retardant layer, the gold, and the aluminum; forming alloys of gold and the diffusion retardant material in regions containing the material and forming gold-aluminum intermetallic compounds in regions substantially devoid of the material; and forming a continuous electrically conducting path between the aluminum and the gold. A structure for gold-aluminum interconnect is provided. The structure may include an aluminum alloy bond pad and a diffusion retardant layer in contact with the bond pad, the diffusion retardant layer including regions containing and regions substantially devoid of a diffusion retardant material. The structure may include a gold free air ball in contact with the diffusion retardant layer. | 2012-06-21 |
20120153465 | PACKAGE STRUCTURE - The invention discloses a package structure including a semiconductor device, a first protection layer, a second protection layer and at least one conductive bump. The semiconductor device has at least one pad. The first protection layer is disposed on the semiconductor device and exposes the pad. The second protection layer, disposed on the first protection layer, has at least one first opening and at least one second opening. The first opening exposes a partial surface of the pad. The second opening exposes a partial surface of the first protection layer. The conductive bump, opposite to the pad, is disposed on the second protection layer and coupled to the pad through the first openings. | 2012-06-21 |
20120153466 | PACKAGE STRUCTURE - A package structure including a first semiconductor element, a second semiconductor element, a semiconductor interposer and a substrate is provided. The first semiconductor element includes multiple first conductive bumps. The second semiconductor element includes multiple second conductive bumps. The semiconductor interposer includes a connection motherboard, at least one signal wire and at least one signal conductive column. The signal wire is disposed on the connection motherboard. The two ends of the signal wire are electrically connected to one of the first conductive bumps and one of the second conductive bumps respectively. The signal conductive column is electrically connected to the signal wire. The substrate is electrically connected to the signal conductive column. The first and the second semiconductor elements have the same circuit structure. The substrate of the package structure can simultaneously form a signal communication path with the first and the second semiconductor element respectively. | 2012-06-21 |
20120153467 | Semiconductor Device and Method of Forming Thin Profile WLCSP with Vertical Interconnect over Package Footprint - A semiconductor wafer has a plurality of first semiconductor die. A second semiconductor die is mounted to the first semiconductor die. The active surface of the first semiconductor die is oriented toward an active surface of the second semiconductor die. An encapsulant is deposited over the first and second semiconductor die. A portion of a back surface of the second semiconductor die opposite the active surface is removed. Conductive pillars are formed around the second semiconductor die. TSVs can be formed through the first semiconductor die. An interconnect structure is formed over the back surface of the second semiconductor die, encapsulant, and conductive pillars. The interconnect structure is electrically connected to the conductive pillars. A portion of a back surface of the first semiconductor die opposite the active surface is removed. A heat sink or shielding layer can be formed over the back surface of the first semiconductor die. | 2012-06-21 |
20120153468 | Elimination of RDL Using Tape Base Flip Chip on Flex for Die Stacking - A flexible film interposer for stacking a flip chip semiconductor die onto a second (bottom) semiconductor die, semiconductor devices and stacked die assemblies that incorporate the flexible film interposer, and methods of fabricating the devices and assemblies are provided. The incorporation of the flexible film interposer achieves densely packaged semiconductor devices, without the need for a redistribution layer (RDL). | 2012-06-21 |
20120153469 | MICRO ELECTRONIC MECHANICAL SYSTEM STRUCTURE - A micro electronic mechanical system structure and a manufacturing method thereof are provided. A substrate has a plurality of conductive regions is provided. A dielectric layer is formed on the substrate. A plurality of openings and recesses are formed in the dielectric layer, wherein the openings expose the conductive regions. The recesses are located between the openings. A conductive layer is formed on the dielectric layer and the openings and the recesses are filled with the conductive layer. The conductive layer is patterned to form a plurality of strips of the first conductive patterns on the dielectric layer and a second conductive pattern on the sidewall and the bottom of each recess, wherein the first conductive patterns are connected with each other through the second conductive patterns. The dielectric layer is removed. The second conductive patterns between the first conductive patterns are removed. | 2012-06-21 |
20120153470 | BGA PACKAGE STRUCTURE AND METHOD FOR FABRICATING THE SAME - A BGA package structure and a method for fabricating the same, wherein the BGA package structure comprises: a substrate having a first surface used to carry a chip and a second surface opposite to the first surface, wherein the substrate is divided into several regions according to different distances from a central point of the substrate; a plurality of contact bonding pads on the second surface electrically connected with the chip; and a plurality of bumps respectively attached to each of the contact bonding pads, wherein the contact bonding pads and bumps in a region which is closest to the central point are the smallest, while the contact bonding pads and bumps in a region which is farthest to the central point are the biggest. Therefore the situation that the bumps at the edge are liable to peel off may improved. | 2012-06-21 |
20120153471 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR PACKAGE - A semiconductor device according to the present embodiment includes a substrate including wirings. At least one first semiconductor chip is mounted on a first surface of the substrate and is electrically connected to any of the wirings. A first metal ball is provided on the first surface of the substrate and is electrically connected to the first semiconductor chip through any of the wirings. A first resin seals the wirings, the first semiconductor chip, and the first metal ball on the first surface of the substrate. A top of the first metal ball protrudes from a surface of the first resin and is exposed. | 2012-06-21 |
20120153472 | Semiconductor Device and Method of Providing Z-Interconnect Conductive Pillars with Inner Polymer Core - A semiconductor device is made by providing a sacrificial substrate and depositing an adhesive layer over the sacrificial substrate. A first conductive layer is formed over the adhesive layer. A polymer pillar is formed over the first conductive layer. A second conductive layer is formed over the polymer pillar to create a conductive pillar with inner polymer core. A semiconductor die or component is mounted over the substrate. An encapsulant is deposited over the semiconductor die or component and around the conductive pillar. A first interconnect structure is formed over a first side of the encapsulant. The first interconnect structure is electrically connected to the conductive pillar. The sacrificial substrate and adhesive layers are removed. A second interconnect structure is formed over a second side of the encapsulant opposite the first interconnect structure. The second interconnect structure is electrically connected to the conductive pillar. | 2012-06-21 |
20120153473 | LEAD PIN FOR PACKAGE SUBSTRATE AND SEMICONDUCTOR PACKAGE PRINTED CIRCUIT BOARD INCLUDING THE SAME - Disclosed herein is a lead pin for a package substrate including a connection pin, and a head part including a flange part formed at one end of the connection pin and having one surface bonded to the connection pin and a flat part formed at the other surface of the flange part and having at least one groove formed along an outer circumference thereof. According to the present invention, the grooves are formed along the outer circumference of the flat part of the head part of the lead pin to increase a bonding area, thereby making it possible to increase bonding strength of the lead pin. | 2012-06-21 |
20120153474 | INTEGRATED CIRCUIT SYSTEM WITH REDUCED POLYSILICON RESIDUE AND METHOD OF MANUFACTURE THEREOF - A method of manufacturing an integrated circuit system includes: providing a substrate; forming a polysilicon layer over the substrate; forming an anti-reflective coating layer over the polysilicon layer; etching an anti-reflective coating pattern into the anti-reflective coating layer leaving an anti-reflective coating residue over the polysilicon layer; and etching the anti-reflective coating residue with an etchant gas mixture comprising hydrogen bromide, chlorine, and oxygen to remove the anti-reflective coating residue for mitigating the formation of a polysilicon protrusion. | 2012-06-21 |
20120153475 | METHOD OF ASSEMBLING TWO INTEGRATED CIRCUITS AND CORRESPONDING STRUCTURE - A semiconductor device includes an assembly of two integrated circuits. The assembly has a layer of photoresist filling the space between the two integrated circuits, and at least one electrically conducting pillar within the resist and electrically coupling the two integrated circuits. | 2012-06-21 |
20120153476 | ETCHED WAFERS AND METHODS OF FORMING THE SAME - Etched wafers and methods of forming the same are disclosed. In one embodiment, a method of etching a wafer is provided. The method includes forming a metal hard mask on the wafer using electroless plating, patterning the metal hard mask, and etching a plurality of features on the wafer using an etcher. The plurality of featured are defined by the metal hard mask. | 2012-06-21 |
20120153477 | METHODS FOR METAL PLATING AND RELATED DEVICES - Methods for plating metal over features of a semiconductor wafer and devices that can be formed by these methods are disclosed. One such method includes forming a barrier layer over the substrate using electroless plating and forming a copper layer over the barrier layer. In some implementations, the semiconductor wafer is a GaAs wafer. Alternatively or additionally, the feature over which metal is plated can be a through-wafer via. In some implementations, a seed layer over the barrier layer can be formed using electroless plating. | 2012-06-21 |
20120153478 | LINER LAYERS FOR METAL INTERCONNECTS - Electrical interconnects for integrated circuits and methods of fabrication of interconnects are provided. Devices are provided comprising copper interconnects having metallic liner layers comprising silver and a second component, such as, lanthanum, titanium, tungsten, zirconium, antimony, or calcium. Methods include providing a substrate having a trench or via formed therein, forming a silver alloy layer, comprising silver and a second component selected from the group consisting of lanthanum, titanium, tungsten, zirconium, antimony, and calcium, onto surfaces of the feature, depositing a copper seed layer, and depositing copper into the feature. | 2012-06-21 |
20120153479 | Performance Enhancement in Metallization Systems of Microstructure Devices by Incorporating an Intermediate Barrier Layer - In metallization systems of complex semiconductor devices, an intermediate interface layer may be incorporated into the interconnect structures in order to provide superior electromigration performance. To this end, the deposition of the actual fill material may be interrupted at an appropriate stage and the interface layer may be formed, for instance, by deposition, surface treatment and the like, followed by the further deposition of the actual fill metal. In this manner, the grain size issue, in particular at lower portions of the scaled inter-connect features, may be addressed. | 2012-06-21 |
20120153480 | Metallization Systems of Semiconductor Devices Comprising a Copper/Silicon Compound as a Barrier Material - In sophisticated metallization systems of semiconductor devices, a sensitive core metal, such as copper, may be efficiently confined by a conductive barrier material comprising a copper/silicon compound, such as a copper silicide, which may provide superior electromigration behavior and higher electrical conductivity compared to conventionally used tantalum/tantalum nitride barrier systems. | 2012-06-21 |
20120153481 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device and a method for manufacturing the same are disclosed, which can prevent a short-circuit between a bit line contact plug and a storage node contact plug, resulting in improved semiconductor device characteristics. A method for manufacturing a semiconductor device includes: forming a bit line contact hole from which an active region is protruded, by etching a semiconductor substrate; forming a conductive material over the semiconductor substrate including the bit line contact hole; etching the conductive material to form a bit line contact plug and a bit line, each of which has a smaller width than the bit line contact hole; and forming a spacer insulation film over the entire surface of the semiconductor substrate including the bit line contact hole, the bit line contact plug, and the bit line. | 2012-06-21 |
20120153482 | STRUCTURE AND METHODS OF FORMING CONTACT STRUCTURES - A contact structure and a method of forming the contact structure. The structure includes: a silicide layer on and in direct physical contact with a top substrate surface of a substrate; an electrically insulating layer on the substrate; and an aluminum plug within the insulating layer. The aluminum plug has a thickness not exceeding 25 nanometers in a direction perpendicular to the top substrate surface. The aluminum plug extends from a top surface of the silicide layer to a top surface of the insulating layer. The aluminum plug is in direct physical contact with the top surface of the silicide layer and is in direct physical contact with the silicide layer. The method includes: forming the silicide layer on and in direct physical contact with the top substrate surface of the substrate; forming the electrically insulating layer on the substrate; and forming the aluminum plug within the insulating layer. | 2012-06-21 |
20120153483 | BARRIERLESS SINGLE-PHASE INTERCONNECT - A method of forming an interconnect structure and an integrated circuit including the interconnect structure. The method includes: depositing a dielectric layer over a conductive layer; forming an opening in the dielectric layer to expose the conductive layer; forming a barrierless single-phase interconnect comprising a metal or compound having a melting point between a melting point of copper and a melting point of tungsten. Forming includes depositing a layer of metal or compound within the opening and on an upper surface of the dielectric layer Preferably, the barrierless single-phase interconnect comprises cobalt or a cobalt containing compound. Thus, an interconnect structure, including a via and associated line, is made up of a single-phase metal or compound without the use of a different material between the interconnect and the underlying dielectric, thus improving electrical performance and reliability and further simplifying the interconnect formation process. | 2012-06-21 |
20120153484 | METHODS FOR DIRECTLY BONDING TOGETHER SEMICONDUCTOR STRUCTURES, AND BONDED SEMICONDUCTOR STRUCTURES FORMED USING SUCH METHODS - Embodiments of the present invention include methods of directly bonding together semiconductor structures. In some embodiments, a cap layer may be provided at an interface between directly bonded metal features of the semiconductor structures. In some embodiments, impurities are provided within the directly bonded metal features of the semiconductor structures. Bonded semiconductor structures are formed using such methods. | 2012-06-21 |
20120153485 | SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME - A device may includes a first conductive film, a first insulating film, a second conductive film, a third conductive film, and a fourth conductive film. The first conductive film includes copper. The first insulating film is disposed over the first conductive film. The first insulating film has a first contact hole. The contact hole reaches a first surface of the first conductive film. The second conductive film includes aluminum. The second conductive film is disposed in the first contact hole. The third conductive film includes titanium nitride. The third conductive film is disposed in the contact hole. The third conductive film covers a part of the first surface of the first conductive film. The fourth conductive film is free of titanium nitride. The fourth conductive film is disposed between the second and third conductive films. | 2012-06-21 |
20120153486 | SEMICONDUCTOR DEVICE AND PRODUCTION METHOD THEREFOR - An object of the invention is to provide a method for producing a conductive member having low electrical resistance, and the conductive member is obtained using a low-cost stable conductive material composition that does not contain an adhesive. In the semiconductor device, silver arranged on a semiconductor element and silver arranged on a base are bonded. No void is present or a small void, if any, is present at an interface between the semiconductor element and the silver arranged on the semiconductor element, no void is present or a small void, if any, is present at an interface between the base and the silver arranged on the base, and one or more silver abnormal growth grains and one or more voids are present in a bonded interface between the silver arranged on the semiconductor element and the silver arranged on the base. | 2012-06-21 |
20120153487 | SUBSTRATE FOR ELECTRON-BEAM DRAWING - A substrate for electron-beam drawing, characterized by including a base layer | 2012-06-21 |
20120153488 | SIMULTANEOUS WAFER BONDING AND INTERCONNECT JOINING - Disclosed are a microelectronic assembly of two elements and a method of forming same. A microelectronic element includes a major surface, and a dielectric layer and at least one bond pad exposed at the major surface. The microelectronic element may contain a plurality of active circuit elements. A first metal layer is deposited overlying the at least one bond pad and the dielectric layer. A second element having a second metal layer deposited thereon is provided, and the first metal layer is joined with the second metal layer. The assembly may be severed along dicing lanes into individual units each including a chip. | 2012-06-21 |
20120153489 | SEMICONDUCTOR PACKAGE HAVING PROXIMITY COMMUNICATION SIGNAL INPUT TERMINALS AND MANUFACTURING METHODS THEREOF - A semiconductor package includes a semiconductor structure. The semiconductor structure includes a plurality of dielectric layers and a plurality of conductive interconnects embedded in the semiconductor structure. The semiconductor structure also includes a plurality of proximity communication signal input terminals. At least one of the plurality of proximity communication signal input terminals includes a first electrode and a second electrode. The first electrode and the second electrode are spaced apart so as to be configured to provide proximity communication through capacitive coupling. The first electrode is exposed proximate to a surface of the semiconductor structure. | 2012-06-21 |
20120153490 | INTERCONNECTION STRUCTURE FOR AN INTEGRATED CIRCUIT - The disclosure relates to a method of fabricating an interconnection structure of an integrated circuit, comprising the steps of: forming a first conductive element within a first dielectric layer; depositing a first etch stop layer above the first conductive element and the first dielectric layer; forming an opening in the first etch stop layer above the first conductive element, to form a first connection area; depositing a second dielectric layer above the etch stop layer and above the first conductive element in the connection area; etching the second dielectric layer to form at least one hole which is at least partially aligned with the connection area; and filling the hole with a conductive material to form a second conductive element in electrical contact with the first conductive element. | 2012-06-21 |
20120153491 | SEMICONDUCTOR DEVICE - A first transistor group, a second transistor group, and an electrode pad are formed on a semiconductor substrate. A first protective film is formed so as to cover the semiconductor substrate except for an upper region of the electrode pad. The second protective film which generates a stress in a projecting direction is formed so as to cover the first protective film except for an upper region of the first transistor group. A transistor ability of the first transistor group is varied to be relatively higher due to a presence of the second protective film, based on a transistor ability of the second transistor group, as a reference. | 2012-06-21 |
20120153492 | METHOD OF FABRICATION OF THROUGH-SUBSTRATE VIAS - A method of manufacturing a through-substrate-via structure. The method comprises providing a substrate having a front-side and an opposite back-side. A through-substrate via opening is formed in the front-side of the substrate. The through-substrate-via opening does not penetrate an outer surface of the back-side of the substrate. The through-substrate-via opening is filled with a solid fill material. Portions of the substrate from the outer surface of the back-side of the substrate are removed to thereby expose the fill material. At least portions of the exposed fill material are removed to form a back-side through-substrate via opening that traverses an entire thickness of the substrate. The back-side through-substrate via opening is filled with an electrically conductive material. | 2012-06-21 |
20120153493 | EMBEDDED COMPONENT DEVICE AND MANUFACTURING METHODS THEREOF - An embedded component device includes an electronic component including an electrical contact, an upper patterned conductive layer, a dielectric layer between the upper patterned conductive layer and the electronic component, a first electrical interconnect, a lower patterned conductive layer, a conductive via, and a second electrical interconnect. The dielectric layer has a first opening exposing the electrical contact, and a second opening extending from the lower patterned conductive layer to the upper patterned conductive layer. The first electrical interconnect extends from the electrical contact to the upper patterned conductive layer, and fills the first opening. The second opening has an upper portion exposing the upper patterned conductive layer and a lower portion exposing the lower patterned conductive layer. The conductive via is located at the lower portion of the second opening. The second electrical interconnect fills the upper portion of the second opening. | 2012-06-21 |
20120153494 | FORMING DIE BACKSIDE COATING STRUCTURES WITH CORELESS PACKAGES - Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods may include attaching a patterned die backside film (DBF) on a backside of a die, wherein the patterned DBF comprises an opening surrounding at least one through silicon via (TSV) pad disposed on the backside of the die. | 2012-06-21 |
20120153495 | REDUCED PTH PAD FOR ENABLING CORE ROUTING AND SUBSTRATE LAYER COUNT REDUCTION - Embodiments are directed to semiconductor packaging having reduced sized plated through hole (PTH) pads by eliminating the margin of the pad-to-PTH alignment and enabling finer traces on the core of the substrate. | 2012-06-21 |
20120153496 | TSV FOR 3D PACKAGING OF SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF - The present invention relates to a through silicon via (TSV) for 3D packaging to integrate a semiconductor device and a method for manufacturing the same, and more particularly, to a through silicon via (TSV) for 3D packaging of a semiconductor device that is capable of improving production efficiency, having very high electric conductivity, and minimizing electrical signal delay, without using a carrier wafer by self-aligning substrates in a low temperature state and sequentially bonding a plurality of semiconductor dies (or semiconductor chips), and a method of manufacturing the same. | 2012-06-21 |
20120153497 | INTEGRATED CIRCUIT HAVING A THREE DIMENSIONAL STACK PACKAGE STRUCTURE - An integrated circuit includes a first semiconductor chip including a plurality of first through chip vias for a first voltage and a plurality of second through chip vias for a second voltage inserted in vertical direction. A second semiconductor chip is stacked over the first semiconductor chip, and includes the plurality of first through chip vias and the plurality of second through chip vias. The plurality of first connection pads is configured to couple the first semiconductor chip to the second semiconductor chip, by coupling the corresponding first through chip vias. The plurality of second connection pads is configured to couple the first semiconductor chip to the second semiconductor chip, by coupling the corresponding second through chip vias. A first conductive line is configured to couple the plurality of first connection pads to each other, and a second conductive line is configured to couple the plurality of second connection pads to each other. An isolation layer is inserted between the first conductive line and the second conductive line. | 2012-06-21 |
20120153498 | Semiconductor Device and Method of Forming the Same - In a semiconductor device, an organic insulation pattern is disposed between first and second rerouting patterns. The organic insulation pattern may absorb the physical stress that occurs when the first and second rerouting patterns expand under heat. Since the organic insulation pattern is disposed between the first and second rerouting patterns, insulating properties can be increased relative to a semiconductor device in which a semiconductor pattern is disposed between rerouting patterns. Also, since a seed layer pattern is disposed between the first and second rerouting patterns and the organic insulation pattern and between the substrate and the organic insulation pattern, the adhesive strength of the first and second rerouting patterns is enhanced. This also reduces any issues with delamination. Also, the seed layer pattern prevents the metal that forms the rerouting pattern from being diffused to the organic insulation pattern. Therefore, a semiconductor device with enhanced reliability may be implemented. | 2012-06-21 |
20120153499 | SEMICONDUCTOR PACKAGE AND PACKAGE ON PACKAGE HAVING THE SAME - A semiconductor package and a package on package are provided. The semiconductor package includes a substrate; a semiconductor chip attached to a surface of the substrate; connecting conductors disposed on the surface of the substrate; a mold formed on the substrate and in which the connecting conductors and the semiconductor chip are provided; and connecting via holes extending through the mold and exposing the connecting conductors. With respect to a first connecting via hole of the connecting via holes, a planar distance between a first connecting conductor exposed by the first connecting via hole and an entrance of the first connecting via hole is not uniform. | 2012-06-21 |
20120153500 | SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES - A semiconductor device comprises a top surface having a first contact, a bottom surface having a second contact, a via hole penetrating a substrate, an insulation layer structure on a sidewall of the via hole, the insulation layer structure having an air gap therein, a through electrode having an upper surface and a lower surface on the insulation layer structure, the through electrode filling the via hole and the lower surface being the second contact, and a metal wiring electrically connected to the upper surface of the through electrode and electrically connected to the first contact. | 2012-06-21 |
20120153501 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - In a semiconductor device in which the semiconductor chip including the external terminal(s) is embedded in an insulating layer and interconnect conductor(s) is (are) formed on the insulating layer, base hole(s) is (are) formed at position(s) of the insulating layer corresponding to the external terminal(s) in a state where the semiconductor chip has shrunk after having been embedded in the insulating layer. The interconnect conductor(s) is (are) electrically connected to the external terminal(s) through the base hole(s). | 2012-06-21 |
20120153502 | STRUCTURES COMPRISING PLANAR ELECTRONIC DEVICES - A method of manufacturing a structure comprising substantially planar electronic devices comprises providing an active material layer having a plurality of insulative features formed therein. The features at least partly inhibit electrical current flow and define at least a first substantially planar electronic device in the layer having at least first and second terminals comprising an area of the active material layer. A patterned dielectric layer having an exposed surface patterned with at least a first depression arranged over the first terminal is formed over the active material layer. Dielectric material is removed from at least a base of the first depression to expose a first terminal surface and form a hole through the dielectric material to the first terminal. The hole is at least partly filled with electrically conductive material to form an electrical connection to the first terminal. Corresponding structures and electrical circuits are also described and claimed. | 2012-06-21 |
20120153503 | CREATION OF VIAS AND TRENCHES WITH DIFFERENT DEPTHS - Embodiments of the invention provide a method of creating vias and trenches with different length. The method includes depositing a plurality of dielectric layers on top of a semiconductor structure with the plurality of dielectric layers being separated by at least one etch-stop layer; creating multiple openings from a top surface of the plurality of dielectric layers down into the plurality of dielectric layers by a non-selective etching process, wherein at least one of the multiple openings has a depth below the etch-step layer; and continuing etching the multiple openings by a selective etching process until one or more openings of the multiple openings that are above the etch-stop layer reach and expose the etch-stop layer. Semiconductor structures made thereby are also provided. | 2012-06-21 |
20120153504 | MICROELECTRONIC PACKAGE AND METHOD OF MANUFACTURING SAME - A microelectronic package includes a substrate ( | 2012-06-21 |
20120153505 | Semiconductor Device and Method of Forming Thin Profile WLCSP with Vertical Interconnect over Package Footprint - A semiconductor wafer has a plurality of first semiconductor die. A second semiconductor die is mounted to the first semiconductor die. The active surface of the first semiconductor die is oriented toward an active surface of the second semiconductor die. An encapsulant is deposited over the first and second semiconductor die. A portion of a back surface of the second semiconductor die opposite the active surface is removed. Conductive pillars are formed around the second semiconductor die. TSVs can be formed through the first semiconductor die. An interconnect structure is formed over the back surface of the second semiconductor die, encapsulant, and conductive pillars. The interconnect structure is electrically connected to the conductive pillars. A portion of a back surface of the first semiconductor die opposite the active surface is removed. A heat sink or shielding layer can be formed over the back surface of the first semiconductor die. | 2012-06-21 |
20120153506 | WIRING SUBSTRATE AND SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A wiring substrate includes a plurality of connection pads, and a protection insulating layer in which opening portion exposing said plurality of connection pads collectively is provided, wherein a notched opening portion is provided to a sidewall of the opening portion of the protection insulating layer in area between said plurality of connection pads. When a semiconductor chip is flip-chip connected to the connection pads by the prior sealing technology, a void occurring in the sealing resin is trapped in the notched opening portion. | 2012-06-21 |
20120153507 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A method include disposing a semiconductor chip having an electrode pad formed on a circuit forming surface on one surface of a support so that the electrode pad contacts with the one surface of the support, forming a first insulating layer on the one surface of the support so that the first insulating layer covers at least a side surface of the semiconductor chip, removing the support and forming an interconnection terminal on the electrode pad, forming a second insulating layer on the circuit forming surface of the semiconductor chip and the first insulating layer so that the second insulating layer covers the interconnection terminal, exposing an end portion of the interconnection terminal from a top surface of the second insulating layer, and forming a wiring pattern that is electrically connected to the end portion of the interconnection terminal, on the top surface of the second insulating layer. | 2012-06-21 |
20120153508 | THERMOSETTING DIE-BONDING FILM - An object of the present invention is to provide a thermosetting die-bonding film having both storage modulus and high adhering strength that are necessary in manufacturing a semiconductor device and to provide a dicing die-bonding film including the thermosetting die-bonding film. The thermosetting die-bonding film of the present invention is a thermosetting die-bonding film that is used in manufacture of a semiconductor device and includes at least an epoxy resin, a phenol resin, an acrylic copolymer, and a filler, has a storage modulus at 80 to 140° C. before thermal curing in a range of 10 kPa to 10 MPa and a storage modulus at 175° C. before thermal curing in a range of 0.1 to 3 MPa. | 2012-06-21 |
20120153509 | SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREFOR - According to one embodiment, there is provided a semiconductor package including: a semiconductor chip; a resin portion formed to cover the semiconductor chip; a wiring structure formed on the resin portion and electrically connected to the semiconductor chip; and a warpage preventing member provided above the resin portion to have a thermal expansion coefficient closer to that of the semiconductor chip than to that of the wiring structure. | 2012-06-21 |
20120153510 | SEMICONDUCTOR DEVICE, AND METHOD FOR SUPPLYING ELECTRIC POWER TO SAME - Disclosed is a liquid crystal driver having a plurality of output cells ( | 2012-06-21 |
20120153511 | HARDMASK COMPOSITION AND METHOD OF FORMING PATTERNS AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE INCLUDING THE PATTERNS - A hard mask composition includes a solvent and an aromatic ring-containing compound represented by the following Chemical Formula 1: | 2012-06-21 |
20120153512 | EPOXY RESIN COMPOSITION FOR SEMICONDUCTOR ENCAPSULATION AND SEMICONDUCTOR DEVICE OBTAINED USING THE SAME - The present invention relates to an epoxy resin composition for semiconductor encapsulation, including the following components (A) to (E):(A) an epoxy resin; (B) a phenol resin other than component (C); (C) a silane-modified phenol resin represented by Formula (1) as defined in the specification; (D) a curing accelerator; and (E) an inorganic filler; wherein the component (C) is contained in an amount of 0.8 to 30.0% by weight based on a total weight of organic components in the epoxy resin composition. | 2012-06-21 |
20120153513 | THERMOSETTING ENCAPSULATION ADHESIVE SHEET - A thermosetting encapsulation adhesive sheet which is used for encapsulating a chip type device ( | 2012-06-21 |
20120153514 | SYSTEMS AND METHODS FOR SEPARATING CONDENSABLE VAPORS FROM GASES BY DIRECT-CONTACT HEAT EXCHANGE - Condensable vapors such as carbon dioxide are separated from light gases in a process stream. The systems and methods employ a direct exchange heat exchanger to desublimate the condensable vapors from the process stream. The condensable vapors are condensed by directly contacting a heat exchange liquid in the direct contact heat exchanger while the uncondensed light gases from the process stream form a separated light-gas stream. The separated light-gas stream can be used in a recuperative heat exchanger to cool the process stream. | 2012-06-21 |
20120153515 | DIE STAMPER ASSEMBLY, INJECTION COMPRESSION MOULDING APPARATUS AND METHOD OF MANUFACTURING OPTICAL DATA CARRIERS - A die stamper assembly comprises a first die part for holding a first stamper and a second die part for mounting a second stamper, the die parts cooperating to define a mould cavity. The first stamper is mounted at a boundary of the first die part and the second stamper is mounted at a boundary of the second die part. The die stamper assembly further comprises a venting ring configured around and moveable with respect to the first die part and defining an outer boundary of the mould cavity. A venting holder arranged for holding the circumference of the first stamper and positioned between the first die part and the venting ring to attach the first stamper on the first die part allows venting of air escaping from the mould cavity and prevents leaking of plastic material out of the mould cavity. | 2012-06-21 |
20120153516 | Production Method of Wafer Lens - The aim is to regulate thickness on the optical axis in the production of wafer lenses. Disclosed is a wafer lens production method that is equipped with a dispensing process for dropping resin onto a molding die ( | 2012-06-21 |
20120153517 | LENS STRUCTURE AND MANUFACTURING METHOD, AND THE MANUFACTURE OF SHAPED POLYMER ARTICLES - A method of manufacturing a shaped polymer device comprises forming a planar polymer layer over a substrate which has a lower coefficient of thermal expansion than the polymer layer; and shaping the polymer layer using a laser ablation process. This method uses a substrate with low thermal expansion to limit the expansion of the attached polymer layer when it is being shaped by a laser ablation process. In addition there is provided a lens structure for an *autostereoscopic display device comprising a substantially planar glass substrate and a polymer layer defining a lenticular arrangement provided over the glass substrate. | 2012-06-21 |
20120153518 | Apparatus for Manufacturing Wafer Lens, Molding Die, And Method for Manufacturing Wafer Lens - An invention for producing a wafer lens is disclosed in which a cured resin is prevented from having projection portions or unfilled sections. The method comprises a dispense step in which resin is dropped onto a die having plural cavities arranged to leave spaces therebetween, an alignment step in which the positions of the die and a glass substrate are adjusted, an imprint step in which one of the die and the glass substrate is pressed against the other, a curing step in which the resin is cured, and a release step in which the glass substrate is released from the die, the steps from the dispense step to the separation step being repeated as one cycle to successively form plastic lens portions on the glass substrate, wherein in the alignment step in each cycle, the cavities of the die are placed between the formed lens parts. | 2012-06-21 |
20120153519 | Method of Making a Soft Gel Capsule Comprising CoQ-10 Solubilized in a Monoterpene - The present invention is directed to compositions and methods of delivery of CoQ-10 solubilized in monoterpenes. Use of monoterpenes as dissolving agents, greatly effects the ability to incorporate greater amounts of bioactive CoQ-10 in formulations, such as soft gel capsules. | 2012-06-21 |
20120153520 | NEW-TYPE CHITOSAN-BASED HYBRID MACROMOLECULE AND A METHOD FOR PRODUCING OR USING THE MACROMOLECULE - The invention discloses the synthesis of a new-type chitosan-based hybrid macromolecule and a method for producing or using the macromolecule. This macromolecule comprises an amphiphatic chitosan and a silicon-based coupling agent that is anchored by a chemical bonding. The method for producing the hybrid macromolecule can be easily operated under ambient environment. The produced macromolecule can be self-assembled in an aqueous environment to form a nanocarrier, and has the ability to efficiently encapsulate drugs for a subsequent sustained release purpose. This self-assembled hybrid nanocarrier demonstrated features of excellent biocompatibility, drug loading ability and cellular uptake efficiency. | 2012-06-21 |
20120153521 | SPRAY-DRYING PROCESS - A process for preparing a spray-dried detergent powder having: (i) detersive surfactant; and (ii) other detergent ingredients; wherein the process has the steps of: (a) dosing an aqueous detergent slurry into a drop tank; (b) transferring the aqueous detergent slurry from the drop tank to a pipe, and transferring the aqueous detergent slurry along the pipe through at least one pump to a spray nozzle; (c) contacting a detergent ingredient to the aqueous detergent slurry in the pipe to form a mixture; (d) spraying the mixture through the spray nozzle into a spray-drying tower; and (e) spray-drying the mixture to form a spray-dried powder, wherein the ratio of (i) the volume of the pipe of step (b) in litres to (ii) the volume of the drop tank of step (a) in litres is less than 1:1. | 2012-06-21 |
20120153522 | POROUS CARBON SHEET AND PROCESS FOR PRODUCTION THEREOF - A porous carbon sheet obtained by binding separate carbon short fibers with a carbonization product of a resin, wherein the pore mode diameter of the sheet is 45 to 90 μm and the mean fiber diameter of the carbon short fibers is 5 to 20 μm. The sheet can be produced by thermoforming a precursor fiber sheet comprising carbon short fibers of 15 to 30 g/m | 2012-06-21 |
20120153523 | PROCESS FOR PRODUCING LOW-DENSITY POLYURETHANE MOLDINGS - The present invention relates to a process for producing polyurethane foam moldings of density from 100 to 300 g/L, by mixing (a) organic polyisocyanates with (b) polyols, (c) with blowing agents comprising water, and optionally (d) with chain extenders and/or with crosslinking agents, (e) with catalysts, and (f) with other auxiliaries and/or additives, to give a reaction mix-ture, charging the material to a mold, and permitting it to react completely to give a polyurethane foam molding, where the free density of the polyurethane foam is from 90 to 200 g/L, and the mold has at least one device for controlling gauge pressure. The present invention further relates to a polyurethane foam molding obtainable by this type of process, and to the use of this type of polyurethane molding as shoe sole. | 2012-06-21 |
20120153524 | QUICK-CHANGE SYSTEM AND OPERATING METHOD FOR A CONTAINER PROCESSING MACHINE - In a quick-change system for exchangeable machine elements, particularly in a container processing machine in which the machine element (E) can be brought into a target position and can be localized in a target position by a securing unit comprising at least one securing element, at least a second securing unit (P | 2012-06-21 |
20120153525 | METHOD FOR MOLDING THREE-DIMENSIONAL FOAM PRODUCTS USING A CONTINUOUS FORMING APPARATUS - A continuous forming apparatus for molding foam material into foam products that includes a first endless belt and a second endless belt that cooperates with the first endless belt to mold the foam material. The continuous forming apparatus may also include a first plurality of cleats and a second plurality of cleats opposed to the first plurality of cleats that support the first endless belt and the second endless belt respectively. The first plurality of cleats may include a three-dimensional abutment surface that provides transverse and lateral support to the first endless belt. Additionally, the continuous forming apparatus may include a first frame disposed to support the first plurality of cleats, a second frame disposed to support the second plurality of cleats, and a drive mechanism for imparting motion to the first endless belt, the second endless belt, the first plurality of cleats, and the second plurality of cleats. | 2012-06-21 |
20120153526 | METHOD AND DEVICE FOR MANUFACTURING ARTIFICIAL STONE - The present invention relates to a method and device for manufacturing artificial stone. More specifically, the method includes the steps of: (a) mixing two or more kinds of chips having different grain sizes with a raw material for artificial stone; (b) injecting the raw material for artificial stone mixed with the chips into a mold; (c) applying primary vibration using a vibration device such that the raw material is uniformly dispersed in the mold; (d) applying vacuum to eliminate bubbles in the raw material; and (e) molding artificial stone by applying a secondary vibration using the vibration device. According to the method and device for manufacturing artificial stone of the present invention, the deposition rate of chips exposed at a surface of artificial stone is maximized, and thus the external appearance of artificial stone can be more naturally expressed and resistance against abrasion and staining can be improved. | 2012-06-21 |
20120153527 | PROCESS FOR MANUFACTURING A STAND-ALONE THIN FILM - A process for manufacturing stand-alone thin films is provided. The process includes providing a substrate, depositing a carbon-containing sacrificial layer onto the substrate and the depositing a thin film onto the carbon-containing sacrificial layer. Thereafter, the substrate, carbon-containing sacrificial layer and thin film structure are exposed to oxygen at an elevated temperature. The oxygen reacts with the carbon-containing sacrificial layer to produce carbon dioxide and remove carbon from the sacrificial layer, thereby generally burning away the sacrificial layer and affording for an intact stand-alone thin film to separate from the substrate. | 2012-06-21 |
20120153528 | APPARATUS FOR CARBON FIBER PROCESSING AND PITCH DENSIFICATION - A pitch densification apparatus may be used to form a carbon-carbon composite material. The apparatus may be used to compress a carbon fiber material, and, thereafter, pitch densify the carbon fiber material. The compression and pitch densification of the carbon fiber material may be carried out within the same mold cavity of the pitch densification apparatus. In one example, an apparatus may comprise a mold defining a mold cavity that is configured to receive a material to be densified. The mold cavity is configured to be adjusted from a first volume to a second volume less than the first volume to compress the material in the mold cavity. The example apparatus may further comprise a gas source configured to apply a gas pressure in the mold cavity to force pitch into the material in the mold cavity to densify the material, and a vacuum source configured to create a vacuum pressure in the mold cavity at least prior to the application of the gas pressure. | 2012-06-21 |
20120153529 | Method for Producing Planar Products from Silicone Rubber - The invention relates to a method for producing planar products from silicone rubber having a porous structure. For simplified processing and a uniform pore structure, the method is characterized in that a microbead/silicone oil mixture made of microbeads and silicone oil in a weight ratio of 10:1 to 1:10 is produced, a silicone rubber mixture having the customary mixture components is produced, the microbead/silicone oil is mixed into the silicone rubber mixture on a roller, the silicone rubber mixture is calendered into webs and the webs are vulcanized. | 2012-06-21 |
20120153530 | EXTRUSION HEAD ASSEMBLY AND RELATED METHODS - An improved extrusion head assembly is provided. One embodiment of the head assembly includes a pipe and profile co-extrusion head assembly with an integrated co-extrusion adapter. Another embodiment includes a double compression extrusion head for pipe extrusion. Still another embodiment includes a precision adjustment adapter for mounting a die/bushing to extrusion head assembly | 2012-06-21 |
20120153531 | FORMING PROCESSES USING MAGNETORHEOLOGICAL FLUID TOOLING - A method for forming a part with a tooling assembly includes forming an MRF bladder located within the tooling assembly into a desired shape, then placing the part in the tooling assembly, and forming the part with the tooling assembly by applying pressure until the part obtains the desired shape from the MRF bladder. | 2012-06-21 |
20120153532 | PLASTIC MOLDING MATERIAL AND METHOD FOR PRODUCING IT - A plastic molding material contains at least one filler and a polymer resin, selected from the group made up of cyanate ester resins, epoxy novolac resins, multifunctional epoxy resins, bismaleimide resins and their mixtures. The proportion of filler in the plastic molding material is in the range of 65 to 92 wt. %, with reference to the overall mass of the plastic molding material. | 2012-06-21 |
20120153533 | FLEXIBLE SEAM JOINT FOR USE IN ROBOTIC SKIN - A method for fabricating a product, such as an animatronic character, with artificial skin. The method includes providing a mold assembly with an exterior mold and a core. In the mold assembly, a cavity is formed between inner surfaces of the exterior mold and exterior surfaces of the core that defines the skin system. The mold assembly includes a seam-forming wall extending between the inner and exterior surfaces. The method includes inserting an elongate, tubular guide through holes in the seam-forming wall and pouring an elastomeric material into the mold to occupy the cavity between the exterior mold and the interior core. The method includes, after the material has hardened to form the skin system, cutting a seam in the skin system by cutting the material along the seam-forming wall. The tubular guide is separated into guide segments and a staggered joint is formed at the cut seam. | 2012-06-21 |
20120153534 | ADMINISTERING DEVICE WITH A MULTI-COMPONENT INJECTION-MOLDED HOUSING - Method of producing an administering device for infusing or injecting a product, whereby in order to mold a housing shell serving as a case for components of the administering device in a multi-component injection molding process at least one pre-molded, transparent insert part made from a first plastic material is inserted in an injection mold molded to a shape matching the shape of the housing shell, a dimensionally stable, curable second plastic material is injected into the injection mold around the insert part to render it watertight and an opening left free in the second plastic material is closed to render it watertight by injecting on an elastomeric third plastic material. | 2012-06-21 |
20120153535 | EXHAUST GAS SENSOR AND METHOD OF MANUFACTURE - A method of manufacturing an exhaust gas sensor that includes positioning at least a portion of a subassembly of the exhaust gas sensor in a mold fixture, overmolding at least a portion of the subassembly with a ceramic material, and removing the overmolded subassembly from the mold fixture. | 2012-06-21 |
20120153536 | PRE-DEFORMED THERMOPLASTICS SPRING AND METHOD OF MANUFACTURE - A thermoplastic spring and a method for manufacturing the thermoplastic spring are provided to reduce the effect of creep during use of the spring. The spring is molded and deformed to final dimensions by pre-inducing creep in the molded body. | 2012-06-21 |
20120153537 | LITHOGRAPHY SYSTEM AND LITHOGRAPHY METHOD - A lithography system includes at least two lithography apparatuses disposed on the same fixed base, each of which includes an object, a moving body, and a vibration isolation unit. A control unit configured to control the lithography apparatuses controls a vibration isolation unit included in a first lithography apparatus based on driving instruction information to be given to a moving body included in a second lithography apparatus, and a control indicator regarding vibration directed onto an object to be vibration-isolated included in the first lithography apparatus due to a moving operation of the moving body. | 2012-06-21 |
20120153538 | IMPRINT LITHOGRAPHY - A chuck apparatus for holding a substrate is the disclosed. The chuck apparatus includes a first surface portion on which the substrate is to be held and a second surface portion adjacent to the first surface portion and extending at least partially around an edge of the first surface portion and which, in use, is arranged to deflect gas over the first surface portion and thus the substrate that is to be held on the first surface portion. | 2012-06-21 |
20120153539 | Airfoil Manufacturing System - An apparatus and method for shaping an airfoil. A prepreg assembly is positioned relative to a part in a plurality of parts for a tool for the airfoil using a positioning section for a frame. The positioning section is configured to move relative to the tool and a base of the frame and move a number of parts in the plurality of parts for the tool relative to each other. A number of sections in the prepreg assembly are heated. A force is applied to the number of sections in the prepreg assembly that have been heated to conform to the tool to cause the number of sections in the prepreg assembly that have been heated to conform to the tool with a shape for a component of the airfoil. | 2012-06-21 |
20120153540 | DIE FOR MOLDING CVJ BOOT AND PROCESS FOR MOLDING THE SAME - A die for manufacturing CVJ boot by injection molding includes a central core, and a plurality of divisional molds for molding an inner peripheral surface of the CVJ boot, respectively. The divisional molds move diametrically toward the central core. Moreover, the divisional molds not only approach one another diametrically, but also get away from each other axially. | 2012-06-21 |
20120153541 | MECHANISM FOR A WRITING IMPLEMENT, A WRITING IMPLEMENT INCLUDING SUCH A MECHANISM, AND A METHOD OF MANUFACTURE - A method of manufacturing a writing implement mechanism that includes a tubular element. The tubular element has a central axis and includes a first wall and a second wall which are fixed relative to each other. The second wall is offset towards the central axis relative to the first wall in a direction that is radial relative to the central axis. The first wall presents a first edge and the second wall presents a second edge. The first and second edges define a guide extending longitudinally between a first end and a second end in a direction that is inclined relative to the central axis. The method includes the steps of supplying at least two half-shells adapted to form the first edge and outside portions of the walls. | 2012-06-21 |
20120153542 | RESIN FILM AND METHOD FOR PRODUCING IT, POLARIZER AND LIQUID CRYSTAL DISPLAY DEVICE - A resin film including a resin and an organic acid represented by the following formula (1), wherein the ratio of the organic acid to the resin is from 0.1 to 20% by mass: | 2012-06-21 |
20120153543 | Lithographic Apparatus and Device Manufacturing Method - A lithography apparatus comprises a projection system arranged to transfer a pattern from a patterning device onto a substrate, a carrier, and a drive system for moving the carrier relative to the projection system in a plane defined by reference to orthogonal axes X and Y. The drive system comprises a shuttle moving parallel to the Y-axis, a shuttle connector connecting the shuttle to the carrier, the shuttle connector allowing movement of the carrier in a direction parallel to the X-axis relative to the shuttle, and a shuttle driver for driving movement of the shuttle parallel to the Y-axis. The shuttle is located to one side of the carrier in a direction parallel to the X-axis and it is desirable if only one of the shuttle is connected to the carrier. | 2012-06-21 |
20120153544 | Melt Processable Poly (Vinyl Alcohol) Blends and Poly (Vinyl Alcohol) Based Membranes - Technologies and implementations for providing melt processable poly(vinyl alcohol) blends and poly(vinyl alcohol) based membranes are generally disclosed. | 2012-06-21 |
20120153545 | BASE MOULD LIFT DAMPING - A device for forming containers and a method for damped closing of a mould carrier unit and a base mould carrier of a blow mould for forming containers, includes at least one mould carrier unit for holding blow mould parts and a base mould carrier for holding a base mould and a base mould carrier lift device for moving the base mould carrier in conjunction with the movement of the mould carrier unit. The mould carrier unit has at least two mould carriers which surround the container to be processed at least during a moulding process. The base mould carrier covers a base area of the container to be treated. The base mould carrier lift device includes at least one first damping element for damping and limiting the vertical movement of the base mould carrier in relation to the mould carrier unit. | 2012-06-21 |
20120153546 | METHOD OF DEBULKING A FIBER PREFORM - A method of debulking a fiber preform includes debulking a three-dimensional fiber preform from a first size to a second, smaller size. A solvent may be infiltrated into the preform to distribute a tackifier material therein. The solvent is then removed and the dried preform is compressed to the smaller size such that, upon removal of the pressure, the tackifier material causes the preform to substantially remain at the smaller size. | 2012-06-21 |
20120153547 | CERAMIC PARTICULATE MATERIAL AND PROCESSES FOR FORMING SAME - Processes for forming ceramic particulate material. The ceramic particulate material includes alumina particles, the particles having a specific surface area (SSA) not less than 15 m | 2012-06-21 |
20120153548 | NOVEL CERMETS FROM MOLTEN METAL INFILTRATION PROCESSING - New cermets with improved properties and applications are provided. These new cermets have lower density and/or higher hardness than B4C cermet. By incorporating other new ceramics into B4C powders or as a substitute for B4C, lower densities and/or higher hardness cermets result. The ceramic powders have much finer particle size than those previously used which significantly reduces grain size of the cermet microstructure and improves the cermet properties. | 2012-06-21 |
20120153549 | Process for Producing Shaped Metal Bodies Having a Structured Surface - The present invention relates to a process for producing shaped metal bodies having a structured surface which can be used as joining elements in the “friction spot joining” process described in the EP application 09015014.5. The shaped metal bodies are produced by means of MIM technology, and are deformed further in the green state or in the brown state after injection moulding to give the desired components. | 2012-06-21 |
20120153550 | BUMPER FOR AIR SPRING - An air suspension system includes a plastic or metal piston fixed to the vehicle axle and an elastomeric bellows which is air tightly vulcanized from its lower open end to the upper part of the piston and from its upper open end to the metal plate fixed to the vehicle chassis to form a pressured air chamber and a single-piece bottom plate with bumper, which is completely made of reinforced plastic material. The air suspension system includes a compression part vulcanized to the elastomeric bellows and a bumper part absorbing the loads and which is mounted to the upper side of the piston after that it is vulcanized to the lower open end of the elastomeric bellows. | 2012-06-21 |
20120153551 | SUSPENSION DEVICE FOR VEHICLE SEATS AND/OR VEHICLE CABINS HAVING AN ELASTOMER MEMBER - The invention relates to a suspension device for vehicle seats and/or vehicle cabins for applying a spring force to a vibratory motion of a first component relative to a second component, preferably in the longitudinal and/or transverse direction of the vehicle, wherein at least one elongate spring member extending at least in the longitudinal and/or transverse direction of the vehicle is connected in at least one end region to the first component and in the central region thereof to the second component, wherein the elongate spring member is made from a flexible elastomer material that is formed to be rod-shaped. | 2012-06-21 |