25th week of 2021 patent applcation highlights part 77 |
Patent application number | Title | Published |
20210193485 | Fan-Out Structure and Method of Fabricating the Same | 2021-06-24 |
20210193486 | CLEANING METHOD, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND SUBSTRATE PROCESSING APPARATUS | 2021-06-24 |
20210193487 | Fluid Delivery System | 2021-06-24 |
20210193488 | ANNEALING DEVICES INCLUDING THERMAL HEATERS | 2021-06-24 |
20210193489 | Systems and Methods for Workpiece Processing | 2021-06-24 |
20210193490 | WAFER PROCESS MONITORING SYSTEM AND METHOD | 2021-06-24 |
20210193491 | SUBSTRATE TRANSFER APPARATUS | 2021-06-24 |
20210193492 | WAFER STORAGE DEVICE, CARRIER PLATE AND WAFER CASSETTE | 2021-06-24 |
20210193493 | WAFER OVERLAY MARKS, OVERLAY MEASUREMENT SYSTEMS, AND RELATED METHODS | 2021-06-24 |
20210193494 | SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING METHOD | 2021-06-24 |
20210193495 | PROCESS APPARATUS WITH ON-THE-FLY SUBSTRATE CENTERING | 2021-06-24 |
20210193496 | SUBSTRATE SUPPORT FEATURES AND METHOD OF APPLICATION | 2021-06-24 |
20210193497 | METHOD OF TRANSFERRING MICRO LED AND MICRO LED TRANSFERRING APPARATUS | 2021-06-24 |
20210193498 | 3D SEMICONDUCTOR DEVICE AND STRUCTURE | 2021-06-24 |
20210193499 | WORKPIECE HOLDING MECHANISM, PROCESS SYSTEM AND MANUFACTURING METHOD OF SEMICONDUCTOR STRUCTURE | 2021-06-24 |
20210193500 | TRANSFER STAMPS WITH MULTIPLE SEPARATE PEDESTALS | 2021-06-24 |
20210193501 | APPARATUS FOR PROCESSING SUBSTRATE | 2021-06-24 |
20210193502 | METHOD OF PROCESSING WAFER | 2021-06-24 |
20210193503 | SUBSTRATE PROCESSING APPARATUS AND STAGE | 2021-06-24 |
20210193504 | Buried Metal for FinFET Device and Method | 2021-06-24 |
20210193505 | DIELECTRIC CAPPING STRUCTURE OVERLYING A CONDUCTIVE STRUCTURE TO INCREASE STABILITY | 2021-06-24 |
20210193506 | BILAYER SEAL MATERIAL FOR AIR GAPS IN SEMICONDUCTOR DEVICES | 2021-06-24 |
20210193507 | TITANIUM-CONTAINING DIFFUSION BARRIER FOR CMP REMOVAL RATE ENHANCEMENT AND CONTAMINATION REDUCTION | 2021-06-24 |
20210193508 | METHOD OF FORMING MATERIAL FILM, INTEGRATED CIRCUIT DEVICE, AND METHOD OF MANUFACTURING THE INTEGRATED CIRCUIT DEVICE | 2021-06-24 |
20210193509 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME | 2021-06-24 |
20210193510 | METHODS OF SEMICONDUCTOR DEVICE PROCESSING | 2021-06-24 |
20210193511 | METHOD FOR MAKING SELF-ALIGNED BARRIER FOR METAL VIAS | 2021-06-24 |
20210193512 | Semiconductor Fabrication Method for Producing Nano-Scaled Electrically Conductive Lines | 2021-06-24 |
20210193513 | SELECTIVE DEPOSITION OF A PROTECTIVE LAYER TO REDUCE INTERCONNECT STRUCTURE CRITICAL DIMENSIONS | 2021-06-24 |
20210193514 | ALTERNATIVE INTEGRATION FOR REDISTRIBUTION LAYER PROCESS | 2021-06-24 |
20210193515 | SYSTEMS AND METHODS FOR COBALT METALIZATION | 2021-06-24 |
20210193516 | INTEGRATED CIRCUIT DEVICES AND METHOD OF MANUFACTURING THE SAME | 2021-06-24 |
20210193517 | Conductive Feature Formation and Structure Using Bottom-Up Filling Deposition | 2021-06-24 |
20210193518 | INORGANIC DIES WITH ORGANIC INTERCONNECT LAYERS AND RELATED STRUCTURES | 2021-06-24 |
20210193519 | INORGANIC DIES WITH ORGANIC INTERCONNECT LAYERS AND RELATED STRUCTURES | 2021-06-24 |
20210193520 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR APPARATUS | 2021-06-24 |
20210193521 | DEVICE CHIP MANUFACTURING METHOD | 2021-06-24 |
20210193522 | SEMICONDUCTOR PACKAGES WITHOUT DEBRIS | 2021-06-24 |
20210193523 | MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE | 2021-06-24 |
20210193524 | Method and System for Regulating Plasma Dicing Rates | 2021-06-24 |
20210193525 | SEMICONDUCTOR DEVICE AND TEST METHOD THEREOF | 2021-06-24 |
20210193526 | CONCURRENT MANUFACTURE OF FIELD EFFECT TRANSISTORS AND BIPOLAR JUNCTION TRANSISTORS WITH GAIN TUNING | 2021-06-24 |
20210193527 | TWO-STAGE TOP SOURCE DRAIN EPITAXY FORMATION FOR VERTICAL FIELD EFFECT TRANSISTORS ENABLING GATE LAST FORMATION | 2021-06-24 |
20210193528 | Residue-Free Metal Gate Cutting For Fin-Like Field Effect Transistor | 2021-06-24 |
20210193529 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE THEREBY FORMED | 2021-06-24 |
20210193530 | STRUCTURE FOR FRINGING CAPACITANCE CONTROL | 2021-06-24 |
20210193531 | SELF-ALIGNED STRUCTURE FOR SEMICONDUCTOR DEVICES | 2021-06-24 |
20210193532 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | 2021-06-24 |
20210193533 | SEMICONDUCTOR DEVICE, MANUFACTURING METHOD THEREOF, AND ELECTRONIC DEVICE INCLUDING THE DEVICE | 2021-06-24 |
20210193534 | SEMICONDUCTOR DEVICE AND METHODS OF MANUFACTURE | 2021-06-24 |
20210193535 | DUAL CRYSTAL ORIENTATION FOR SEMICONDUCTOR DEVICES | 2021-06-24 |
20210193536 | EVALUATING A HOLE FORMED IN AN INTERMEDIATE PRODUCT | 2021-06-24 |
20210193537 | METHOD AND MACHINE FOR EXAMINING WAFERS | 2021-06-24 |
20210193538 | SEMICONDUCTOR STRUCTURE AND METHOD OF FABRICATING THE SAME | 2021-06-24 |
20210193539 | SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES | 2021-06-24 |
20210193540 | SEMICONDUCTOR DEVICE | 2021-06-24 |
20210193541 | Component Carrier and Method of Manufacturing the Same | 2021-06-24 |
20210193542 | PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAME | 2021-06-24 |
20210193543 | METHODS, DEVICES, AND SYSTEMS FOR ELECTRONIC DEVICE MOLDING AND ENCAPSULATION | 2021-06-24 |
20210193544 | THREE-DIMENSIONAL INTEGRATED CIRCUIT STRUCTURES AND METHODS OF FORMING THE SAME | 2021-06-24 |
20210193545 | SEMICONDUCTOR PACKAGE STRUCTURE | 2021-06-24 |
20210193546 | PACKAGING OF A SEMICONDUCTOR DEVICE WITH DUAL SEALING MATERIALS | 2021-06-24 |
20210193547 | 3D BUILDUP OF THERMALLY CONDUCTIVE LAYERS TO RESOLVE DIE HEIGHT DIFFERENCES | 2021-06-24 |
20210193548 | STIM/LIQUID METAL FILLED LASER DRILL TRENCH TO IMPROVE COOLING OF STACKED BOTTOM DIE | 2021-06-24 |
20210193549 | PACKAGE WRAP-AROUND HEAT SPREADER | 2021-06-24 |
20210193550 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | 2021-06-24 |
20210193551 | SEMICONDUCTOR DEVICE ASSEMBLIES INCLUDING LOW-STRESS SPACER | 2021-06-24 |
20210193552 | THERMALLY CONDUCTIVE SLUGS/ACTIVE DIES TO IMPROVE COOLING OF STACKED BOTTOM DIES | 2021-06-24 |
20210193553 | THERMAL COOLING ELEMENT FOR MEMORY DEVICES OF A MEMORY SUB-SYSTEM | 2021-06-24 |
20210193554 | SEMICONDUCTOR MODULE HAVING A BASE PLATE WITH A CONCAVE CURVATURE | 2021-06-24 |
20210193555 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR PACKAGE HAVING THE SAME | 2021-06-24 |
20210193556 | SEMICONDUCTOR CHIP PACKAGE COMPRISING SUBSTRATE, SEMICONDUCTOR CHIP, AND LEADFRAME AND A METHOD FOR FABRICATING THE SAME | 2021-06-24 |
20210193557 | BACKING PLATE WITH MANUFACTURED FEATURES ON TOP SURFACE | 2021-06-24 |
20210193558 | TECHNOLOGIES FOR PROCESSOR LOADING MECHANISMS | 2021-06-24 |
20210193559 | SEMICONDUCTOR DEVICE WITH INTERCONNECT STRUCTURE AND METHOD FOR PREPARING THE SAME | 2021-06-24 |
20210193560 | Semiconductor Assembly with Conductive Frame for I/O Standoff and Thermal Dissipation | 2021-06-24 |
20210193561 | ELECTRONIC DEVICE PACKAGING WITH GALVANIC ISOLATION | 2021-06-24 |
20210193562 | Component Carrier With Embedded Interposer Laterally Between Electrically Conductive Structures of Stack | 2021-06-24 |
20210193563 | SUBSTRATE HAVING ELECTRONIC COMPONENT EMBEDDED THEREIN | 2021-06-24 |
20210193564 | OPTICAL ROUTING STRUCTURE ON BACKSIDE OF SUBSTRATE FOR PHOTONIC DEVICES | 2021-06-24 |
20210193565 | LOW RESISTANCE INTERCONNECT STRUCTURE FOR SEMICONDUCTOR DEVICE | 2021-06-24 |
20210193566 | CAPPING LAYER OVERLYING DIELECTRIC STRUCTURE TO INCREASE RELIABILITY | 2021-06-24 |
20210193567 | INTEGRATED BRIDGE FOR DIE-TO-DIE INTERCONNECTS | 2021-06-24 |
20210193568 | COMPARISON CIRCUIT INCLUDING INPUT SAMPLING CAPACITOR AND IMAGE SENSOR INCLUDING THE SAME | 2021-06-24 |
20210193569 | COMPACT TRANSISTOR UTILIZING SHIELD STRUCTURE ARRANGEMENT | 2021-06-24 |
20210193570 | MEMORY DEVICE INCLUDING DATA LINES ON MULTIPLE DEVICE LEVELS | 2021-06-24 |
20210193571 | CONDUCTIVE CONTACT STRUCTURES FOR ELECTROSTATIC DISCHARGE PROTECTION IN INTEGRATED CIRCUITS | 2021-06-24 |
20210193572 | Integrated Fan-Out Package with 3D Magnetic Core Inductor | 2021-06-24 |
20210193573 | METHODS OF FORMING A CONDUCTIVE CONTACT STRUCTURE TO AN EMBEDDED MEMORY DEVICE ON AN IC PRODUCT AND A CORRESPONDING IC PRODUCT | 2021-06-24 |
20210193574 | 3D NAND MEMORY DEVICE AND METHOD OF FORMING THE SAME | 2021-06-24 |
20210193575 | MANUFACTURING METHOD OF CONNECTION STRUCTURE OF SEMICONDUCTOR DEVICE | 2021-06-24 |
20210193576 | LOW RESISTANCE CONTACTS INCLUDING INTERMETALLIC ALLOY OF NICKEL, PLATINUM, TITANIUM, ALUMINUM AND TYPE IV SEMICONDUCTOR ELEMENTS | 2021-06-24 |
20210193577 | PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAME | 2021-06-24 |
20210193578 | SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME | 2021-06-24 |
20210193579 | EMBEDDED DIE ARCHITECTURE AND METHOD OF MAKING | 2021-06-24 |
20210193580 | SUBSTRATE HAVING ELECTRONIC COMPONENT EMBEDDED THEREIN | 2021-06-24 |
20210193581 | SEMICONDUCTOR PACKAGE | 2021-06-24 |
20210193582 | Integrated Circuit Package and Method | 2021-06-24 |
20210193583 | SEMICONDUCTOR PACKAGING WITH HIGH DENSITY INTERCONNECTS | 2021-06-24 |
20210193584 | METHODS OF FORMING A CONDUCTIVE CONTACT STRUCTURE TO AN EMBEDDED MEMORY DEVICE ON AN IC PRODUCT AND A CORRESPONDING IC PRODUCT | 2021-06-24 |