26th week of 2010 patent applcation highlights part 21 |
Patent application number | Title | Published |
20100164460 | APPARATUS FOR AUTO-REGULATING INPUT POWER SOURCE OF DRIVER - An apparatus for auto-regulating the input power source of a driver is provided. The apparatus includes a load detector and a controller. The load detector detects a load current and outputs a detection signal according to the load current. The controller is coupled to the load detector and receives the detection signal. The controller provides an operation voltage between a first voltage and a second voltage, wherein the first voltage is lower than the second voltage. The operation voltage is supplied to the driver and regulated flexibly according to different load demand. In the light loading, the device for auto-regulating the input power source can improve the use efficiency of electric power. | 2010-07-01 |
20100164461 | REFERENCE VOLTAGE GENERATION CIRCUIT - An object of the present invention is to generate a reference voltage that is stable in relation to manufacturing process variations, by matching the operating regions of the MOSFETs contributing to generation of the reference voltage. The reference voltage generation circuit | 2010-07-01 |
20100164462 | DC-DC CONVERTER PROVIDING SOFT-START FUNCTIONS - A DC-DC converter includes a switch circuit, a feedback circuit, an error amplifier, a soft-start circuit, and a signal modulation circuit. The switch circuit receives an input voltage and charges/discharges an inductor based on a switch control signal, thereby providing an output voltage. The feedback circuit provides a corresponding feedback voltage based on the output voltage. The error amplifier generates a comparing voltage based on the feedback voltage and a reference voltage. The soft-start circuit provides a ramp clamping voltage, which is outputted as the comparing voltage when the comparing voltage is larger than the ramp clamping voltage. The signal modulation circuit generates the switch control signal based on the comparing signal and a periodic signal. | 2010-07-01 |
20100164463 | VOLTAGE GENERATOR WITH CURRENT LIMITING AND SEMICONDUCTOR TESTING DEVICE - A voltage generator with current limiting generates a voltage to be fed to a load of which load current is limited. The voltage generator includes an operational amplifier; an output resistance connected between an output terminal of the operational amplifier and a load connecting terminal; a feedback resistor connected between the load connecting terminal and an inverting input terminal of the operational amplifier; a first clamper connected between the output terminal of the operational amplifier and the inverting input terminal of the operational amplifier; and a second clamper connected between the load connecting terminal and a non-inverting input terminal of the operational amplifier and configured with diodes. The first clamper generates a predetermined constant voltage, limits a current flowing into the output resistance, and varies the generated constant voltage. The first clamper has a predetermined abrupt current-voltage characteristic. | 2010-07-01 |
20100164464 | POWER DISTRIBUTOR AND SEMICONDUCTOR DEVICE HAVING THE SAME - A power distributor includes a large reservoir capacitor, a switch coupled between at least one power supply line and the large reservoir capacitor, and a controller configured to turn on or off the switch based on whether a circuit block connected to the power supply line is in operation or not. | 2010-07-01 |
20100164465 | LOW VOLTAGE BANDGAP REFERENCE CIRCUIT - A bandgap reference circuit provided for generating an output reference substantially independent of temperature and power includes a first reference signal generator, a first impedance, a second reference signal generator and a second impedance. The first reference signal generator can generate a first reference signal proportional to absolute temperature. The second reference signal generator generates a second reference signal complementary to absolute temperature according to the first reference signal. The second impedance, the serially-coupled first impedance and second reference signal generator, and the first reference signal generator are coupled in parallel between two nodes. The bandgap reference circuit outputs the output reference voltage through the two nodes. According to an embodiment of the invention, the bandgap reference circuit can be implemented by an additional circuit of lower complexity to obtain a lower reference voltage. | 2010-07-01 |
20100164466 | Reference Voltage Generation Circuit - A reference voltage generation circuit is disclosed. The reference voltage generation circuit includes an operational amplifier configured to output a constant voltage in accordance with reference voltages input to first and second terminals of the operational amplifier, and a start-up circuit configured to initiate operation of the operational amplifier when the start-up circuit switches from an idle mode to an active mode, including a first transistor having a gate connected to an output of the operational amplifier, a source connected to a supply voltage, and a drain connected to a resistor, configured to supply a reference current to the resistor in accordance with the operational amplifier output, thereby generating the reference voltage. | 2010-07-01 |
20100164467 | REFERENCE VOLTAGE GENERATION CIRCUIT - A reference voltage generation circuit includes an operational amplifier for outputting a constant voltage in accordance with reference voltages respectively input to an inverting terminal of the operational amplifier and a non-inverting terminal of the operational amplifier, and a start-up circuit for waking up the operational amplifier when the start-up circuit is switched from an idle mode to an active mode. The start-up circuit includes a first-type transistor having a gate connected to an output of the operational amplifier, a source connected to a supply voltage, and a drain connected to resistors, to supply a constant reference current to the resistors in accordance with an output voltage from the operational amplifier, thereby generating a band-gap output voltage. The resistors are connected in parallel to a stage, from which the band-gap output voltage is output, in order to generate a band-gap output voltage of about 0.6V. | 2010-07-01 |
20100164468 | Work Function Based Voltage Reference - A voltage reference is created from an operational amplifier circuit having two substantially identical P-channel metal oxide semiconductor (P-MOS) transistors with each one having a different gate dopant. The different gate dopants result in different threshold voltages for each of the two otherwise substantially identical P-MOS transistors. The difference between these two threshold voltages is then used to create the voltage reference equal to the difference. The two P-MOS transistors are configured as a differential pair in the operational amplifier circuit and the output of the operational amplifier is used as the voltage reference. | 2010-07-01 |
20100164469 | On-chip power management - The present disclosure teaches a power management device for providing one or more voltages and prohibiting the operation until the IC is initialized and voltage stability is achieved. The power management device includes a power regulator block and a masking block. The power regulator block includes one or more of the following elements: -a regulator, a bandgap reference generator, a low voltage detector LVDD, a low voltage detector LVDM, and a plurality of logic gates. In one embodiment, the masking block includes one or more level shifters, a plurality of logic gates, a D flip-flop, and a power on reset circuit (PoR). | 2010-07-01 |
20100164470 | METHOD AND SYSTEM OF IMPROVING MEMORY POWER EFFICIENCY - A method of improving memory power efficiency is disclosed. The method includes the following steps: a ground pin of a memory socket connecting to a power source, the ground pin is connected to a controller; the ground pin outputting a high level signal to the controller when the memory socket is without a memory component; and the controller sending an off-command to a regulator to cut off a supplying power to the memory socket after the controller receives the high level signal. | 2010-07-01 |
20100164471 | CALIBRATION OF PROGRAMMABLE I/O COMPONENTS USING A VIRTUAL VARIABLE EXTERNAL RESISTOR - Embodiments provide systems, methods, and integrated circuits having a calibration structure with a calibration component and a measurement structure coupled to the calibration component. The measurement structure is configured to vary a current through the calibration component until a voltage of the calibration component equals an operation voltage. The variable current is a function of at least the operation voltage and a resistance of a resistor external to the measurement structure. | 2010-07-01 |
20100164472 | POWER SUPPLY MODULATION - Embodiments of methods and apparatus for modulating a power source are disclosed. In some embodiments, a method may comprise predicting, by a current control logic, a potential voltage transient on a power supply bus, and modulating, by the current control logic, a current source, based at least in part on said predicting, to control the predicted voltage transient. Additional variants and embodiments may also be disclosed and claimed. | 2010-07-01 |
20100164473 | METER PHASE IDENTIFICATION - A multi-phase electrical power distribution network includes a substation; a signal generator for providing a different signal on each of a plurality of phases leaving the substation; and a signal discriminator for detecting each of the different signals at a consumer of the electrical power. | 2010-07-01 |
20100164474 | IMMERSION SENSOR TO PROTECT BATTERY - A system for detecting liquid on a battery or on an electronic device connected with the battery is presented. The battery has an electrical contact for transferring current from the battery to the electronic device. The system includes a sensor for detecting liquid on the battery or on the electronic device and sensor circuitry connected with the sensor. The sensor circuitry prevents current from flowing through the electrical contact of the battery upon detecting liquid. | 2010-07-01 |
20100164475 | DEVICE AND METHOD FOR MEASURING THE FREQUENCY OF A SIGNAL CODED MODULATED CARRIER SIGNAL | 2010-07-01 |
20100164476 | ON-DIE SIGNAL TIMING MEASUREMENT - In one embodiment, a timing relationship between two signals on an integrated circuit is measured using a ring oscillator on the die of the integrated circuit. The measured time difference is outputted in a digital form. A delay line coupled to the ring oscillator may be used to reduce uncertainty in measurement which may result from the effects of latch circuit metastability. Other embodiments are described and claimed. | 2010-07-01 |
20100164477 | HIGH SPEED VOLTAGE REGULATOR WITH INTEGRATED LOSELESS CURRENT SENSING - In general, in one aspect, the disclosure describes a high-speed multi-phase voltage regulator (VR) capable of sensing load current. For each phase leg, the VR includes a current mirror to mirror current in switching elements, a current sense to sense high side current in the current mirror, and a I-V converter to convert the sensed high side current to a voltage. The high side sensed current for each phase leg is averaged and the duty cycle for the VR is extracted. The average high side sensed current and the duty cycle are converted to digital by an A-D converter. Digital circuitry corrects the sensed current by adjusting for the gain and offset voltage of the VR. The adjusted sensed value is divided by the duty cycle to convert to load current and the average load current is multiplied by the number of phases operating to determine overall load current. | 2010-07-01 |
20100164478 | CLOTH FOR ELECTRIC DEVICE - Cloth in which fibers include conductive polymer fibers in order to provide a sensor and an actuator, which use cloth including excellent sensing function and actuation function. | 2010-07-01 |
20100164479 | Portable Electronic Device Having Self-Calibrating Proximity Sensors - A method of a portable electronic device for self-calibration of a proximity sensor. A background measurement is obtained by the proximity sensor and a detection threshold of the proximity sensor is adjusted based on the background measurement. The background measurement is a measure of a received signal when no signal is transmitted by the proximity sensor, and the detection threshold is associated with a sensitivity of the proximity sensor to environmental conditions. A source signal is emitted by the proximity sensor based on the adjusted detection threshold of the proximity sensor, and a return signal is received by the proximity sensor corresponding to the source signal. A function of the portable electronic device may be performed base don the received return signal. | 2010-07-01 |
20100164480 | VOLTAGE DETECTION DEVICE AND VOLTAGE DETECTION METHOD - A voltage detection device that is connected to a DC circuit to which a DC voltage is applied and that detects the DC voltage applied to the DC circuit comprises a voltage conversion means for outputting a first voltage that increases as the DC voltage increases and a second voltage that decreases as the DC voltage increases, a voltage calculation means for inputting the first voltage and the second voltage outputted from the voltage conversion means and calculating the DC voltage based upon a difference between the inputted first voltage and the inputted second voltage, and a first failure judgment means for judging that failure has occurred if at least one of the first voltage and the second voltage is not inputted to the voltage calculation means. | 2010-07-01 |
20100164481 | METHOD FOR MEASURING TRANSCONDUCTANCE - A method for measuring transconductance of an oscillating circuit is provided. The oscillating circuit includes an inverter. When an input terminal and an output terminal of the inverter are floated, the bias voltage of the inverter is obtained by measuring the output terminal thereof. Based on floating the input terminal and respectively providing a first voltage and a second voltage to the output terminal, a first current corresponding to the first voltage and a second current corresponding to the second voltage are measured from the output terminal. The first voltage and the bias voltage have the same voltage levels. An output resistor value of the inverter is obtained according to the first and second voltages and the first and second currents. The transconductance of the oscillating circuit is obtained according to the output resistor value. | 2010-07-01 |
20100164482 | CENTERING DEVICE FOR ELECTRONIC COMPONENTS, PARTICULARLY ICS - A centering device for electronic components, particularly for ICs, has at least one centering unit comprising two L-shaped centering elements and two coupling elements. The centering elements and coupling elements are hinged together such that a pivoting movement of the coupling elements is forcibly coupled to a parallel displacement of the centering elements, thus causing a widening or narrowing of a centering opening for the components. | 2010-07-01 |
20100164483 | Hall Element and Magnetic Sensor - A Hall element is provided which has a high sensitivity and contributes to an improvement in S/N ratio per current by using a low-concentration n-well within a suitable range. The Hall element includes a p-type semiconductor substrate layer | 2010-07-01 |
20100164484 | POSITION DETECTION SYSTEM AND POSITION DETECTION METHOD - The position or the direction of a first marker which produces an alternating magnetic field by means of an external power supply is detected precisely even if the first marker coexists with a second marker which includes a resonance circuit having a resonance frequency the same as or close to the frequency of the alternating magnetic field. There is provided a position detection system including a first marker that produces a first alternating magnetic field having a single set of first position-calculating frequencies that are a predetermined frequency away from each other; a second marker provided with a magnetic induction coil having as a resonance frequency a substantially central frequency interposed between the single set of first position-calculating frequencies; a magnetic-field detection section that is disposed outside the working region and that detects a magnetic field at the first position-calculating frequencies; an extracting section that extracts from the detected magnetic field the sum of the intensities of a single set of first detection-magnetic-field components having the single set of first position-calculating frequencies; and a position/direction analyzing section that calculates the position or the direction of the first marker based on the extracted sum. | 2010-07-01 |
20100164485 | NONCONTACT POSITION SENSOR - A non-contact position sensor includes a magnet, first to third magnetoresistive elements arranged on a line extending in a predetermined direction on a pole surface of the magnet with predetermined intervals, and an object made of magnetic material displaceable in the predetermined direction. The first to third magnetoresistive elements are connected serially between a power supply and a ground. The first magnetoresistive element is connected to the second magnetoresistive element at a first node. The second magnetoresistive element is connected to the third magnetoresistive element at a second node. The object includes a projection and a shaft connected to the projection. The projection can face the first to third magnetoresistive elements. The shaft is located away from the pole surface by a distance longer than a distance between the projection and the pole surface of the magnet. This non-contact position sensor does not include a component having a complicated shape and can be manufactured easily. | 2010-07-01 |
20100164486 | DETECTING DEVICE OF THE ANGULAR POSITION OF A ROTATING MEMBER OF AN ELECTRIC HOUSEHOLD APPLIANCE, IN PARTICULAR THE DRUM OF A WASHING MACHINE - A detecting device for detecting the angular position of an electric household appliance rotating member, typically the drum of a washing machine, including generating means of a magnetic field arrangeable in a fixed position with respect to the rotating member, e.g. carried by the frame of the electric household appliance; interaction means with the magnetic field generating means integrally arrangeable in use on the rotating member in a position so as to transit periodically in front of the generating means of a magnetic field and in position adjacent to the same to cause a spatial variation of the magnetic field flux lines between a first and a second field configuration; and means adapted to generate an electric signal when crossed by the flux lines of the magnetic field; wherein said signal generating means are integral with the magnetic field generating means and are arranged, with respect to the interaction means, on the same side as the magnetic field generating means, but in a position so as to be crossed by the flux lines only in said second field configuration. | 2010-07-01 |
20100164487 | Method for Ultra-Fast Controlling of a Magnetic Cell and Related Devices - The present invention relates to a device and corresponding method for ultrafast controlling of the magnetization of a magnetic element. A device ( | 2010-07-01 |
20100164488 | ELECTROMAGNETIC PIEZOELECTRIC ACOUSTIC SENSOR - Provided is a remote sensing apparatus comprising: (a) an electromagnetic field detector and (b) an acoustic resonator comprising an electromagnetic field generator and a sensing material in wireless communication with the generator; wherein the sensing material is in wireless communication with the detector, and an acoustic property of the sensing material is responsive to a change in state of an environment to which the sensing material is exposed, and wherein the sensing material is in the form of one or more particles and/or fragments. | 2010-07-01 |
20100164489 | System for Detecting Nanoparticles Using Modulated Surface Plasmon Resonance - A method and system for detecting magnetic nanoparticles include measuring a magneto-optical enhancement of the plasmon absorption in the optical response. | 2010-07-01 |
20100164490 | DEVICE BASED ON A MAGNETO-RESISTIVE MIXED SENSOR WITHOUT LOW FREQUENCY NOISE AND ASSOCIATED METHOD - A device comprises a mixed sensor design with at least one superconducting loop ( | 2010-07-01 |
20100164491 | Magnetic Field Sensor For Measuring A Direction Of A Magnetic Field In A Plane - A magnetic field sensor for measuring a direction of a magnetic field in a plane comprises a sensing structure comprising a ring-shaped well, a plurality of contacts of equal size placed at equal distance from each other along the ring-shaped well, and an electronic circuit comprising a plurality of electronic switches associated with the contacts of the sensing structure, a logic block for controlling the electronic switches, at least one current source, a means for measuring a difference between a first voltage and a second voltage, a timing circuit providing a control signal for controlling the logic block and providing a reference signal, wherein the logic block is adapted to close and open the electronic switches under the control of the control signal according to a predetermined scheme such that a predetermined number of contacts of the plurality of contacts form a vertical Hall element that is supplied with current from the at least one current source and that has two contacts connected to the means for measuring, and such that the vertical Hall element is moved in steps along the ring-shaped well, and a means for measuring a phase shift between the reference signal and an output signal of the voltage measuring means. | 2010-07-01 |
20100164492 | SHIELDED MULTIX COIL ARRAY FOR PARALLEL HIGH FIELD MRI - A coil arrangement ( | 2010-07-01 |
20100164493 | METHOD AND DEVICE FOR SUPPRESSING MOTION ARTIFACTS IN MAGNETIC RESONANCE IMAGING - In a method and device for suppressing residual motion artifacts, k-space is divided into a snapshot segment, an alternate sampling segment and a high frequency segment in a phase encoding direction; then phase encoding lines are respectively sampled within each of the segments; and a magnetic resonance image is reconstructed according to the phase encoding lines within k-space. | 2010-07-01 |
20100164494 | TRANSMIT PROFILE CONTROL IN MRI - An apparatus for imaging includes: a main magnet to generate a substantially uniform main B | 2010-07-01 |
20100164495 | MAGNETIC RESONANCE IMAGING APPARATUS AND METHOD FOR CORRECTING ERROR DUE TO GRADIENT MAGNETIC FIELD - In a non-cartesian sampling method, in order to reduce an artifact on an image caused by an error of a gradient magnetic field, data for correcting the error caused by the gradient magnetic field are obtained when data used for image reconstruction are obtained, and the data used for the image reconstruction are corrected by using the obtained data for the correction. In order to obtain the data for correcting the error, a block having plural parallel echo signals is measured. | 2010-07-01 |
20100164496 | SYSTEM AND METHODS FOR ACTIVE SUPPRESSION OF SUPERIOR TAGGING IN FLOW-SENSITIVE ALTERNATING INVERSION RECOVERY - Apparatuses, systems, and methods for suppression of venous artifacts from superior tagging in flow-sensitive alternating inversion recovery. The systems may include an image capture device and a controller. The controller may be configured to cause the image capture device to perform a labeling experiment, capture a first image of a slice of body tissue, perform a control experiment, and capture a second image of the slice of body tissue. The systems may be configured to perform a ninety (90) degree RF saturation pulse directed to a portion of body tissue that is superior to the first slice of body tissue imaged during at least one of the labeling experiment and/or the control experiment, and to apply a spoiler gradient subsequent to the saturation pulse during at least one of the labeling experiment and/or the control experiment. | 2010-07-01 |
20100164497 | PRE-ADJUSTABLE SMD COILS FOR HIGH CURRENTS - In a device and method to install a coil in a circuit, the coil is installed on a substrate and the inductance value of the coil installed on the substrate is adjusted with a test circuit board. The substrate is then installed in the circuit. This enables an efficient installation of the coil. | 2010-07-01 |
20100164498 | INTEGRATED-CIRCUIT LOW-NOISE AMPLIFIER - It is proposed herein to improve the specifications of a low-noise amplifier (LNA) by integrating it in a chip. In order to cover a range of operating frequencies using a single chip, the integrated-circuit amplifier proposed herein comprises an input port configured to receive a magnetic resonance (MR) signal from a radio-frequency (RF) coil, one or more LNAs configured to amplify the received MR signal, and an output port configured to output the amplified MR signal from the one or more LNAs. The operating frequency of the RF coil depends on the field strength, The matching circuit, if present, needs to be tuned to operate at the operating frequency of the RF coil, and depends on the component values in the loop, thus on loop size. In contrast, the proposed integrated-circuit amplifier is capable of directly connecting to RF coils with different loop sizes, without the need for a matching circuit. | 2010-07-01 |
20100164499 | APPARATUS FOR AND METHOD OF DETECTING A CONDUCTIVE OBJECT - The invention relates to an apparatus for detecting a conductive object ( | 2010-07-01 |
20100164500 | Method for quantitative separation of electromagnetic induction and induced polarization effects - The invention relates to the field of electrical exploration and to the methods of determination of subterranean formations properties by means of electric parameters of subterranean formations measuring and separating of the parameters measured. The invention can be applied both in surface and marine electrical exploration using controlled sources of electromagnetic field, and is used in gas and oil exploration for searching and delimitation of oil and gas reservoirs basing on segregation of response from stratum, secondarily changed due to hydrocarbons migration, to split the measured signal to available components. The invention provides for a set of techniques that enable a layer-by-layer determination of geoelectrical parameters values, as well as process characteristics of induced medium polarization and electromagnetic induction. | 2010-07-01 |
20100164501 | ALTERNATING CURRENT SWITCH DEVICE AND METHOD FOR THE MONITORING OR DIAGNOSIS OF THE OPERABILITY OF AN ALTERNATING CURRENT SWITCH DEVICE - The invention relates to an alternating current switch device for the optional closure and opening of at least one electrically conducting connection, wherein this alternating current switch device has at least two parallel connected branches ( | 2010-07-01 |
20100164502 | COLD CATHODE IONIZATION VACUUM GAUGE WITH TRIGGER PLATE - To provide a cold cathode ionization vacuum gauge that does not have a complicated structure and can induce discharge in a short time even after the cold cathode ionization vacuum gauge is used for a long time. A cold cathode ionization vacuum gauge has a rod-like anode | 2010-07-01 |
20100164503 | DIRECTIONAL ZONE SELECT INTERLOCK METHOD - An improved method to detect and locate electrical faults is provided. A method of operating a circuit breaker in an electrical circuit configured with at least one of a first main circuit breaker at a first layer of circuit protection having a first direction of current flow, and at least one second circuit breaker downstream of said at least one first main circuit breaker having a second direction of current flow, and at least one third circuit breaker downstream of said at least one second circuit breaker having a third direction of current flow, wherein one of said at least one first, second, or third circuit breakers is in short time pick-up, is provided, and comprises steps to determine the location of the fault and adjust the trip time delay of the circuit breakers according to predetermined criteria. | 2010-07-01 |
20100164504 | PASSIVE INTERMODULATION (PIM) DISTANCE TO FAULT ANALYZER WITH SELECTABLE HARMONIC LEVEL - A distance to PIM measurement circuit is made using a device such as an AWS transceiver that has separate transmit and receive bands. With a typical AWS transceiver placed in close proximity to a PCS transceiver, the AWS device will include a band reject filter to eliminate interference from the PCS signals. The PIM measurement circuit includes two frequency sources F | 2010-07-01 |
20100164505 | Cable diagnostics for base-T systems - An apparatus and method for cable diagnostics is disclosed for deployment as part of an Ethernet communication system to conduct diagnostics. The system transmits one or more pulses which are Ethernet compatible and of finite duration. Reflections are detected and through processing and measurement of the amplitude and round-trip delay of the pulse's reflection, cable faults are located. In one embodiment, this innovation uses an IEEE 802.3 compliant transmit pulse, such as an auto-negotiation signal (AN pulse), to conduct cable diagnostics. The benefits of a standard compliant allow for use with any vendor on the far-end and the signal requires no special hardware or software to produce and, therefore, reduces system complexity and cost. To reduce incorrect measurements, the apparatus measures cable length and termination with multiple AN pulses. It then applies non-linear filters to redundant measurements in such a way that it produces accurate cable diagnostics information. | 2010-07-01 |
20100164506 | Method for testing an electronics unit - A method for testing an electronics unit, especially an electronics unit of an apparatus for ascertaining and/or monitoring a process variable, wherein the electronics unit has a plurality of electrical components. At least a part of the electrical components is grouped into at least one group, and this group is supplied with a query signal. A response signal is received from the group, and the response signal is evaluated. Furthermore, the invention relates to an apparatus for determining and/or monitoring a process variable. | 2010-07-01 |
20100164507 | DIGITAL FAULT DETECTION CIRCUIT AND METHOD - Some embodiments show a digital fault detection circuit with an input circuit comprising an input and at least one output, wherein a first signal state at the input causes a predetermined signal state at the output and a second signal state at the input leaves the output floating. Moreover the digital fault detection circuit may comprise a signal line with a signal line input and a signal line output, wherein the signal line input is coupled to the output of the input circuit and furthermore a keeper circuit coupled to the signal line output and configured to keep the signal line at the predetermined signal state, after the signal state at the input has changed from the first signal state to the second signal state. The digital fault detection circuit may further comprise at least one fault detector cell, which is coupled to the signal line between the signal line input and the signal line output and which is configured to change the state of the signal line which is otherwise kept by the keeper circuit, in response to a fault. | 2010-07-01 |
20100164508 | SYSTEM AND METHOD FOR TEST STRUCTURE ON A WAFER - System and method for test structure on a wafer. According to an embodiment, the present invention provides a test structure for testing a chip. For example, the test structure and the chip are manufactured on a same substrate material and the testing being conducted is in a temperature-controlled environment. The test structure includes a top structure positioned above the chip. For example, the top structure can be characterized by a first surface area. The top structure includes a first metal material occupying less than 60% of the surface area. The test structure also includes a bottom structure positioned below the chip. For example, the bottom structure can be characterized by a second surface area. The second surface area is substantially equal to the first surface area. The bottom structure includes a first silicon material. The first silicon material occupies substantially all of the second surface area. | 2010-07-01 |
20100164509 | DETECTING SYSTEM FOR DETECTING CONNECTION OF CONNECTORS AND CONNECTOR ASSEMBLIES HAVING SAME - A detecting system for detecting the connection of two connectors includes a number of first and second linking lines. The detecting system includes a number of first detection switches, a number of pull-down resistors, a number of second detection switches, a number of pull-up resistors, and a detection module. Each first linking line is grounded via each first detection switch and each pull-down resistor in series. The terminals of the pull-down resistors connected to the first detection switches are defined as first detecting ends. Each second linking line is electrically coupled to a high potential via each second detection switch and each pull-up resistors in series. The detection module with a threshold value preset is configured for comparing the voltage value at the first detecting ends with the threshold value, and outputting a result to determine whether the first linking lines are electrically connected to the second linking lines respectively. | 2010-07-01 |
20100164510 | LIQUID TIM DISPENSE AND REMOVAL METHOD AND ASSEMBLY - In some embodiments, a liquid TIM dispense and removal method and assembly is presented. In this regard, a method is introduced including loading an absorbent material of a thermal control unit with a liquid thermal interface material (TIM), pressing the absorbent material against an integrated circuit device causing the liquid TIM to be released, testing the integrated circuit device, and removing the absorbent material from against the integrated circuit device causing the liquid TIM to be reabsorbed. Other embodiments are also disclosed and claimed. | 2010-07-01 |
20100164511 | DIAGNOSING AN ELECTRONIC SENSOR - The apparatus ( | 2010-07-01 |
20100164512 | PROCESS AND DEVICE FOR DIFFERENTIATING OBJECTS INFLUENCING AN ELECTROMAGNETIC ALTERNATING FIELD, IN PARTICULAR METAL OBJECTS - The invention relates to a method for differentiating conductive and/or ferromagnetic objects (O) in a material stream ( | 2010-07-01 |
20100164513 | NON-DESTRUCTIVE ON-LINE METHOD FOR MEASURING PREDETERMINED PHYSICAL, ELECTROCHEMICAL, CHEMICAL OR BIOLOGICAL STATE TRANSFORMATION OF A SUBSTANCE AND A SYSTEM THEREOF - The present invention discloses a non-destructive on-line method and a system for measuring predetermined physical, electrochemical, chemical and/or biological (PPECB) state transformation of a substance. The method comprises steps selected inter alia from (a) obtaining a non-destructive resonance system (NDRS); (b) determining a resonance frequency characterizing the substance; (c) scanning at least one initial predetermined characteristic parameter around the resonance frequency, and recording the same; (d) plotting an initial 3D chart to obtain a 3D vector which identifies the value of the initial characteristic parameter; (e) providing the examined substance inside the NDRS; (f) on-line scanning at least one corresponding measured parameter around the resonance frequency, and recording the same; (g) plotting a second 3D chart to obtain a 3D vector which identifies the value of the measured parameter; (h) comparing the 3D standard initial vector to the 3D measured vector; (i) obtaining relative characteristic parameter change; and, (j) correlating between the relative characteristic parameter change and the PPECB state transformation. | 2010-07-01 |
20100164514 | SALINITY INDEPENDENT MULTIPHASE MEASUREMENTS - Method and device for measuring the content of a fluid flow, the fluid containing a combination of at least two of gas, oil and/or water. The method comprising the steps of: —repeatedly measuring the electrical properties of a cross section of the fluid and detecting time sequences identified by low gas content, especially characterized in that a gas bubble is not present, —in said periods of low gas content measuring the density of the fluid in the flow, wherein the density measurements are performed in at least one period of low gas content and the a fluid density is calculated based on the measured densities over said period or periods. | 2010-07-01 |
20100164515 | Method and System for Measuring Water Hardness - Prior to adding detergent or chelant, the conductivity of water in a washing chamber is measured. The maximum concentration of hard water ions that could correspond to the measured conductivity is determined, i.e., it is assumed that all of the conductivity is from calcium and/or magnesium ions in the water even though other ions may in fact be contributing to the measured conductivity. Enough chelating agent is added to the chamber to sequester this maximum concentration of hard water ions and the conductivity is measured again. Using the two conductivity measurements, the actual concentration of hard water ions is determined. A chelant factor based on the actual concentration of hard water ions is then used to determine the amount of chelant to be added for subsequent wash cycles to sequester all of the hard water ions. | 2010-07-01 |
20100164516 | Method for Extending the Diagnostic Capability of Current Regulators - A method and a device for monitoring at least one output stage for an inductive load using a current regulator and an analysis device are described. A short circuit to a power supply or to ground is detected by comparing at least one current value in a switching phase of the at least one output stage with at least one current value in a free-wheeling phase of the at least one output stage. | 2010-07-01 |
20100164517 | CONDUCTIVE FILM STRUCTURE, FABRICATION METHOD THEREOF, AND CONDUCTIVE FILM TYPE PROBE DEVICE FOR ICS - A method for forming a conductive film structure is provided, which includes: providing an insulating substrate having a surface; forming a plurality of trenches in the surface of the insulating substrate, wherein the trenches are extended substantially parallel to each other; disposing the insulating substrate into a plating solution and plating conducting layers within the trenches to form a plurality of micro-wires; and stacking a plurality of the insulating substrates or winding or folding the insulating substrate along an axis substantially parallel to an extended direction of the micro-wires to form a conducting lump. | 2010-07-01 |
20100164518 | PROBE CARD - A probe card is provided that is capable of accurately ensuring the flatness and the parallelism with respect to a predetermined reference surface. A point (Q) of application of force applied from a leaf spring ( | 2010-07-01 |
20100164519 | TESTING OF ELECTRONIC CIRCUITS USING AN ACTIVE PROBE INTEGRATED CIRCUIT - A method and apparatus are provided for transmission/reception of signals between automatic test equipment (ATE) and a device under test (DUT). A probe card has a plurality of associated proximate active probe integrated circuits (APIC) connected to a plurality of probes. Each APIC interfaces with one or more test interface points on the DUT through probes. Each APIC receives and processes signals communicated between the ATE and the DUT. Low information content signals transmitted from the ATE are processed into high information content signals for transmission to the probe immediately adjacent the APIC, and high information content or time critical signals received by the APIC from the DUT are transmitted as low information content signals to the ATE. Because the APIC is immediately adjacent the probe there is minimum loss or distortion of the information in the signal from the DUT. | 2010-07-01 |
20100164520 | METHOD AND APPARATUS FOR TESTING INTEGRATED CIRCUIT - An embodiment of a method for testing an integrated circuit comprises a first step for determining at least one of a group selected from whether or not the chuck top receiving the integrated circuit exists near a probe card which transmits and receives electrical signals to and from the integrated circuit, whether or not the integrated circuit is under testing, and whether or not the probe card has a given temperature, and a second step for adjusting power for heating to be supplied to a heating element provided in the probe card according to the determination result in the first step. | 2010-07-01 |
20100164521 | Parametric Testline with Increased Test Pattern Areas - An integrated circuit parametric testline providing increased test pattern areas is disclosed. The testline comprises a dielectric layer over a substrate, a plurality of probe pads over the dielectric layer, and a first device under test (DUT) formed in the testline in a space underlying the probe pads. The testline may also include a second DUT, which is formed in a space underlying the probe pads overlying the first DUT in an overlaying configuration. The testline may further include a polygon shaped probe pad structure providing an increased test pattern area between adjacent probe pads. | 2010-07-01 |
20100164522 | SIGNAL TESTING APPARATUS - A signal testing apparatus includes a number of first switches, a second switch, and a testing terminal. Each first switch includes a static contact, a first dynamic contact, and a second dynamic contact. The second switch includes a static contact and a number of dynamic contacts. When the static contact and the first dynamic contact of each first switch are connected to each other, a computer interface is connected to a peripheral equipment interface. When the static contact and the second dynamic contact of each first switch are connected to each other, the computer interface is disconnected to the peripheral equipment interface, the static contact of the second switch is capable of selectively connected to one of the dynamic contacts of the second switch, to selectively test a signal output from a corresponding pin of the computer interface. | 2010-07-01 |
20100164523 | SYSTEM FOR TESTING CONNECTIONS OF TWO CONNECTORS - A system for testing connections of two connectors, each of which includes a pair of verification pins and a number of signal pins, includes a verification testing module, a controlling module, a signal testing module, and a reporting module. The verification testing module is configured for detecting whether each pair of verification pins are electrically connected. The controlling module is configured for allowing communication between each pair of signal pins if the pair of verification pins is detected to be electrically connected. The signal testing module is configured for testing whether each pair of signal pins are electrically connected. The reporting module is configured for reporting the results of the verification testing module and the signal testing module. | 2010-07-01 |
20100164524 | ZIF CONNECTORS AND SEMICONDUCTOR TESTING DEVICE AND SYSTEM USING THE SAME - A ZIF connector, a semiconductor testing device using the ZIF connectors, and a semiconductor testing system using the ZIF connectors are proposed. The ZIF connector comprises a body portion and a clamping portion. The body portion is a print circuit board provided with circuit patterns, and further comprises a plurality of signal holes disposed on an upper part of the body portion for electrically connecting a plurality of corresponding signal cables and a plurality of electrical terminals disposed on a lower part of the body portion and arranged on two lateral sides of the body portion for electrically connecting a plurality of corresponding electrical pads of a substrate. The circuit patterns are provided in the body portion to connect to the electrical terminals through the signal holes accordingly. The clamping portion is horizontally extended on one lateral side of the body portion for securing the ZIF connector in a connector board. | 2010-07-01 |
20100164525 | TEST SOCKET, TEST APPARATUS WITH TEST SOCKET - A test socket is provided that includes a socket body to receive an object to be tested, a lid disposed on the socket body, one or more pushers coupled to a first surface of lid to apply force to a first surface of the object toward the socket body, and a temperature controlling member to provide a temperature to the object. A semiconductor package may be tested in a test apparatus that includes the test socket, the methods of testing including receiving a semiconductor package in a socket in a test chamber, applying a first temperature to the test chamber to test the semiconductor package at a first test temperature, and applying a second temperature to the semiconductor package to test the semiconductor package at a second test temperature by controlling the application of the second temperature with the socket. | 2010-07-01 |
20100164526 | MEMS PROBE FOR PROBE CARDS FOR INTEGRATED CIRCUITS - A MEMS probe adapted to contact a corresponding terminal of an integrated circuit, integrated on at least one chip of a semiconductor material wafer during a test phase of the wafer is provided. The probe includes a support structure comprising a first access terminal and a second access terminal; the support structure defines a conductive path between said first access terminal and said second access terminal. The probes further-includes a probe region connected to the support structure adapted to contact the corresponding terminal of the integrated circuit during the test phase for providing at least one test signal received from the first access terminal and the second access terminal to the integrated circuit through at least one portion of the conductive path, and/or providing at least one test signal generated by the integrated circuit to at least one between the first access terminal and the second access terminal trough at least one portion of the conductive path. The probe region is arranged on the conductive path of the support structure between said first access terminal and said second access terminal. | 2010-07-01 |
20100164527 | TEST MODULE WITH BLOCKS OF UNIVERSAL AND SPECIFIC RESOURCES - A test module for a test apparatus for testing a device under test, the test module being adapted for performing a specific test function and having a universal section adapted to provide test resources being unspecific with regard to the test function of the test module, the universal section having a control interface adapted to be connected to a central control device of the test apparatus, and having a specific section to be coupled to the universal section and adapted to provide test resources being specific with regard to the test function of the test module, the specific section having a device under test interface adapted to be connected to the device under test. | 2010-07-01 |
20100164528 | Methods and Apparatus to Test Electronic Devices - Methods and apparatus to test electronic devices are disclosed. An example method includes setting a first controlled switch to prevent a current detect signal from tripping an overcurrent protection event controlling an operation of the device; setting a second controlled switch to route a first sensed voltage associated with the device to a voltage adjuster; sending a calibration current corresponding to a target threshold current through the device; detecting the first sensed voltage while the calibration current flows through the device; and setting a reference signal substantially equal to the first sensed voltage, wherein the reference signal is to be used to generate the current detect signal. | 2010-07-01 |
20100164529 | SEMICONDUCTOR DEVICE TEST SYSTEM - A test system for semiconductor devices including a tester, a test station, a first controller, and one or more second controllers, is disclosed. The tester handles operations of the test system. The test station, coupled to the tester, receives test information from the tester via a transmission path, where the test station performs a test process to a semiconductor device under test according to the test information, and then provides a test result to the tester. The first controller, electronically connected to the test station, receives the test information. The second controllers, electronically connected to the test station, handles the test process of the test station, where each the second controller corresponds to one or more semiconductor device under test. The first controller broadcasts the test information to one or more second controllers and receives the test result from the second controllers through an infrared communication interface. | 2010-07-01 |
20100164530 | ADJUSTING CONFIGURATION OF A MULTIPLE GATE TRANSISTOR BY CONTROLLING INDIVIDUAL FINS - In a sophisticated semiconductor device, FINFET elements may be provided with individually accessible semiconductor fins which may be connected to a controllable inter-connect structure for appropriately adjusting the transistor configuration, for instance with respect to current drive capability, replacing defective semiconductor fins and the like. Consequently, different transistor configurations may be obtained on the basis of a standard transistor cell architecture, which may result in increased production yield of highly complex manufacturing strategies in forming non-planar transistor devices. | 2010-07-01 |
20100164531 | TUNABLE STRESS TECHNIQUE FOR RELIABILITY DEGRADATION MEASUREMENT - Apparatus and methods are disclosed for examining how reliability in an RF power amplifier circuit changes as a function of variation of the input to output voltage swings. Two output transistors that varying greatly in the size of their respective channel widths are provided for independently evaluating impacts on the output waveform. The gate control for the smaller transistor is separate from the gate control to the larger transistor. The gate and drain stress can thus be adjusted and evaluated independently. | 2010-07-01 |
20100164532 | APPARATUS AND METHOD FOR MEASURING CHARACTERISTICS OF SEMICONDUCTOR DEVICE - An apparatus and method for measuring the characteristics of a semiconductor device is disclosed. The measuring apparatus may include first to M-th (wherein M is a positive integer not less than 1) starved devices each being biased in response to a bias voltage varying in accordance with a variable first supply voltage, thereby varying an amount of current flowing through a semiconductor device included in the starved device. Interconnect lines may interconnect the first to M-th starved devices. A measuring unit measures at least one of a delay time caused by the semiconductor devices of the starved devices themselves, and a compound delay time caused by the semiconductor devices of the starved devices themselves plus a delay time caused by the interconnect lines. The measured results can be analyzed under conditions more approximate to diverse situations exhibited in practical chips in accordance with development of manufacturing processes and techniques. It is also possible to provide the basis of a model which more effectively represents coupling geometry of more complex semiconductor devices and interconnect lines. The basis of the model may be applied to development of various tools, etc. | 2010-07-01 |
20100164533 | METHOD AND APPARATUS FOR EVALUATING THE EFFECTS OF STRESS ON AN RF OSCILLATOR - Apparatus and methods are disclosed for evaluating degradation of a transistor in a cross coupled pair of an RF oscillator independently. A MOS device can be coupled between a separated center-tap inductor. By appropriately sizing the MOS device and turning the MOS device on during operation of RF oscillator, a good contact can again be made that allows the oscillator to operate at design performance. By turning the MOS device off, the supplies can be separates such that I-V characteristics of both transistors of the cross-coupled pair may be obtained. | 2010-07-01 |
20100164534 | Radiation Sensor and Dosimeter - A semiconductor radiation sensor ( | 2010-07-01 |
20100164535 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR TESTING METHOD - Using a scan test system, a power supply wiring ( | 2010-07-01 |
20100164536 | Single Flux Quantum Circuits - Superconducting single flux quantum circuits are disclosed herein, each having at least one Josephson junction which will flip when the current through it exceeds a critical current. Bias current for the Josephson junction is provided by a biasing transformer instead of a resistor. The lack of any bias resistors ensures that unwanted power dissipation is eliminated. | 2010-07-01 |
20100164537 | Semiconductor device and method of fabricating the same - Provided is a semiconductor device and a method of fabricating the same. The semiconductor device may include at least one logic circuit and at least one spare circuit. The at least one spare circuit may be that is a substitute for the at least one logic circuit and may not be connected to a power voltage source and/or a ground voltage source. | 2010-07-01 |
20100164538 | Semiconductor Body, Circuit Arrangement Having the Semiconductor Body and Method - An input circuit arrangement ( | 2010-07-01 |
20100164539 | SYSTEM AND APPARATUS OF RECONFIGURABLE TRANSCEIVER DESIGN FOR MULTI-MODE SIGNALING - A reconfigurable transceiver is claimed for a wide range of I/O systems. The reconfigurable transmitter of the reconfigurable transceiver is capable of transmitting multi-level signals in single-ended and differential modes by current and voltage mode signaling. The signal for transmission can be pre-emphasized for all transmitting modes. The reconfigurable transceiver can dynamically scale bandwidth and power consumption based on performance metrics. | 2010-07-01 |
20100164540 | Semiconductor Memory Device - A semiconductor memory device includes a reference voltage pad for receiving a reference voltage from an external device, a calibration resistor connected to a calibration node where an external resistor is connected to and having a resistor value decided according to a calibration code, and a calibration code generator for generating the calibration code by comparing a voltage of the calibration node and the reference voltage. | 2010-07-01 |
20100164541 | TERMINATION CONTROL CIRCUIT AND METHOD FOR GLOBAL INPUT/OUTPUT LINE - A termination control circuit for a global input/output line includes a speed determination unit configured to output a termination enable signal which is activated in response to a frequency of an external clock signal and CAS latency information; and a pulse generation unit configured to output a driving signal for driving a termination circuit for the global input/output line in response to a termination control signal and the termination enable signal. | 2010-07-01 |
20100164542 | SYSTEM LSI - A system LSI includes an input/output section and a logic circuit section. The input/output section includes an I/O power source cell having a supply voltage higher than a power source for the logic circuit section and a plurality of I/O cells in each of which an I/O power source line is provided for supplying source power from the I/O power source cell. The logic circuit section includes an I/O power consuming circuit which uses the I/O power source cell as a power source. The I/O power consuming circuit is connected to a line leading from an I/O power source line in at least one of the plurality of I/O cells. | 2010-07-01 |
20100164543 | LOW-COMPLEXITY ELECTRONIC ADDER CIRCUITS AND METHODS OF FORMING THE SAME - In various embodiments, an adder circuit includes a plurality of transistors, all of the transistors being of a single type selected from the group consisting of NMOS transistors and PMOS transistors, and dissipates no more power than an equivalent CMOS circuit. | 2010-07-01 |
20100164544 | OUTPUT DRIVER FOR USE IN SEMICONDUCTOR DEVICE - An output driver for use in a semiconductor device includes a first pre-drive unit, a second pre-drive unit, and a main drive unit. The first pre-drive unit generates a pull-up drive control signal based on a data signal. The pull-up drive control signal swings between a power supply voltage level and a low voltage level. The data signal swings between the power supply voltage level and a ground voltage level. The second pre-drive unit generates a pull-down drive control signal based on the data signal. The pull-down drive control signal swings between a high voltage level and the ground voltage level. The main drive unit performs pull-up/down drive operations to an output terminal in response to the pull-up/down drive control signals, respectively. Herein, the high voltage level is higher than the power supply voltage level and the low voltage level is lower than the ground voltage level. | 2010-07-01 |
20100164545 | INTERFACE SYSTEM - An interface system delivers an output signal having a first signal characteristic in response to first and second input signals having the first signal characteristic and a second, different signal characteristic. The interface system includes a signal input for receiving a first signal having a first signal characteristic and a second signal having a second signal characteristic which is different from the first signal characteristic, a detector circuit for detecting whether the signal at the input is the first signal or the second signal, and a translator circuit for translating either of the first signal or the second signal into the output signal. | 2010-07-01 |
20100164546 | CIRCUIT SYSTEM INCLUDING FIRST CIRCUIT SUB-SYSTEM, SECOND CIRCUIT SUB-SYSTEM AND BIDIRECTIONAL BUS, CIRCUIT SUB-SYSTEM AND METHOD - A circuit system has a first and a second circuit sub-system, and a bidirectional bus, the first circuit sub-system having a first control circuit that receives a control signal for controlling the direction of the bidirectional bus, and controls the first sub-system to be either of a transmitting or a receiving state based on a state of the control signal, a first sending unit that receives the control signal, and outputs as a first control signal, and a second sending unit that receives the control signal, and outputs as a second control signal, the second circuit sub-system having a first receiving unit that receives the first control signal, a second receiving unit that receives the second control signal, and a second control circuit that controls the second sub-system to assume either the transmitting or the receiving state on the basis of the first and the second control signal. | 2010-07-01 |
20100164547 | BASE CELL FOR ENGINEERING CHANGE ORDER (ECO) IMPLEMENTATION - A base cell for an Engineering Change Order (ECO) implementation having at least a first pair of CMOS transistors and a second pair of CMOS transistors, characterized in that said at least first pair of CMOS transistors have a common gate and said at least second pair of CMOS transistors have separate gates. | 2010-07-01 |
20100164548 | Implementing Logic Functions With Non-Magnitude Based Physical Phenomena - An n-valued switch with n≧2 and n>2 and n>7, with an input enabled to receive a signal in one of n states, an output enabled to provide a signal in one of at least 2 states, under control of a control signal having one of at least 2 states is disclosed. Signals are instances of a physical phenomenon, an instance representing a state. N-valued inverters are also disclosed. Different types of signals are disclosed, including optical signals with different wavelengths, electrical signals with different frequencies and signals represented by a presence of a material. A kit including an n-valued switch is also disclosed. | 2010-07-01 |
20100164549 | LOGIC GATE - A logic gate comprises a first switch, a second switch, a data network and a keeping circuitry. The first switch is adapted to connect a logic node to a first potential responsive to a transition of an enabling signal. The second switch is adapted to connect the logic node to a second potential via an electrical path responsive to a transition of the enabling signal. The data network is serially connected within the electrical path. The keeping circuitry comprises third and fourth switches serially connected between the logic node and the first potential and being controllable separately from each other, the third switch being adapted to be closed in case a potential on the logic node assumes the first potential and to be opened in case the potential on the logic node assumes the second potential. | 2010-07-01 |
20100164550 | COMPARING DEVICE HAVING HYSTERESIS CHARACTERISTICS AND VOLTAGE REGULATOR USING THE SAME - Embodiments include a comparing device having hysteresis characteristics and a voltage regulator using the same. The voltage regulator includes a comparator which compares a comparison voltage with a reference voltage and outputs a result of the comparison, a switching controller which generates a plurality of switching signals in response to the comparison result, resistors connected in the form of a string to divide the comparison voltage into a plurality of voltages, and a switching box which selects one of the plural voltages as the comparison voltage in response to the switching signals. | 2010-07-01 |
20100164551 | SAMPLE-AND-HOLD (S/H) CIRCUIT - A sample-and-hold circuit ( | 2010-07-01 |
20100164552 | Ratio meter for temperature sensor - In some embodiments, a new DTS implementation, which employs the conventional Vbe/ΔVbe temperature dependent principles but substitutes a voltage-to-frequency (V/F) based ratio meter for the DAC based approach. This new approach can result in a more simplified circuit that may be more variation tolerant and can require less power and area. | 2010-07-01 |
20100164553 | CURRENT SENSING CIRCUIT - A current sensing circuit includes a power transistor, a sensing transistor configured to copy a current flowing through the power transistor at a predetermined ratio, a current sensing resistor configured to detect a voltage from the current copied by the sensing transistor, an input resistor configured to convert an input voltage to a current, a cross self-biasing cascade block configured to adjust currents at both ends of the input resistor, and a common gate transistor and a reference resistor configured to convert a current output of the input resistor to a final sense voltage. | 2010-07-01 |
20100164554 | FILTER CIRCUIT, CONTINUOUS TIME FILTER, AND SIGNAL REPRODUCING APPARATUS - According to one embodiment, a filter circuit includes: a first circuit to convert an input voltage into a current using a transfer conductance as a conversion coefficient; a capacitor connected to an output terminal of the first circuit; a second circuit connected to the first circuit and capacitor, and configured to convert an input voltage into a current using a transfer conductance as a conversion coefficient; a setting circuit to adjust the transfer conductance of the first circuit from a first signal and a second signal for gain adjustment and generate a third signal for gain adjustment. The output terminal of the first circuit is connected to an output terminal of the second circuit from which a signal inverted with respect to a signal output from the first circuit is output, the first signal is input to the second circuit, and a frequency band is adjusted by the first signal. | 2010-07-01 |
20100164555 | WAVEFORM GENERATION DEVICE, WAVEFORM GENERATION METHOD, AND PROGRAM - Provided is a waveform generating apparatus that generates a signal having an arbitrary waveform, comprising a waveform memory that stores a plurality of pieces of waveform data that each include a sequence of signal values; a filtering section that (i) reads from the waveform memory a piece of waveform data serving as a basis for a waveform to be generated, from among the plurality of pieces of waveform data, (ii) performs a conversion by filtering the read piece of waveform data to obtain a piece of converted waveform data, and (iii) writes to the waveform memory the piece of converted waveform data; and a waveform output section that reads the piece of converted waveform data from the waveform memory and outputs a signal having a waveform corresponding to the sequence of signal values of the read piece of converted waveform data. | 2010-07-01 |
20100164556 | CONVERTING DYNAMIC REPEATERS TO CONVENTIONAL REPEATERS - A method for converting a repeater circuit from a dynamic repeater circuit to a static repeater circuit. The method includes disconnecting a feedback path coupled to a first stage of the dynamic repeater circuit and electrically shorting gate terminals of first and second transistors of a second stage to each other, wherein the transistors of the second stage are configured to drive an output signal on an output node. Disconnecting the feedback path and electrically shorting the gate terminals is performed by reconfiguring a plurality of selection devices in the repeater circuit from a first configuration to a second configuration. The repeater circuit includes at least one keeper configured to provide an output signal on the output node. | 2010-07-01 |
20100164557 | ACTIVE ECHO ON-DIE REPEATER CIRCUIT - A repeater circuit. The repeater circuit includes two output circuits, two echo circuits, two activation circuits, and two deactivation circuits. Responsive to detecting a logical transition of an input signal, one of the activation circuits is configured to activate a corresponding output circuit, which is configured to drive an output signal on an output node. A corresponding echo circuit is configured to be activated and to drive an input node responsive to activation of the corresponding output circuit. A corresponding one of the deactivation circuits is configured to deactivate the corresponding output circuit after a delay time has elapsed, whereas the corresponding echo circuit is deactivated in response thereto. A keeper circuit is configured to continue providing the output signal on the output node after deactivation of the corresponding output circuit. | 2010-07-01 |
20100164558 | FOLLOWER OUTPUT BUFFER - Embodiments include but are not limited to apparatuses and systems including an output buffer including an input terminal for receiving an input signal, an output terminal for outputting an output signal, and a follower circuit coupling the input terminal and the output terminal, the follower circuit including at least one set of an NMOS transistor and a PMOS transistor, a drain terminal of the NMOS transistor coupled to a local supply voltage, and a drain terminal of the PMOS transistor coupled to a local ground voltage. Other embodiments may be described and claimed. | 2010-07-01 |
20100164559 | POWER-ON CIRCUIT - The power-on circuit includes a first I/O voltage detector configured to detect whether or not an I/O voltage is applied and output an I/O voltage detection signal based on the detected result, a second I/O voltage detector configured to detect when the applied I/O voltage becomes a reference level value and output a cut signal based on the detected result, a core voltage detector configured to detect whether or not a core voltage is applied and output a core voltage detection signal based on the detected result, and a power-on signal generator configured to generate a power-on signal based on the I/O voltage detection signal, the cut signal and the core voltage detection signal and forcibly generate the power-on signal if the I/O voltage is stabilized later than the core voltage. | 2010-07-01 |