27th week of 2017 patent applcation highlights part 58 |
Patent application number | Title | Published |
20170194216 | EXTRA GATE DEVICE FOR NANOSHEET | 2017-07-06 |
20170194217 | Detecting the Cleanness of Wafer After Post-CMP Cleaning | 2017-07-06 |
20170194218 | METHOD FOR EVALUATING QUALITY OF OXIDE SEMICONDUCTOR THIN FILM AND LAMINATED BODY HAVING PROTECTIVE FILM ON SURFACE OF OXIDE SEMICONDUCTOR THIN FILM, AND METHOD FOR MANAGING QUALITY OF OXIDE SEMICONDUCTOR THIN FILM | 2017-07-06 |
20170194219 | ARRAY SUBSTRATE, ITS MANUFACTURING METHOD AND TESTING METHOD, AND DISPLAY DEVICE | 2017-07-06 |
20170194220 | Preheat Processes for Millisecond Anneal System | 2017-07-06 |
20170194221 | SCANNING ACOUSTIC MICROSCOPE SENSOR ARRAY FOR CHIP-PACKAGING INTERACTION PACKAGE RELIABILITY MONITORING | 2017-07-06 |
20170194222 | TEST ELEMENT GROUP, ARRAY SUBSTRATE, TEST DEVICE AND TEST METHOD | 2017-07-06 |
20170194223 | Power Semiconductor Device | 2017-07-06 |
20170194224 | DISPLAY PANEL AND METHOD FOR FORMING THE SAME | 2017-07-06 |
20170194225 | LOW COST HERMETIC MICRO-ELECTRONICS | 2017-07-06 |
20170194226 | Underfill Control Structures and Method | 2017-07-06 |
20170194227 | SEMICONDUCTOR PACKAGE, SEMICONDUCTOR DEVICE USING THE SAME AND MANUFACTURING METHOD THEREOF | 2017-07-06 |
20170194228 | Semiconductor Device and Method of Controlling Warpage in Reconstituted Wafer | 2017-07-06 |
20170194229 | INTEGRATED CIRCUITS WITH ALUMINUM VIA STRUCTURES AND METHODS FOR FABRICATING THE SAME | 2017-07-06 |
20170194230 | Water and Ion Barrier for the Periphery of III-V Semiconductor Dies | 2017-07-06 |
20170194231 | BALL GRID ARRAY PACKAGE WITH PROTECTIVE CIRCUITRY LAYOUT AND A SUBSTRATE UTILIZED IN THE PACKAGE | 2017-07-06 |
20170194232 | Semiconductor Structure and Method Making the Same | 2017-07-06 |
20170194233 | INTEGRATED CIRCUIT CHIP WITH A VERTICAL CONNECTOR | 2017-07-06 |
20170194234 | SEMICONDUCTOR DEVICE | 2017-07-06 |
20170194235 | LEAD FRAME AND SEMICONDUCTOR PACKAGE STRUCTURE | 2017-07-06 |
20170194236 | Wire Support for a Leadframe | 2017-07-06 |
20170194237 | LEADLESS ELECTRONIC PACKAGES FOR GAN DEVICES | 2017-07-06 |
20170194238 | SUBSTRATE STRUCTURE, ELECTRONIC PACKAGE AND METHOD FOR FABRICATING THE ELECTRONIC PACKAGE | 2017-07-06 |
20170194239 | A SEMICONDUCTOR PACKAGE HAVING AN ETCHED GROOVE FOR AN EMBEDDED DEVICE FORMED ON BOTTOM SURFACE OF A SUPPORT SUBSTRATE AND A METHOD FOR FABRICATING THE SAME | 2017-07-06 |
20170194240 | PACKAGE SUBSTRATE, METHOD FOR FABRICATING THE SAME, AND PACKAGE DEVICE INCLUDING THE PACKAGE SUBSTRATE | 2017-07-06 |
20170194241 | PACKAGE STRUCTURE AND MANUFACTURING METHOD OF PACKAGE STRUCTURE | 2017-07-06 |
20170194242 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | 2017-07-06 |
20170194243 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | 2017-07-06 |
20170194244 | VIA, TRENCH OR CONTACT STRUCTURE IN THE METALLIZATION, PREMATALLIZATION DIELECTRIC OR INTERLEVEL DIELECTRIC LAYERS OF AN INTEGRATED CIRCUIT | 2017-07-06 |
20170194245 | ON-CHIP VARIABLE CAPACITOR WITH GEOMETRIC CROSS-SECTION | 2017-07-06 |
20170194246 | MIMCAP STRUCTURE IN A SEMICONDUCTOR DEVICE PACKAGE | 2017-07-06 |
20170194247 | INTERCONNECTION STRUCTURE AND METHOD OF FORMING THE SAME | 2017-07-06 |
20170194248 | Multi-Layer Semiconductor Structure and Methods for Fabricating Multi-Layer Semiconductor Structures | 2017-07-06 |
20170194249 | PACKAGE SUBSTRATE AND METHOD OF FABRICATING THE SAME | 2017-07-06 |
20170194250 | ANTI-FUSE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME | 2017-07-06 |
20170194251 | ELECTRICAL FUSE AND/OR RESISTOR STRUCTURES | 2017-07-06 |
20170194252 | INTEGRATED CIRCUIT HAVING A STAGGERED FISHBONE POWER NETWORK | 2017-07-06 |
20170194253 | Methods for Reducing Dual Damascene Distortion | 2017-07-06 |
20170194254 | SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME | 2017-07-06 |
20170194255 | ELECTRONIC DEVICE AND METHOD FOR FABRICATING THE SAME | 2017-07-06 |
20170194256 | JUNCTIONLESS BACK END OF THE LINE VIA CONTACT | 2017-07-06 |
20170194257 | METHOD FOR THE MANUFACTURE OF METAL STRUCTURES AND AN ELECTRONIC COMPONENT WITH AT LEAST ONE METAL STRUCTURE | 2017-07-06 |
20170194258 | COPPER ETCHING INTEGRATION SCHEME | 2017-07-06 |
20170194259 | INTERCONNECT STRUCTURE WITH AIR-GAPS | 2017-07-06 |
20170194260 | STACKED MULTILAYER STRUCTURE AND MANUFACTURING METHOD THEREOF | 2017-07-06 |
20170194261 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME | 2017-07-06 |
20170194262 | PACKAGE SUBSTRATE AND ITS FABRICATION METHOD | 2017-07-06 |
20170194263 | COMPOSITE DEVICE | 2017-07-06 |
20170194264 | SEMICONDUCTOR DEVICE WITH GRAPHENE ENCAPSULATED METAL AND METHOD THEREFOR | 2017-07-06 |
20170194265 | ELECTRICAL CONNECTION AROUND A CRACKSTOP STRUCTURE | 2017-07-06 |
20170194266 | SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING THE SAME | 2017-07-06 |
20170194267 | METHOD FOR FABRICATION OF AN INTEGRATED CIRCUIT RENDERING A REVERSE ENGINEERING OF THE INTEGRATED CIRCUIT MORE DIFFICULT AND CORRESPONDING INTEGRATED CIRCUIT | 2017-07-06 |
20170194268 | Lid Structure for a Semiconductor Device Package and Method for Forming the Same | 2017-07-06 |
20170194269 | SEMICONDUCTOR DEVICE AND SWITCHING DEVICE USING THE SEMICONDUCTOR DEVICE | 2017-07-06 |
20170194270 | EFFECTIVE MEDIUM SEMICONDUCTOR CAVITIES FOR RF APPLICATIONS | 2017-07-06 |
20170194271 | SEMICONDUCTOR PACKAGE WITH THREE-DIMENSIONAL ANTENNA | 2017-07-06 |
20170194272 | METHOD OF MANUFACTURING A LAYER STRUCTURE HAVING PARTIALLY SEALED PORES | 2017-07-06 |
20170194273 | SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF | 2017-07-06 |
20170194274 | SEMICONDUCTOR PRODUCT WITH INTERLOCKING METAL-TO-METAL BONDS AND METHOD FOR MANUFACTURING THEREOF | 2017-07-06 |
20170194275 | MEMORY DEVICE STRUCTURE | 2017-07-06 |
20170194276 | Via Structure For Packaging And A Method Of Forming | 2017-07-06 |
20170194277 | ELECTRICAL CONNECTING STRUCTURE | 2017-07-06 |
20170194278 | Multi-Strike Process for Bonding | 2017-07-06 |
20170194279 | STRUCTURES AND METHODS FOR LOW TEMPERATURE BONDING USING NANOPARTICLES | 2017-07-06 |
20170194280 | BONDING WIRE FOR SEMICONDUCTOR DEVICE | 2017-07-06 |
20170194281 | Embedded wire bond wires for vertical integration with separate surface mount and wire bond mounting surfaces | 2017-07-06 |
20170194282 | Radio Frequency Power Component and Radio Frequency Signal Transceiving Device | 2017-07-06 |
20170194283 | METHOD FOR SELF-ALIGNED SOLDER REFLOW BONDING AND DEVICES OBTAINED THEREOF | 2017-07-06 |
20170194284 | METHOD AND DEVICE FOR IMPROVED DIE BONDING | 2017-07-06 |
20170194285 | MULTI-CHANNEL MCM WITH TEST CIRCUITRY FOR INTER-DIE BOND WIRE CHECKING | 2017-07-06 |
20170194286 | Semiconductor Device and Method | 2017-07-06 |
20170194287 | ORGANIC LIGHT-EMITTING DEVICE AND ORGANIC DISPLAY DEVICE | 2017-07-06 |
20170194288 | MULTI-LEVEL CHIP INTERCONNECT | 2017-07-06 |
20170194289 | PACKAGE-ON-PACKAGE STRUCTURE HAVING POLYMER-BASED MATERIAL FOR WARPAGE CONTROL | 2017-07-06 |
20170194290 | FAN-OUT STACKED SYSTEM IN PACKAGE (SIP) AND THE METHODS OF MAKING THE SAME | 2017-07-06 |
20170194291 | SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING THE SAME | 2017-07-06 |
20170194292 | Devices Employing Thermal and Mechanical Enhanced Layers and Methods of Forming Same | 2017-07-06 |
20170194293 | FAN-OUT MULTI-CHIP PACKAGE AND ITS FABRICATING METHOD | 2017-07-06 |
20170194294 | SEMICONDUCTOR DEVICE AND PORTABLE APPARATUS USING THE SAME | 2017-07-06 |
20170194295 | System, Structure, and Method of Manufacturing a Semiconductor Substrate Stack | 2017-07-06 |
20170194296 | SEMICONDUCTOR MODULE | 2017-07-06 |
20170194297 | LIGHT-EMITTING MODULE | 2017-07-06 |
20170194298 | ILLUMINATION DEVICES, AND METHODS OF FABRICATING SAME | 2017-07-06 |
20170194299 | PACKAGE-ON-PACKAGE TYPE SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME | 2017-07-06 |
20170194300 | THERMALLY ENHANCED SEMICONDUCTOR ASSEMBLY WITH THREE DIMENSIONAL INTEGRATION AND METHOD OF MAKING THE SAME | 2017-07-06 |
20170194301 | Power Device Cassette With Auxiliary Emitter Contact | 2017-07-06 |
20170194302 | INTEGRATED LED AND LED DRIVER UNITS AND METHODS FOR FABRICATING THE SAME | 2017-07-06 |
20170194303 | FABRICATION OF OPTICS WAFER | 2017-07-06 |
20170194304 | DISPLAY APPARATUS | 2017-07-06 |
20170194305 | Method for Producing an Optoelectronic Semiconductor Chip | 2017-07-06 |
20170194306 | Photo-Sensitive Silicon Package Embedding Self-Powered Electronic System | 2017-07-06 |
20170194307 | LIGHT EMITTING DIODE SUBSTRATE AND DISPLAY APPARATUS APPLYING THE SAME | 2017-07-06 |
20170194308 | PHOTONIC INTEGRATED CIRCUIT PACKAGE | 2017-07-06 |
20170194309 | PHOTONIC INTEGRATED CIRCUIT PACKAGE | 2017-07-06 |
20170194310 | PHOTONIC INTEGRATED CIRCUIT PACKAGE | 2017-07-06 |
20170194311 | INTEGRATED CIRCUITS WITH ELECTROSTATIC DISCHARGE PROTECTION | 2017-07-06 |
20170194312 | ELECTROSTATIC DISCHARGE PROTECTION STRUCTURE AND FABRICATION METHOD THEREOF | 2017-07-06 |
20170194313 | LIGHT-EMITTING DIODE CHIP | 2017-07-06 |
20170194314 | ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT, ESD PROTECTION SEMICONDUCTOR DEVICE, AND LAYOUT STRUCTURE OF ESD PROTECTION SEMICONDUCTOR DEVICE | 2017-07-06 |
20170194315 | ELECTROSTATIC DISCHARGE PROTECTION SEMICONDUCTOR DEVICE | 2017-07-06 |