28th week of 2017 patent applcation highlights part 36 |
Patent application number | Title | Published |
20170199669 | MEMORY MANAGEMENT METHOD, MEMORY CONTROL CIRCUIT UNIT, AND MEMORY STORAGE APPARATUS - A memory management method is provided. The method includes receiving a write command, a first data, and a first instruction information corresponding to the write command, wherein the first instruction information instructs writing the first data into at least one first logical sub-unit of a first logical unit; executing load-align operation to the first data according to the first instruction information; writing an aligned first data obtained through the load-align operation into a first physical programming unit if a predetermined event does not occur during the load-align operation; and stopping the load-align operation and storing the first data and the first instruction information into a first physical erasing unit if the predetermined event occurs during the load-align operation, wherein the first instruction information is stored as a first valid bits information corresponding to the first data in the first physical erasing unit. | 2017-07-13 |
20170199670 | MEMORY SYSTEM WITH MULTIPLE STRIPING OF RAID GROUPS AND METHOD FOR PERFORMING THE SAME - A data memory system is described, where there may be an asymmetry in the time needed to write or erase data and the time needed to read data. The data may be stored using a RAID data storage arrangement and the reading, writing and erasing operations on the modules arranged such that the erasing and writing operations may be performed without significant latency for performing a read operation. Where a failure of a memory module in the memory system occurs, methods for recovering the data of the failed module are disclosed which may selected in accordance with policies that may relate to the minimizing the possibility of irretrievable data loss, or degradation of latency performance. | 2017-07-13 |
20170199671 | SYSTEM AND METHOD FOR PROVIDING COMPREHENSIVE BACKUP OF MODULAR MOBILE DEVICES - A system and method for backup and recovery of user mobile device modules, settings and configurations. An example system includes a modular mobile device and a number of interconnected modules that can be connected to the mobile device. The device includes memory that stores configuration and setting parameters associated with each of the modules. In operation, a backup software utility monitors the configuration and setting parameters to detect additions and modifications and the transmits the detected additions and modifications to remote data storage to generate a data backup indicating a current state of the configuration and setting parameters. As a result, the modular mobile device can always return to a previous state for each module if it is replaced or the software is reinstalled, for example. | 2017-07-13 |
20170199672 | DATA STORAGE DEVICE AND DATA PROCESSING SYSTEM INCLUDING THE DATA STORAGE DEVICE - A data storage device includes a first volatile memory device, a first scale-out storage, and a first controller. The first controller is configured to control the first volatile memory device and the first scale-out storage and to execute first firmware. The first scale-out storage includes a second volatile memory device, a first non-volatile memory device, and a second controller. The second controller is configured to control the second volatile memory device and the first non-volatile memory device and to execute second firmware. The first controller boots the first firmware after booting of the second firmware is completed by the second controller. | 2017-07-13 |
20170199673 | OPERATING METHODS OF SEMICONDUCTOR DEVICE AND MEMORY SYSTEM EACH INCLUDING MULTI-CONNECTION PORT, AND COMMUNICATION METHOD OF STORAGE SYSTEM - An operating method of a semiconductor device and a memory system, each including a multi-connection port, includes: receiving connection information of a first device while connecting to the first device; updating information of a management table by using the connection information; and generating and transmitting a first packet including the connection information of the first device to a second device pre-connected to the memory system. | 2017-07-13 |
20170199674 | Data Deduplication With Support for Both Thick and Thin Provisioning of Storage Objects - Techniques for implementing data deduplication in conjunction with thick and thin provisioning of storage objects are provided. In one embodiment, a system can receive a write request directed to a storage object stored by the system and can determine whether the storage object is a thin or thick object. If the storage object is a thin object, the system can calculate a usage value by adding a total amount of physical storage space used in the system to a total amount of storage space reserved for thick storage objects in the system and further subtracting a total amount of reserved storage space for the thick storage objects that are filled with unique data. The system can then reject the write request if the usage value is not less than the total storage capacity of the system. | 2017-07-13 |
20170199675 | METHODS AND SYSTEMS FOR EFFICIENTLY STORING DATA - Methods and systems for a networked storage environment are provided. One method includes scanning a first data structure by a processor executing instructions out of a memory for a storage operating system to determine whether any data chunk of a first object stored at a first storage tier is referenced by the storage operating; when the storage operating system references a certain number of data chunks, the processor using an object staging data structure to identify a second object that is in the process of being built with space for transferring the certain number of data chunks from the first object to the second object; and updating information regarding the second object at a transfer log with location information of the certain number of data chunks at the first storage tier. | 2017-07-13 |
20170199676 | MEMORY SYSTEM AND OPERATING METHOD THEREOF - There are provided a memory system including a semiconductor memory device and a controller and an operating method thereof. A memory system having an extended storage area includes a semiconductor memory device including a plurality of memory blocks, and a controller for controlling the semiconductor memory device. In the memory system, the semiconductor memory device stores system information required to drive the semiconductor memory device and the controller in one memory block among the plurality of memory blocks. | 2017-07-13 |
20170199677 | PAGE COMPRESSION STRATEGY FOR IMPROVED PAGE OUT PROCESS - A page compression strategy classifies uncompressed pages selected for compression. Similarly classified pages are compressed and bound into a single logical page. For logical pages having pages with more than one classification, a weighting factor is determined for the logical page. | 2017-07-13 |
20170199678 | METHODS AND SYSTEMS FOR EFFICIENTLY STORING DATA AT A PLURALITY OF STORAGE TIERS USING A TRANSFER DATA STRUCTURE - Methods and systems for a networked system are provided. One method includes receiving a request by a processor to transfer a data block stored at a first storage tier to the second storage tier; using an object staging data structure to determine that an object is available for transferring the data block from the first storage tier to the second storage tier. The object staging data structure an indicator providing a status for the object and an object length and an offset value of a transfer log indicating where information regarding the data block is stored. The method further includes updating an address of the storage tier where the information regarding data block is stored at the transfer log; increasing the object length and the offset value at the object staging data structure; and creating the object at the second tier. | 2017-07-13 |
20170199679 | SYSTEM AND METHOD FOR USING PERSISTENT MEMORY TO ACCELERATE WRITE PERFORMANCE - A central processing unit (CPU) executes a write request for first data to be written to a first block of a storage device. Executing the write request includes determining whether the first block is remapped to a first memory block in the persistent memory and whether the first memory block is in an uncommitted state. Responsive to determining that the first block is remapped to the first memory block in the persistent memory and that the the first memory block is in an uncommitted state, the CPU overwrites the first memory block in the persistent memory with the first data. | 2017-07-13 |
20170199680 | SYSTEM AND METHOD OF WRITE AMPLIFICATION FACTOR MITIGATION AND FLASH LIFESPAN EXTENSION - Embodiments of the present invention use a NAND block as the basic write operation unit and ensure that the write operation uses the same basic unit as the erase operation. In this way, the flash product maintains the same level of granularity for read and write operations. The mapping between logical block addressing (LBA) and physical block addressing (PBA) are at the page level. Wear leveling and garbage collection are simplified so the robustness and performance is enhanced. If the data is frequently written, there are no concerns regarding data retention. Embodiments of the present invention evenly distribute hot data using a global optimization perspective based on this observation. When dealing with hot data, the NAND flash's required data retention capability may be adjusted to increase P/E cycles. | 2017-07-13 |
20170199681 | MANAGING A SET OF WEAR-LEVELING DATA USING A SET OF BUS TRAFFIC - Disclosed aspects include managing a set of wear-leveling data for a set of compute nodes. A set of bus traffic data may be monitored with respect to a bus which is connected to a computer hardware component of the set of compute nodes. In response to monitoring the set of bus traffic, the set of wear-leveling data may be determined using the set of bus traffic. The wear-leveling data determined using the set of bus traffic may then be established in a data store. The wear leveling data may be used to manage asset placement with respect to a shared pool of configurable computing resources. | 2017-07-13 |
20170199682 | SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR INCREASING SPARE SPACE IN MEMORY TO EXTEND A LIFETIME OF THE MEMORY - Methods, systems and computer-readable storage media for increasing spare space in a storage subsystem including a flash memory, extending a lifetime of the storage subsystem to achieve a stored selected minimum lifetime based at least in part as a result of the increasing spare space, and identifying at least one aspect associated with the lifetime of the storage subsystem. The storage subsystem may include compressed data stored in the flash memory. | 2017-07-13 |
20170199683 | AUTONOMIC CONFIGURATION OF STORAGE SYSTEMS FOR VIRTUALIZATION - Systems, methods, and computer program products for autonomously obtaining configuration information and configuring a storage system for virtualization are disclosed. Configuring virtualization of a storage system may include: creating a storage pool for each array designated by an administrator for virtualization; creating one or more volumes for each storage pool; creating or selecting a volume controller designated by the administrator for hosting virtualization; identifying one or more ports of the volume controller; and mapping the one or more volumes to the one or more ports of the volume controller. Configuration information obtained may include designation of one or more arrays available to a storage system to which virtualization should be applied; designation of either an existing volume controller or a new volume controller and new volume controller name; and/or a confirmation, a negation, or a modification of one or more port identifiers. | 2017-07-13 |
20170199684 | MEMORY MANAGEMENT SYSTEM WITH BACKUP SYSTEM AND METHOD OF OPERATION THEREOF - An memory management system with backup system, and a method of operation of a memory management system with backup system thereof, including: a memory module controller for detecting a power failure condition, the memory module controller including a nonvolatile memory controller; a compression controller integrated within the nonvolatile memory controller for receiving a data block from volatile memory; a compression engine within the compression controller for compressing the data block to form a compressed data block; and a sequencer for writing the compressed data block to nonvolatile memory. | 2017-07-13 |
20170199685 | MEMORY SYSTEM AND OPERATING METHOD OF MEMORY SYSTEM - A memory system includes a memory device including a plurality of memory blocks each block including a plurality of pages; and a controller including a memory, and suitable for buffering segments of user data and metadata for a command operation into the memory, and storing the buffered segments into a super memory block including two or more of the plurality of memory blocks during the command operation in response to a command, wherein, when the total size of to-be-stored data among the buffered segments of the memory is smaller than an unit size of the one shot program, the controller stores dummy data as well as the to-be-stored data into the super memory block. | 2017-07-13 |
20170199686 | STORAGE DEVICE THAT STORES SETTING VALUES FOR OPERATION THEREOF - A storage device includes a volatile memory, a nonvolatile memory, an auxiliary power source, and a controller configured to start a setting process to store a setting value in the volatile memory in response to a setting command received from a host, and operate in accordance with one or more setting values stored in the volatile memory. When the controller determines that a main power supply will stop, power from the auxiliary power source starts to be primarily used, and the controller saves at least part of said one or more setting values stored in the volatile memory to the nonvolatile memory, before power supply from the auxiliary power source ends. | 2017-07-13 |
20170199687 | MEMORY SYSTEM AND CONTROL METHOD - According to one embodiment, a memory system includes a nonvolatile first memory, a second memory, and a processor. The second memory includes a first cache area for caching in units of a data-unit. The processor transfers the first data and translation information for the first data into the first memory and performs garbage collection. The garbage collection includes first to third process. The first process is determining whether second data is valid or invalid on the basis of translation information for the second data. The second data is corresponding to the first data in the first memory. The second process is copying third data within the first memory. The third data is corresponding to the second data determined to be valid. The third process is updating translation information for the third data. The processor caches, in the first cache area, only a data-unit including translation information for the first process. | 2017-07-13 |
20170199688 | SHARED NETWORK-AVAILABLE STORAGE THAT PERMITS CONCURRENT DATA ACCESS - Techniques for providing shared access to, e.g., a small computer system interface (SCSI) storage device in a computer network include providing an operational mode on SCSI interfaces with a first media agent and a second media agent such that, in response to inquiry messages on the SCSI interfaces, the SCSI storage device appears as a SCSI target device to the first media agent and the second media agent and mapping data operations between the first media agent and the SCSI storage device and the second media agent and the SCSI storage device to logically unique channel numbers for the first media agent and the second media agent to perform data storage operations over their respective SCSI interfaces by concurrently sharing the SCSI storage device. | 2017-07-13 |
20170199689 | FRAME BUFFER ACCESS TRACKING VIA A SLIDING WINDOW IN A UNIFIED VIRTUAL MEMORY SYSTEM - One embodiment of the present invention is a memory subsystem that includes a sliding window tracker that tracks memory accesses associated with a sliding window of memory page groups. When the sliding window tracker detects an access operation associated with a memory page group within the sliding window, the sliding window tracker sets a reference bit that is associated with the memory page group and is included in a reference vector that represents accesses to the memory page groups within the sliding window. Based on the values of the reference bits, the sliding window tracker causes the selection a memory page in a memory page group that has fallen into disuse from a first memory to a second memory. Because the sliding window tracker tunes the memory pages that are resident in the first memory to reflect memory access patterns, the overall performance of the memory subsystem is improved. | 2017-07-13 |
20170199690 | SYSTEMS AND METHODS FOR OPTIMIZED UTILIZATION OF STORAGE RESOURCES BASED ON PERFORMANCE AND POWER CHARACTERISTICS - In accordance with embodiments of the present disclosure, a method may include receiving requirements for building a virtual storage resource from an array of physical storage resources, receiving performance metrics and power metrics of the physical storage resources of the array available for inclusion in the virtual storage resource, determining a plurality of unique combinations of the available physical storage resources that could be used to build the virtual storage resource, determining an effective performance, an effective performance penalty, a total power consumption, and an effective power penalty for each of the plurality of unique combinations, and selecting a single combination of the plurality of unique combinations for the virtual storage resource based on effective performances, effective performance penalties, total power consumptions, and effective power penalties of the plurality of unique combinations. | 2017-07-13 |
20170199691 | MEMORY MODULE - A memory module may include a plurality of memory groups configured to include a plurality of memory packages, respectively, and input/output data through input/output pins. The memory module may include a control circuit configured to activate one or more of the plurality of memory groups on a basis of an address signal. The memory module may include a multiplexer circuit configured to couple the memory group activated on the basis of the address signal to input/output buses of the memory module. | 2017-07-13 |
20170199692 | SHARED BACKUP POWER SELF-REFRESH MODE - Example implementations relate to placing loads in a self-refresh mode using a shared backup power supply. For example, a shared backup power supply system can include a node coupled to a shared backup power supply. The node can include a plurality of loads that include volatile memory and a processing resource to place the plurality of loads in a self-refresh mode in response to a failure of a primary power supply. A shared backup power supply system can also include the shared backup power supply to provide backup power to the plurality of loads in the self-refresh mode in response to the failure of the primary power supply. | 2017-07-13 |
20170199693 | ELECTRONIC SYSTEM HAVING POWER-CONDITION-AWARE HYBRID STORAGE DEVICE AND METHOD FOR OPERATION OF HYBRID STORAGE DEVICE IN ELECTRONIC SYSTEM - The present invention provides an electronic system having a power-condition-aware hybrid storage device and a method for the operation of the hybrid storage device in the electronic system. The electronic system comprises: a host and a hybrid storage device. The host comprises a detecting unit, and the detecting unit is utilized for detecting a power condition of the host to generate a first detecting result and detecting an operation condition of the host to generate a second detecting result. The hybrid storage device comprises: a plurality of non-volatile memory units, a hard drive unit, and a control unit. The control unit is utilized for receiving the first detecting result and the second detecting result from the detecting unit in the host and determining whether to turn on the hard drive unit according to the first detecting result and the second detecting result. | 2017-07-13 |
20170199694 | SYSTEMS AND METHODS FOR DYNAMIC STORAGE ALLOCATION AMONG STORAGE SERVERS - In accordance with embodiments of the present disclosure, an information handling system may include a plurality of physical storage resources and a storage controller associated with the storage resources. The storage controller may be configured to allocate a reserved portion of each of the plurality of physical storage resources to a local pool reserved storage associated with the storage controller, communicate to at least one other storage controller information regarding the local pool reserved storage, and receive from the at least one other storage controller information regarding a global pool reserved storage comprising the local pool reserved storage and at least one other local pool reserved storage of the at least one other storage controller. | 2017-07-13 |
20170199695 | Allocating RAID Storage Volumes Across a Distributed Network of Storage Elements - A distributed network of storage elements (DNSE) is provided in which the physical capacity of each drive is split into a set of equal sized logical splits which are individually protected within the DNSE using separate RAID groups. To reduce restoration latency, members of the RAID groups having a member in common on a given drive are spread within the DNSE to minimize the number of sets of drives within the DNSE that have RAID members in common. By causing the splits to be protected by RAID groups, restoration of the splits may occur in parallel involving multiple drives within the DNSE. By minimizing the overlap between RAID members on various drives, failure of a given drive will not require multiple reads from another drive in the DNSE. Likewise, spare splits are distributed to enable write recovery to be performed in parallel on multiple drives within the DNSE. | 2017-07-13 |
20170199696 | Initialization of Memory in a Computer System - A computer system, especially but not exclusively an embedded system, is provided with a CPU and an external FLASH or other memory which is used for storing code to be executed by the CPU in operation of the system. The system can be initialized without requiring a secondary boot sequence which means it can be used in preference to embedded or serial FLASH solutions. There is provided a computer system comprising: a processor; an external memory, being external to the processor; a memory controller for the external memory; and a power management unit which is arranged to receive a wake up signal, then to first wake up the memory controller; and secondly at a later time to wake up the processor. | 2017-07-13 |
20170199697 | MEMORY APPARATUS INCLUDING MULTIPLE BUFFERS AND METHOD OF DRIVING MEMORY INCLUDING MULTIPLE BUFFERS - A memory apparatus including multiple buffers includes a memory controller configured to obtain memory allocation information based on a multi-write operation command, and a memory configured to store same graphics data in each of multiple buffers in a memory based on the memory allocation information. | 2017-07-13 |
20170199698 | INTRA-STORAGE DEVICE DATA TIERING - Data is stored on a storage device, such as one or multiple hard disk drives, in accordance with intra-storage device data tiering. Data to be written to the storage device is received. Whether the data is hot data or cold data is determined. In response to determining that the data is hot data, the data is written to a fastest region of the storage device. In response to determining that the data is cold data, the data is written to a region of the storage device other than the fastest region. The intra-storage device data tiering moves data between the fastest region of the storage device and the region of the storage device other than the fastest region, as opposed to copying data between the fastest region and the region other than the fastest region in a caching-type manner. | 2017-07-13 |
20170199699 | SYSTEMS AND METHODS FOR RETAINING AND USING DATA BLOCK SIGNATURES IN DATA PROTECTION OPERATIONS - A system according to certain embodiments associates a signature value corresponding to a data block with one or more data blocks and a reference to the data block to form a signature/data word corresponding to the data block. The system further logically organizes the signature/data words into a plurality of files each comprising at least one signature/data word such that the signature values are embedded in the respective file. The system according to certain embodiments reads a previously stored signature value corresponding to a respective data block for sending from a backup storage system having at least one memory device to a secondary storage system. Based on an indication as to whether the data block is already stored on the secondary storage system, the system reads the data block from the at least one memory device for sending to the secondary storage system if the data block does not exist on the secondary storage system, wherein the signature value and not the data block is read from the at least one memory device if the data block exists on the secondary storage system. | 2017-07-13 |
20170199700 | DYNAMICLY FREEING STORAGE SPACE IN TIERED STORAGE SYSTEMS - A method for dynamically freeing storage space in a tiered storage system includes reading attribute values associated with data sets residing on a first storage tier. The method compares characteristics of the data sets to the attribute values to determine which initial data sets qualify to be moved from the first storage tier to a second storage tier. The method further determines whether movement of the initial data sets creates a desired amount of free space on the first storage tier. In the event the movement does not create the desired amount of free space, the method modifies the attribute values, determines which additional data sets qualify to be moved from the first storage tier to the second storage tier, and recalculates the amount of free space that would be generated. A corresponding system and computer program product are also disclosed. | 2017-07-13 |
20170199701 | ENHANCED MESSAGE CONTROL BANKS - A server system may be configured to access a first contiguous portion of memory for a first activity of a plurality of activities, and to transfer data associated with the first activity into the first contiguous portion of memory. The first contiguous portion of memory may be placed in a memory repository to make the first contiguous portion of memory available for access by at least a second activity of the plurality of activities, and an identifier may be assigned to the first contiguous portion of memory placed in the memory repository. The server system may also be configured to access the first contiguous portion of memory for the second activity, and to transfer the data associated with the first activity from the first contiguous portion of memory to memory specifically associated with the second activity. | 2017-07-13 |
20170199702 | SOLID STATE MEMORY FORMATTING - The present disclosure includes methods and devices for solid state drive formatting. One device embodiment includes control circuitry coupled to a number of memory arrays, wherein each memory array has multiple physical blocks of memory cells. The memory arrays are formatted by the control circuitry that is configured to write system data to the number of memory arrays, where the system data ends at a physical block boundary; and write user data to the number of memory arrays, where the user data starts at a physical block boundary. | 2017-07-13 |
20170199703 | PHYSICAL ADDRESSING SCHEMES FOR NON-VOLATILE MEMORY SYSTEMS EMPLOYING MULTI-DIE INTERLEAVE SCHEMES - A non-volatile memory system may include a plurality of memory dies and a controller that is configured to write data into the memory dies according to a multi-die interleave scheme. A total number of the dies may be a non-multiple of a die component number of the interleave scheme. The controller may select abstract address based on a virtual die layout, and translate the abstract address to actual physical addresses. The translation may identify actual blocks located in different rows of blocks. The controller may also read data sets from the memory dies. To do so, the controller may translate an abstract address to actual physical addresses, which may similarly identify actual blocks located in different rows of blocks. | 2017-07-13 |
20170199704 | SYSTEM FOR PROVIDING A TIME-LIMITED MUTUAL EXCLUSIVITY LOCK AND METHOD THEREFOR - A system and method for providing mutual exclusivity to an operation is presented. A memory location is checked to determine if the memory location is subject to an exclusive lock. If so, the age of the exclusive lock is determined. If the age of the exclusive lock is greater than a certain length of time, the exclusive lock on the memory location is released such that operations can be performed on the memory location. When a memory lock is created, a length of time can be associated with the memory location. The length of time can be a default length of time. The length of time can be a custom length that is stored in a database. Other embodiments also are disclosed. | 2017-07-13 |
20170199705 | SEMICONDUCTOR MEMORY DEVICE INCLUDING STRINGS INCLUDING MEMORY CELL TRANSISTORS - A controller controls a memory including first and second strings. The first and second strings configure first and second string groups, respectively. In each string group, a set of memory cell transistors each from each string configures a unit. The controller is configured to: sequentially write, in the first string group, data in first units to which serially-coupled memory cell transistors respectively belong; sequentially write, in the second string group, data in first units to which serially-coupled memory cell transistors respectively belong; and sequentially write, in the first string group, data in second units to which serially-coupled memory cell transistors respectively belong. | 2017-07-13 |
20170199706 | ELECTRONIC DEVICE DATA RECORDING METHOD AND ELECTRONIC DEVICE THEREOF - Various examples of the present invention relate to an electronic device data recording method and an electronic device thereof, and an electronic device operating method can comprise the steps of: determining a data recording possibility of a specific area of a nonvolatile memory in which data is to be recorded; and determining whether to record data based on the data recording possibility. In addition, the various examples of the present invention also include the aforementioned example and other examples. | 2017-07-13 |
20170199707 | METHODS AND SYSTEMS FOR EFFICIENTLY STORING DATA - Methods and systems for a networked system are provided. One method includes generating an object by a processor for storing a plurality of data chunks at a storage device, where the object includes a header segment and a data segment, the header segment providing a first offset address where an uncompressed data chunk is stored within the object and a second offset address of the object indicating a beginning of a compressed group having compressed data chunks and providing an indicator of a compression group size; reading the header segment by the processor to retrieve the second offset and the compressed group size in response to a first request for a data chunk within the compressed group; and decompressing the data chunk of the compressed group by the processor and providing the uncompressed data chunk for completing the first read request. | 2017-07-13 |
20170199708 | APPARATUSES AND METHODS FOR CONFIGURING I/OS OF MEMORY FOR HYBRID MEMORY MODULES - Apparatuses, hybrid memory modules, memories, and methods for configuring I/Os of a memory for a hybrid memory module are described. An example apparatus includes a non-volatile memory, a control circuit coupled to the non-volatile memory, and a volatile memory coupled to the control circuit. The volatile memory is configured to enable a first subset of I/Os for communication with a bus and enable a second subset of I/O for communication with the control circuit, wherein the control circuit is configured to transfer information between the volatile memory and the non-volatile memory. | 2017-07-13 |
20170199709 | DOCUMENT OUTPUT PROCESSING - The invention relates to printing and other output of documents using data processors, and particularly to methods, apparatus, and computer programming useful for controlling output processes. In various aspects the invention provides systems, methods, and computer programming useful for minimizing the number of command inputs required from a user to complete printing or other output of multiple documents. In other aspects, the invention provides systems, methods, and computer programming useful for printing documents using content data received from users or other sources, together with previously-provided form data, according to predetermined formats. | 2017-07-13 |
20170199710 | PRINTING SYSTEM, PRINTING APPARATUS AND NON-TRANSITORY COMPUTER-READABLE MEDIUM STORING INSTRUCTIONS TO TERMINAL APPARATUS - A printing system includes a terminal apparatus and a printing apparatus. The terminal apparatus includes: a first inputting section; and a processor configured to: transmit a print request for printing an object image indicated by object data to the printing apparatus; receive first input authentication information inputted by a user; and transmit the first input authentication information to the printing apparatus. The printing apparatus includes: a second inputting section; a printing section; a processor configured to: receive the print request; store the object data and associated authentication information included in the print request while associating with each other in a first memory; receive the first input authentication information; determine whether the first input authentication information matches the associated authentication information; receive input of second input authentication information from the user; and determine whether the second input authentication information matches the associated authentication information. | 2017-07-13 |
20170199711 | IMAGE READING APPARATUS AND IMAGE READING METHOD - An image scanning apparatus is disclosed. The image scanning apparatus comprises: a scanner for generating a scan image by scanning a loaded document; and a controller for in response to sensing the presence of a preset identification mark in the generated scan image, processing, with a first job, the scan image before the document in which an identification mark is present and processing, with a second job, the scan image for the document in which an identification mark is present and the scan image after the document. | 2017-07-13 |
20170199712 | ELECTRONIC DEVICE AND METHOD OF RECOGNIZING WEARING FORM THEREOF - An electronic device and a method of recognizing a form of the electronic device are provided. The electronic device comprises: a housing that bends in at least one direction; a first member comprising a first surface, the first member being fixed to the housing or a first point within the housing; a second member comprising a second surface, the second member being fixed to the housing separated in the at least one direction from the first point or a second point within the housing and arranged to overlap with at least a portion of the first member; and a detection circuit configured to detect a relative location of the first member and the second member, wherein a first distance between the first point and the second point when the housing is in a flat state is different from a second distance between the first point and the second point when the housing is in a bent state in the at least one direction. Various embodiments of the present disclosure are possible. | 2017-07-13 |
20170199713 | Automatic Data Display Selection - Various implementations described herein are directed to a non-transitory computer readable medium having stored thereon computer-executable instructions which, when executed by a computer, may cause the computer to receive a number of display fields. The computer may retrieve a list of data types that correspond to marine electronics. The computer may also fill the number of display fields on a display with data corresponding to the list of data types. Data may only displayed if a sensor transmitting the data is detected on a network. | 2017-07-13 |
20170199714 | VEHICLE HEAD UNIT AND METHOD OF OPERATING THE SAME - The present disclosure provides a method of operating a vehicle head unit including a processor executing an application related to a connectivity service. In particular, the method includes: determining, by the processor, whether a current frame of video stream data transmitted from a user terminal corresponds to a black screen based on a line included in the current frame; determining, by the processor, whether the black screen continues for a predetermined time upon determining that the current frame corresponds to the black screen; and notifying, by the processor, that the user terminal needs to be re-connected or re-executed upon determining that the black screen continues for the predetermined time. | 2017-07-13 |
20170199715 | IMAGE DISPLAY APPARATUS - An image display apparatus is disclosed. The image display apparatus includes a display, an interface unit to exchange data with a mobile terminal, and a controller configured to display an mirroring image received from the mobile terminal and to display additional information related to the mirroring image in a blank area other than a display area for display of the mirroring image. | 2017-07-13 |
20170199716 | GESTURE-CONTROLLED TABLETOP SPEAKER SYSTEM - A speaker system includes a case, an audio input, speakers, an accelerometer, and a computer processor. The audio input is structured to receive a program audio signal from an audio device. The speakers are configured to play an audio output based on the program audio signal, the audio output causing a vibration of the case. The accelerometer is configured to detect the vibration of the case as well as a user tap on the case. The computer processor is configured to identify a user gesture that includes the tap on the case, to identify the tap apart from the case vibration by processing the detected vibration of the case and the detected user tap on the case based on information from the program audio signal to separate the detected user tap from the detected vibration, and to commence a particular function associated with the user gesture. | 2017-07-13 |
20170199717 | CONTROL OF VEHICLE INTERIOR SOUND LEVELS BASED ON VEHICLE LOCATION - A computing device for a vehicle interior sound control system is described. The device includes one or more processors for controlling operation of the computing device, and a memory for storing data and program instructions usable by the one or more processors. The one or more processors are configured to execute instructions stored in the memory to operate, responsive to a location of the vehicle, at least one portion of the vehicle so as to control a sound level in an interior of the vehicle produced by the at least one portion of the vehicle. | 2017-07-13 |
20170199718 | METHOD FOR CALLING OUT MUSIC PLAYLIST BY HAND GESTURE - The Invention discloses a method for calling out music playlist by hand gesture, comprising the following steps to: enter playing interface of music player, set up the corresponding plane coordinate system according to the playing interface, and set positive direction of X-axis and Y-axis. Define a hand gesture area in the playing interface, and conduct ACTION_MOVE operation in the hand gesture area to call out music playlist. By the corresponding gesture operations in the hand gesture area, the music player will directly pop up the music playlist, and the user may not click the button. | 2017-07-13 |
20170199719 | SYSTEMS AND METHODS FOR RECORDING AND PLAYING AUDIO - An audio device can include audio inputs, such as a microphone and an auxiliary input, as well as audio outputs, such as one or more speakers. The audio device can include a memory element for storing pre-recorded audio files, such as songs. The memory element also can be used to allow a user to record his or her own audio. In some implementations, the memory element can include memory slots allocated into different buckets. For example, a first bucket can be used to store built-in songs, a second bucket can be used to store recorded music, and a second bucket can be used to store voice audio recorded by the user. The audio device can output audio saved in the memory element. For example, in some implementations, the audio device can output a pre-recorded song overlaid with vocals recorded by the user. | 2017-07-13 |
20170199721 | DEVICE CONTROL BASED ON ITS OPERATIONAL CONTEXT - Systems and methods for controlling a portable electronic communication device use device operational context to provide user trigger or command input. When user input is received from a user of the device, a set of user input options is selected based on an operational context of the device, including an identification of at least one running application. Each user input option is associated with a device action, and the received user input is mapped to a matching user input option within the selected set of user input options. The device action associated with the matching user input option is then executed. | 2017-07-13 |
20170199722 | ZERO-DELAY COMPRESSION FIFO BUFFER - A compression first in, first out (cFIFO) that includes at least two FIFOs is described. A first FIFO is used to store instances of higher words in data entries, and a second FIFO is used to store corresponding instances of lower words in the data entries. If an instance of the higher word for a data entry has a different value than an immediately preceding stored instance of the higher word associated with at least an immediately preceding data entry which is stored in the second FIFO, memory pointers are incremented so that a subsequent instance of the higher word will be stored in the second FIFO without overwriting the instance of the higher word. Otherwise, the memory pointers are unchanged, which associates the instance of the lower word with the immediately preceding stored instance of the higher word. | 2017-07-13 |
20170199723 | CIRCUITRY AND METHOD FOR PERFORMING DIVISION - A data processing apparatus comprises signal receiving circuitry to receive a signal corresponding to a divide instruction that identifies a dividend x and a divisor d. Processing circuitry performs, in response to said divide instruction, a radix-N division algorithm to generate a result value q=x/d, where N is an integer power of 2 and greater than 1. Said division algorithm comprises a plurality of iterations, each of said plurality of iterations being performed by quotient digit calculation circuitry to determine a quotient value of that iteration q[i+1] based on a remainder value of a previous iteration rem[i]; and remainder calculation circuitry to determine a remainder value of that iteration rem[i+1] based on said quotient value of that iteration q[i+1] and said remainder value of said previous iteration rem[i]. Result calculation circuitry derives said result value q based on each quotient value selected by said digit selection circuitry for each of said plurality of iterations. For at least some of said plurality of iterations, said quotient digit calculation circuitry speculatively determines a set of candidate values before a quotient value of said previous iteration is known and, in response to said quotient value of said previous iteration becoming known, determines said quotient value of that iteration q[i+1] based on one of said candidate values. | 2017-07-13 |
20170199724 | Round For Reround Mode In A Decimal Floating Point Instruction - A round-for-reround mode (preferably in a BID encoded Decimal format) of a floating point instruction prepares a result for later rounding to a variable number of digits by detecting that the least significant digit may be a 0, and if so changing it to 1 when the trailing digits are not all 0. A subsequent reround instruction is then able to round the result to any number of digits at least 2 fewer than the number of digits of the result. An optional embodiment saves a tag indicating the fact that the low order digit of the result is 0 or 5 if the trailing bits are non-zero in a tag field rather than modify the result. Another optional embodiment also saves a half-way-and-above indicator when the trailing digits represent a decimal with a most significant digit having a value of 5. An optional subsequent reround instruction is able to round the result to any number of digits fewer or equal to the number of digits of the result using the saved tags. | 2017-07-13 |
20170199725 | SEMICONDUCTOR DEVICE, POSITION DETECTION DEVICE, AND CONTROL METHOD OF SEMICONDUCTOR DEVICE - The speed of pen position detection is improved without increasing the circuit area and the current consumption. A sampling circuit samples a signal and outputs sampling data. A arithmetic circuit calculates a real part and an imaginary part of the sampling data. The arithmetic circuit classifies the real part of the sampling data into one of a plurality of groups and classifies the imaginary part of the sampling data into one of the groups according to an order of output of the sampling data from the sampling circuit. Then, the arithmetic circuit adds together real parts of sampling data belonging to a group and adds together imaginary parts of sampling data belonging to a group for each of the groups, and calculates amplitude and phase of the signal by using an addition result of the real parts and an addition result of the imaginary parts of each of the groups. | 2017-07-13 |
20170199726 | MULTIPLY ADD FUNCTIONAL UNIT CAPABLE OF EXECUTING SCALE, ROUND, GETEXP, ROUND, GETMANT, REDUCE, RANGE AND CLASS INSTRUCTIONS - A method is described that involves executing a first instruction with a functional unit. The first instruction is a multiply-add instruction. The method further includes executing a second instruction with the functional unit. The second instruction is a round instruction. | 2017-07-13 |
20170199727 | TRANSACTION FLOW VISUALIZATION - Transaction data is accessed and a flow of a particular one of the plurality of transactions is determined from the transaction data, the flow describing involvement of a particular set of the software components in the particular transaction and a plurality of transaction fragments of the particular transaction. A duration of each of the plurality of transaction fragments can be determined and a graphical representation of the flow can be generated that includes a set of graphical block elements and a set of graphical connector elements, each of the graphical block elements representing a respective software component, each of the graphical connector elements representing a respective one of the transaction fragments, where a particular one of the graphical connector elements is formatted based on the respective duration determined for the corresponding transaction fragment. | 2017-07-13 |
20170199728 | SPREADSHEET TOOL MANAGER FOR COLLABORATIVE MODELING - According to an embodiment of the present invention, a computer-implemented method for collaborative management of a plurality of modeling tools is described. The method may include receiving, via a processor, a modeling tool request from a user for a modeling tool configured to operate in a spreadsheet application, determining, via an inventory manager, whether a tool record exists matching the modeling tool request, building, via a tool creation module, a new modeling tool configured to operate in the spreadsheet application responsive to determining that a tool record does not exist, and updating, via the inventory manager, a tool record in an inventory database if a tool record does not exist that matches the modeling tool request. | 2017-07-13 |
20170199729 | APPLICATION DEVELOPING METHOD AND SYSTEM - The present disclosure relates to an electronic application developing method. The method comprises providing a development platform with a plurality of cross-industry application templates. Users can design applications and plan business processes via the development platform efficiently without building any infrastructure or writing any programming code. | 2017-07-13 |
20170199730 | Application Modification - Techniques for modifying an application are described herein. In some examples, a method includes generating, via a processor, a representation of an application and detecting a flow of data in the representation of the application based on static analysis. The method can also include detecting a predetermined property to be verified, the predetermined property comprising a source point in the representation of the application and a sink point in the representation of the application. In addition, the method can include detecting that the flow of data violates the predetermined property. Furthermore, the method can include selecting a set of changes to the representation of the application that prevents the violation of the predetermined property and modifying the application based on the selected set of changes. | 2017-07-13 |
20170199731 | METHOD FOR DEFINING ALIAS SETS - One or more processors determine whether a first procedure within a first program meets a first criterion. The first criterion is included in a plurality of criteria that are configured for pessimistic aliasing. Responsive to the determination, one or more processors determine whether to flag the first procedure for pessimistic aliasing. | 2017-07-13 |
20170199732 | EXTRACTING SOURCE CODE - Methods, systems, and apparatus, including computer programs encoded on computer storage media, for extracting source code. One of the methods includes receiving, by a newly created process, a request to execute code of an executable file in the newly created process, wherein the request specifies a parameter. The newly created process loads a process interception library. Library initialization code of the process interception library determines whether the parameter should be intercepted. In response to determining that the parameter should be intercepted, the parameter is provided to another process. | 2017-07-13 |
20170199733 | METHOD FOR TERMINAL TO UPDATE OPERATING SYSTEM, TERMINAL AND SYSTEM - Provided is a method for a terminal to update an operating system, including: acquiring a terminal identifier that needs to update an operating system; updating a first operating system corresponding to the terminal identifier on a server according to system update information; and sending an update result of the first operating system to a terminal corresponding to the terminal identifier, so that a second operating system of the terminal displays the update result. The embodiments of the present invention enable a terminal to update an operating system in time, and can improve the update efficiency of the terminal, improve the security and stability of the operating system of the terminal, reduce the time cost to update the terminal by a user and improve user experience. | 2017-07-13 |
20170199734 | SYSTEMS AND METHODS FOR VERSIONING HOSTED SOFTWARE - Systems and methods for performing a validated analysis can include access to first and second versions of an analysis engine. The first version of the analysis engine can be used to perform a previously validated analysis. After the second version is made available, the first version can be continued to be used while the second version undergoes validation. The user can initiate a migration from the first version to the second version when the validation is complete. Access to both versions can be maintained for a period of time to allow users to migrate on their own schedule, and a common login interface can direct the user to a default version or allow the user to select an alternate version. | 2017-07-13 |
20170199735 | SOFTWARE DISCOVERY SCAN OPTIMIZATION BASED ON PRODUCT PRIORITIES - An advanced method for a software discovery process may be provided. The method comprises receiving a product identifier comprising at least one mandatory software item and a related product priority. The method includes further determining a scan type for each mandatory software item of all product identifiers of all received related product priorities, performing a priority-based software discovery, using a next scan type for each of the at least one mandatory software items for each of the at least one product identifiers for each of the received product priorities, starting with a highest priority, requiring the next scan type, and repeating the previous step of performing the priority-based software discovery with a next scan type until all scan types for mandatory software have been executed. | 2017-07-13 |
20170199736 | TRANSACTIONAL BOUNDARIES FOR SOFTWARE SYSTEM PROFILING - Transaction data is received from a software-based agent instrumented on a particular software component in a system comprising a plurality of software components. The transaction data can describe characteristics of a particular transaction involving the particular software component and another software component in the plurality of software components as observed by the agent during operation of the system, the particular transaction is contemporaneous with another transaction involving software components in the system. From the transaction data, the particular transaction is determined to fall within a defined transaction boundary for the system. A profiler is automatically invoked to profile the particular transaction based on determining that the particular transaction falls within the transaction boundary. | 2017-07-13 |
20170199737 | EFFICIENT DETECTION OF ARCHITECTURE RELATED BUGS DURING THE PORTING PROCESS - Systems, methods, and computer program products to perform an operation comprising identifying a first commit of a plurality of commits for a software project, wherein a source code of the first commit is executable in a first system architecture, computing a score for each commit in a first set of the plurality of commits, wherein each score reflects a likelihood of success in porting the source code of the respective commit from the first system architecture to a second system architecture, wherein a version of each commit in the first set of commits is between a version of the first commit and a current version of the software project, identifying one or more of the first set of commits based on the scores for each commit, and building the source code of the one or more of the first set of commits for execution on the second system architecture. | 2017-07-13 |
20170199738 | DATA PROCESSING - Data processing circuitry comprises allocation circuitry to allocate one or more source and destination processor registers, of a set of processor registers each defined by a respective register index, to a processor instruction for use in execution of that processor instruction and to associate, with the processor instruction, information to indicate the register index of the allocated source and destination processor registers; the avocation circuitry being selectively operable to allocate, to a processor instruction, a group of destination processor registers having a subset of their register indices in common and to associate, with the processor instruction, information to indicate the register index of one processor register of the group and identifying information to identify one or more bits of the register index which differ between the processor registers in the allocated group of processor registers. | 2017-07-13 |
20170199739 | INSTRUCTION PREFETCHER DYNAMICALLY CONTROLLED BY READILY AVAILABLE PREFETCHER ACCURACY - According to one general aspect, an apparatus mat include a branch prediction unit, a fetch unit, and a pre-fetch circuit or unit. The branch prediction unit may be configured to output a predicted instruction. The fetch unit may be configured to fetch a next instruction from a cache memory. The pre-fetcher circuit may be configured to pre- fetch a previously predicted instruction into the cache memory based upon a relationship between the predicted instruction and the next instruction. | 2017-07-13 |
20170199740 | PREDICTIVE FETCHING AND DECODING FOR SELECTED INSTRUCTIONS - Predictive fetching and decoding for selected instructions (e.g., operating system instructions, hypervisor instructions or other such instructions). A determination is made that a selected instruction, such as a system call instruction, an asynchronous interrupt, a return from system call instruction or return from asynchronous interrupt, is to be executed. Based on determining that such an instruction is to be executed, a predicted address is determined for the selected instruction, which is the address to which processing transfers in order to provide the requested services. Then, fetching of instructions beginning at the predicted address prior to execution of the selected instruction is commenced. Further, speculative state relating to a selected instruction, including, for instance, an indication of the privilege level of the selected instruction or instructions executed on behalf of the selected instruction, is predicted and maintained. | 2017-07-13 |
20170199741 | INSTRUCTION TRANSFER CONTROL USING PROGRAM COUNTERS - A system that for storing program counter values is disclosed. The system may include a program counter, a first memory including a plurality of sectors, a first circuit configured to retrieve a program instruction from a location in memory dependent upon a value of the program counter, send the value of the program counter to an array for storage and determination a predicted outcome of the program instruction in response to a determination that execution of the program instruction changes a program flow. The second circuit may be configured to retrieve the value of the program counter from a given entry in a particular sector of the array, and determine an actual outcome of the program instruction dependent upon the retrieved value of the program counter. | 2017-07-13 |
20170199742 | SELECTIVE SUPPRESSION OF INSTRUCTION TRANSLATION LOOKASIDE BUFFER (ITLB) ACCESS - Processing of an instruction fetch from an instruction cache is provided, which includes: determining whether the next instruction fetch is from a same address page as a last instruction fetch from the instruction cache; and based, at least in part, on determining that the next instruction fetch is from the same address page, suppressing for the next instruction fetch an instruction address translation table access, and comparing for an address match results of an instruction directory access for the next instruction fetch with buffered results of a most-recent, instruction address translation table access for a prior instruction fetch from the instruction cache. | 2017-07-13 |
20170199743 | SELECTIVE SUPPRESSION OF INSTRUCTION CACHE-RELATED DIRECTORY ACCESS - Processing of an instruction fetch from an instruction cache is provided, which includes: determining whether the next instruction fetch is in a same cache line of the instruction cache as a last instruction fetch; and based, at least in part, on determining that the next instruction fetch is in the same cache line, suppressing for the next instruction fetch one or more instruction cache-related directory accesses, and forcing for the next instruction an address match signal for the same cache line. The suppressing may include generating a known-to-hit signal where the next fetch is in the same cache line, and the last fetch is not a branch instruction, and issuing an instruction cache hit where a cache line segment of the same cache line having the next instruction has a valid validity bit, the valid validity bit having been retrieved and maintained based on a most-recent, instruction cache-directory-accessed fetch. | 2017-07-13 |
20170199744 | METHOD AND APPARATUS FOR EFFICIENT SCHEDULING FOR ASYMMETRICAL EXECUTION UNITS - A method and system performs instruction scheduling in an out-of-order microprocessor pipeline. The method and system selects a first set of instructions to dispatch from a scheduler to an execution module, wherein the execution module comprises two types of execution units. The first type of execution unit executes both a first and a second type of instruction and the second type of execution unit executes only the second type. Next, the method selects a second set of instructions to dispatch, which is a subset of the first set and comprises only instructions of the second type. The method determines a third set of instructions, which comprises instructions not selected as part of the second set. Further, the method dispatches the second set for execution using the second type of execution unit and dispatching the third set for execution using the first type of execution unit. | 2017-07-13 |
20170199745 | MULTIMODE STARTUP METHOD FOR INTELLIGENT DEVICE AND THE SYSTEM THEREOF - The present invention provides a multimode startup method for intelligent device and the system thereof, through predefining a plurality of startup modes, and based on a plurality of application scenarios according to the application and service programs installed in the intelligent device, assigning the said application programs and service programs into different startup modes, then receiving a control instruction sent from the user, identifying the startup mode according to the said control instruction, before loading the application and service programs list assigned to the specific startup mode according to the identified startup mode. The method and system stated in the present invention, provides different startup modes for a user to select, in order to achieve a goal of improving a startup speed, separating an application scenario, and simplifying a system for obtaining more sources, which makes a user reach the application scenario faster, and obtain a clearer and faster operation experience in the scenario, thus it owns a strong practical value and a wide application scenario. | 2017-07-13 |
20170199746 | Management Controller - A system management controller with a consolidated memory is disclosed. The example computing device includes a processor to host an operating system and a system memory to be used by the processor to execute instructions. The computing device also includes a management controller to enable out-of-band management of the computing device. The management controller includes a consolidated memory device. A first memory block of the consolidated memory device is used by the management controller as a working memory and a second memory block of the consolidated memory device is used for long-term storage of programming instructions. | 2017-07-13 |
20170199747 | DRIVERLESS PROGRAMMABLE COMPUTER INPUT DEVICES AND RELATED METHODS - Driverless programmable human interface devices are provided that may be configured using plain text configuration information, such as may be viewed or edited by a user. The human interface device may provide a graphical user interface via one or more software applications accessible via a virtual storage volume provided as part of the human interface device, and which may be executed directly by a user without requiring installation. The user may view and modify textual configuration information directly, or may utilize the provided graphical user interface to do so indirectly. | 2017-07-13 |
20170199748 | PREVENTING ACCIDENTAL INTERACTION WHEN RENDERING USER INTERFACE COMPONENTS - An approach for preventing accidental interaction when rendering a user interface, the approach involving monitoring a screen record having one or more screen positions and one or more draw times for one or more user interface components of a program application, recording an interaction time associated with a user interface component and retrieving a draw time of the user interface component from the screen record, calculating whether or not an interaction with the user interface component was incorrectly directed and taking an action with the interaction if the interaction was incorrectly directed. | 2017-07-13 |
20170199749 | DYNAMIC GRAPHICAL USER INTERFACE PREVIEWS - In some implementations, a computing device can present dynamic graphical user interface previews of an application on a display of the computing device. For example, cached graphical user interface (GUI) content can be dynamically generated in response to receiving application data update information for the corresponding application. The computing device can dynamically determine a portion of the cached GUI content to present on a display of the computing device. For example, the cached GUI content can be an image that is larger than the display of the computing device. The computing device can generate a GUI preview based a portion of the cached GUI content that fits on the display of the computing device based on an indication of which portion of the cached GUI content the user wishes to view and present the preview on the display of the computing device. | 2017-07-13 |
20170199750 | ERGONOMIC DIGITAL COLLABORATIVE WORKSPACE APPARATUSES, METHODS AND SYSTEMS - The DIGITAL WORKSPACE ERGONOMICS APPARATUSES, METHODS AND SYSTEMS (“DWE”) transform user multi-element touchscreen gestures via DWE components into updated digital collaboration whiteboard objects. In one embodiment, the DWE obtains user whiteboard input from a client device participating in a digital collaborative whiteboarding session. The DWE parses the user whiteboard input to determine user instructions, and modifies a tile object included in the digital collaborative whiteboarding session according to the determined user instructions. The DWE generates updated client viewport content for the client device. Also, the DWE determines that client viewport content of a second client device should be modified because of modifying the tile object included in the digital whiteboard. The DWE generates updated client viewport content for the second client device after determining that the content of the second client device should be modified, and provides the updated client viewport content to the second client device. | 2017-07-13 |
20170199751 | DEVICE AND METHOD FOR CONTROLLING AN IP NETWORK CORE - A control device can be used to control a base station, a switch, and a gateway leading to an external network. The device may communicate with a connection server connecting to a cloud computer system and with virtual functions of a control plane of the core network as instantiated in the computer system. The device may manage a database identifying for at least one terminal at least one of the virtual functions allocated to that terminal and a database associating at least one of the virtual functions with an identifier and a state of that function, and update the databases on the basis of information received from the connection server and/or from the virtual functions. The device may use one and/or the other of the databases in order to set up and/or maintain a user plane for a terminal between the base station, the switch, and the interconnection gateway. | 2017-07-13 |
20170199752 | OPTIMIZING THE DEPLOYMENT OF VIRTUAL RESOURCES AND AUTOMATING POST-DEPLOYMENT ACTIONS IN A CLOUD ENVIRONMENT - A computer-implemented method includes: monitoring, by a computing device, performance of currently deployed virtual machines (VMs) that implement particular services; determining, by the computing device, optimal configuration options for deployment of new VMs that implement one or more of the particular services based on the monitoring the performance of the currently deployed VMs; and outputting, by the computing device, information regarding the optimal configuration options to a user requesting the deployment of a new VM implementing one or more of the particular services. | 2017-07-13 |
20170199753 | ACQUIRING LOCATION INFORMATION FOR LOGICAL PARTITION WITHIN VIRTUAL MACHINE - Acquiring location information is presented, including acquiring disk location information for logical partitions, the logical partitions pertaining to a virtual machine, matching the disk location information corresponding to the logical partitions against location information for at least one virtual disk stored on a physical device, in the event that the disk location information matches the location information for the at least one virtual disk, determining the location information for the at least one virtual disk obtained by the matching to be the disk location information for the logical partitions in the physical device, and outputting the location information for the at least one virtual disk. | 2017-07-13 |
20170199754 | System and Method for Hypervisor-Based Remediation and Provisioning of a Computer - A computer located outside of an organizational computing environment is remotely prepared and configured to work in the organizational computing environment. A hypervisor operating system is installed and replaces the primary operating system of the computer, and the primary operating system, virtual software appliances (VSA) and virtual machines (VM) can execute as processes of the hypervisor. The hypervisor is configured to establish secure connection with organizational computing environment and to receive from it organization-configured image software for configuring the compute to work in the organizational computing environment. The secure connection can also be used for remote maintenance of the computer even when the computer operating system is faulty or inactive. | 2017-07-13 |
20170199755 | METHOD AND SYSTEM FOR TRANSFERRING A VIRTUAL MACHINE - A virtual machine management system is used to instantiate, wake, move, sleep, and destroy individual operating environments in a cloud or cluster. In various embodiments, there is a method and system for transferring an operating environment from a first host to a second host. The first host contains an active environment, with a disk and memory. The disk is snapshotted while the operating environment on the first host is still live, and the snapshot is transferred to the second host. After the initial snapshot is transferred, a differential update using rsync or a similar mechanism can be used to transfer just the changes from the snapshot from the first to the second host. In a further embodiment, the contents of the memory are also transferred. This memory can be transferred as a snapshot after pausing the active environment, or by synchronizing the memory spaces between the two hosts. | 2017-07-13 |
20170199756 | ARCHIVING VIRTUAL MACHINES IN A DATA STORAGE SYSTEM - The data storage system according to certain aspects can manage the archiving of virtual machines to (and restoring of virtual machines from) secondary storage. The system can determine whether to archive virtual machines based on usage data or information. The usage information may include storage usage, CPU usage, memory usage, network usage, events defined by a virtual machine software or application, etc. The system may archive virtual machines that are determined to have a low level of utilization. For example, a virtual machine can be archived when its usage level falls below a threshold level. The system may create a virtual machine placeholder for an archived virtual machine, which may be a “light” or minimal version of the virtual machine that acts as if it is the actual virtual machine. By using a virtual machine placeholder, a virtual machine may appear to be active and selectable by the user. | 2017-07-13 |
20170199757 | VIRTUALIZED EXECUTION ACROSS DISTRIBUTED NODES - A non-volatile computer readable medium includes computer program instructions to cause a computing device to perform steps in a process. The process comprises detecting an occurrence of an originating event; selecting, in response to the occurrence of the originating event, a unit of work from a queue; selecting, based at least in part on an identification script, a network available to accept the unit of work; sending the unit of work to a first configurable worker object in the network that encapsulates an application function capable of performing a processing task; processing the unit of work by the first configurable worker object; and indicating, by the first configurable worker object, that the unit of work has been processed. | 2017-07-13 |
20170199758 | PRIORITIZATION OF TRANSACTIONS BASED ON EXECUTION PROGRESS - Controlling access to at least one memory location by a transaction is provided in a multi-processor transactional execution environment. Included is: tracking execution progress of a transaction, the execution progress being a metric of work performed for the transaction which includes at least one of instructions processed or cycles elapsed; based on encountering a conflict with another process for a memory location, comparing execution process of the transaction and execution progress of the other process; and deciding whether to continue the transaction based on the comparing. For instance, based on the execution progress of the transaction being greater than the execution progress of the other process, the transaction is continued, and based on the execution progress of the transaction being less that the execution progress of the other process, then the transaction is aborted. | 2017-07-13 |
20170199759 | PRIORITIZATION OF TRANSACTIONS BASED ON EXECUTION PROGRESS - Controlling access to at least one memory location by a transaction is provided in a multi-processor transactional execution environment. Included is: tracking execution progress of a transaction, the execution progress being a metric of work performed for the transaction which includes at least one of instructions processed or cycles elapsed; based on encountering a conflict with another process for a memory location, comparing execution process of the transaction and execution progress of the other process; and deciding whether to continue the transaction based on the comparing. For instance, based on the execution progress of the transaction being greater than the execution progress of the other process, the transaction is continued, and based on the execution progress of the transaction being less that the execution progress of the other process, then the transaction is aborted. | 2017-07-13 |
20170199760 | MULTI-TRANSACTIONAL SYSTEM USING TRANSACTIONAL MEMORY LOGS - Techniques are disclosed for generating a multi-transactional system using transactional memory techniques. According to certain embodiments, a device may include a memory, one or more processing entities, and a transactional memory system for maintaining a plurality of transactional memory (TM) logs in a first portion of the memory. Each TM log may be associated with one transaction from a plurality of transactions sequentially executed by the one or more processing entities and each transaction comprises a plurality of operations. Furthermore, each TM log associated with each transaction comprises information associated with changes to a second portion of the memory caused by execution of operations from the transaction using the one or more processing entities. The TM logs for completed transactions may be used for error detection and recovery and maintaining high availability of the device. | 2017-07-13 |
20170199761 | APPARATUS AND METHOD TO CORRECT AN EXECUTION TIME OF A PROGRAM EXECUTED BY A VIRTUAL MACHINE - An apparatus acquires, at each of times having a predetermined interval, first data identifying one of programs which is being executed at the each time by a virtual machine. When a first program is executed at a time before or after a steal time-period indicating a time-period during which a virtual machine program to operate the virtual machine is suspended, the apparatus outputs, in association with the first data identifying the first program, second data indicating a result of subtracting the steal time-period from an apparent execution time of the first program which indicates a time-period from a time of starting execution of the first program to a time of ending execution of the first program. | 2017-07-13 |
20170199762 | ENHANCED PRIORITIZATION OF TASKS IN REAL-TIME - Techniques are described for a real-time prioritization of service tasks. In one example, a method includes receiving one or more customer activity inputs associated with one or more service tasks for performing in a service establishment on behalf of customers of the service establishment. The method further includes receiving one or more metadata items associated with the one or more service tasks. The method also includes determining a prioritization of the one or more service tasks based on the one or more customer activity inputs, wherein determining the prioritization includes generating a prioritization value for the one or more service tasks based at least in part on at least one of the one or more metadata items or the one or more customer activity inputs, and updating the one or more service tasks based on the prioritization value. | 2017-07-13 |
20170199763 | METHOD AND APPARATUS FOR VISUALIZING SCHEDULING RESULT IN MULTICORE SYSTEM - A method and an apparatus for visualizing a scheduling result in a multicore system. A method for visualizing a scheduling result of a plurality of tasks with respect to a plurality of cores in a multicore system includes extracting scheduling data in a time section to be visualized, determining whether the number of the extracted scheduling data exceeds a preset first threshold value, if the number of the extracted scheduling data exceeds the preset first threshold value, performing reduction of the extracted scheduling data, and visualizing and outputting the reduced scheduling data. | 2017-07-13 |
20170199764 | SYSTEMS AND METHODS FOR SMART TOOLS IN SEQUENCE PIPELINES - The invention relates to bioinformatics pipelines and wrapper scripts that call executables in those pipelines and that also identify beneficial changes to the pipelines. A tool in a pipeline has a smart wrapper that can cause the tool to analyze the sequence data it receives but that can also select a change to the pipeline when circumstances warrant. In certain aspects, the invention provides a system for genomic analysis. The system includes a processor coupled to a non-transitory memory. The system is operable to present to a user a plurality of genomic tools organized into a pipeline. At least a first one of the tools comprises an executable and a wrapper script. The system can receive instructions from the user and sequence data—instructions that call for the sequence data to be analyzed by the pipeline—and select, using the wrapper script, a change to the pipeline. | 2017-07-13 |
20170199765 | METHOD OF SHARING A MULTI-QUEUE CAPABLE RESOURCE BASED ON WEIGHT - An input/output (I/O) throttling method of a process group, performed with respect to a multi-queue capable resource, includes setting a total credit corresponding to the multi-queue capable resource, allocating an individual credit to the process group based on the total credit and a weight of the process group, and selectively dispatching an I/O request of the process group to a multi-queue manager by consuming at least a part of the individual credit. | 2017-07-13 |
20170199766 | LOW LATENCY COMPUTATIONAL CAPACITY PROVISIONING - A system for providing low latency computational capacity is provided. The system may be configured to maintain a pool of virtual machine instances, which may be assigned to users to service the requests associated with the users. The system may further be configured to receive a request to acquire compute capacity for executing a program code associated with a particular user, determine whether the pool of virtual machine instances includes a container that may be used to execute the program code therein, and cause the program code of the particular user to be executed in the container. | 2017-07-13 |
20170199767 | RESOURCE MANAGEMENT METHOD, HOST, AND ENDPOINT - Embodiments provide a resource management technology that may be applied to a host, where the host includes a CPU, an endpoint connected to the CPU, and an I/O device connected to the endpoint. A method includes: allocating, by the CPU, a target endpoint to a target process, where a virtual device is disposed on the target endpoint; obtaining, by the target endpoint, a performance specification of the target process, and adjusting a performance parameter of the virtual device according to the performance specification, where the adjusted virtual device satisfies a total requirement of performance specifications of all processes that use the target endpoint; and when the target process needs to access a resource, obtaining, from the I/O device, a resource that satisfies the performance specification of the target process, and providing the obtained resource to the target process for use. | 2017-07-13 |
20170199768 | USING HYPERVISOR FOR PCI DEVICE MEMORY MAPPING - A method to manage peripheral component interconnect (PCI) memory includes accessing a page table that includes mapped data representing base address register (BAR) space and addresses of PCI devices. The method also includes determining whether a requested address of a PCI device has a corresponding entry in the page table. The method further includes invoking a hypervisor to perform a memory operation to obtain address information of the PCI device upon determining that the requested address does not have the corresponding entry in the page table. | 2017-07-13 |
20170199769 | MANAGING ASSET PLACEMENT USING A SET OF WEAR LEVELING DATA - Disclosed aspects include managing asset placement with respect to a shared pool of configurable computing resources. A set of wear-leveling data may be detected for a set of hosts of the shared pool of computing resources. Based on the wear-leveling data, a placement arrangement for the set of assets may be determined with respect to the set of hosts of the shared pool of configurable computing resources. The placement arrangement may be based on a lesser utilized hardware factor which indicates a lesser likelihood of a hardware error event. Based on the placement arrangement, the set of assets may be placed with respect to the set of hosts of the shared pool of configurable computing resources. | 2017-07-13 |