31st week of 2015 patent applcation highlights part 55 |
Patent application number | Title | Published |
20150213983 | SWITCHING CONTACTOR - A switching electrical power contactor having a bi-blade type switch, has ferrous plates attached to the blades to increase the current carrying capacity and reduce the resistance of the switch. The contacts of the switches are arranged in pairs with at least one pair of contacts being arranged to close before another pair of contacts. | 2015-07-30 |
20150213984 | ELECTROMAGNETIC CONTACTOR - An electromagnetic contactor includes a contact device including a pair of fixed contacts and a movable contact contacting to and separating from the pair of fixed contacts. The pair of fixed contacts includes support conductor portions supported with an upper surface of a contact housing case, and C-shaped portions each including an upper plate portion linked to an end portion of the support conductor portion, an intermediate plate portion extending downward from a side of the upper plate portion opposite to that of the other support conductor portion, and a lower plate portion extending from a lower end of the intermediate plate portion toward a side of the other support conductor portion and formed with a contact portion on an upper surface thereof. The contact housing case includes contact bearing portions bearing a side of the lower plate portions of the pair of fixed contacts opposite to the movable contact. | 2015-07-30 |
20150213985 | ELECTROMAGNETIC SWITCH - An electromagnetic switch includes a pair of fixed contacts fixed in a contact housing case with a predetermined distance therebetween; a movable contact disposed in the contact housing case to contact to and separate from the pair of fixed contacts; and an electromagnet unit causing the movable contact to contact to and separate from the pair of fixed contacts. The electromagnet unit has a magnetic yoke enclosing an exciting coil, a movable plunger disposed to move through a through hole provided in the magnetic yoke and having a contact pole surface facing the contact pole surface of the magnetic yoke, and a linking shaft linking the movable plunger and the movable contact. The contact pole surface of the movable plunger includes a circular protruding portion having a width narrower than that of a surface facing the magnetic yoke for increasing a magnetic flux density. | 2015-07-30 |
20150213986 | ELECTROMAGNETIC SWITCH - An electromagnetic switch includes a pair of fixed contacts disposed and fixed in a contact housing case with a predetermined distance therebetween; a movable contact disposed in the contact housing case so as to contact and separate from the pair of fixed contacts; and an electromagnet unit which brings the movable contact into and out of contact with the pair of fixed contacts. The electromagnet unit has a magnetic yoke enclosing an exciting coil, a movable plunger having a contact pole surface facing the contact pole surface of the magnetic yoke, and a linking shaft which links the movable plunger and the movable contact, and magnetic paths through which a holding force is generated by external magnetic fluxes generated by a flowing current when the movable contact contacts the pair of fixed contacts, are formed on the contact pole surface of the magnetic yoke. | 2015-07-30 |
20150213987 | REMOTE CONTROL RELAY - A polarized electromagnet in a remote control relay includes a pair of armatures into which opposite ends of the plunger in a forward/backward movement direction are respectively inserted and fixed; a yoke to which one of the armatures becomes closer than the other when the plunger is at a stop position; an auxiliary yoke which contacts with one magnetic pole of a permanent magnet whose the other magnetic pole contacting with the yoke, the auxiliary yoke becoming closer to the other of the armatures than the one of the armatures; and a gap maintaining portion for maintaining a gap between the other of the armatures and the auxiliary yoke. When the plunger is at the stop position, the other of the armatures and the auxiliary yoke comes close to each other with the gap, a space is provided between the one of the armatures and the yoke. | 2015-07-30 |
20150213988 | TRIP DEVICE OF MOLDED CASE CIRCUIT BREAKER - Disclosed is a trip device of a molded case circuit breaker. The trip device includes a shooter configured to include a body and a rotating shaft which passes through the body, a double torsion spring coupled to both sides of the rotating shaft and configured to provide an elastic restoring force to enable the shooter to rotate, and a crossbar configured to include a hanger that contacts the hanging plate and limits a movement of the shooter. A hanging plate is provided at a lower portion of the body, and a hitting plate is provided at an upper portion of the body. | 2015-07-30 |
20150213989 | APPARATUS AND METHOD TO REMOTELY RESET A LOCK OUT MECHANISM - An apparatus to remotely reset a lock out mechanism of an electric distribution circuit breaker from a trip-free position includes a remote signal receiver to receive a remote reset signal and initiate movement of a lever based on the remote reset signal. The apparatus also includes a remote reset link assembly to move from a first position in response to the movement of the lever and cause a movement of a reset component. The movement of the reset component results in a reset of the lock out mechanism. | 2015-07-30 |
20150213990 | BARRIER FILM CONSTRUCTIONS AND METHODS OF MAKING SAME - A barrier film including a substrate; a base polymer layer adjacent to the substrate; an oxide layer adjacent to the base polymer layer; a adhesion-modifying layer adjacent to the oxide layer; and a top coat polymer layer adjacent to the adhesion-modifying layer. An optional inorganic layer can be applied over the top coat polymer layer. The inclusion of a adhesion-modifying layer provides for enhanced resistance to moisture and improved peel strength adhesion of the top coat polymer layer to the underlying barrier stack layers. | 2015-07-30 |
20150213991 | MICROPLASMA GENERATION DEVICES AND ASSOCIATED SYSTEMS AND METHODS - Microplasma generators and associated arrays and methods are described herein. Certain embodiments relate to a microplasma generator in which an elongated semiconductor structure can control electronic cun'ent supplied to a microplasma cavity. Plasmas can be created by supplying energy to a neutral gas so that free electrons and ions are created. In a thermal plasma, electrons, ions, and neutral atoms and/or molecules (referred to as “neutrals”) are in thermal equilibrium | 2015-07-30 |
20150213992 | ELECTRONIC DEVICE MULTI-LAYER GRAPHENE GRID - A vacuum electronic device includes a multi-layer graphene grid that includes at least two layers of graphene, where the transmission of electrons through the multi-layer graphene grid can be tuned by varying the parameters of the vacuum electronic device such as the number of graphene layers, relative positions of the electrodes, voltage biases applied to the electrodes, and other device parameters. | 2015-07-30 |
20150213993 | CONTINUOUS CONTACT X-RAY SOURCE - An x-ray device utilizes a band of material to exchange charge through tribocharging within a chamber maintained at low fluid pressure. The charge is utilized to generate x-rays within the housing, which may pass through a window of the housing. Various contact rods may be used as part of the tribocharging process. | 2015-07-30 |
20150213994 | X-RAY TUBE UNIT - An x-ray tube unit includes an x-ray tube unit housing, in which a vacuum housing is disposed, which includes a high-voltage component. The vacuum housing includes an insulating medium circulating in the x-ray tube unit housing flowing around it. Further, a cathode module and an anode are disposed in the vacuum housing, the cathode module lying at high voltage and including an emitter which emits electrons when heating current is fed to it. In addition, a potential difference is present between the cathode module and the anode for accelerating the emitted electrons. In accordance with an embodiment of the invention a high-voltage feed, a heating transformer and a radiation protection component are integrated into the high-voltage component, the high-voltage component being filled at least partly with an electrically-insulating encapsulation material. This produces a compact and installation-friendly x-ray tube unit which has high operational safety. | 2015-07-30 |
20150213995 | HIGH-VOLTAGE ENERGY-DISPERSIVE SPECTROSCOPY USING A LOW-VOLTAGE SCANNING ELECTRON MICROSCOPE - A scanning electron microscopy (SEM) and energy dispersive spectroscopy (EDS) apparatus that includes a scanning electron microscope, an x-ray detector, and an auxiliary acceleration voltage source. The scanning electron microscope includes a sample holder, and a layered electron beam column arranged to output an electron beam towards the sample holder at an initial beam energy. The auxiliary acceleration voltage source is to apply an auxiliary acceleration voltage between the sample holder and the layered electron beam column to accelerate the electron beam to a final beam energy. At the final beam energy, the electron beam is capable of generating x-rays at multiple wavelengths from a larger range of atomic species than the electron beam at the initial beam energy. | 2015-07-30 |
20150213996 | METHOD AND APPARATUS FOR NEUTRAL BEAM PROCESSING BASED ON GAS CLUSTER ION BEAM TECHNOLOGY - An apparatus, method and products thereof provide an accelerated neutral beam derived from an accelerated gas cluster ion beam for processing materials. | 2015-07-30 |
20150213997 | ION SOURCES, SYSTEMS AND METHODS - Ion sources, systems and methods are disclosed. | 2015-07-30 |
20150213998 | CHARGED PARTICLE BEAM DEVICE WITH DYNAMIC FOCUS AND METHOD OF OPERATING THEREOF - A retarding field scanning electron microscope for imaging a specimen is described. The microscope includes a scanning deflection assembly configured for scanning an electron beam over the specimen, one or more controllers in communication with the scanning deflection assembly for controlling a scanning pattern of the electron beam, and a combined magnetic-electrostatic objection lens configured for focusing the electron beam, wherein the objective lens includes a magnetic lens portion and an electrostatic lens portion. The electrostatic lens portion includes an first electrode configured to be biased to a high potential, and a second electrode disposed between the first electrode and the specimen plane, the second electrode being configured to be biased to a potential lower than the first electrode, wherein the second electrode is configured for providing a retarding field of the retarding field scanning electron microscope. The retarding field scanning electron microscope further includes a voltage supply being connected to the second electrode for biasing the second electrode to a potential and being in communication with the one or more controllers, wherein the one or more controllers synchronize a variation of the potential of the second electrode with the scanning pattern of the electron beam. | 2015-07-30 |
20150213999 | Charged Particle Beam Apparatus - The ordinary charged particle beam apparatus works on the assumption that signals are detected while its diaphragm and the sample are being positioned close to each other. This structure is not suitable for observing a sample with a prominently uneven surface in a gas atmosphere at atmospheric pressure or at a pressure substantially equal thereto. The present invention provides a charged particle beam apparatus that separates its charged particle optical tube from the space in which the sample is placed. The apparatus includes a detachable diaphragm that lets a primary charged particle beam permeate or pass therethrough. Installed in the space where the sample is placed is a detector that detects secondary particles discharged from the sample irradiated with the primary charged particle beam. | 2015-07-30 |
20150214000 | DEFECT OBSERVATION SYSTEM AND DEFECT OBSERVATION METHOD - When contamination or local electrification is generated during acquisition of a low-magnification image, if a high-magnification image contains both a portion in which the contamination or local electrification is generated and a portion in which the contamination or local electrification is not generated, a region whose image quality has changed due to the contamination or local electrification is erroneously recognized as a defect. Thus, defect detection fails or it may be impossible to correctly determine the feature quantity of a defect. The invention provides a defect observation system that acquires sample images at a low magnification and a high magnification, and sets the position or size of the field of view of the high-magnification image or the electron beam irradiation range during acquisition of the low-magnification image no that the image acquired at the high magnification does not contain the outer edge of the image acquired at the low magnification. | 2015-07-30 |
20150214001 | CORRELATIVE OPTICAL AND CHARGED PARTICLE MICROSCOPE - A Correlative Light and Electron Microscope (CLEM) is equipped with a TEM column and a light microscope fitted between the pole shoes of the objective lens of the TEM. To enlarge the acceptance solid angle for enhanced sensitivity a truncated lens is used. It is noted that this does not imply that the lens shows astigmatism (it is not a cylindrical lens). | 2015-07-30 |
20150214002 | ELECTRON MICROSCOPE AND ELECTRON BEAM DETECTOR - An electron microscope is provided with a scintillator ( | 2015-07-30 |
20150214003 | SAMPLE HOLDER AND METHOD FOR OBSERVING ELECTRON MICROSCOPIC IMAGE - In an upper main body of a sample holder, a laminate of an insulative thin film and a secondary electron emission protective thin film is provided. An electron beam emitted from an electron gun enters the secondary electron emission protective thin film side. The undersurface of the insulative thin film is a sample adhesion surface, where a sample to be an observation target is held by adsorption or the like. The secondary electron emission protective thin film is made of a material having a low secondary electron emission coefficient δ and, preferably, is non-insulative. That is, the secondary electron emission protective thin film is conductive even though the electric resistance is high. Accordingly, the charge level of a site irradiated with the electron beam has a low charge level. | 2015-07-30 |
20150214004 | METHOD FOR PREPARING AND ANALYZING AN OBJECT AS WELL AS PARTICLE BEAM DEVICE FOR PERFORMING THE METHOD - A system and method are provided for preparing and analyzing an object having a region of interest. Material is removed from a first surface of the object using a second particle beam. The first surface is monitored using a first particle beam and a second detector. A second surface of the object is generated when the material is removed from the first surface. Material is removed from the second surface using the second particle beam, and the removal of the material is monitored using the first particle beam and the second detector. Removing the material generates a first side and a second side, and the region of interest is arranged between the first side and the second side. The first particle beam is guided to the first side, and first charged particles of the first particle beam being transmitted through the region of interest are detected using a first detector. | 2015-07-30 |
20150214005 | METHOD FOR ENHANCING BEAM UTILIZATION IN A SCANNED BEAM ION IMPLANTER - A dosimetry system and method are provided for increasing utilization of an ion beam, wherein one or more side Faraday cups are positioned along a path of the ion beam and configured to sense a current thereof. The one or more side Faraday cups are separated by a distance associated with a diameter of the workpiece. The ion beam reciprocally scans across the workpiece, interlacing narrow scans and wide scans, wherein narrow scans are defined by reversing direction of the scanning near an edge of the workpiece, and wide scans are defined by reversing direction of the scanning at a position associated with an outboard region of the side Faraday cups. A beam current is sensed by the side Faraday cups concurrent with scanning the beam, wherein the side Faraday cups are connected to a dosimeter only concurrent with a wide scan of the ion beam, and are disconnected concurrent with narrow scans of the ion beam. The side Faraday cups are further connected to ground concurrent with narrow scans of the ion beam. | 2015-07-30 |
20150214006 | Endpoint Detection for Photolithography Mask Repair - A method includes scanning a lithography mask with a repair process, and measuring back-scattered electron signals of back-scattered electrons generated from the scanning. An endpoint is determined from the back-scattered electron signals. A stop point is calculated from the endpoint. The step of scanning is stopped when the calculated stop point is reached. | 2015-07-30 |
20150214007 | ION IMPLANTATION APPARATUS AND METHOD OF CONTROLLING ION IMPLANTATION APPARATUS - In an ion implantation apparatus, an interruption member interrupts an ion beam B in the middle of a beam line. A plasma shower device is provided at the downstream side of the interruption member in the beam line. A control unit causes the interruption member to interrupt the ion beam B during an ignition start period of the plasma shower device. The interruption member may be provided at the upstream side of at least one high-voltage electric field type electrode in the beam line. A gas supply unit may supply a source gas to the plasma shower device. The control unit may start the supply of the source gas from the gas supply unit after the ion beam B is interrupted by the interruption member. | 2015-07-30 |
20150214008 | DEVICE FOR GENERATING PLASMA HAVING A HIGH RANGE ALONG AN AXIS BY ELECTRON CYCLOTRON RESONANCE (ECR) FROM A GASEOUS MEDIUM - The device includes at least two coaxial waveguides each formed of a central conductor and of an external conductor to bring microwaves into a treatment chamber. The at least two electromagnetic wave injection guides are combined with a magnetic circuit elongated in one direction. The magnetic circuit surrounding the waveguides by creating a magnetic field capable of achieving an ECR condition close to the waveguides. | 2015-07-30 |
20150214009 | SHOWERHEAD-COOLER SYSTEM OF A SEMICONDUCTOR-PROCESSING CHAMBER FOR SEMICONDUCTOR WAFERS OF LARGE AREA - Proposed is a showerhead-cooler system of a semiconductor-processing chamber with uniform distribution of plasma density. The showerhead has a plurality of through gas holes that are coaxial with respective channels of the gas-feeding cooler plate. On the gas inlet side, the though passages of the showerhead are provided with unequal conical nozzles characterized by a central angle that decreases from the peripheral part of the showerhead to the showerhead center. Such design provides uniformity of plasma density. Furthermore, in order to protect the walls of the nozzle and the walls of the gas holes from erosion that may be caused by the hollow-cathode phenomenon, these areas are coated with a thin protective coating that is resistant to electrical breakdown and chemical corrosion. | 2015-07-30 |
20150214010 | PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION DEVICE - A plasma enhanced chemical vapor deposition apparatus is disclosed. The plasma enhanced chemical vapor deposition apparatus includes a pair of magnetic field generating unit arranged to face each other with a gap therebetween; a pair of facing electrodes arranged to face each other between the pair of magnetic field generating units; a gas supply unit configured to supply a reaction gas into a space between the pair of facing electrodes; and a precursor supply unit configured to supply a precursor into the space between the pair of facing electrodes. A facing magnetic field may be formed between the pair of magnetic field generating units. | 2015-07-30 |
20150214011 | PLASMA PROCESSING APPARATUS AND HIGH FREQUENCY GENERATOR - Provided is a plasma processing apparatus that performs a processing on a processing target object using plasma. The plasma processing apparatus includes a processing container and a plasma generating mechanism including a high frequency generator disposed outside of the processing container to generate high frequency waves. The plasma generating mechanism generates plasma in the processing container using the high frequency waves and includes: a high frequency oscillator that oscillates the high frequency waves; a power supply unit that supplies a power to the high frequency oscillator; a waveguide path that propagates the high frequency waves oscillated by the high frequency oscillator to the processing container side which becomes a load side; and a voltage standing wave ratio variable mechanism that varies a voltage standing wave ratio of voltage standing waves formed in the waveguide path by the high frequency waves, according to the power supplied from the power supply unit. | 2015-07-30 |
20150214012 | Frequency Enhanced Impedance Dependent Power Control for Multi-Frequency RF Pulsing - Methods for processing a substrate in a plasma processing chamber employing a plurality of RF power supplies. The method includes pulsing at a first pulsing frequency a first RF power supply to deliver a first RF signal between a high power state and a low power state. The method further includes switching the RF frequency of a second RF signal output by a second RF power supply between a first predefined RF frequency and a second RF frequency responsive to values of a measurable chamber parameter. The first RF frequency and the second RF frequencies and the thresholds for switching were learned in advance during a learning phase while the first RF signal pulses between the high power state and low power state at a second RF frequency lower than the first RF frequency and while the second RF power supply operates in different modes. | 2015-07-30 |
20150214013 | METHOD FOR PROVIDING UNIFORM DISTRIBUTION OF PLASMA DENSITY IN A PLASMA TREATMENT APPARATUS - Proposed is a method for providing uniform distribution of plasma density in a CCP plasma processing apparatus. According to the method the through gas holes of the showerhead of used in the plasma processing chamber of the apparatus are provided with conical nozzles formed on the side of the gas holes that face the gas reservoir of the cooler plate. The cone angle θ of the nozzles decreases in the direction from the peripheral portion to the central area of the showerhead in the range from 120° to 0°. Since the conical nozzles increase the gas gap between the showerhead and the cooler plate, more favorable conditions are created for electric breakdown. In order to protect the surfaces of the conical nozzles and gas holes from deterioration by hollow cathode discharge, these surface are coated by a protective coating resistant to electrical breakdown and chemical corrosion. | 2015-07-30 |
20150214014 | VACUUM PROCESSING APPARATUS - A vacuum processing apparatus that can excellently perform uniform processing and can efficiently perform regular maintenance and occasional maintenance even in the case where the diameter of a workpiece is increased. A vacuum processing apparatus having a vacuum transport chamber includes: a lower container in a cylindrical shape; a sample stage unit including a sample stage and a ring-shaped sample stage base having a support beam disposed in axial symmetry with respect to the center axis of the sample stage; an upper container in a cylindrical shape; and a moving unit that is fixed to the sample stage base and moves the sample stage unit in the vertical direction and in the horizontal direction. | 2015-07-30 |
20150214015 | FILM FORMING APPARATUS, METHOD OF FORMING LOW-PERMITTIVITY FILM, SiCO FILM, AND DAMASCENE INTERCONNECT STRUCTURE - In a film forming apparatus according to an embodiment, a processing container defines a space including a plasma generation chamber and a processing chamber disposed under the plasma generation chamber. A first gas supply system supplies noble gas to the plasma generation chamber. The plasma generation chamber is sealed by a dielectric window. An antenna supplies a microwave to the plasma generation chamber via the dielectric window. A second gas supply system supplies a precursor gas to the processing chamber. A shield portion is disposed between the plasma generation chamber and the processing chamber. The shield portion includes a plurality of openings providing communication between the plasma generation chamber and the processing chamber, and has ultraviolet ray shielding property. In this film forming apparatus, the pressure in the plasma generation chamber is set greater than the pressure in the processing chamber by a factor of 4 or more. | 2015-07-30 |
20150214016 | APPARATUS AND METHOD OF TREATING A SUBSTRATE - Provided are an apparatus and a method of treating a substrate using process gas. The apparatus may include a chamber configured to provide a treatment space, in which a process of treating a substrate is performed, a detection unit configured to detect an amount of reaction by-products attached on an inner surface of the chamber. The detection unit may include a window member provided on the inner surface of the chamber, and a light source member configured to emit and receive light through the window member. | 2015-07-30 |
20150214017 | MANUFACTURING METHOD FOR TARGET FOR MAGNETRON SPUTTERING - A manufacturing method for a target for magnetron sputtering, the method comprising the steps of: mixing and dispersing non-magnetic metal powder and oxide powder to obtain a non-magnetic powder mixture, the non-magnetic metal powder containing metal Co and metal Cr with an atomic ratio of the metal Cr to the total of the metal Co and the metal Cr being 25 at % or more and with an atomic ratio of the metal Co to the total of the metal Co and the other metals being 45 at % or less, the oxide powder being mixed at a volume ratio of more than 0 and 1.2 or less with respect to the non-magnetic metal powder; mixing and dispersing the obtained non-magnetic powder mixture and magnetic metal powder containing metal Co to obtain a powder mixture for pressure sintering; and pressure sintering the obtained powder mixture for pressure sintering. | 2015-07-30 |
20150214018 | METHOD FOR COATING A SUBSTRATE AND COATER - A method for coating a substrate by means of a cathode arrangement including at least two rotatable cathodes is disclosed. The method includes rotating at least one of the at least two rotatable cathodes in a first direction, and, at the same time, rotating at least one of the at least two rotatable cathodes in a second direction. The first direction is opposite to the second direction. Furthermore, a controller for controlling a coating process is disclosed. Furthermore, a coater for coating a substrate is disclosed. The coater includes a cathode arrangement with at least two rotatable cathodes and a controller as disclosed herein. | 2015-07-30 |
20150214019 | RF POWER SUPPLY FOR A MASS SPECTROMETER - The present invention provides a radio frequency (RF) power supply in a mass spectrometer. The power supply provides an RF signal to electrodes of a storage device to create a trapping field. The RF field is usually collapsed prior to ion ejection. In an illustrative embodiment the RF power supply includes a RF signal supply; a coil arranged to receive the signal provided by the RF signal supply and to provide an output RF signal for supply to electrodes of an ion storage device; and a shunt including a switch operative to switch between a first open position and a second closed position in which the shunt shorts the coil output. | 2015-07-30 |
20150214020 | ACQUISITION OF FRAGMENT ION MASS SPECTRA OF BIOPOLYMERS IN MIXTURES - The invention relates to the selection of the most favorable ion species for the acquisition of fragment ion mass spectra when the ionization creates biopolymers in different charge states. The invention proposes a particularly fast method of selecting the most favorable parent ions for fragmentation of the different biopolymers from mass spectra, where the ionization is by electrospray ionization (ESI) or other ionization methods which produce similarly diverse charge states and which, for each biopolymer, contain many signal patterns of ions of the different charge states and different isotopic compositions. The selection is carried out in such a way that it does not measure more than one ion species from one biopolymer. Moreover, the most favorable filter pass-band width for isolating an ion species for fragmentation can be stated in each case. | 2015-07-30 |
20150214021 | Mass Spectrometer Interface - A mass spectrometer interface, having improved sensitivity and reduced chemical background, is disclosed. The mass spectrometer interface provides improved desolvation, chemical selectivity and ion transport. A flow of partially solvated ions is transported along a tortuous path into a region of disturbance of flow, where ions and neutral molecules collide and mix. Thermal energy is applied to the region of disturbance to promote liberation of at least some of the ionized particles from any attached impurities, thereby increasing the concentration of the ionized particles having the characteristic m/z ratios in the flow. Molecular reactions and low pressure ionization methods can also be performed for selective removal or enhancement of particular ions. | 2015-07-30 |
20150214022 | PLASMA LIGHTING SYSTEM - A plasma lighting system includes a magnetron configured to generate microwaves, a bulb filled with a main dose and an additive dose, wherein the main dose and the additive dose generate light under the influence of microwaves and have the maximum intensities of respective intrinsic wavelengths at different wavelengths, a waveguide configured to guide the microwaves generated by the magnetron to the bulb, a motor configured to rotate the bulb, a sensor configured to sense the intensity of light having a specific wavelength emitted from the bulb, and a controller connected to the motor, wherein the controller adjusts Revolutions Per Minute (RPM) of the bulb based on the intensity of light having the specific wavelength sensed by the sensor. | 2015-07-30 |
20150214023 | PLASMA LIGHTING SYSTEM - A plasma lighting system includes a magnetron configured to generate microwaves, a bulb filled with a main dose and an additive dose, wherein the main dose and the additive dose generate light under the influence of microwaves and have maximum intensities of respective intrinsic wavelengths at different wavelengths, a motor configured to rotate the bulb, and a controller connected to the motor, wherein the controller adjusts Revolutions Per Minute (RPM) of the bulb. | 2015-07-30 |
20150214024 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SUBSTRATE PROCESSING APPARATUS - Provided is a technique including forming a film by performing a cycle a predetermined number of times. The cycle includes: (a) forming a discontinuous first layer including the first element and having a thickness of less than one atomic layer on the substrate by supplying a gas containing the first element into a process vessel accommodating the substrate; and (b) forming a second layer including the first element and the second element by supplying a gas containing the second element into the process vessel to modify the first layer under a condition where a modifying reaction of the first layer by the gas containing the second element is not saturated. | 2015-07-30 |
20150214025 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE AND SUBSTRATE PROCESSING APPARATUS - An oxide film capable of suppressing reflection of a lens is formed under a low temperature. A method of manufacturing a semiconductor device includes forming a metal-containing oxide film on a substrate by performing a cycle a predetermined number of times, the cycle comprising: (a) supplying a metal-containing source to the substrate; (b) supplying an oxidizing source to the substrate; and (c) supplying a catalyst to the substrate. | 2015-07-30 |
20150214026 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - An upper surface of a plug (PL | 2015-07-30 |
20150214027 | WAFER CLEANING SYSTEM AND METHOD - Embodiments of a wafer cleaning system and method are provided. A brush element is configured to clean a backside of the wafer. The backside has a clear area and an unclear area, and some contaminants are located in the unclear area. A control device performs a first cleaning process to the brush element when the brush element is located at the clear area, and the control device performs a second cleaning process when the brush element is located at the unclear area. The contaminants are cleaned by an enhanced cleaning process. Since the contaminants are cleaned, the backside of the wafer is flatter, and quality of the exposed photoresist on the wafer is improved. | 2015-07-30 |
20150214028 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SUBSTRATE PROCESSING APPARATUS - Provided is a method of manufacturing a semiconductor device. The method includes: (a) forming an oxide film having a predetermined thickness on a substrate by alternately repeating: (a-1) forming a layer containing a predetermined element on the substrate by supplying a source gas containing the predetermined element into a process vessel accommodating the substrate and exhausting the source gas from the process vessel; and (a-2) changing the layer containing the predetermined element into an oxide layer by supplying an oxygen-containing gas and an hydrogen-containing gas into the process vessel, wherein inside of the process vessel is under a heated atmosphere having a pressure lower than an atmospheric pressure; and exhausting the oxygen-containing gas and the hydrogen-containing gas from the process vessel; and (b) modifying the oxide film formed on the substrate by supplying the oxygen-containing gas and the hydrogen-containing gas into the process vessel, wherein the inside of the process vessel is under the heated atmosphere having the pressure lower than the atmospheric pressure, and exhausting the oxygen-containing gas and the hydrogen-containing gas from the process vessel. | 2015-07-30 |
20150214029 | METHOD FOR PROCESSING A SUBSTRATE AND SUBSTRATE PROCESSING APPARATUS - A method for processing a substrate using a substrate processing apparatus is provided. The substrate processing apparatus includes a process chamber and a rotatable turntable having a substrate receiving part provided in the process chamber. In the method, a substrate is placed on a substrate receiving part, and the substrate is processed by supplying process gases into the process chamber. At least a water vapor is supplied into the chamber when the substrate is placed on the substrate receiving part. After that, the substrate is carried out of the process chamber. | 2015-07-30 |
20150214030 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SUBSTRATE PROCESSING APPARATUS AND NON-TRANSITORY COMPUTER-READABLE RECORDING MEDIUM - A method of manufacturing a semiconductor device, includes: forming a film on a substrate by performing a cycle a predetermined number of times, the cycle including: supplying a raw material gas to a substrate in a process chamber, exhausting the raw material gas remaining in the process chamber through an exhaust line, supplying an amine-based gas; and exhausting the amine-based gas through the exhaust line with the supply of the amine-based gas stopped. A degree of valve opening of an exhaust valve disposed in the exhaust line is changed in multiple steps in the process of exhausting the amine-based gas. | 2015-07-30 |
20150214031 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SUBSTRATE PROCESSING APPARATUS - Provided is a technique of forming a film on a substrate by performing a cycle a predetermined number of times. The cycle includes: forming a first layer by supplying a gas containing a first element to the substrate, wherein the first layer is a discontinuous layer, a continuous layer, or a layer in which at least one of the discontinuous layer or the continuous layer is overlapped; forming a second layer including the first layer and a discontinuous layer including a second element stacked on the first layer; forming a third layer including the second layer and a discontinuous layer including a third element stacked on the second layer; and forming a fourth layer including the first element, the second element, the third element and a fourth element by supplying a gas containing the fourth element to the substrate to modify the third layer. | 2015-07-30 |
20150214032 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SUBSTRATE PROCESSING APPARATUS - Provided is a technique including forming a film on a substrate, the film including a first element and a second element different from the first element, by performing a cycle a predetermined number of times. The cycle includes: forming a first layer including the first element by supplying a gas containing the first element to the substrate, wherein the first layer is a discontinuous layer, a continuous layer, or a layer in which at least one of the discontinuous layer or the continuous layer is overlapped; and forming a second layer including the first element and the second element by supplying a gas containing the second element to the substrate to modify the first layer under a condition where a modifying reaction of the first layer by the gas containing the second element is not saturated. | 2015-07-30 |
20150214033 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SUBSTRATE PROCESSING APPARATUS - Provided is a technique including forming a film on a substrate, the film including a first element and a second element different from the first element, by performing a cycle a predetermined number of times. The cycle includes: forming a first layer including a discontinuous chemical adsorption layer of a molecule constituting a gas containing the first element by supplying the gas containing the first element to the substrate under a condition where chemical adsorption of the molecule on a surface of the substrate is not saturated; and forming a second layer including the first element and the second element by supplying a gas containing the second element to the substrate to modify the first layer under a condition where a modifying reaction of the first layer by the gas containing the second element is not saturated. | 2015-07-30 |
20150214034 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SUBSTRATE PROCESSING APPARATUS - Provided is a technique including forming a film by performing a cycle a predetermined number of times. The cycle includes: forming a first layer by supplying a gas containing a first element under a condition where chemical adsorption of a molecule constituting the gas containing the first element is not saturated; forming a second layer including the first layer and a layer including a second element stacked on the first layer by supplying a gas containing the second element under a condition where chemical adsorption of a molecule constituting the gas containing the second element is not saturated; and forming a third layer by supplying a gas containing a third element to modify the second layer under a condition where a modifying reaction of the second layer by the gas containing the third element is not saturated. | 2015-07-30 |
20150214035 | PROCESS AND SYSTEM FOR TREATING FLUID - Embodiments of a process for treating a fluid are provided. The process for treating a fluid includes supplying a first fluid to a circulating chamber and introducing a first gas to the first fluid. A portion of the first gas is dissolved in the first fluid and a portion of the first gas is held in a head space portion of the circulating chamber. The process further includes mixing a portion of the first fluid drawn out from the circulating chamber and a portion of the first gas drawn out from the head space portion to form a mixture. The process further includes spraying the mixture back into the circulating chamber by a two-fluid nozzle. In addition, the first gas is further dissolved into the first fluid to form a high conductivity fluid. The process further includes draining the high conductivity fluid from the circulating chamber. | 2015-07-30 |
20150214036 | PRE-CLEANING METHOD AND PREPARATION METHOD OF LOW-TEMPERATURE POLYSILICON THIN FILM, LIQUID CRYSTAL DISPLAY DEVICE, AND MANUFACTURING SYSTEM THEREOF - The present invention relates to the field of liquid crystal displaying techniques, and in particular to a preparation method of low-temperature polysilicon thin film, including: growing a buffer layer and then an amorphous silicon layer on the substrate; heating up an amorphous silicon layer to reach a temperature higher than room temperature, and performing pre-cleaning on the amorphous silicon layer; and using excimer laser annealing (ELA) to radiate on the pre-cleaned amorphous silicon layer in previous step to transform the amorphous silicon into polysilicon. The present invention further provides a manufacturing system of low-temperature polysilicon thin film. By improving the manufacturing system of the low-temperature polysilicon thin film and pre-cleaning method, the present invention improves thickness non-uniformity of the amorphous silicon layer and the uniformity of the polysilicon layer transformed in the subsequent step of ELA radiation. | 2015-07-30 |
20150214037 | STRUCTURE INCLUDING GALLIUM NITRIDE SUBSTRATE AND METHOD OF MANUFACTURING THE GALLIUM NITRIDE SUBSTRATE - A structure includes a silicon substrate, a plurality of silicon rods on the silicon substrate, a silicon layer on the plurality of silicon rods, and a GaN substrate on the silicon layer. | 2015-07-30 |
20150214038 | METHOD FOR DIRECTED SELF-ASSEMBLY (DSA) OF BLOCK COPOLYMERS - In directed self-assembly (DSA) of a block copolymer (BCP), a patterned sublayer on a substrate serves as a guiding chemical prepattern on which BCPs form more uniform and/or denser patterns. A layer of a blend of a BCP and functional homopolymers, referred to as inks, is deposited on the patterned sublayer and annealed to change the initial chemical prepattern to a 1:1-like chemical pattern that is more favorable to DSA. After annealing, the inks selectively distribute into blocks by DSA, and part of the inks graft on the substrate underneath the blocks. The BCP blend layer is then rinsed away, leaving the grafted inks. A second layer of BCP is then deposited and annealed as a second DSA step to form alternating lines of the BCP components. One of the BCP components is removed, leaving lines of the other BCP component as a mask for patterning the substrate. | 2015-07-30 |
20150214039 | LOW TEMPERATURE CURE MODULUS ENHANCEMENT - Implementations described herein generally relate to methods for dielectric gap-fill. In one implementation, a method of depositing a silicon oxide layer on a substrate is provided. The method comprises introducing a cyclic organic siloxane precursor and an aliphatic organic siloxane precursor into a deposition chamber, reacting the cyclic organic siloxane precursor and the aliphatic organic siloxane precursor with atomic oxygen to form the silicon oxide layer on a substrate positioned in the deposition chamber, wherein the substrate is maintained at a temperature between about 0° C. and about 200° C. as the silicon oxide layer is formed, wherein the silicon oxide layer is initially flowable following deposition, and wherein a ratio of a flow rate of the cyclic organic siloxane precursor to a flow rate of the aliphatic organic siloxane precursor is at least 2:1 and curing the deposited silicon oxide layer. | 2015-07-30 |
20150214040 | THIN EPITAXIAL SILICON CARBIDE WAFER FABRICATION - Techniques for fabricating thin epitaxial SiC device wafers are described. A bulk SiC wafer is used to provide a seed layer of a thin layer of SiC for epitaxially growing SiC. The seed layer is exfoliated from the bulk SiC after bonding the bulk SiC to a handle substrate. The bulk SiC wafer from which the thin layer of SiC is exfoliated may be re-used in fabricating subsequent thin film epitaxial SiC wafers. After growing epitaxial SiC from the seed layer on the handle substrate, devices may be fabricated in the epitaxial SiC and the handle substrate can be removed. The handle substrate can be re-used in fabricating subsequent thin film epitaxial SiC wafers. The epitaxial SiC can be cut into dies and packaged as an SiC chip or bonded to another substrate, such as a silicon substrate with devices formed thereon. | 2015-07-30 |
20150214041 | PROCESSING METHOD OF STACKED-LAYER FILM AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - In a processing method of a stacked-layer film in which a metal film is provided on an oxide insulating film, plasma containing an oxygen ion is generated by applying high-frequency power with power density greater than or equal to 0.59 W/cm | 2015-07-30 |
20150214042 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SUBSTRATE PROCESSING APPARATUS - Provided is a method of manufacturing a semiconductor device. The method includes: (a) forming an oxide film having a predetermined thickness on a substrate by alternately repeating: (a-1) forming a layer containing a predetermined element on the substrate by supplying a source gas containing the predetermined element into a process vessel accommodating the substrate and exhausting the source gas from the process vessel; and (a-2) changing the layer containing the predetermined element into an oxide layer by supplying an oxygen-containing gas and an hydrogen-containing gas into the process vessel, wherein inside of the process vessel is under a heated atmosphere having a pressure lower than an atmospheric pressure; and exhausting the oxygen-containing gas and the hydrogen-containing gas from the process vessel; and (b) modifying the oxide film formed on the substrate by supplying the oxygen-containing gas and the hydrogen-containing gas into the process vessel, wherein the inside of the process vessel is under the heated atmosphere having the pressure lower than the atmospheric pressure, and exhausting the oxygen-containing gas and the hydrogen-containing gas from the process vessel. | 2015-07-30 |
20150214043 | DEPOSITION METHOD AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - An object is to provide a deposition method in which a gallium oxide film is formed by a DC sputtering method. Another object is to provide a method for manufacturing a semiconductor device using a gallium oxide film as an insulating layer such as a gate insulating layer of a transistor. An insulating film is formed by a DC sputtering method or a pulsed DC sputtering method, using an oxide target including gallium oxide (also referred to as GaO | 2015-07-30 |
20150214044 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - Generation of adhered materials in a space over a gas guide of a shower head is inhibited. A substrate processing apparatus includes a process chamber; a buffer chamber including a dispersion unit; a process gas supply hole installed in a ceiling portion of the buffer chamber; an inert gas supply hole installed in the ceiling portion; a gas guide disposed in a gap between the dispersion unit and the ceiling portion, the gas guide including a base end portion disposed at a side of the process gas supply hole, a leading end portion disposed closer to the inert gas supply hole than to the process gas supply hole, and a plate portion connecting the base end portion and the leading end portion; a process chamber exhaust unit; and a control unit. | 2015-07-30 |
20150214045 | Semiconductor Device Manufacturing Method and Substrate Processing Apparatus - Provided is a semiconductor device manufacturing method including: (a) supplying a source gas containing a first element and chlorine to a substrate accommodated in a processing chamber to form an adsorption layer of the source gas on the substrate; (b) supplying a chlorine-containing gas having a composition different from that of the source gas to the substrate while supplying the sources gas before an adsorption of the source gas to the substrate is saturated to suppress the adsorption of the source gas to the substrate; (c) removing the source gas and the chlorine-containing gas remaining on the substrate; (d) supplying a modifying gas including a second element to the substrate to form a layer including the first element and the second element on the substrate by modifying the adsorption layer of the source gas; and (e) removing the modifying gas remaining on the substrate. | 2015-07-30 |
20150214046 | PERIPHERY COATING APPARATUS, PERIPHERY COATING METHOD AND STORAGE MEDIUM THEREFOR - There is provided a periphery coating method of coating a coating liquid on a periphery region of a substrate. The method includes performing a scan-in process of moving the coating liquid nozzle from an outside of an edge of the substrate to a position above the periphery region of the substrate while rotating the substrate and discharging the coating liquid from the coating liquid nozzle; and performing a scan-out process of moving the coating liquid nozzle from the position above the periphery region of the substrate to the outside of the edge of the substrate while rotating the substrate and discharging the coating liquid from the coating liquid nozzle. Further, in the scan-out process, the coating liquid nozzle is moved at a speed lower than a speed at which the coating liquid is moved to a side of an edge of the substrate. | 2015-07-30 |
20150214047 | Method for Manufacturing Semiconductor Device - To form a MOSFET over a silicon carbide substrate, when a heat treatment accompanied by nitration is carried out to reduce the interface state density in the vicinity of the boundary between a gate insulating film and a silicon carbide substrate, CV hysteresis occurs due to the relationship between the capacitance and gate voltage of the MOSFET, thereby reducing the reliability of a semiconductor device. | 2015-07-30 |
20150214048 | METHOD OF FORMING MULTILAYER GRAPHENE STRUCTURE - According to example embodiments, a method of forming a multilayer graphene structure includes forming a sacrificial layer on the growth substrate, growing a first graphene layer on the sacrificial layer using a chemical vapor deposition (CVD) method, and growing at least one more graphene layer on the growth substrate. The growing at least one more graphene layer includes removing at least a part of the sacrificial layer. | 2015-07-30 |
20150214049 | SILICON CARBIDE SEMICONDUCTOR DEVICE MANUFACTURING METHOD - Provided is a method of manufacturing a silicon carbide semiconductor device with a long carrier lifetime without carrying out an additional step after a SiC single crystal substrate is fabricated using a chemical vapor deposition method. The silicon carbide semiconductor device manufacturing method includes (a) growing a silicon carbide single crystal film at a first temperature on a silicon carbide semiconductor substrate using chemical vapor deposition; (b) cooling the silicon carbide semiconductor substrate from the first temperature to a second temperature, which is lower than the first temperature, in an atmosphere of a carbon-containing gas after growing the silicon carbide crystal film; and (c) subsequently cooling the silicon carbide semiconductor substrate to a third temperature, which is lower than the second temperature, in a hydrogen gas atmosphere. | 2015-07-30 |
20150214050 | NANOWIRE ARTICLE AND PROCESSES FOR MAKING AND USING SAME - A nanowire article includes a substrate; a plurality of nanowires disposed on the substrate, the nanowires comprising a semiconductor nitride, the semiconductor comprising an element selected from group 3 of the periodic table; and a superlattice layer interposed between the substrate and the plurality of gallium nitride nanowires. A process for producing a nanowire article includes disposing a superlattice layer on a substrate; disposing a first buffer layer on the superlattice layer; contacting the first buffer layer with a precursor; and forming a plurality of nanowires from the precursor on the first buffer layer to form the nanowire article, the nanowires comprising a semiconductor nitride, the semiconductor comprising an element selected from group 3 of the periodic table. A process for producing a nanowire article includes nitrogenating a substrate to form a nitrogenated layer on the substrate; contacting the nitrogenated layer with a precursor; and forming a plurality of gallium nitride nanowires from the precursor on the nitrogenated layer to form the nanowire article in an absence of a catalyst, wherein individual gallium nitride nanowires of the plurality of gallium nitride nanowires include a length axis that is substantially perpendicular to the nitrogenated layer. | 2015-07-30 |
20150214051 | SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME - A method of manufacturing a semiconductor device includes partially removing an upper portion of an active fin of a substrate loaded in a chamber to form a trench; and forming a source/drain layer in the trench, which includes providing a silicon source gas, a germanium source gas, an etching gas and a carrier gas into the chamber to perform a selective epitaxial growth (SEG) process using a top surface of the active fin exposed by the trench as a seed so that a silicon-germanium layer is grown; and purging the chamber by providing the carrier gas into the chamber to etch the silicon-germanium layer. | 2015-07-30 |
20150214052 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - A manufacturing method of a semiconductor device includes: forming an electric metal layer by depositing metal as art electrode material on an inside of an opening of an insulating layer on a surface of an SiC semiconductor substrate; widening a gap between an inner wall surface in an opening formed in the insulating layer and the electrode metal layer by etching the insulating layer after the electrode metal layer is formed; and forming an ohmic contact between the electrode metal layer and the SiC semiconductor substrate by heating the SiC semiconductor substrate and the metal electrode layer after the insulating layer is etched. | 2015-07-30 |
20150214053 | SEMICONDUCTOR DEVICE MANUFACTURING METHOD - A first nickel film is deposited inside a contact hole of an interlayer dielectric formed on an n | 2015-07-30 |
20150214054 | Method of Forming Copper Sulfide Film for Reducing Cu Oxidization and Loss - Effects of copper oxide formation in semiconductor manufacture are mitigated by etching with sulfide plasmas. The plasmas form protective copper sulfide films on copper surfaces and prevent copper oxide formation. When copper oxide formation does occur, the sulfide plasmas are able to transform the copper oxide into acceptable or more conductive copper compounds. Non-oxide copper compounds are removed using clear wet strips. | 2015-07-30 |
20150214055 | SYSTEMS AND METHODS FOR BIDIRECTIONAL DEVICE FABRICATION - Methods and systems for double-sided semiconductor device fabrication. Devices having multiple leads on each surface can be fabricated using a high-temperature-resistant handle wafer and a medium-temperature-resistant handle wafer. Dopants can be introduced on both sides shortly before a single long high-temperature diffusion step diffuses all dopants to approximately equal depths on both sides. All high-temperature processing occurs with no handle wafer or with a high-temperature handle wafer attached. Once a medium-temperature handle wafer is attached, no high-temperature processing steps occur. High temperatures can be considered to be those which can result in damage to the device in the presence of aluminum-based metallizations. | 2015-07-30 |
20150214056 | ION IMPLANTATION METHODS - Provided are methods of forming an ion implanted region in a semiconductor device. The methods comprise: (a) providing a semiconductor substrate having a plurality of regions to be ion implanted; (b) forming a photoresist pattern on the semiconductor substrate, wherein the photoresist pattern is formed from a chemically amplified photoresist composition comprising a matrix polymer having acid labile groups, a photoacid generator and a solvent; (c) coating a descumming composition over the photoresist pattern, wherein the descumming composition comprises: a matrix polymer; an acid generator chosen from thermal acid generators, photoacid generators and combinations thereof; and a solvent; (d) exposing the coated semiconductor substrate to conditions to generate an acid in the descumming composition from the acid generator; (e) contacting the coated semiconductor substrate with a rinsing agent to remove residual descumming composition and scum from the substrate; and (f) ion implanting the plurality of regions of the semiconductor substrate using the photoresist pattern as an implant mask. The methods find particular applicability in the manufacture of semiconductor devices. | 2015-07-30 |
20150214057 | TAPE ASSISTED SINGLE STEP PEEL-OFF ON SIN LAYER ABOVE METAL ELECTRODES - Methods for processing a substrate are described herein. A method for removing a layer from a substrate, can include positioning a substrate within a processing chamber, wherein the substrate can include an upper surface, and one or more metal features with a separation energy formed on the upper surface; forming a layer over the one or more metal features and the exposed portion of the upper surface; focusing a source of transmissive radiant energy at the layer; pulsing transmissive radiant energy at the upper surface of the substrate creating a separated portion and an attached portion of the layer; and removing the separated portion of the layer. | 2015-07-30 |
20150214058 | DUAL SILICIDE REGIONS AND METHOD FOR FORMING THE SAME - A method for forming dual silicide regions includes forming semiconductor regions having a first thickness and a second thickness different from the first thickness and forming a dielectric layer over the semiconductor regions. Holes are opened up in the dielectric layer down to a first depth corresponding with the first or second thickness leaving a thickness of the dielectric layer over the other of the first or second thickness. A first silicide is formed at the first depth in the holes using a first deposited material. The holes are extended through the thickness of the dielectric layer to reach a second depth. A second silicide is formed at the second depth in the holes using a different material than the first deposited material. | 2015-07-30 |
20150214059 | INTEGRATED CIRCUITS WITH METAL-INSULATOR-SEMICONDUCTOR (MIS) CONTACT STRUCTURES AND METHODS FOR FABRICATING SAME - Integrated circuits having metal-insulator-semiconductor (MIS) contact structures and methods for fabricating integrated circuits having metal-insulator-semiconductor (MIS) contact structures are provided. In an embodiment, a method for fabricating an integrated circuit includes providing a fin structure formed from semiconductor material overlying a semiconductor substrate. The method includes depositing a layer of high-k dielectric material over the fin structure. Further, the method includes forming a metal layer or layers over the layer of high-k dielectric material to provide the fin structure with a metal-insulator-semiconductor (MIS) contact structure. | 2015-07-30 |
20150214060 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming an interfacial layer on the substrate; forming a high-k dielectric layer on the interfacial layer; forming a first bottom barrier metal (BBM) layer on the high-k dielectric layer; performing a thermal treatment; removing the first BBM layer; and forming a second BBM layer on the high-k dielectric layer. | 2015-07-30 |
20150214061 | TRENCH FIELD-EFFECT DEVICE AND METHOD OF FABRICATING SAME - The present invention provides a method of fabricating a trench field-effect device. The method includes: providing a substrate including an epitaxial layer formed on a semiconductor substrate of the substrate and a trench formed in the epitaxial layer; forming a sacrificial dielectric layer on a bottom and a sidewall of the trench; forming a heavily-doped polysilicon region at the bottom, and removing part of the sacrificial dielectric layer not covered by the heavily-doped polysilicon region to expose an epitaxial layer of the sidewall; and oxidizing the heavily-doped polysilicon region and the epitaxial layer simultaneously and forming a thick oxide layer and a trench sidewall gate dielectric layer synchronously on the bottom and the sidewall, respectively; wherein thickness of the thick oxide layer is greater than that of the trench sidewall gate dielectric layer. The method is simple, and figure of merit of the fabricated trench field-effect device is reduced. | 2015-07-30 |
20150214062 | Methods For Extending Floating Gates For NVM Cells To Form Sub-Lithographic Features And Related NVM Cells - Methods are disclosed for extending floating gate regions within floating gate cells to form sub-lithographic features. Related floating gate cells and non-volatile memory (NVM) systems are also disclosed. In part, the disclosed embodiments utilize a spacer etch to form extended floating gate regions and floating gate slits with sub-lithographic dimensions thereby achieving desired increased spacing between control gate layers and doped regions underlying floating gate structures while still allowing for reductions in the overall size of floating-gate NVM cells. These advantageous results are achieved in part by depositing an additional floating gate layer over previously formed floating gate regions and then using the spacer etch to form the extended floating gate regions as sidewall structures and sub-lithographic floating gate slits. The resulting floating gate structures reduce breakdown down risks, thereby improving device reliability. | 2015-07-30 |
20150214063 | HARD MASK RESHAPING - One or more systems and methods for reshaping a hard mask are provided. A semiconductor arrangement comprises one or more structures formed from a layer according to a target dimension, such as a width criterion, a length criterion, a spacing criterion, or other design constraints. To form such a structure, a hard mask is formed over the layer. Responsive to a dimension, such as a width, of the hard mask not corresponding to the target dimension, a first hard mask portion is modified to create a modified hard mask comprising a modified first hard mask portion. In some embodiments, the first hard mask portion is trimmed to decrease the dimension or coated with a coating material to increase the dimension. An etch of the layer is performed through the modified hard mask to create an etched layer comprising an etched portion, such as the structure, corresponding to the target dimension. | 2015-07-30 |
20150214064 | FORMING CROSS-COUPLED LINE SEGMENTS - A method is provided for fabricating cross-coupled line segments for use, for instance, as a hard mask in fabricating cross-coupled gates of two or more transistors. Fabricating the structure includes: providing a sacrificial mandrel on the substrate, the sacrificial mandrel including a transverse gap through the mandrel separating the sacrificial mandrel into a first mandrel portion and a second mandrel portion; providing a sidewall spacer along sidewalls of the sacrificial mandrel, where sidewall spacers along sidewalls of the first mandrel portion and the second mandrel portion merge within the transverse gap and form a crossbar; and removing the sacrificial mandrel and selectively cutting the sidewall spacers to define the cross-coupled line segments from the sidewall spacers and crossbar. The transverse gap may be provided by directly printing the first and second mandrel portions spaced apart, or by cutting the sacrificial mandrel to provide the gap. | 2015-07-30 |
20150214065 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND APPARATUS FOR MANUFACTURING SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device, the method, comprising a first etching step of etching a substrate on which a silicon member and a compound member containing nitrogen and silicon are exposed, by using a first etching gas containing XeF | 2015-07-30 |
20150214066 | METHOD FOR MATERIAL REMOVAL IN DRY ETCH REACTOR - Embodiments of the technology include a semiconductor patterning method. The method may include forming a layer of masking material on regions of dielectric material above a semiconductor substrate. The method may include forming a trench through the masking material. This transformation may expose at least a portion of the dielectric material. The method may include forming a protective layer over the exposed portion of the dielectric material. The method may involve removing the masking material from the semiconductor substrate. | 2015-07-30 |
20150214067 | METHODS FOR ETCH OF SIN FILMS - A method of selectively etching silicon nitride from a substrate comprising a silicon nitride layer and a silicon oxide layer includes flowing a fluorine-containing gas into a plasma generation region of a substrate processing chamber and applying energy to the fluorine-containing gas to generate a plasma in the plasma generation region. The plasma comprises fluorine radicals and fluorine ions. The method also includes filtering the plasma to provide a reactive gas having a higher concentration of fluorine radicals than fluorine ions and flowing the reactive gas into a gas reaction region of the substrate processing chamber. The method also includes exposing the substrate to the reactive gas in the gas reaction region of the substrate processing chamber. The reactive gas etches the silicon nitride layer at a higher etch rate than the reactive gas etches the silicon oxide layer. | 2015-07-30 |
20150214068 | METHOD OF PERFORMING ETCHING PROCESS - A method of performing an etching process is provided. A substrate is provided, wherein a first region and a second region are defined on the substrate, and an overlapping region of the first region and the second region is defined as a third region. A tri-layer structure comprising an organic layer, a bottom anti-reflection coating (BARC), and a photoresist layer is formed on the substrate. The photoresist layer and the BARC in the second region are removed. An etching process is performed to remove the organic layer in the second region by using the BARC and/or the photoresist layer as a mask, wherein the etching process uses an etchant comprises CO | 2015-07-30 |
20150214069 | PIEZOELECTRIC THIN FILM PROCESS - A process of forming an integrated circuit containing a piezoelectric thin film by forming a sol gel layer, drying in at least 1 percent relative humidity, baking starting between 100 and 225° C. increasing to between 275 and 425° C. over at least 2 minutes, and forming the piezoelectric thin film by baking the sol gel layer between 250 and 350° C. for at least 20 seconds, annealing between 650 and 750° C. for at least 60 seconds in an oxidizing ambient pressure between 700 and 1000 torr and a flow rate between 3 and 7 slm, followed by annealing between 650 and 750° C. for at least 20 seconds in a pressure between 4 and 10 torr and a flow rate of at least 5 slm, followed by ramping down the temperature. | 2015-07-30 |
20150214070 | Method For Self-Aligned Double Patterning Without Atomic Layer Deposition - A method for self-aligned double patterning without needing atomic layer deposition techniques is disclosed. Techniques include using a staircase etch technique to preferentially shrink one material without shrinking an underlying material, followed by a resist-based chemical polishing and planarization technique that yields a narrowed and protruding feature (single-layer thickness) that is sufficiently physically supported, and that can be transferred to one or more underlying layers. After removing a resist coating, the result is a pattern that has been doubled without using ALD techniques. Such techniques improve efficiencies over conventional techniques for self-aligned double patterning. | 2015-07-30 |
20150214071 | SEMICONDUCTOR DEVICE AND FORMATION THEREOF - A semiconductor device and method of formation are provided. A semiconductor device includes a first material comprising STI adjacent a fin. The STI is substantially uniform, such that a top surface of the STI has few to no defects and little to no concavity. To form the STI, the first material is implanted with a dopant, which forms an etch stop layer, such that the first material height is reduced by etching rather than CMP. Etching results in a better uniformity of the first material than CMP. STI that is substantially uniform comprises a better current barrier between adjacent fins than a device that comprises STI that is not substantially uniform. | 2015-07-30 |
20150214072 | ETCHANT COMPOSITION AND MANUFACTURING METHOD FOR THIN FILM TRANSISTOR USING THE SAME - An etchant composition includes ammonium persulfate (((NH | 2015-07-30 |
20150214073 | REDUCED-NOISE REFERENCE VOLTAGE PLATFORM FOR A VOLTAGE CONVERTER DEVICE - An electronic system, a reduced-noise reference voltage platform for a voltage converter device, and a method of manufacture of a reduced-noise reference voltage platform for a voltage converter device are disclosed. For example, the reduced-noise reference voltage (e.g., ground) platform includes a first conductor unit, a second conductor unit, and an insulator unit interposed between a first surface of the first conductor unit and a first surface of the second conductor unit. The reduced-noise reference voltage platform also includes a phase terminal connected to the first conductor unit, and a reference voltage (e.g., ground) terminal connected to the second conductor unit, wherein a second surface of the second conductor unit forms a platform coupled to the reference voltage (e.g., ground). | 2015-07-30 |
20150214074 | Packaging Methods for Semiconductor Devices, and Packaged Semiconductor Devices - Packaging methods for semiconductor devices, and packaged semiconductor devices are disclosed. In some embodiments, a method of packaging a semiconductor device includes coupling a ring to a substrate, and coupling an integrated circuit die to the substrate within the ring. A molding material is disposed around the integrated circuit die within the ring. | 2015-07-30 |
20150214075 | MANUFACTURING METHOD OF SELECTIVE ELECTRONIC PACKAGING DEVICE - A manufacturing method of selective electronic packaging device includes the following. A plurality of electronic components is disposed on a surface of a substrate. A photo-sensitive resin material is formed on the surface of the substrate. UV-light is irradiated to the photo-sensitive resin material to form an embankment structure. An encapsulating material is filled a protective area surrounded by the embankment structure. The encapsulating material covers at least one electronic component. The encapsulating material is solidified to form an encapsulating member, and the encapsulating member covers at least one electronic component. | 2015-07-30 |
20150214076 | SEMICONDUCTOR DEVICE, MANUFACTURING METHOD THEREOF, AND MOBILE TELEPHONE - Provided is a technology capable of inhibiting a shield film formed over a surface of a sealing body from peeling from the surface of the sealing body, and inhibiting a part of the shield film from bulging from the surface of the sealing body. The present invention is characterized in that a peeling-prevention-mark formation region is provided so as to surround a product-identification-mark formation region, and a plurality of peeling prevention marks are formed in the peeling-prevention-mark formation region. That is, the present invention is characterized in that the region of the surface region of the sealing body which is different from the product-identification-mark formation region is defined as the peeling-prevention-mark formation region, and the peeling prevention marks are formed in the peeling-prevention-mark formation region. | 2015-07-30 |
20150214077 | Methods of Packaging and Dicing Semiconductor Devices and Structures Thereof - Methods of packaging and dicing semiconductor devices, and packaged semiconductor devices are disclosed. In some embodiments, a method of packaging and dicing semiconductor devices includes a first cutting process performed on a wafer to form a groove passing through a passivation layer and an interconnect structure on a scribe line region and a portion of a semiconductor substrate on the scribe line region. Next, a molding compound layer is formed on a frontside of the wafer to fill the groove. After performing a grinding process on a backside of the wafer to thin down the semiconductor substrate, a second cutting process is performed on the wafer to separate the individual dies. The second cutting process cuts through the molding compound layer in the groove and the semiconductor substrate underlying the groove. | 2015-07-30 |
20150214078 | LOAD PORT APPARATUS - To prevent an increase with the passage of time in partial pressure of oxidizing gas in a FOUP, which is fixed to a FIMS system in an open state, a gas feed port is arranged on a lower surface of the FOUP so as to feed nitrogen to an inside of the FOUP through the gas feed port in a state where the FOUP is mounted on the FIMS system, in addition to nitrogen purge from an opening of the FOUP. A nitrogen feed system, which feeds nitrogen in a state where the FOUP is mounted on the FIMS system, is controlled so as to feed nitrogen at a low flow rate and a low pressure capable of suppressing the stirring-up of dust, which has a size that may cause a problem in wiring to be formed on a wafer, from the gas feed port and the like. | 2015-07-30 |
20150214079 | WET STATION - There is provided a wet station including: a loading unit to and from which a front open unified pod (FOUP) in which semiconductor wafers are installed and a stocker in which dummy wafers are installed are loaded and unloaded; a wafer transferring robot removing the semiconductor wafers from the loaded FOUP and loading the semiconductor wafers into a wafer guide; a dummy transferring robot removing the dummy wafers from the loaded stocker and loading the dummy wafers into empty slots of the wafer guide in which the semiconductor wafers have not been loaded; and a processing chamber receiving the wafer guide fully loaded with the semiconductor wafers and the dummy wafers and performing a cleaning process on the semiconductor wafers. | 2015-07-30 |
20150214080 | SUBSTRATE HEAT TREATMENT APPARATUS, METHOD OF INSTALLING SUBSTRATE HEAT TREATMENT APPARATUS - Disclosed is a substrate heat treatment apparatus. The apparatus includes: a conveyance storage unit which includes a first storage section and a second storage section each of which stores a plurality of conveyance containers, and a conveyance mechanism configured to convey the conveyance containers, each of the conveyance containers accommodating a plurality of wafers; and a heat treatment unit including a heat treatment furnace which accommodates a holder configured to hold the plurality of wafers in multiple stages, and performs the heat treatment on the wafers. A mounting stage of a transfer section is provided below the first storage section in the conveyance storage unit. On the mounting stage, the conveyance containers are mounted so that the wafers within the conveyance containers are transferred to the holder in the heat treatment unit. | 2015-07-30 |
20150214081 | SUBSTRATE HEAT TREATMENT APPARATUS, METHOD OF INSTALLING SUBSTRATE HEAT TREATMENT APPARATUS - Disclosed is a substrate heat treatment apparatus. The apparatus includes: a conveyance storage unit which includes a first storage section and a second storage section each of which stores a plurality of conveyance containers, and a conveyance mechanism configured to convey the conveyance containers, each of the conveyance containers accommodating a plurality of wafers; and a heat treatment unit including a heat treatment furnace which accommodates a holder configured to hold the plurality of wafers in multiple stages, and performs the heat treatment on the wafers. A mounting stage of a transfer section is provided below the first storage section in the conveyance storage unit. On the mounting stage, the conveyance containers are mounted so that the wafers within the conveyance containers are transferred to the holder in the heat treatment unit. | 2015-07-30 |
20150214082 | Wafer Processing Method and Apparatus - An apparatus for and a method of bonding a first substrate and a second substrate are provided. In an embodiment a first wafer chuck has a first curved surface and a second wafer chuck has a second curved surface. A first wafer is placed on the first wafer chuck and a second wafer is placed on a second wafer chuck, such that both the first wafer and the second wafer are pre-warped prior to bonding. Once the first wafer and the second wafer have been pre-warped, the first wafer and the second wafer are bonded together. | 2015-07-30 |