31st week of 2015 patent applcation highlights part 59 |
Patent application number | Title | Published |
20150214383 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - An object is to reduce to reduce variation in threshold voltage to stabilize electric characteristics of thin film transistors each using an oxide semiconductor layer. An object is to reduce an off current. The thin film transistor using an oxide semiconductor layer is formed by stacking an oxide semiconductor layer containing insulating oxide over the oxide semiconductor layer so that the oxide semiconductor layer and source and drain electrode layers are in contact with each other with the oxide semiconductor layer containing insulating oxide interposed therebetween; whereby, variation in threshold voltage of the thin film transistors can be reduced and thus the electric characteristics can be stabilized. Further, an off current can be reduced. | 2015-07-30 |
20150214384 | SYSTEMS AND METHODS FOR CMOS-INTEGRATED JUNCTION FIELD EFFECT TRANSISTORS FOR DENSE AND LOW-NOISE BIOELECTRONIC PLATFORMS - A complementary metal oxide semiconductor (CMOS)-integrated junction field effect transistor (JFET) has reduced scale and reduced noise. An exemplary JFET has a substrate layer of one dopant type with a gate layer of that dopant type disposed on the substrate, a depletion channel of a second dopant type disposed on the first gate layer, and a second gate layer of the first dopant type disposed on the depletion channel and proximate a surface of the transistor. The second gate layer can separate the depletion channel from the surface, and the depletion channel separates the first gate layer from the second gate layer. | 2015-07-30 |
20150214385 | Semiconductor Device and Method of Manufacturing the Same - An on-resistance of a junction FET is reduced. In a semiconductor device in an embodiment, a gate region of the junction field effect transistor includes a low concentration gate region and a high concentration gate region whose impurity concentration is higher than an impurity concentration of the low concentration gate region, and the high concentration gate region is included in the low concentration gate region. | 2015-07-30 |
20150214386 | FAST SWITCHING DIODES AND METHODS OF MANUFACTURING THOSE DIODES - Diodes and methods of manufacturing diodes are disclosed. The diodes may include a cathode assembly having a cathode electrode, a N+ substrate layer on the cathode electrode, a N buffer layer on the N+ substrate layer, and a N− bulk layer on the N buffer layer. The N buffer layer may include crystal damage configured to provide recombination centers for charge carriers. The method may include creating a N buffer layer on a N+ substrate wafer, creating a N− bulk layer on the N buffer layer, and inflicting, to the N buffer layer, crystal damage configured to provide recombination centers for charge carriers. The method may include creating a N buffer layer in a N− bulk wafer, creating a N+ substrate layer in the N− bulk wafer, and inflicting, to the N buffer layer, crystal damage configured to provide recombination centers for charge carriers. | 2015-07-30 |
20150214387 | PHOTODETECTOR - A photodetector is provided. The photodetector includes first metal layers in which optical signals are converted into electric signals; first vias formed between the first metal layers and doped areas which include doped areas on both ends of an optical waveguide and a doped area on a growing portion, which absorbs a light signal transmitted through the optical waveguide; second metal layer in which optical signals are converted into electric signals; and second vias formed between the first metal layers and the second metal layers. | 2015-07-30 |
20150214388 | System and Method for Multi-Wavelength Optical Signal Detection - The system and method for multi-wavelength optical signal detection enables the detection of optical signal levels significantly below those processed at the discrete circuit level by the use of mixed-signal processing methods implemented with integrated circuit technologies. The present invention is configured to detect and process small signals, which enables the reduction of the optical power required to stimulate detection networks, and lowers the required laser power to make specific measurements. The present invention provides an adaptation of active pixel networks combined with mixed-signal processing methods to provide an integer representation of the received signal as an output. The present invention also provides multi-wavelength laser detection circuits for use in various systems, such as a differential absorption light detection and ranging system. | 2015-07-30 |
20150214389 | APPARATUS AND METHOD FOR OPTICALLY INITIATING COLLAPSE OF A REVERSE BIASED P-TYPE-N-TYPE JUNCTION - An optical method of collapsing the electric field of an innovatively fabricated, reverse-biased PN junction causes a semiconductor switch to transition from a current blocking mode to a current conduction mode in a planar electron avalanche. This switch structure and the method of optically initiating the switch closure is applicable to conventional semiconductor switch configurations that employ a reverse-biased PN junction, including, but not limited to, thyristors, bipolar transistors, and insulated gate bipolar transistors. | 2015-07-30 |
20150214390 | COMPOSITION FOR FORMING N-TYPE DIFFUSION LAYER, METHOD OF FORMING N-TYPE DIFFUSION LAYER, AND METHOD OF PRODUCING PHOTOVOLTAIC CELL - The composition for forming an n-type diffusion layer in accordance with the present invention contains a glass powder and a dispersion medium, in which the glass powder includes an donor element and a total amount of the life time killer element in the glass powder is 1000 ppm or less. An n-type diffusion layer and a photovoltaic cell having an n-type diffusion layer are prepared by applying the composition for forming an n-type diffusion layer, followed by a thermal diffusion treatment. | 2015-07-30 |
20150214391 | PASSIVATION FILM, COATING MATERIAL, PHOTOVOLTAIC CELL ELEMENT AND SEMICONDUCTOR SUBSTRATE HAVING PASSIVATION FILM - A passivation film includes aluminum oxide and niobium oxide, and the passivation film is used in a photovoltaic cell element having a silicon substrate. A photovoltaic cell element includes: a p-type silicon substrate | 2015-07-30 |
20150214392 | PHOTOVOLTAIC CELL HAVING A HETEROJUNCTION AND METHOD FOR MANUFACTURING SUCH A CELL - The invention relates to a photovoltaic cell having a heterojunction, including a doped substrate ( | 2015-07-30 |
20150214393 | SOLAR CELL AND MANUFACTURING METHOD THEREFOR - A solar cell is provided that includes: a solar-battery cell that has a pn junction; a light-receiving-surface side electrode that includes a plurality of grid electrodes that are provided so as to extend in one direction at a given spacing on a light receiving surface of the solar-battery cell, and that collect a photoelectrically-converted charge; and a back-surface electrode that is provided on a back surface that opposes to the light receiving surface of the solar-battery cell. The grid electrode includes a first seed surface that comes into contact with the light receiving surface of the solar-battery cell, a second seed surface that is upright to the first seed surface, and is connected to the first seed surface, and a plated layer that comes into contact with the first seed surface and the second seed surface. | 2015-07-30 |
20150214394 | OPTO-ELECTRICAL CONVERSION STRUCTURE - An opto-electrical conversion structure includes a substrate, a first semiconductor structure, and a second semiconductor structure. The substrate has a first surface and a second surface opposite to each other. The first surface has a plurality of micro-structures and a plurality of nano-structures. The nano-structures are distributed on the surface of the micro-structures, and have heights of about 500 nm to about 900 nm. The first semiconductor structure is disposed on the first surface of the substrate. The second semiconductor structure is disposed on the second surface of the substrate. | 2015-07-30 |
20150214395 | PHOTODIODE AND PHOTODIODE ARRAY | 2015-07-30 |
20150214396 | SOLAR CELL AND METHOD FOR MANUFACTURING THE SAME - A solar cell and a method for manufacturing the same are discussed. The method for manufacturing the solar cell includes forming an amorphous silicon layer on a back surface of a crystalline semiconductor substrate containing impurities of a first conductive type, performing a first diffusion process for diffusing impurities of a second conductive type opposite the first conductive type into a portion of the amorphous silicon layer to form an emitter region, and performing a second diffusion process for diffusing impurities of the first conductive type into a remaining portion except the portion of the amorphous silicon layer having the impurities of the second conductive type to form a back surface field region. When at least one of the first diffusion process and the second diffusion process is performed, the amorphous silicon layer is crystallized to form a silicon layer. | 2015-07-30 |
20150214397 | SOLAR CELL AND METHOD FOR MANUFACTURING THE SAME - A solar cell includes a semiconductor substrate; at least one conductive type region on the semiconductor substrate; a protective layer on the at least one conductive type region; and an electrode disposed on the protective layer and electrically connected to the conductive type region. | 2015-07-30 |
20150214398 | PHOTOVOLTAIC ELEMENT AND MANUFACTURING METHOD THEREOF - A first amorphous silicon i layer and an amorphous silicon p layer are provided on a first main surface, side surfaces, and a peripheral portion of a second main surface of an n-type silicon substrate. A first ITO layer is provided over the first main surface and the side surfaces, a second amorphous silicon i layer and an amorphous silicon n layer are provided on the second main surface, and a second ITO layer having a smaller area than the n-type silicon substrate is provided thereon excluding the peripheral portion. On the peripheral portion of the second main surface, a structure, in which the first amorphous silicon i layer, the amorphous silicon p layer, the second amorphous silicon i layer, and the amorphous silicon n layer are laminated in this order, is provided. | 2015-07-30 |
20150214399 | METHOD OF MAKING PHOTOVOLTAIC DEVICE COMPRISING AN ABSORBER HAVING A SURFACE LAYER - A method of fabricating a photovoltaic device includes a step of forming an absorber layer above a substrate, and a step of forming a surface layer on the absorber layer. The absorber layer includes an I-III-VI | 2015-07-30 |
20150214400 | Metal-doped Cu(In,Ga) (S,Se)2 nanoparticles - Various methods are used to provide a desired doping metal concentration in a CIGS-containing ink when the CIGS layer is deposited on a photovoltaic device. When the doping metal is sodium, it may be incorporated by: adding a sodium salt, for example sodium acetate, together with the copper-, indium- and/or gallium-containing reagents at the beginning of the synthesis reaction of Cu(In,Ga)(S,Se) | 2015-07-30 |
20150214401 | ABSORBENT Cu2ZnSn(S,Se)4-BASED MATERIAL HAVING A BAND-SEPARATION GRADIENT FOR THIN-FILM PHOTOVOLTAIC APPLICATIONS - An arrangement for a stack of a photovoltaic cell comprises a first photon-absorbing layer ( | 2015-07-30 |
20150214402 | LIGHT RECEIVING ELEMENT AND SOLAR CELL INCLUDING LIGHT RECEIVING ELEMENT - A light receiving element includes a p-type semiconductor layer, an n-type semiconductor layer, and a first and a second superlattice semiconductor layers, and the first and the second superlattice semiconductor layers each have a superlattice structure in which a barrier layer and a quantum dot layer are alternately and repeatedly stacked. A band structure of the superlattice structure of the first superlattice semiconductor layer is a type I structure, and that of the second superlattice semiconductor layer is a type II structure. The superlattice structures of the first and the second superlattice semiconductor layers each form a superlattice miniband, and a conduction band first superlattice miniband of the superlattice structure of the second superlattice semiconductor layer is lower in lower and energy than a conduction band first superlattice miniband of the superlattice structure of the first superlattice semiconductor layer. | 2015-07-30 |
20150214403 | ULTRATHIN GROUP II-VI SEMICONDUCTOR LAYERS, GROUP II-VI SEMICONDUCTOR SUPERLATTICE STRUCTURES, PHOTOVOLTAIC DEVICES INCORPORATING THE SAME, AND RELATED METHODS - Disclosed are ultrathin layers of group II-VI semiconductors, group II-VI semiconductor superlattice structures, photovoltaic devices incorporating the layers and superlattice structures and related methods. The superlattice structures comprise an ultrathin layer of a first group II-VI semiconductor alternating with an ultrathin layer of at least one additional semiconductor, e.g., a second group II-VI semiconductor, or a group IV semiconductor, or a group III-V semiconductor. | 2015-07-30 |
20150214404 | Portable Folding Photovoltaic Module - A portable photovoltaic device comprised of photovoltaic sections separated by one, or more, hinges and that provides for the photovoltaic sections to be collapsed or expanded for the alternative purposes of transportation or charging. | 2015-07-30 |
20150214405 | METHODS OF MAKING BARRIER ASSEMBLIES - The present disclosure generally relates to methods of forming barrier assemblies. Some embodiments include application of an adhesive layer and/or a topsheet to protect the exposed uppermost layer of the barrier stack during roll-to-roll processing. Some embodiments include application of an adhesive layer and/or a topsheet before the exposed, uppermost layer of the barrier film contacts a solid surface or processing roll. Inclusion of an adhesive layer and/or a topsheet protects the oxide layer during processing, which creates an excellent barrier assembly that can be manufactured using roll-to-roll processing. | 2015-07-30 |
20150214406 | DEVICE FOR IMPROVING THE QUALITY OF AN IMAGE COVERED WITH A SEMITRANSPARENT PHOTOVOLTAIC FILM - Problem addressed: how to decrease the loss of visual quality in an image that appears when this image is placed behind a semitransparent photovoltaic sheet or film. Solution: on the one hand, increase the luminosity of the image by depositing a white-coloured or metallic or reflective layer on the side of the photovoltaic cells that is turned towards the image; and on the other hand, by modifying the luminosity, the contrast, and the colour saturation of the image. | 2015-07-30 |
20150214407 | CONDENSING PHOTOELECTRIC CONVERSION APPARATUS AND SYSTEM - A condensing photoelectric conversion apparatus includes a first photoelectric conversion module and a second photoelectric conversion module. The first and second condensing photoelectric conversion modules each include a power generating element, a condensing lens located on the power generating element and having a front surface with a convex portion and a flat rear surface, a transparent first resin located between the power generating element and the rear surface of the condensing lens, a colored second resin located on the rear surface of the condensing lens and around the power generating element, and a third resin located between the condensing lens of the first photoelectric conversion module and the condensing lens of the second photoelectric conversion module, and having a refractive index n | 2015-07-30 |
20150214408 | SOLAR WATER-COLLECTING, AIR-CONDITIONING, LIGHT-TRANSMITTING AND POWER GENERATING HOUSE - A system for collecting solar energy and fresh water may be disclosed. The system may include one or more assemblies of collector modules, each of which module may contain a photovoltaic cell and a thermal fluid. The thermal fluid may be used to heat a building and/or produce electricity. The assembly may further be coupled to a collection shaft which may collect water and/or disseminate light through a building. Various configurations of single modules, single assemblies, or multiple large-scale assemblies are also possible. If integrated with a house, the system may reduce the net energy consumption of the household. | 2015-07-30 |
20150214409 | THIN-FILM PHOTOVOLTAIC DEVICE WITH WAVY MONOLITHIC INTERCONNECTS - A thin-film optoelectronic module device ( | 2015-07-30 |
20150214410 | SOLAR CELL MODULE - A solar cell module may include: solar cells; a colored layer serving as a first reflective layer disposed at the rear sides of the solar cells and including a coloring agent with a higher refractive index than the main material of the colored layer; an intermediate transparent layer disposed at the rear side of the colored layer and having a higher transmission factor than the colored layer; and a protective member at the rear side of the module, serving as a second reflective layer disposed at the rear side of the intermediate transparent layer, including a whitened portion having a higher refractive index than the main material of the protective member, and having a higher refractive index for the entire layer than the intermediate transparent layer. A sealing member at the rear side of the module includes the colored layer and the intermediate transparent layer. | 2015-07-30 |
20150214411 | BANDGAP-SHIFTED SEMICONDUCTOR SURFACE AND METHOD FOR MAKING SAME, AND APPARATUS FOR USING SAME - Titania is a semiconductor and photocatalyst that is also chemically inert. With its bandgap of 3.2 and greater, to activate the photocatalytic property of titania requires light of about 390 nm wavelength, which is in the ultra-violet, where sunlight is very low in intensity. A method and devices are disclosed wherein stress is induced and managed in a thin film of titania in order to shift and lower the bandgap energy into the longer wavelengths that are more abundant in sunlight. Applications of this stress-induced bandgap-shifted titania photocatalytic surface include photoelectrolysis for production of hydrogen gas from water, photovoltaics for production of electricity, and photocatalysis for detoxification and disinfection. | 2015-07-30 |
20150214412 | LATTICE MATCHABLE ALLOY FOR SOLAR CELLS - An alloy composition for a subcell of a solar cell is provided that has a bandgap of at least 0.9 eV, namely, Ga | 2015-07-30 |
20150214413 | PHOTOTRANSISTOR AND SEMICONDUCTOR DEVICE - A phototransistor includes a first emitter region, a first base region having at least a portion exposed to a light-receiving side, and a first collector region in this order from the light-receiving side in a depth direction. The first collector region includes a second collector region and a third collector region that is in contact with a downstream side of the second collector region in the depth direction and has a resistance lower than that of the second collector region. The phototransistor further includes a first region that is spaced away from the first base region at an outer side of the first base region on a light-receiving side surface thereof, the first region having a conductivity type opposite to that of the first collector region. | 2015-07-30 |
20150214414 | ELECTRONIC POWER CELL MEMORY BACK-UP BATTERY - An electronic power cell memory back-up battery is disclosed. The electronic power cell memory back-up battery utilizes stored light photons to produce usable energy, and can be used to replace batteries or other power sources in electronic devices. The electronic power cell memory back-up battery disclosed includes a light source and a photovoltaic device in optical communication with the light source. The photovoltaic device creates electrical power in response to receiving light from the light source. A portion of the electrical power generated by the photovoltaic device is used to power the light source. In some embodiments power input contacts are included for use in providing initial start-up power to the light source. In some embodiments the light source comprises a light-emitting device and a photoluminescent material optically coupled to the light-emitting device, where the photoluminescent material emits light in response to receiving light from the light-emitting device. | 2015-07-30 |
20150214415 | PHOTOCONDUCTIVE ANTENNA, CAMERA, IMAGING DEVICE, AND MEASUREMENT DEVICE - A photoconductive antenna that generates a terahertz wave by irradiation with a light pulse, includes: a first layer that has carriers formed therein by irradiation with the light pulse; a second layer, located above the first layer, which has carrier mobility larger than carrier mobility of the first layer; and a first electrode and a second electrode, located above the second layer, which apply a voltage to the second layer. | 2015-07-30 |
20150214416 | METHOD OF PACKAGE FOR SENSOR CHIP - A method of package for sensor chip includes the steps of: a) providing a sensor chip having a plurality of conducting contacts and a sensing area, b) using an adhesive to bond the sensor chip on a circuit substrate, c) mounting a dam between the sensing area and conducting contacts of the sensor chip, d) connecting metal conducting wires between the conducting contacts of the circuit substrate and the conducting contacts of the sensor chip, and e) molding a molding compound on the circuit substrate and the sensor chip to cover the metal conducting wires and the dam. Thus, the dam can buffer the impact of stress on the sensor chip during the step e). Further, an open type sensing space is defined after the step e), facilitating signal or status sensing and improving the sensor chip package yield rate. | 2015-07-30 |
20150214417 | PHOTOELECTRIC CONVERSION ELEMENT, METHOD OF MANUFACTURING PHOTOELECTRIC CONVERSION ELEMENT, AND ELECTRONIC DEVICE - A method of manufacturing a photoelectric conversion element includes: forming a first electrode film such that a first conductive film is connected with a substrate and a second conductive film is connected with the first conductive film; patterning the second conductive film in a predetermined shape using wet etching after the forming of the first electrode film; and forming a metal compound film to cover the first electrode film after the patterning of the second conductive film. | 2015-07-30 |
20150214418 | COMPOSITION FOR FORMING P-TYPE DIFFUSION LAYER, METHOD OF FORMING P-TYPE DIFFUSION LAYER, AND METHOD OF PRODUCING PHOTOVOLTAIC CELL - The composition for forming a composition for forming a p-type diffusion layer, the composition containing a glass powder and a dispersion medium, in which the glass powder includes an acceptor element and a total amount of a life time killer element in the glass powder is 1000 ppm or less. A p-type diffusion layer and a photovoltaic cell having a p-type diffusion layer are prepared by applying the composition for forming a p-type diffusion layer, followed by a thermal diffusion treatment. | 2015-07-30 |
20150214419 | METHOD OF MAKING A LIGHT EMITTING DEVICE AND A LIGHT EMITTING DEVICE MADE THEREOF - This disclosure discloses a method of making a light-emitting device. The method comprises forming a plurality of light-emitting chips, wherein each of the light-emitting chips comprising an epitaxial structure and an electrode formed on the epitaxial structure; forming a protection layer on the electrode in each of the light-emitting chips; forming a plurality of light-emitting groups by collecting the light-emitting chips, wherein each of the light-emitting groups having substantially the same opto-electrical characteristics; forming a wavelength converted layer in each of the light-emitting groups to cover the epitaxial structure and the protection layer; and removing the wavelength converted layer on the protection layer to expose the protection layer. | 2015-07-30 |
20150214420 | MICRO DEVICE WITH STABILIZATION POST - A method and structure for stabilizing an array of micro devices is disclosed. A stabilization layer includes an array of stabilization cavities and array of stabilization posts. Each stabilization cavity includes sidewalls surrounding a stabilization post. The array of micro devices is on the array of stabilization posts. Each micro device in the array of micro devices includes a bottom surface that is wider than a corresponding stabilization post directly underneath the bottom surface. | 2015-07-30 |
20150214421 | LIGHT EMITTING DIODE WITH LIGHT EMITTING LAYER CONTAINING NITROGEN AND PHOSPHORUS - Embodiments of the invention include an n-type region, a p-type region, and a light emitting layer disposed between the n-type region and the p-type region. The light emitting layer is a III-V material comprising nitrogen and phosphorus. The device also includes a graded region disposed between the light emitting layer and one of the p-type region and the n-type region. The composition of materials in the graded region is graded. | 2015-07-30 |
20150214422 | LIGHT EMITTING DEVICE, AND METHOD FOR FABRICATING THE SAME - Disclosed are a light emitting device, a method of fabricating the light emitting device, a light emitting device package, and a lighting system. The light emitting device includes a first conductive semiconductor layer, an active layer on the first conductive semiconductor layer, an electron blocking layer on the active layer, and a second conductive semiconductor layer on the electron blocking layer. The electron blocking layer includes a first electron blocking layer and an interrupted diffusion layer on the first electron blocking layer. | 2015-07-30 |
20150214423 | METHOD FOR MANUFACTURING OPTICAL DEVICE AND OPTICAL DEVICE - A method for manufacturing an optical device includes forming a mask on main surface of a first GaN layer such that the mask has one or more openings in first region on the main surface of the first layer, selectively growing first GaN in the opening such that core including the first GaN is formed on exposed portion of the first layer, forming an active layer on the core such that active region is formed, forming a second GaN layer on the active region, removing a portion of the mask covering second region, forming a first electrode in the second region on the first layer, forming a second electrode covering the second layer and extending onto the mask in third region on the first layer, forming a first pad on the first electrode, and forming a second pad in a pad-forming region of the second electrode in the third region. | 2015-07-30 |
20150214424 | NITRIDE SEMICONDUCTOR LIGHT EMITTING DEVICE AND METHOD OF MANUFACTURING THE SAME - A nitride semiconductor light emitting device includes a conductive substrate, a first metal layer, a second conductivity-type semiconductor layer, an emission layer, and a first conductivity-type semiconductor layer in this order. The nitride semiconductor light emitting device additionally has an insulating layer covering at least side surfaces of the second conductivity-type semiconductor layer, the emission layer and the first conductivity-type semiconductor layer. A method of manufacturing the same is provided. The nitride semiconductor light emitting device may further include a second metal layer. Thus, a reliable nitride semiconductor light emitting device and a method of manufacturing the same are provided in which short-circuit at the PN junction portion and current leak is reduced as compared with the conventional examples. | 2015-07-30 |
20150214425 | Optoelectronic Integrated Circuit - A semiconductor device employs an epitaxial layer arrangement including a first ohmic contact layer and first modulation doped quantum well structure disposed above the first ohmic contact layer. The first ohmic contact layer has a first doping type, and the first modulation doped quantum well structure has a modulation doped layer of a second doping type. At least one isolation ion implant region is provided that extends through the first ohmic contact layer. The at least one isolation ion implant region can include oxygen ions. The at least one isolation ion implant region can define a region that is substantially free of charge carriers in order to reduce a characteristic capacitance of the device. A variety of high performance transistor devices (e.g., HFET and BICFETs) and optoelectronic devices can employ this device structure. Other aspects of wavelength-tunable microresonantors and related semiconductor fabrication methodologies are also described and claimed. | 2015-07-30 |
20150214426 | LIGHT-EMITTING DEVICE - A light-emitting device including a first type doped semiconductor layer, a second type doped semiconductor layer, and a light-emitting layer is provided. The light-emitting layer is located between the first type doped semiconductor layer and the second type doped semiconductor layer. The light-emitting layer includes a plurality of barrier layers and a plurality of quantum well layers. Each of the quantum well layers is located between two adjacent barrier layers, and the quantum well layers include a germanium dopant. | 2015-07-30 |
20150214427 | LED SEMICONDUCTOR COMPONENT - An LED semiconductor component having an n-doped substrate layer and a first, n-doped cladding layer, wherein the cladding layer is located on the substrate layer, and having an active layer, wherein the active layer comprises a light-emitting layer and is located on the first cladding layer, and having a second, p-doped cladding layer, wherein the second cladding layer is located on the active layer, and having a p-doped current spreading layer, wherein the current spreading layer is located on the second cladding layer, and having a p-doped contact layer, wherein the p-doped contact layer is located on the current spreading layer, wherein the p-doped contact layer is made of an aluminiferous layer and has carbon as dopant. | 2015-07-30 |
20150214428 | LIGHT EMITTING DEVICE - The light emitting device | 2015-07-30 |
20150214429 | METHOD FOR MANUFACTURING ROD-TYPE LIGHT EMITTING DEVICE AND ROD-TYPE LIGHT EMITTING DEVICE - There is provided a method for manufacturing a rod-type light emitting device, which includes: forming a rod having lateral surfaces and an upper surface on a GaN layer of a first conductivity-type, the rod being made of a GaN of the first conductivity-type; selectively growing a high-resistivity layer on the upper surface of the rod; forming a multi-quantum well layer to cover the lateral surfaces and the upper surface of the rod and the high-resistivity layer; and forming a GaN layer of a second conductivity-type to cover the multi-quantum well layer. | 2015-07-30 |
20150214430 | Fluidic Assembly Top-Contact LED Disk - A method is provided for forming a direct emission display. The method provides a transparent substrate with an array of wells formed in its top surface. A fluid stream is supplied to the substrate top surface comprising a plurality of top-contact light emitting diode (LED) disks. The wells are filled with the LED disks. A first array of electrically conductive lines is formed over the substrate top surface to connect with a first contact of each LED disk, and a second array of electrically conductive lines is formed over the substrate top surface to connect with a second contact of each LED disk. An insulator over the disk exposes an upper disk (e.g., p-doped) contact region. A via is formed through the disk, exposing a center contact region of a lower (e.g., n-doped) disk contact region. Also provided are a top-contact LED disk and direct emission display. | 2015-07-30 |
20150214431 | LIGHT-EMITTING DIODE DEVICE AND METHOD FOR FABRICATING THE SAME - The invention provides a light-emitting diode device and a method for fabricating the same. The light-emitting diode device includes a metal substrate. A light-emitting diode structure is bonded on the metal substrate. The light-emitting diode structure includes a first type semiconductor substrate and a second type semiconductor layer. The first type semiconductor layer has a first surface and a second surface opposite to the first surface. The second type semiconductor layer is in contact with the metal substrate. A light-emitting layer is disposed between the first type semiconductor substrate and the second type semiconductor layer. A portion of the second surface and a sidewall adjacent to the second surface are uneven roughened surfaces. | 2015-07-30 |
20150214432 | OPTICAL DEVICE AND MANUFACTURING METHOD THEREFOR - An optical device including a substrate and a light emitting layer formed on the front surface of the substrate. The back surface of the substrate is formed with a concave portion like a crater. The concave portion is formed by applying a laser beam having an absorption wavelength to an optical device wafer. In the optical device, light emitted from the light emitting layer strikes the inner surface of the concave portion and is next irregularly reflected from the inner surface of the concave portion. | 2015-07-30 |
20150214433 | METHOD FOR PRODUCING CORE/SHELL NANOPARTICLES AND CORE/SHELL NANOPARTICLES - The present invention relates to a process for the continuous preparation of core-shell nanoparticles, comprising a core of a core material, preferably of a semiconductor material, and a shell of a shell material, preferably of a semiconductor material, wherein selected starting materials for the shell material are mixed with a dispersion of nanoparticles of the core material and are passed continuously through a reaction zone of a tubular reactor, and other starting materials for the shell material are fed to the reaction zone of the tubular reactor at two or more locations, preferably via a tubular membrane, and the starting materials for the shell material react in the reaction zone to form a shell around the nanoparticles of the core material. The invention also relates to the tubular reactor with the membrane and its use for the continuous synthesis of core-shell nanoparticles. | 2015-07-30 |
20150214434 | SUBSTRATE FOR NITRIDE SEMICONDUCTOR DEVICE AND PRODUCTION METHOD THEREOF, AND RED LIGHT EMITTING SEMICONDUCTOR DEVICE AND PRODUCTION METHOD THEREOF - A production method of a substrate for nitride semiconductor device comprising
| 2015-07-30 |
20150214435 | SEMICONDUCTOR LIGHT EMITTING DIODE DEVICE AND FORMATION METHOD THEREOF - The present invention provides a semiconductor light emitting diode (LED) device and a formation method thereof. The device comprises: an active layer; a P-type semiconductor layer and an N-type semiconductor layer respectively located at two sides of the active layer; a positive electrode welding layer electrically connected to the P-type semiconductor layer; and a negative electrode welding layer electrically connected to the N-type semiconductor layer. The material of the positive electrode welding layer and/or the negative electrode welding layer is an aluminum alloy material. The present invention is capable of better meeting requirements of the LED device for the electrode welding layers, improving electro-migration resistance under large current, and improving the thermal stability of the device. Compared with a conventional aluminum material, the service life of the device is increased, and control over industrialization cost is facilitated. | 2015-07-30 |
20150214436 | SEMICONDUCTOR LIGHT EMITTING DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR LIGHT EMITTING DEVICE - According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer, a light emitting unit, a second semiconductor layer, a reflecting electrode, an oxide layer and a nitrogen-containing layer. The first semiconductor layer is of a first conductivity type. The light emitting unit is provided on the first semiconductor layer. The second semiconductor layer is provided on the light emitting unit and is of a second conductivity type. The reflecting electrode is provided on the second semiconductor layer and includes Ag. The oxide layer is provided on the reflecting electrode. The oxide layer is insulative and has a first opening. The nitrogen-containing layer is provided on the oxide layer. The nitrogen-containing layer is insulative and has a second opening communicating with the first opening. | 2015-07-30 |
20150214437 | LIGHT EMITTING DIODE HAVING CARBON NANOTUBES - A light emitting diode includes a substrate, a first semiconductor layer, an active layer, a second semiconductor layer, a first electrode, a second electrode and a carbon nanotube structure. The first semiconductor layer, the active layer, and the second semiconductor layer are stacked on the substrate. The first semiconductor layer is a stepped structure and has a first surface and a second surface lower than the first surface. The first electrode is located on and electrically connected to the second semiconductor layer. The carbon nanotube structure is located on the second surface of the first semiconductor layer and electrically connected to the first semiconductor layer. The second electrode is located on and electrically connected to the carbon nanotube structure. | 2015-07-30 |
20150214438 | LED MODULE AND METHOD FOR MANUFACTURING THE SAME - An LED module and method for manufacturing the same are disclosed. The LED module of the present invention comprises a substrate, at least one LED chip, and a buffer layer. The LED chip is disposed on the predetermined position of the top surface of the substrate. The buffer layer is disposed on the top surface of the substrate and covers the LED chip. The buffer layer comprises at least one opening disposed on the top electrode of the LED chip. At least one contact pad is disposed in the opening and electrically coupled to the top electrode. Furthermore, a conductive pattern layer is disposed on the buffer layer and electrically coupled to the contact pad. | 2015-07-30 |
20150214439 | LED DEVICE WITH BRAGG REFLECTOR AND METHOD OF SINGULATING LED WAFER SUBSTRATES INTO DICE WITH SAME - A method of dicing semiconductor devices from a substrate includes forming a Bragg reflector over a bottom side of the substrate, where the bottom side is opposite of a top side, generating a pattern of defects in the substrate with a laser beam from the bottom side of the substrate, and applying pressure to the substrate to dice the substrate along the pattern of defects. The Bragg reflector includes a first layer of dielectric material having a first index of refraction and a second dielectric material having a second index of refraction different from the first index of refraction. | 2015-07-30 |
20150214440 | LIGHT EMITTING DIODE FOR SURFACE MOUNT TECHNOLOGY, METHOD OF MANUFACTURING THE SAME, AND METHOD OF MANUFACTURING LIGHT EMITTING DIODE MODULE - Provided are a light emitting diode (LED) in which a conductive barrier layer surrounding a reflective metal layer is defined by a protective insulating layer, and a method of manufacturing the same. A reflection pattern including a reflective metal layer and a conductive barrier layer is formed on an emission structure in which a first semiconductor layer, an active layer, and a second semiconductor layer are formed. The conductive barrier layer prevents diffusion of a reflective metal layer and extends to a protective insulating layer recessed under a photoresist pattern having an overhang structure during a forming process. Accordingly, a phenomenon where the conductive barrier layer is in contact with sidewalls of the photoresist pattern having an over-hang structure and the reflective metal layer forms points is prevented. Thus, LED modules having various shapes may be manufactured. | 2015-07-30 |
20150214441 | LIGHT EMITTING DIODE PACKAGE AND ILLUMINATING DEVICE - A LED package including a transparent substrate, at least one LED chip, a first sealing layer and a second sealing layer is provided. The transparent substrate has a first surface and a second surface opposite the first surface. The LED chip is disposed on the first surface of the transparent substrate. The first sealing layer is disposed on the first surface of the transparent substrate and covers the LED chip. The second sealing layer is disposed on the second surface of the transparent substrate and overlaps with the LED chip in a direction perpendicular to the transparent substrate. The LED chip is used to emit a light beam. A portion of the light beam exits the LED package by passing through the transparent substrate and the second sealing layer. Moreover, an illuminating device including the aforementioned LED package is also provided. | 2015-07-30 |
20150214442 | LIGHT EMITTING DIODE PACKAGE STRUCTURE AND METHOD THEREOF - A light emitting diode (LED) package structure is provided. The LED package structure comprises a substrate, at least one LED chip, an encapsulating compound and a curing material. The substrate has a first surface and a second surface opposite to the first surface. The LED chip is disposed on the first surface. The encapsulating compound covers the LED chip. The encapsulating compound has a plurality of particulate phosphors therein. The phosphors are centralized near a side of the encapsulating compound away from the substrate. The curing material is adhered to the side of the encapsulating compound away from the substrate. | 2015-07-30 |
20150214443 | PHOSPHOR COATING METHOD FOR PRODUCING WAVELENGTH CONVERTING LIGHT-EMITTING DEVICES - The present invention provides a method of producing an optical device or wavelength converting light-emitting device, the method comprising coating a wafer containing at least one material selected from the group of a gallium nitride material and a silicon carbide material with a composite structure comprising an optical material, e.g., wavelength converting material, and a compound represented by formula (I) and curing the composite structure to induce polymerization of said compound. The present invention further provides an optical device, e.g., a wavelength converting light-emitting device produced by this method. | 2015-07-30 |
20150214444 | PHOSPHOR AND LIGHT EMITTING DEVICE USING THE SAME - A phosphor for absorbing light in a region from ultraviolet to visible light and emitting light whose emission peak wavelength being in a range of 600 nm to 650 nm, represented by general formula shown below, and having a difference between the emission peak wavelength and a half width being larger than 543 nm. | 2015-07-30 |
20150214445 | LED (LIGHT-EMITTING DIODE) ENCAPSULATION AND MANUFACTURING METHOD THEREOF - The present invention provides an LED encapsulation and a manufacturing method thereof. The LED encapsulation includes: a first frame ( | 2015-07-30 |
20150214446 | ELECTRICAL COMPONENT AND METHOD OF PRODUCING ELECTRICAL COMPONENTS - An electrical component includes a closed lead frame with a passage opening at least one electrical component arranged within the passage opening, the electrical component including a first contact pad on one side of the electrical component and a second contact pad on a second side of the electric component, wherein the second side faces the first side and the second contact pad is electrically coupled to the lead frame; and an encapsulation which mechanically couples the electrical component to the lead frame, wherein the lead frame includes a recess on one side, the recess extending from an edge of the lead frame to the passage opening and connecting at least one electrical connecting element from the edge of the lead frame to the component arranged in the passage opening. | 2015-07-30 |
20150214447 | OPTOELECTRONIC COMPONENT COMPRISING A TRANSPARENT COUPLING-OUT ELEMENT - What is specified is an optoelectronic component comprising a layer sequence having an active layer, which emits primary electromagnetic radiation, and at least one transparent coupling-out element arranged in the beam path of the primary electromagnetic radiation. The at least one transparent coupling-out element comprises a hybrid material or is produced from a hybrid material. | 2015-07-30 |
20150214448 | ULTRAVIOLET LIGHT EMITTING DEVICE - Disclosed is a light emitting device including an active layer emitting light with a wavelength band of 200 nm to 405 nm, and a light-transmitting layer disposed on the active layer, the light-transmitting layer having a lower part facing the active layer, wherein at least one of side and upper parts of the light-transmitting layer has a surface-processed pattern portion. | 2015-07-30 |
20150214449 | OPTOELECTRONIC ELEMENT - The disclosure discloses an optoelectronic element comprising: an optoelectronic unit comprising a first metal layer, a second metal layer, and an outermost lateral surface; an insulating layer having a first portion overlapping the optoelectronic unit and extending beyond the lateral surface, and a second portion separated from the first portion in a cross-sectional view; and a first conductive layer formed on the insulating layer. | 2015-07-30 |
20150214450 | OPTOELECTRONIC COMPONENTS - An optoelectronic component includes a carrier; a semiconductor chip having an active layer that generates radiation and is arranged on a carrier; a dispersed material including a matrix material and particles embedded therein arranged on the semiconductor chip and/or the carrier at least in regions, and is integral therewith; and a separating edge between the dispersed material and matrix material formed at a chip edge of the semiconductor chip. | 2015-07-30 |
20150214451 | LIGHT-EMITTING MODULE - Each of a plurality of semiconductor light-emitting element has, on an upper surface thereof that has a quadrilateral shape, a pair of connecting portions having different polarities from each other. The pair of connecting portions are aligned on a diagonal of the quadrilateral shape. The diagonal intersects a row direction along which the semiconductor light-emitting elements within a row are arranged. Connecting portions having identical polarity are positioned on an imaginary line parallel to the row direction. Metal wires intersect two sides extending from a corner, on the diagonal, of the upper surface of each of the semiconductor light-emitting elements when viewed from a direction perpendicular to a mounting surface of a substrate for mounting the semiconductor light-emitting elements. | 2015-07-30 |
20150214452 | DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME - Provided is a display device and a method of manufacturing the same. The display device includes a thin film transistor, a first electrode electrically connected to the thin film transistor, a self-light emitting pixel layer disposed on the first electrode, a second electrode disposed on the self-light emitting pixel layer, a substrate in which an auxiliary wire is buried, the substrate being disposed on the second electrode, and a reflective pixel layer disposed on the substrate. | 2015-07-30 |
20150214453 | LIGHT EMITTING DIODE PACKAGE - A light emitting diode package includes a package body having a cavity, a light emitting diode chip having a plurality of light emitting cells connected in series to one another, a phosphor converting a frequency of light emitted from the light emitting diode chip, and a pair of lead electrodes. The light emitting cells are connected in series between the pair of lead electrodes. | 2015-07-30 |
20150214454 | LIGHT-EMITTING DEVICE - A light-emitting device comprises: a supporting member having a top surface with a first surface area and a bottom surface with a second surface area; a first conductive via having a top surface with a third surface area; a second conductive via separated from the first conductive via and having a top surface with a fourth surface area, wherein the supporting member surrounds the first conductive via and the second conductive via; and a semiconductor structure comprising an active layer on the supporting member; wherein the sum of the third surface area and the fourth surface area is greater than 40% of the first surface area and smaller than the first surface area. | 2015-07-30 |
20150214455 | LIGHT EMITTING DEVICE AND METHOD OF MANUFACTURING THE SAME - Disclosed is a light emitting device and a method of manufacturing the same. The light emitting device includes a body, a first electrode installed in the body and a second electrode separated from the first electrode, a light emitting chip formed on one of the first and second electrodes, and electrically connected to the first and second electrodes, and a protective cap projecting between the first and second electrodes. | 2015-07-30 |
20150214456 | THERMOELECTRIC MATERIAL AND THERMOELECTRIC ELEMENT INCLUDING THE SAME - Provided is a thermoelectric material including metal oxide powder and thermoelectric powder. Thus, an internal filling rate is improved so that a Peltier effect can be maximized according to the increase of electrical conductivity and a Seebeck coefficient and the reduction of thermal conductivity, thereby enabling the improvement of the figure of merit (ZT) of a thermoelectric element. | 2015-07-30 |
20150214457 | THERMOELECTRIC MATERIAL AND THERMOELECTRIC MODULE - A thermoelectric material is manufactured by a manufacturing process including annealing at an annealing temperature from 125° C. to 200° C. and for an annealing time from 5 minutes to 12 hours applied to a substance selected from the group consisting of conductive polymer, polystyrene sulfonate (PSS), tosylate (TOS), chloride and perchlorate and a substance as solvent selected from the group consisting of ethylene glycol, ethanol, dimethyl sulfoxide and isopropanol. | 2015-07-30 |
20150214458 | THERMOELECTRIC GENERATOR SYSTEM FOR INTERCOOLER COUPLED TO TURBOCHARGER - A thermoelectric generator system for use between gases from a compressor stage of a turbocharger and a heat transfer fluid of an intercooler that treats the gases. In one version, the system may include a first terminal in thermal contact with gases from the compressor stage of the turbocharger to be treated by the intercooler; a second terminal in thermal contact with a heat transfer fluid for use in the intercooler; and a thermoelectric material between the first terminal and the second terminal, the thermoelectric generator converting a temperature difference between the gases and the heat transfer fluid to an electric current. A controller may be provided for controlling a current flow transmitted from the thermoelectric material to a load. A related intercooler system and engine system are also provided. | 2015-07-30 |
20150214459 | THERMOELECTRIC CONVERSION DEVICE AND ELECTRONIC DEVICE - A thermoelectric conversion device includes: a thermoelectric conversion element in which a p-type thermoelectric material and an n-type thermoelectric material that are provided between an upper electrode and a lower electrode of the thermoelectric conversion element are alternately connected in series via the upper electrode and the lower electrode; an insulating layer that is provided between the upper electrode and the lower electrode and covers the p-type thermoelectric material and the n-type thermoelectric material; and an electric storage element that is provided between the upper electrode and the lower electrode and is covered by the insulating layer. | 2015-07-30 |
20150214460 | THERMOELECTRIC GENERATOR SYSTEM - A thermoelectric generator system according to the present disclosure includes first and second thermoelectric generator units, each including tubular thermoelectric generators. Each of the generators has a flow path defined by its inner peripheral surface, and generates electromotive force in an axial direction thereof based on a temperature difference between its inner and outer peripheral surfaces. Each unit further includes: a container housing the generators inside; and electrically conductive members providing electrical interconnection for the generators. The container has fluid inlet and outlet ports through which a fluid flows inside, and openings into which the generators are inserted. A buffer vessel is arranged between the first and second units, and has a first opening communicating with the flow paths of the generators in the first unit and a second opening communicating with the flow paths of the generators in the second unit. | 2015-07-30 |
20150214461 | SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND ELECTRONIC THERMOELECTRIC POWER GENERATION DEVICE - The invention relates to a semiconductor device, a method for manufacturing a semiconductor device and an electronic thermoelectric power generation device, a semiconductor device having a thermoelectric conversion element that is embedded in a semiconductor chip so as to be integrated with a semiconductor circuit can be implemented. A semiconductor substrate is provided with a through opening for a region in which a thermoelectric conversion element is to be formed, and a thermoelectric conversion element is embedded in the through opening, where the thermoelectric conversion element includes: a number of penetrating rods made of a thermoelectric conversion material; and an insulating reinforcement layer in which the penetrating rods are embedded and of which the thermal conductivity is lower than that of the thermoelectric conversion material. | 2015-07-30 |
20150214462 | MICROELECTROMECHANICAL GYROSCOPES AND RELATED APPARATUS AND METHODS - In one embodiment, an apparatus includes a resonant structure having a plate, a drive electrode and a sense electrode. The resonant structure defines an axis substantially orthogonal to a plane defined by the plate when the resonant structure is not excited. The plate is formed from a piezoelectric material. The drive electrode is configured to excite the resonant structure, and the sense electrode is configured to sense a signal in response to rotation of the resonant structure about the axis. | 2015-07-30 |
20150214463 | VIBRATION GENERATING APPARATUS - There is provided a vibration generating apparatus including: an elastic member having both end portions fixed to a housing; a piezoelectric element installed on one surface of the elastic member; and a circuit board connected to the piezoelectric element, wherein the elastic member has support parts formed on both side surfaces of both end portions thereof and bent downwardly in order to be installed in the housing, and a portion of the circuit board passing between the support parts has a flat panel shape. | 2015-07-30 |
20150214464 | VIBRATION GENERATING DEVICE - There is provided a vibration generating device including: a housing having an internal space; a vibrating member of which both end portions are fixed to the housing; a piezoelectric element fixed to a top surface of the vibrating member; a mass body disposed on the piezoelectric element; and a coupling member connecting the mass body and the vibrating member to each other and including a hook portion connected to the vibrating member by elastic deformation. | 2015-07-30 |
20150214465 | PIEZOELECTRIC ELEMENT, PIEZOELECTRIC DEVICE, INK-JET HEAD, AND INK-JET PRINTER - A piezoelectric element having an electrode, a seed layer for controlling the crystal orientation of a piezoelectric layer, and the piezoelectric layer stacked in this order from the substrate side. The seed layer is composed of two or more layers stacked together each comprising crystals of spherical particles. | 2015-07-30 |
20150214466 | VIBRATION GENERATING APPARATUS FOR PORTABLE TERMINAL - The vibration generating apparatus includes: a diaphragm formed of a metal; a piezoelectric plate mounted on at least one surface of the diaphragm; a fixed member coupled to the diaphragm along an outer circumference of the diaphragm to fix the diaphragm; and wherein the fixed member is formed of a material having a Young's modulus lower than that of steel. | 2015-07-30 |
20150214467 | VIBRATOR AND ELECTRONIC DEVICE INCLUDING THE SAME - There are provided a vibrator and an electronic device including the same. The vibrator includes: a housing having an internal space; an elastic member having both ends fixed to the housing so as to be disposed in the internal space in a state in which elastic deformation is possible; and a piezoelectric element mounted on one surface of the elastic member, wherein the piezoelectric element is fixed to the elastic member by soldering. | 2015-07-30 |
20150214468 | PIEZOELECTRIC ELEMENT, PIEZOELECTRIC DEVICE, INKJET HEAD, AND INKJET PRINTER - A piezoelectric element includes, on a base, an underlying layer for controlling crystallinity of a piezoelectric layer, and the piezoelectric layer. The piezoelectric layer includes a crystal with an ABO | 2015-07-30 |
20150214469 | PIEZOELECTRIC CERAMIC, METHOD FOR MANUFACTURING THE SAME, PIEZOELECTRIC ELEMENT, AND ELECTRONIC APPARATUS - A piezoelectric ceramic includes a perovskite-type metal oxide containing barium titanate, and Mn. When a surface thereof along the remanent polarization direction is subjected to X-ray diffraction analysis at room temperature, the ratio of the diffraction intensity of the (002) plane to the diffraction intensity of the (200) plane is 1.0 or more, the diffraction peak of the (002) plane has a half width of 1.2° or less, and the lattice constant of the c-axis thereof and the lattice constant of the a-axis thereof satisfy the relationship 1.004≦c/a≦1.010. | 2015-07-30 |
20150214470 | PIEZOELECTRIC ELEMENT, METHOD FOR MANUFACTURING PIEZOELECTRIC ELEMENT, AND ELECTRONIC APPARATUS - A piezoelectric element includes a piezoelectric material portion. The piezoelectric material portion is made of a piezoelectric ceramic that includes a perovskite-type metal oxide including barium titanate and Mn and that has residual polarization. The piezoelectric material portion has a measurement surface extending in a direction that crosses a direction of the residual polarization of the piezoelectric ceramic, and, after the measurement surface has been polished to have a surface roughness of 200 nm or less, the measurement surface has a (002)/(200) X-ray diffraction intensity ratio of 1.0 or more at room temperature. A ratio c/a of a c-axis lattice constant c to an a-axis lattice constant a of the piezoelectric ceramic at room temperature satisfies 1.004≦c/a≦1.010. A half-width of a (002) diffraction peak of the measurement surface at room temperature is 1.2° or less. | 2015-07-30 |
20150214471 | Magnetoresistance element and non-volatile semiconductor storage device using same magnetoresistance element - The invention provides a magnetoresistance element with a configuration such that a stable switching action is possible with a current flowing in response to the application of a unipolar electrical pulse, and a non-volatile semiconductor storage device using the magnetoresistance element. | 2015-07-30 |
20150214472 | MAGNETIC MEMORY CELLS AND METHODS OF FORMATION - Memory cells including cell cores having free regions are disclosed. The free regions exhibit a strain that affects a magnetization orientation within the cell core. A stressor structure may exert a stress upon at least a portion of the cell core to effect the strain state of the free region. Also disclosed are semiconductor device structures and systems including such memory cells as well as methods for forming such memory cells. | 2015-07-30 |
20150214473 | METHOD AND SYSTEM FOR PERFORMING POST-ETCH ANNEALING OF A WORKPIECE - A method for performing post-etch annealing of a workpiece in an annealing system is described. In particular, the method includes disposing one or more workpieces in an annealing system, each of the one or more workpieces having a multilayer stack of thin films that has been patterned using an etching process sequence to form an electronic device characterized by a cell critical dimension (CD), wherein the multilayer stack of thin films includes at least one patterned layer containing magnetic material. Thereafter, the patterned layer containing magnetic material on the one or more workpieces is annealed in the annealing system via an anneal process condition, wherein the anneal process condition is selected to adjust a property of the patterned layer containing magnetic material. | 2015-07-30 |
20150214474 | ETCHING METHOD AND SUBSTRATE PROCESSING APPARATUS - An etching method is provided for etching a multilayer film material that includes a metal laminated film having an insulating layer arranged between a first magnetic layer and a second magnetic layer. The etching method includes an etching step of generating a plasma by supplying a first gas to a processing chamber and etching the metal laminated film using the generated plasma. The first gas is a gas containing PF | 2015-07-30 |
20150214475 | PATTERN FORTIFICATION FOR HDD BIT PATTERNED MEDIA PATTERN TRANSFER - A method and apparatus for forming a magnetic layer having a pattern of magnetic properties on a substrate is described. The method includes using a metal nitride hardmask layer to pattern the magnetic layer by plasma exposure. The metal nitride layer is patterned using a nanoimprint patterning process with a silicon oxide pattern negative material. The pattern is developed in the metal nitride using a halogen and oxygen containing remote plasma, and is removed after plasma exposure using a caustic wet strip process. All processing is done at low temperatures to avoid thermal damage to magnetic materials. | 2015-07-30 |
20150214476 | SEMICONDUCTOR MEMORY - Manufacturing processes for phase change memory have suffered from the problem of chalcogenide material being susceptible to delamination, since this material exhibits low adhesion to high melting point metals and silicon oxide films. Furthermore, chalcogenide material has low thermal stability and hence tends to sublime during the manufacturing process of phase change memory. According to the present invention, conductive or insulative adhesive layers are formed over and under the chalcogenide material layer to enhance its delamination strength. Further, a protective film made up of a nitride film is formed on the sidewalls of the chalcogenide material layer to prevent sublimation of the chalcogenide material layer. | 2015-07-30 |
20150214477 | MEMORY CELLS AND METHODS OF FABRICATION - Memory cells are disclosed, which cells include a cell material and an ion-source material over the cell material. A discontinuous interfacial material is included between the cell material and the ion-source material. Also disclosed are fabrication methods and semiconductor devices including the disclosed memory cells. | 2015-07-30 |
20150214478 | VARIABLE RESISTANCE MEMORY DEVICES - A variable resistance memory device includes a plurality of first conductive lines, a plurality of second conductive lines, a plurality of memory cells, a plurality of first air gaps and a plurality of second air gaps. The first conductive line extends in a first direction. The second conductive line is over the first conductive line and extends in a second direction crossing the first direction. The memory cell includes a variable resistance device. The memory cell is located at an intersection region of the first conductive line and the second conductive line. The first air gap extends in the first direction between the memory cells. The second air gap extends in the second direction between the memory cells. | 2015-07-30 |
20150214479 | MULTIPLE PHASE CHANGE MATERIALS IN AN INTEGRATED CIRCUIT FOR SYSTEM ON A CHIP APPLICATION - A device includes first and second pluralities of memory cells with memory elements and first and second capping materials on the first and second pluralities of memory cells. First and second capping materials can comprise lower and higher density silicon nitrides. The memory elements can include a programmable resistance memory material, and the capping materials can contact the memory elements. The first and second pluralities of memory cells can have a common cell structure. The first memory cells in the can comprise a top and bottom electrodes with a memory material therebetween and the first capping material contacting the memory material. Control circuits can apply different write algorithms to the first and second pluralities of memory cells. The first and second sets of memory cells can have different operational memory characteristics by forming the first and second capping layers using different capping materials but with the same cell structure. | 2015-07-30 |
20150214480 | RESISTIVE RANDOM-ACCESS MEMORY AND METHOD FOR FABRICATING THE SAME - The disclosure provides a method for fabricating a resistive random-access memory, including: providing a substrate; forming an inter-layer dielectric layer over the substrate; forming a stop layer over the inter-layer dielectric layer; forming an opening through the stop layer and the inter-layer dielectric layer; forming a bottom electrode in the opening, wherein the bottom electrode is coplanar with the stop layer; depositing a dielectric layer over the bottom electrode and the stop layer; depositing a top electrode material over the dielectric layer; and patterning the top electrode material and the dielectric layer to define a top electrode and an inter-electrode dielectric layer under the top electrode, wherein the top electrode has a second surface opposite to a first surface of the bottom electrode, arid the second surface has a greater area than the first surface. | 2015-07-30 |
20150214481 | Memory Device Constructions, Memory Cell Forming Methods, and Semiconductor Construction Forming Methods - Memory device constructions include a first column line extending parallel to a second column line, the first column line being above the second column line; a row line above the second column line and extending perpendicular to the first column line and the second column line; memory material disposed to be selectively and reversibly configured in one of two or more different resistive states; a first diode configured to conduct a first current between the first column line and the row line via the memory material; and a second diode configured to conduct a second current between the second column line and the row line via the memory material. In some embodiments, the first diode is a Schottky diode having a semiconductor anode and a metal cathode and the second diode is a Schottky diode having a metal anode and a semiconductor cathode. | 2015-07-30 |
20150214482 | METHOD OF DOPING 2-DIMENSIONAL SEMICONDUCTOR AND SWITCHING DEVICE - Example embodiments relate to methods of doping a 2-dimensional semiconductor. The method includes forming a semiconductor layer on a substrate, implanting ions into the semiconductor layer, forming a doped layer formed of a 2-dimensional semiconductor layer or an organic semiconductor layer on the semiconductor layer, and doping the doped layer by diffusing the ions of the semiconductor layer into the doped layer through annealing the substrate. | 2015-07-30 |