31st week of 2018 patent applcation highlights part 53 |
Patent application number | Title | Published |
20180218924 | SUBSTRATE LIQUID TREATMENT APPARATUS | 2018-08-02 |
20180218925 | HEATING APPARATUS AND SUBSTRATE PROCESSING APPARATUS | 2018-08-02 |
20180218926 | ACTIVE THERMAL CONTROL HEAD HAVING ACTUATABLE COLD CAPACITOR | 2018-08-02 |
20180218927 | Substrate Processing Apparatus | 2018-08-02 |
20180218928 | METHODS AND APPARATUS FOR CORRECTING SUBSTRATE DEFORMITY | 2018-08-02 |
20180218929 | SUBSTRATE PROCESSING APPARATUS, SUBSTRATE PROCESSING METHOD, AND STORAGE MEDIUM | 2018-08-02 |
20180218930 | SUBSTRATE PROCESSING APPARATUS | 2018-08-02 |
20180218931 | PROCESSING APPARATUS | 2018-08-02 |
20180218932 | PROCESSING METHOD OF WORKPIECE | 2018-08-02 |
20180218933 | ADJUSTABLE EXTENDED ELECTRODE FOR EDGE UNIFORMITY CONTROL | 2018-08-02 |
20180218934 | HANDLER BONDING AND DEBONDING FOR SEMICONDUCTOR DIES | 2018-08-02 |
20180218935 | SUBSTRATE TRANSPORT DEVICE, DETECTION POSITION CALIBRATION METHOD AND SUBSTRATE PROCESSING APPARATUS | 2018-08-02 |
20180218936 | Switch Element and Load Driving Device | 2018-08-02 |
20180218937 | BOND PAD PROTECTION FOR HARSH MEDIA APPLICATIONS | 2018-08-02 |
20180218938 | GATE ALL AROUND DEVICE ARCHITECTURE WITH HYBRID WAFER BOND TECHNIQUE | 2018-08-02 |
20180218939 | Semiconductor Devices and Methods for Forming Semiconductor Devices | 2018-08-02 |
20180218940 | CONFORMAL LOW TEMPERATURE HERMETIC DIELECTRIC DIFFUSION BARRIERS | 2018-08-02 |
20180218941 | SEMICONDUCTOR DEVICE | 2018-08-02 |
20180218942 | METHODS FOR FORMING A BARRIER LAYER WITH PERIODIC CONCENTRATIONS OF ELEMENTS AND STRUCTURES RESULTING THEREFROM | 2018-08-02 |
20180218943 | TECHNIQUES FOR FILLING A STRUCTURE USING SELECTRIVE SURFACE MODIFICATION | 2018-08-02 |
20180218944 | SYSTEM FOR UNIFORM DEPOSITION OF METAL | 2018-08-02 |
20180218945 | ELECTRONIC DEVICE AND METHOD FOR FABRICATING THE SAME | 2018-08-02 |
20180218946 | 3D SEMICONDUCTOR DEVICE, FABRICATION METHOD AND SYSTEM | 2018-08-02 |
20180218947 | METHODS, APPARATUS AND SYSTEM FOR PROVIDING ADJUSTABLE FIN HEIGHT FOR A FINFET DEVICE | 2018-08-02 |
20180218948 | INTEGRATING A PLANAR FIELD EFFECT TRANSISTOR (FET) WITH A VERTICAL FET | 2018-08-02 |
20180218949 | MULTIPLE GATE LENGTH VERTICAL FIELD-EFFECT-TRANSISTORS | 2018-08-02 |
20180218950 | SEMICONDUCTOR DEVICE INCLUDING A FIELD EFFECT TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME | 2018-08-02 |
20180218951 | PATTERN FORMATION METHOD, IMPRINT DEVICE, AND COMPUTER-READABLE NON-VOLATILE STORAGE MEDIUM STORING DROP RECIPE ADJUSTMENT PROGRAM | 2018-08-02 |
20180218952 | PICKING UP IRREGULAR SEMICONDUCTOR CHIPS | 2018-08-02 |
20180218953 | SEMICONDUCTOR STRUCTURE WITH CONDUCTIVE STRUCTURE | 2018-08-02 |
20180218954 | PREFORM FOR SEMICONDUCTOR ENCAPSULATION | 2018-08-02 |
20180218955 | AIR-CAVITY PACKAGE WITH ENHANCED PACKAGE INTEGRATION LEVEL AND THERMAL PERFORMANCE | 2018-08-02 |
20180218956 | ELECTRIC CIRCUIT MODULE AND TEST METHOD OF ELECTRIC CIRCUIT MODULE | 2018-08-02 |
20180218957 | POWER SEMICONDUCTOR MODULE | 2018-08-02 |
20180218958 | Electronic Component Package and Method of Housing an Electronic Component | 2018-08-02 |
20180218959 | SEMICONDUCTOR DEVICE | 2018-08-02 |
20180218960 | SEMICONDUCTOR DEVICE | 2018-08-02 |
20180218961 | High Power Gallium Nitride Devices and Structures | 2018-08-02 |
20180218962 | LOW THERMAL RESISTANCE HANGING DIE PACKAGE | 2018-08-02 |
20180218963 | Power Module | 2018-08-02 |
20180218964 | IMMERSION COOLING ARRANGEMENTS FOR ELECTRONIC DEVICES | 2018-08-02 |
20180218965 | THYRISTOR ASSEMBLY RADIATOR FOR DC CONVERTER VALVE | 2018-08-02 |
20180218966 | SEMICONDUCTOR DEVICES INCLUDING THROUGH-SILICON-VIAS AND METHODS OF MANUFACTURING THE SAME AND SEMICONDUCTOR PACKAGES INCLUDING THE SEMICONDUCTOR DEVICES | 2018-08-02 |
20180218967 | SEMICONDUCTOR LIGHT EMITTING DEVICE AND METHOD FOR MANUFACTURING THE SAME | 2018-08-02 |
20180218968 | ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING ELECTRONIC DEVICE | 2018-08-02 |
20180218969 | SEMICONDUCTOR DEVICE | 2018-08-02 |
20180218970 | METHOD FOR FORMING SOLDER BUMPS USING SACRIFICIAL LAYER | 2018-08-02 |
20180218971 | METHOD FOR FORMING SOLDER BUMPS USING SACRIFICIAL LAYER | 2018-08-02 |
20180218972 | WIRING SUBSTRATE | 2018-08-02 |
20180218973 | METAL ON BOTH SIDES WITH POWER DISTRIBUTED THROUGH THE SILICON | 2018-08-02 |
20180218974 | WIRING BOARD AND ELECTRONIC PACKAGE | 2018-08-02 |
20180218975 | SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME | 2018-08-02 |
20180218976 | Enhancing Integrated Circuit Density with Active Atomic Reservoir | 2018-08-02 |
20180218977 | ANTIFUSE ELEMENT USING SPACER BREAKDOWN | 2018-08-02 |
20180218978 | VERTICALLY INTEGRATED NANOSHEET FUSE | 2018-08-02 |
20180218979 | VERTICALLY INTEGRATED NANOSHEET FUSE | 2018-08-02 |
20180218980 | Semiconductor Devices Including a Capping Layer | 2018-08-02 |
20180218981 | CIRCUIT DESIGN HAVING ALIGNED POWER STAPLES | 2018-08-02 |
20180218982 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | 2018-08-02 |
20180218983 | Eliminate Sawing-Induced Peeling Through Forming Trenches | 2018-08-02 |
20180218984 | SENSOR SHIELDING FOR HARSH MEDIA APPLICATIONS | 2018-08-02 |
20180218985 | Backside Redistribution Layer (RDL) Structure | 2018-08-02 |
20180218986 | PATCH ON INTERPOSER PACKAGE WITH WIRELESS COMMUNICATION INTERFACE | 2018-08-02 |
20180218987 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME | 2018-08-02 |
20180218988 | ELECTRONIC DEVICE INTERCONNECTIONS FOR HIGH TEMPERATURE OPERABILITY | 2018-08-02 |
20180218989 | Semiconductor Device and Method of Manufacture | 2018-08-02 |
20180218990 | BUMP-FORMING FILM, SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF, AND CONNECTION STRUCTURE | 2018-08-02 |
20180218991 | METHODS OF FORMING INTEGRATED CIRCUIT STRUCTURE FOR JOINING WAFERS AND RESULTING STRUCTURE | 2018-08-02 |
20180218992 | Semiconductor Device, Method for Fabricating a Semiconductor Device and Method for Reinforcing a Die in a Semiconductor Device | 2018-08-02 |
20180218993 | METAL BOND PAD WITH COBALT INTERCONNECT LAYER AND SOLDER THEREON | 2018-08-02 |
20180218994 | ANISOTROPIC CONDUCTIVE FILM, METHOD FOR PRODUCING ANISOTROPIC CONDUCTIVE FILM, METHOD FOR PRODUCING CONNECTION BODY, AND CONNECTION METHOD | 2018-08-02 |
20180218995 | METHOD FOR MANUFACTURING LIGHT-EMITTING DEVICE | 2018-08-02 |
20180218996 | Method For Producing Wire Bond Connection And Arrangement For Implementing The Method | 2018-08-02 |
20180218997 | METHOD FOR DIRECT BONDING WITH SELF-ALIGNMENT USING ULTRASOUND | 2018-08-02 |
20180218998 | STRUCTURES AND METHODS FOR LOW TEMPERATURE BONDING USING NANOPARTICLES | 2018-08-02 |
20180218999 | DIRECT BONDING METHOD | 2018-08-02 |
20180219000 | Protective Layer for Contact Pads in Fan-out Interconnect Structure and Method of Forming Same | 2018-08-02 |
20180219001 | EMBEDDED GRAPHITE HEAT SPREADER FOR 3DIC | 2018-08-02 |
20180219002 | SEMICONDUCTOR DEVICE ASSEMBLY WITH THROUGH-MOLD COOLING CHANNEL FORMED IN ENCAPSULANT | 2018-08-02 |
20180219003 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE | 2018-08-02 |
20180219004 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE | 2018-08-02 |
20180219005 | MICRO-LED ARRAY TRANSFER | 2018-08-02 |
20180219006 | DIODE-TRIGGERED SCHOTTKY SILICON-CONTROLLED RECTIFIER FOR FIN-FET ELECTROSTATIC DISCHARGE CONTROL | 2018-08-02 |
20180219007 | LOW TRIGGER AND HOLDING VOLTAGE SILICON CONTROLLED RECTIFIER (SCR) FOR NON-PLANAR TECHNOLOGIES | 2018-08-02 |
20180219008 | Bidirectional Normally-Off III-V Devices and Circuits | 2018-08-02 |
20180219009 | SYSTEMS, METHODS, AND APPARATUS FOR IMPROVED FINFETS | 2018-08-02 |
20180219010 | INTEGRATED CIRCUIT DEVICE | 2018-08-02 |
20180219011 | FLIPPED VERTICAL FIELD-EFFECT-TRANSISTOR | 2018-08-02 |
20180219012 | METHOD, DEVICE AND SYSTEM TO PROVIDE CAPACITANCE FOR A DYNAMIC RANDOM ACCESS MEMORY CELL | 2018-08-02 |
20180219013 | Method of Operating Semiconductor Memory Device with Floating Body Transistor Using Silicon Controlled Rectifier Principle | 2018-08-02 |
20180219014 | TUNGSTEN FOR WORDLINE APPLICATIONS | 2018-08-02 |
20180219015 | ARCHITECTURE TO COMMUNICATE SIGNALS FOR OPERATING A STATIC RANDOM ACCESS MEMORY | 2018-08-02 |
20180219016 | SEMICONDUCTOR DEVICE | 2018-08-02 |
20180219017 | NAND MEMORY ARRAYS | 2018-08-02 |
20180219018 | NITRIDE-FREE SPACER OR OXIDE SPACER FOR EMBEDDED FLASH MEMORY | 2018-08-02 |
20180219019 | Antifuse Array and Method of Forming Antifuse Using Anodic Oxidation | 2018-08-02 |
20180219020 | INTEGRATED STRUCTURES AND NAND MEMORY ARRAYS | 2018-08-02 |
20180219021 | Memory Arrays, and Methods of Forming Memory Arrays | 2018-08-02 |
20180219022 | SEMICONDUCTOR DEVICE INCLUDING A STACK HAVING A SIDEWALL WITH RECESSED AND PROTRUDING PORTIONS | 2018-08-02 |
20180219023 | SEMICONDUCTOR MEMORY DEVICE INCLUDING A SLIT | 2018-08-02 |