32nd week of 2011 patent applcation highlights part 17 |
Patent application number | Title | Published |
20110193528 | BATTERY MANAGEMENT - Apparatus and method for battery calibration and state of charge determination(SoC) within battery packs by detecting charge levels in a cell or cells, sending the charge level information to a controller which controls the movement of charge in the battery wherein, the controller initiates the discharge of a sub-unit to a predetermined level into the other sub-units and the charging of said sub-unit in the battery to a predetermined level from the charge held on the other sub-units to improve the accuracy and reliability of battery calibration and provide an accurate State of Charge indication from battery first use to end of life. | 2011-08-11 |
20110193529 | Lithium-Ion Secondary Battery System - A lithium-ion secondary battery system is provided which can improve the cycle life and the storage property of a lithium-ion secondary battery and can decrease a discharge capacity which cannot be recharged. The lithium-ion secondary battery system includes a lithium-ion secondary battery having a cathode, an anode including carbon, and a non-aqueous electrolyte; a charge/discharge circuit for putting the lithium-ion secondary battery on charge according to a charge control parameter; and an arithmetic processing section for controlling the charge/discharge circuit. The arithmetic processing section obtains battery characteristics of the lithium-ion secondary battery, changes a value of the charge control parameter when the arithmetic processing section determines that the battery characteristics satisfies a condition for changing the charge control parameter, and restores the value of the charge control parameter to the value before the change when the charge for the lithium-ion secondary battery is finished. | 2011-08-11 |
20110193530 | RECHARGEABLE BATTERY PACK - A battery pack comprising a power cell for providing power to a load or for receiving a charge from a charger, a first protection circuit for protecting from overvoltage and/or overcurrent conditions, and a second protection circuit for protecting from overtemperature conditions. The protection circuits independently control one or more electronic switching devices, through which passes substantially all of the current supplied by the power cell. When overvoltage and/or overcurrent conditions exist, the first protection circuit causes at least one of the switching devices to move to a non-conducting condition. Similarly, when an overtemperature condition exists, the second protection circuit causes at least one of the switching devices to move to a non-conducting condition. | 2011-08-11 |
20110193531 | Battery Charging Circuit for Improving Operating Stability - A battery charging circuit for charging a rechargeable battery and improving operating stability includes a plurality of resistors for generating a first voltage; a first reference voltage source for providing a first reference voltage; an error amplifier for generating a second voltage according to the voltage difference between the first reference voltage and the first voltage; a second reference voltage source for providing a second reference voltage; a modulator for generating a control voltage according to the second reference voltage and the second voltage; a voltage-to-current control unit for generating a control current according to the control voltage; and a current mirror for generating an output current which is equal to a multiple of the control current, wherein the output current and its corresponding output voltage is applied to charge the rechargeable battery. | 2011-08-11 |
20110193532 | CONTROL DEVICE AND METHOD FOR CHARGE CONTROL - A device controls charging a battery with power supplied from a power supply located outside of a vehicle through a charge cable. The device includes a first microcomputer and a second microcomputer. The first microcomputer is configured to turn on a charge mode signal upon detecting a change in a pilot signal output through the charge cable, and to turn off the charge mode signal when a charge completion signal output from the second microcomputer is turned off. The second microcomputer is configured to charge the battery through the charge cable when the charge mode signal is turned on, and to turn off the charge completion signal when the charging is complete. When the charge completion signal is turned on at the time of the first microcomputer turning off the charge mode signal due to sudden fluctuations, the charge mode signal is turned on again. | 2011-08-11 |
20110193533 | Circuit and Method for De-Energizing a Field Coil - A circuit includes a first half bridge including a first controllable semiconductor switch and a first diode. The first controllable semiconductor switch is coupled between a first constant supply potential and a center tap of the first half bridge. The first diode is coupled between the center tap and a constant reference potential. A second half bridge includes a second diode and a second controllable semiconductor switch. The second diode is coupled between a second constant potential higher than the first potential and a center tap of the second half bridge. The second controllable semiconductor switch is coupled between the center tap and the constant reference potential. Driver circuitry controls the conducting state of the first and the second semiconductor switch thus controlling the current flow through a field connectable between the center taps. | 2011-08-11 |
20110193534 | MAGNETIC CONTROL CIRCUIT SEPARATION SLIT - An electric alternator/motor having a stator with at least two non-overlapping sectors is provided. Each sector includes a first winding, first and second magnetic circuits and a saturation control assembly. A cross-talk reduction feature, such as a peripheral slit is provided between each sector of the stator for impeding magnetic flux crossing between the sectors. | 2011-08-11 |
20110193535 | VOLTAGE GENERATING CIRCUIT, DEVICE INCLUDING THE SAME, AND METHOD OF GENERATING VOLTAGE - A voltage generating circuit includes a range adjusting unit configured to output a code signal for adjusting the range of an output voltage and to determine a magnitude of the output voltage to set a control code while an output range adjusting operation is performed. The range adjusting unit is configured to output the code signal in response to a data code received from the outside after the output range adjusting operation is complete. The voltage generating circuit includes a digital analog converter configured to output a conversion voltage in response to the code signal, and an output unit configured to set an amplification gain thereof according to the control code and to amplify the conversion voltage according to the amplification gain to output the output voltage. | 2011-08-11 |
20110193536 | 10GBASE-T TRAINING ALGORITHMS - A method of identifying and correcting each of the changes that may occur with wire pairs between the transmitter and receiver in Ethernet 10GBase-T cabling is provided. The method includes four wire pairs A, B, C and D, a polarity swapping and scrambler state machine that determine if the chosen pair matches the requirements for pair A. A slave Tap state machine generates a rule for correct B, C and D patterns based on a pair chosen as pair A. The cables B, C and D are iteratively swapped to rearrange the pair mapping into the polarity swap state machine, and a deskew state machine identifies the latency difference between the different pairs. If the rules are not satisfied, a new pair A is designated at the swapping state machine and the process is repeated until the rules are satisfied. | 2011-08-11 |
20110193537 | NON-LINEAR PWM CONTROLLER FOR DC-TO-DC CONVERTERS - A controller for switching power supplies includes a nonlinear controller component capable of providing a duty cycle to a pulse width modulator. The duty cycle corresponds to at least one predetermining switching power supply state variable. A nonlinear controller component receives as inputs at least one predetermined switching power supply state variable. A relationship between duty cycle and at least one predetermined switching power supply state variable is obtained by a predetermined method. The nonlinear controller component comprises memory for access by an application component. The memory includes a data structure stored in memory and a plurality of duty cycles. Each of the plurality of duty cycles has a corresponding at least one predetermined switching power supply state variable. Each duty cycle, when provided to the pulse width modulator of the switching power supply, provides a predetermined switching power supply output. | 2011-08-11 |
20110193538 | Domino voltage regulator (dvr) - A low dropout voltage regulator comprising a first output voltage regulation loop with a NMOS transistor as a pass element and a second output voltage regulation loop with a PMOS transistor as a pass element. The NMOS transistor is used for small current loads up to 1 mA, the PMOS transistor is used for higher current loads from 1 mA and up. A current sense buffer senses the current through the NMOS transistor and controls the gate of the PMOS transistor accordingly. Good load transient operation is achieved without the need of an external load capacitor. | 2011-08-11 |
20110193539 | Switching Regulator with Offset Correction - A switching regulator generally includes an output circuit, a comparator, an on-time timer and an error amplifier. The output circuit receives an input voltage and produces an output voltage. The comparator causes the output circuit to turn on the output voltage when a feedback voltage falls below a first reference voltage. The on-time timer causes the output circuit to turn off the output voltage after a time-out period. The error amplifier receives the feedback voltage and a second reference voltage and produces the first reference voltage. | 2011-08-11 |
20110193540 | Enhancement of Power Supply Rejection for Operational Amplifiers and Voltage Regulators - A scheme for enhancement of the power-supply ripple rejection for operational amplifiers (op-amps) and low-dropout (LDO) voltage regulators is described. The scheme adds calculated amounts of current derived from the power-supply ripple with the input differential pair current to cancel off the output ripple, improving the high-frequency power-supply ripple rejection without requiring a substantial redesign of the circuitry involved. | 2011-08-11 |
20110193541 | CURRENT LIMITING CIRCUIT - An exemplary aspect of the present invention is a current limiting circuit including: an output transistor that controls a current flowing to a load from a power supply; a current sense transistor through which a current dependent on a current flowing through the output transistor flows; a sense resistor connected in series with the current sense transistor; a potential difference detection unit that detects a potential difference generated between both ends of the sense resistor; a constant current generation unit that supplies a constant current to the potential difference detection unit; and a control unit that controls a conduction state of the output transistor based on a control voltage generated based on the potential difference and the constant current, in which the sense resistor is disposed so as to surround the potential difference detection unit. | 2011-08-11 |
20110193542 | Thermally Controlled Driver/Switching Regulator, and Methods of Controlling and/or Regulating a Driver and/or Switching Regulator - The present invention provides circuits and methods for regulating and/or controlling integrated circuits such as drivers and switching regulators. The circuit generally includes a first switch configured to control or regulate a current, voltage drop or voltage boost; a first regulator or driver configured to transmit first pulses to the first switch, the pulses having a first pulse width; and pulse width modulation circuitry configured to (i) reduce the first pulse width when a first thermal threshold is met and (ii) increase the first pulse width when a second thermal threshold is met, the second thermal threshold being less than the first thermal threshold. | 2011-08-11 |
20110193543 | METHOD AND APPARATUS FOR SYNCHRONOUS BUCK WITH ACTIVE NEGATIVE CURRENT MODULATION - A circuit is disclosed that includes a buck voltage regulator electrically coupled to an active current modulator. The active current modulator is operable to detect a negative current in the low-side switch of the buck voltage regulator circuit during a light mode operation. Whenever the negative current is detected, the active negative current modulator causes the low-side switch to stay ON in a linear mode and limits the negative current to a predetermined current level. | 2011-08-11 |
20110193544 | CIRCUITS AND METHODS OF PRODUCING A REFERENCE CURRENT OR VOLTAGE - A reference circuit includes a first transistor having a first current electrode, a control electrode, and a second current electrode coupled to a power supply terminal. The reference circuit further includes a resistive element including a first terminal coupled to the control electrode of the first transistor and a second terminal coupled to the first current electrode. Additionally, the reference circuit includes a second transistor including a first current electrode coupled to the second terminal of the resistive element, a control electrode coupled to the second terminal, and a second current electrode coupled to the power supply terminal. The second transistor is configured to produce an output signal related to a voltage at the control electrode of the first transistor. | 2011-08-11 |
20110193545 | POWER CONTROL SYSTEM AND POWER AMPLIFICATION SYSTEM USING THE SAME - There is provided a power control system. A power control system may include: a power regulator having a plurality of power PMOS transistors connected to a power source in parallel with each other; a current sensing unit connected to the power source and sensing currents flowing through a plurality of target PMOS transistors located at predetermined positions; a current mirror unit connected to a first regulated voltage terminal and generating a plurality of currents equal to the currents sensed by the current sensing unit; a comparator unit totaling the plurality of currents generated by the current mirror unit to convert the totaled currents into a voltage, and generating a voltage difference between the voltage and a predetermined reference voltage; and a current bias circuit unit controlling a bias current according to the voltage difference from the comparator unit. | 2011-08-11 |
20110193546 | CURRENT SENSOR AND CURRENT SENSING METHOD - A current sensor, comprises an input conductor (IN) which is supplied with the current to be sensed and an output conductor (OUT) from which the current to be sensed is output. A conductor path is provided between the input conductor and the output conductor, wherein the path is provided on a first, movable element ( | 2011-08-11 |
20110193547 | METHOD AND APPARATUS FOR IDENTIFYING AND REDUCING SPURIOUS FREQUENCY COMPONENTS - A method for identifying and reducing spurious frequency components is provided. A method in accordance with at least one embodiment of the present disclosure may include generating a digital sinusoidal waveform at a direct digital synthesizer (DDS) and receiving the digital sinusoidal waveform at an audio digital-to-analog converter. The method may further include converting the digital sinusoidal waveform to an analog sinusoidal waveform containing spurious frequency components, combining the analog sinusoidal waveform with an analog distortion correction waveform to generate a composite output waveform and receiving the composite output waveform at notch filter circuitry. The method may also include filtering the composite output waveform to generate a filtered composite output waveform and amplifying a difference between the filtered composite output waveform and a signal from a circuit-under-test (CUT) to generate an amplified analog signal. The method may also include converting the amplified analog signal to an amplified digital signal. Of course, additional implementations are also within the scope of the present disclosure. | 2011-08-11 |
20110193548 | SEPARATION-TYPE AVOMETER - A separation-type avometer includes a manipulation device and a measurement main body. The manipulation device includes a selection module, a first wireless module, and a window module. The measurement main body includes a measurement module, a second wireless module, and an automatic determining and switching module. The first wireless module transmits a measurement mode selected through the selection module to the second wireless module of the measurement main body. The automatic determining and switching module switches the measurement mode of the measurement module according to the selected measurement mode. After the measurement is completed, the second wireless module transmits signal data measured by the measurement main body to the first wireless module of the manipulation device, so as to use the window module to display the signal data measured by the measurement main body. | 2011-08-11 |
20110193549 | METHOD AND APPARATUS FOR AMPLIFYING A SIGNAL AND TEST DEVICE USING SAME - An amplifier circuit is used in a multimeter to amplify signals applied between a pair of test terminals. A voltage applied to one of the test terminals is amplified by a first operational amplifier configured as a voltage follower. An output of the first operational amplifier is applied to an inverting input of a second operational amplifier configured as an integrator. An output of the second operational amplifier is connected to the other of the test terminals. A voltage generated at the output of the second operational amplifier provides an indication of the magnitude and polarity of the voltage applied to the first and second test terminals. | 2011-08-11 |
20110193550 | LOGARITHMIC MEAN-SQUARE POWER DETECTOR - A mean square power detector in accordance with one or more embodiments includes a gain or attenuation circuit comprising a plurality of gain or attenuation elements arranged for generating a plurality of amplified or attenuated versions of a radio frequency (RF) input signal. The mean square power detector also includes a plurality of mean square detectors coupled to the gain or attenuation circuit. Each of the mean square detectors receives a different one of the plurality of amplified or attenuated versions of the RF input signal. Each of the plurality of mean square detectors generates an output signal representative of the mean square power of the RF input signal for a different input signal level range. A summing element is coupled to the plurality of mean square detectors for combining the output signals of the plurality of mean square detectors to generate a signal representative of the mean square or root mean square of the RF input signal. | 2011-08-11 |
20110193551 | ROTOR FOR ROTATION SENSOR - A rotor for a rotation sensor may be mounted on a bearing that supports a wheel on an automotive vehicle so that it can detect the number of revolutions for the wheel. The rotor for a rotation sensor 1 includes a reinforcing ring 2 formed like an L-shape in cross section, including a cylindrical part 3 adapted to be fitted on a peripheral surface of the rotating part of the bearing (inner race or outer race) and a flanged part 4 bent at an end edge of the cylindrical part 3, from which it extends in the radial direction. A multi-pole magnet 10 is attached to the axial outer lateral side of the flanged part 4, and a non-magnetic covering 6 encloses the axial outer lateral side of the multi-pole magnet 10 and has a peripheral edge on its one end secured to the reinforcing ring 2. | 2011-08-11 |
20110193552 | Displacement Measurement System and Method using Magnetic Encodings - A measurement system includes a rotating member configured to transfer mechanical energy to a point of use. The member has at a surface thereof one or more circumferentially oriented bands of magnetizable material. Each band has a magnetic pattern comprised of a plurality of transitions magnetically recorded in the magnetizable material of that band. A magnetic-field sensor is disposed sufficiently near each band of magnetizable material to sense a magnetic pattern recorded in that band as the member rotates. Each magnetic-field sensor generates signals in response to the magnetic pattern sensed by that magnetic-field sensor. Processing electronics is in communication with each magnetic-field sensor to receive the signals generated by that magnetic-field sensor while the member rotates and to dynamically compute from the signals a measurement associated with a performance of the rotating member. | 2011-08-11 |
20110193553 | Magnetic array sensor circuit to process an output from a magnetic sensor array - A magnetic array sensor circuit to process an output from a magnetic sensor array including a plurality of magnetic sensor elements arranged in an array. The circuit includes a regulating circuit to reduce an offset variation of the output from the magnetic sensor elements arranged in the array. | 2011-08-11 |
20110193554 | Method For Determining Orientation of Elecromagnetic Receivers - Method for determining receiver orientation angles in a controlled source electromagnetic survey, by analyzing the survey data. For a given survey receiver, two data subsets are selected. ( | 2011-08-11 |
20110193555 | ATOMIC MAGNETOMETER AND MAGNETIC SENSING METHOD - An atomic magnetometer includes a light source for a probe beam and a medium in which the probe beam is to be propagated. The medium is a substance which changes a polarization rotation angle of the probe beam depending on a magnetic field intensity at a first measurement position and a magnetic field intensity at a second measurement position different from the first measurement position. The atomic magnetometer directly measures a difference between the magnetic field intensity at the first measurement position and the magnetic field intensity at the second measurement position as a difference in polarization rotation angle, along a propagation path of the probe beam. | 2011-08-11 |
20110193556 | INTEGRATED MAGNETIC SENSOR FOR DETECTING VERTICAL MAGNETIC FIELDS AND MANUFACTURING PROCESS THEREOF - An integrated magnetic sensor formed in a body including a substrate of semiconductor material, which integrates a Hall cell. A trench is formed in the body, for example, on the back of the substrate, and is delimited by lateral surface portions that extend in a direction transverse to the main face of the body. The trench has a depth in a direction perpendicular to the main face that is much greater than its width in a direction parallel to the main face of the body, between the lateral surface portions. A concentrator made of ferromagnetic material is formed within the trench and is constituted by two ferromagnetic regions, which are set at a distance apart from one another and extend along the lateral surface portions of the trench towards the first Hall cell. | 2011-08-11 |
20110193557 | CURRENT SENSOR INCLUDING A SINTERED METAL LAYER - An integrated circuit includes a semiconductor die including a first magnetic field sensor. The integrated circuit includes an isolation material layer over the first magnetic field sensor and a sintered metal layer over the isolation material layer. The first magnetic field sensor is configured to sense a magnetic field generated by a current passing through the sintered metal layer. | 2011-08-11 |
20110193558 | PASSENGER SCANNING SYSTEMS FOR DETECTING CONTRABAND - A passenger scanning system includes a passenger screening area configured for a person to enter and a shield surrounding at least a portion of the passenger screening area. The shield is configured to reduce a radio frequency interference within the passenger screening area. The passenger scanning system also includes one or more sensors positioned in the passenger screening area at a height configured to be proximate one or more of an abdominal region, a groin region, and a pelvic region of the entered person. The sensors are configured to generate a signal in response to a target substance located in the one or more of the abdominal region, the groin region, and the pelvic region. | 2011-08-11 |
20110193559 | ELECTRON SPIN MEASUREMENT DEVICE AND MEASUREMENT METHOD - An electron spin measuring device of the organic thin film element is provided with: at least one sample tube into which a sample for measurement is inserted and which is sealed together with specific gas or with vacuum; a cavity into which the at least one sample tube is inserted; an electric characteristic measuring device for the characteristic evaluation of the organic thin film element which is the sample; connected wiring for interconnecting the electrical characteristic measuring device and the sample for measurement in the sample tube; and a light receiving/emitting device for performing the light irradiation to the sample for measurement, and/or performing the detection of the light emission from the organic thin film element, wherein the cavity resonator irradiates microwaves having the number of vibration corresponding to the Zeeman energy splitting of the unpaired electron, sweeps a magnetic field to the sample tube, and measures the transition between the energy levels caused by the reversal of the direction of the electron spin. | 2011-08-11 |
20110193560 | BORING TECHNIQUE USING LOCATE POINT MEASUREMENTS FOR BORING TOOL DEPTH PREDICTION - A method is disclosed as part of an overall process in which a boring tool is moved through the ground within a given region along a particular path in an orientation which includes pitch. A locating signal is transmitted from the boring tool which signal exhibits a field defined forward point within a reference surface which field defined forward point is vertically above an inground forward point on the particular path through which the boring tool is likely to pass. The method establishes a predicted depth of the boring tool at the inground forward point by first identifying the field defined forward point. The signal strength of the locating signal is then measured at the field defined forward point as being representative of the depth of the boring tool at an inground upstream point which is the current location of the boring tool. With the boring tool at the upstream inground point, the pitch of the boring tool is determined. Using the measured signal strength and the determined pitch, the predicted depth of the boring tool is determined for the inground forward point based on the boring tool moving along an approximately straight path to the inground forward point. | 2011-08-11 |
20110193561 | CHUCKS FOR SUPPORTING SOLAR CELL IN HOT SPOT TESTING - In an embodiment, a chuck to support a solar cell in hot spot testing is provided. This embodiment of the chuck comprises a base portion and a support portion disposed above the base portion. The support portion is configured to support the solar cell above the base portion and to define a space between a bottom surface of the solar cell and the base portion that thermally separates a portion of the bottom surface of the solar cell from the base portion. | 2011-08-11 |
20110193562 | SEMICONDUCTOR TEST SYSTEM AND RELAY DRIVING TEST METHOD THEREFOR - It is aimed to provide a semiconductor test system and a relay driving test method therefor which can automatically and continuously perform tests without bringing needle tips into contact with a number of relays mounted on a probe card and by using a device. In a semiconductor test system with a probe card and a tester, the probe card includes a substrate having a probe and a relay connected to the probe, a relay controller for the relay and a first measurement channel for connecting the relay and the probe to the tester are further provided on the substrate. The tester includes a DC power supply, a control board for controlling the relay controller, and a first circuit connected to the first measurement channel, the DC power supply and a voltmeter. The first measurement circuit includes a first resistor having a predetermined time constant and a first changeover switch to be connected to measurement channel. The DC power supply and the first resistor are connected to the first changeover switch, and the first measurement channel is switchingly connected to the DC power supply or the first resistor by the first changeover switch. | 2011-08-11 |
20110193563 | PARTIAL DISCHARGE MONITOR - This invention relates to high voltage electrical or power systems and in particular to a method and device for monitoring partial discharges in high voltage electrical or power systems. The method comprises defining a low trigger level and a high trigger level electrical pulse amplitude levels, monitoring at least one phase of the electrical system for an occurrence of a pulse within a defined minor time frame; detecting a peak amplitude of a pulse occurring in the electrical system within the minor time frame; determining if the detected peak amplitude of the pulse exceeds the lower and higher trigger levels; assigning a pulse number to the pulse if the peak amplitude of the pulse exceeds the trigger levels; capturing the pulse if the pulse number associated with the pulse is less than a predetermined pulse number threshold in the minor time frame; and storing the captured pulses in a memory. | 2011-08-11 |
20110193564 | CEMENT EXPANSION MEASUREMENT APPARATUS AND METHOD - An apparatus for measuring cement expansion comprises an expansion cell that comprises two nodes separated by a slit. The nodes are separated by a distance such that a change of the distance between the nodes may be correlated to a linear expansion of cement contained in the expansion cell. An electrical component is coupled to the two nodes, and the electrical component has an electrical property that may be correlated to the distance between the nodes. Measurement of the electrical-property change may be performed continuously and in real time. In addition, the expansion cell may be placed in a vessel equipped to simulate downhole pressure and temperature conditions. | 2011-08-11 |
20110193565 | DIELECTRICITY MEASUREMENT DEVICE - A dielectricity measurement device and method for determining dielectric properties of portioned material of a capsule end package with the aid of an electrical field is described, where the device receives an electrically conductive package wall of the capsule end package as a component of the measurement arrangement and where the device maybe arranged into a series measurement device having several such dielectricity measurement devices. | 2011-08-11 |
20110193566 | MULTICHANNEL ABSORBERLESS NEAR FIELD MEASUREMENT SYSTEM - A near field microwave scanning system includes a switched array of antenna elements forming an array surface, a scan surface substantially parallel to the array surface and separated by a distance less than about 1 wavelength of the measured frequency, and a processing engine for obtaining and processing near field data, without the use of an absorber. | 2011-08-11 |
20110193567 | FILL LEVEL MEASURING DEVICE WORKING WITH MICROWAVES - A fill level measuring device working with microwaves according to the travel time principle for fill level measurement of fill substances located in containers. On a plurality of different signal paths, microwave signals can be transmitted into the container, and their associated echo signals recorded. The measurement results gained on the different signal paths can be evaluated separately from one another. The device includes: measuring device electronics having a microwave generator for the successive production of microwave signals having different wanted frequencies; and, connected thereto, a frequency-selective, passive antenna arrangement, which has a plurality of antennas, which serve to transmit successively the different microwave signals into the container, and to receive their echo signals reflected back to the antenna arrangement, and which has a number of frequency-selective elements—especially bandpass filters—in each case transmissive for one of the different wanted frequencies. Via the antennas and the frequency-selective elements, for each of the different microwave signals and its echo signal, a uniquely associated signal path is specified, via which a microwave signal is transmitted into the container and its echo signal, reflected back to the antenna arrangement (S | 2011-08-11 |
20110193568 | IMPEDANCE CORRECTION DEVICE AND METHOD THEREOF - An impedance correction device and a method thereof are provided. A step generator is used to generate a step signal and send to a circuit under test. A reflected signal returned back from the circuit under test is used as a measurement signal; and the measurement signal can be measured to obtain a characteristic impedance value. When the measurement signal is greater than the initially measured step signal, an impedance value of a correction resistor is increased; when the measurement signal is smaller than the initially measured step signal, the impedance value of the correction resistor is reduced. Through adjustment of the correction impedance value, impedance matching between the correction impedance value and the characteristic impedance value is achieved. | 2011-08-11 |
20110193569 | Oscillator Circuit with RF Suppression - An oscillator circuit includes a phase-locked loop, a crystal resonator, first and second capacitors, and first and second impedance elements. The phase-locked loop is coupled between a first node and a second node. The crystal resonator is also coupled between the first node and the second node. The first capacitor is coupled between the first node and ground, and the second capacitor is coupled between the second node and ground. The first impedance element is coupled in a first circuit path from the first node to ground through the first capacitor. The second impedance element is coupled in a second circuit path from the second node to ground through the second capacitor. | 2011-08-11 |
20110193570 | Systems and methods for characterizing a molecule - Techniques for characterizing a molecule are described herein. In one example, a portion of the molecule is trapped in a nanopore, a variable voltage is applied across the nanopore until the trapped portion of molecule is moved within the nanopore, and the molecule is characterized based on the electrical stimulus required to affect movement of at least a portion of the trapped portion of the molecule within the nanopore. | 2011-08-11 |
20110193571 | TOUCH SENSING SYSTEM, CAPACITANCE SENSING CIRCUIT AND CAPACITANCE SENSING METHOD THEREOF - A touch sensing system which includes a touch input interface and a capacitance sensing circuit is provided. The touch input interface includes a plurality of sensing capacitors which output at least one waveform under test and at least one reference waveform. The capacitance sensing circuit includes a difference comparing unit. The difference comparing unit receives the waveform under test and the reference waveform and outputs a differential signal according to at least one positive edge difference and at least one negative edge difference between the waveform under test and the reference waveform. Furthermore, a capacitance sensing method is also provided. | 2011-08-11 |
20110193572 | Determining a Dielectric Property of a Capacitor - An apparatus for determining at least one dielectric property of a capacitor arrangement, and especially for capacitive examination of a moving elongated test subject such as yarn. It contains an alternating signal generator for applying an electric alternating signal to the capacitor arrangement. The capacitor arrangement is uncoupled from the alternating signal generator by means of an amplifier in such a way that it does not relevantly influence the basic frequency and the signal shape of the applied alternating signal. Detection means detect an electric measuring variable of an electric signal tapped from the capacitor arrangement. The alternating signal generator is set up in such a way that at least one of the basic frequency and the signal shape of the applied alternating signal can be changed. | 2011-08-11 |
20110193573 | INTEGRATED SENSOR SYSTEM - An integrated sensor system for a lithography machine, the system comprising a projection lens system ( | 2011-08-11 |
20110193574 | CAPACITIVE SENSING SYSTEM - A capacitive sensing system, comprising a sensor having thin film structure, the thin film structure comprising a sensor having a first insulating layer and a first conductive film comprising a sensing electrode formed on a first surface of the first insulating layer and a second conductive film comprising a back guard electrode. The back guard electrode is formed in a single plane and comprises a peripheral portion in the same plane, and is disposed on a second surface of the first insulating layer and a first surface of a second insulating layer or protective layer. The peripheral portion of the back guard electrode extends beyond the sensing electrode to form a side guard electrode which substantially or completely surrounds the sensing electrode. | 2011-08-11 |
20110193575 | VOLUMETRIC INDUCTION PHASE SHIFT DETECTION SYSTEM FOR DETERMINING TISSUE WATER CONTENT PROPERTIES - A method of determining the condition of a bulk tissue sample, by: positioning a bulk tissue sample between a pair of induction coils (or antennae); passing a spectrum of alternating current (or voltage) through a first of the induction coils (or antennae); measuring spectrum of alternating current (or voltage) produced in the second of the induction coils (or antennae); and comparing the phase shift between the spectrum of alternating currents (or voltages) in the first and second induction coils (or antennae), thereby determining the condition of the bulk tissue sample. An apparatus for determining the condition of a bulk tissue sample, having: a first induction coil (or antenna); a second induction coil (or antenna); an alternating current power supply connected to the first induction coil (or antenna), the alternating current power supply configured to generate a spectrum of currents (or voltage) in the first induction coil (or antenna); and a measurement system connected to the second induction coil (or antenna), wherein the measurement system is configured to measure a phase shift difference in the spectrum of currents (or voltages) between the first and second induction coils (or antennae) when the first and second induction coils (or antennae) are positioned on opposite sides of a tissue sample. | 2011-08-11 |
20110193576 | ELECTRON RADIATION MONITORING SYSTEM TO PREVENT GOLD SPITTING AND RESIST CROSS-LINKING DURING EVAPORATION - Disclosed herein are systems and methods for in-situ measurement of impurities on metal slugs utilized in electron-beam metal evaporation/deposition systems, and for increasing the production yield of a semiconductor manufacturing processes utilizing electron-beam metal evaporation/deposition systems. A voltage and/or a current level on an electrode disposed in a deposition chamber of an electron-beam metal evaporation/deposition system is monitored and used to measure contamination of the metal slug. Should the voltage or current reach a certain level, to the deposition is completed and the system is inspected for contamination. | 2011-08-11 |
20110193577 | Remote Monitor for Corrosion Protection of Pipelines and Structures - Several remote monitoring stations along a corrosion protected pipeline or structure are served by a single long range radio transceiver link to a central data collection station. Individual monitoring stations are in cost-free, short range communication with each other, while a single central module has an additional longer range, paid subscriber transceiver. The number of paid subscription links by cellular or satellite services to remotely monitor corrosion protection voltages and currents are substantially lessened by this combination. | 2011-08-11 |
20110193578 | SYSTEM AND METHOD FOR SENSING AN AMPLIFIER LOAD CURRENT - A system and method for sensing a load current that flows from an amplifier into a load of the amplifier involves obtaining a voltage drop across internal impedance of the amplifier and computing the load current using the internal impedance and the voltage drop across the internal impedance. | 2011-08-11 |
20110193579 | DETERMINATION OF PHYSICAL CONNECTIVITY STATUS OF DEVICES BASED ON ELECTRICAL MEASUREMENT - Embodiments of the invention are generally directed to determination of physical connectivity status of devices based on electrical measurement. An embodiment of a method includes discovering a connection of a first device with a second device, and performing an electrical measurement of the second device by the first device via the connection between the first device and the second device, where performing the electrical measurement includes sensing by the first device of an element of the second device. The method further includes, if the sensing by the first device fails to detect the element of the second device and a predetermined condition for the electrical measurement is enabled, then determining by the first device that the connection with the second device has been lost. | 2011-08-11 |
20110193580 | Fatal Failure Diagnostics Circuit and Methodology - A fault diagnostic circuit ( | 2011-08-11 |
20110193581 | SYSTEMS AND METHODS TO TEST INTEGRATED CIRCUITS - Open and short systems and methods for testing integrated circuits are disclosed. An example implementation includes engaging an integrated circuit testing module with an integrated circuit testing apparatus, the integrated circuit testing module for receiving an integrated circuit, a first set of contact points, and a second set of contact points; engaging a first probe onto at least one of the contact points of the first set of contact points, controllably engaging at least one of a second probe onto at least one contact pair of the integrated circuit testing module, and providing an electrical stimulus to the integrated circuit testing module. | 2011-08-11 |
20110193582 | SOCKET, AND TEST APPARATUS AND METHOD USING THE SOCKET - An apparatus for testing electric characteristics of a test object including first connection terminals on a bottom surface and second connection terminals on a top surface, the apparatus comprises a test board comprising first pads on a predetermined surface; a socket configured to electrically connect the test object to the test board; and a handler configured to transport the test object to the socket. The socket comprises a first connection unit configured to be electrically connected to the first connection terminals of the test object and a second connection unit configured to be electrically connected to the second connection terminals of the test object. | 2011-08-11 |
20110193583 | METHODS FOR PLANARIZING A SEMICONDUCTOR CONTACTOR - A planarizer for a probe card assembly. A planarizer includes a first control member extending from a substrate in a probe card assembly. The first control member extends through at least one substrate in the probe card assembly and is accessible from an exposed side of an exterior substrate in the probe card assembly. Actuating the first control member causes a deflection of the substrate connected to the first control member. | 2011-08-11 |
20110193584 | UNIVERSAL MULTIPLEXING INTERFACE SYSTEM AND METHOD - A system for communicatively connecting devices for testing to respective test pins of a test head of an automatic test equipment (ATE). The system includes a tester interface device for communicative connection to the test pins of the ATE. The tester interface device includes a first connector and a second connector. The first connector is communicatively connected by the tester interface device to a first group of the test pins and the second connector is communicatively connected by the tester interface device to a second group of the test pins. The first group and the second group can be different test pins, same test pins, or combinations of some same and some different test pins. A first pogo pin block device of the system is communicatively connected to the first connector, and a second pogo pin block device communicatively connected to the second connector. A first device interface board (DIB) with test sockets for devices is communicatively connected to the first pogo pin block device, and a second device interface board with test sockets for same or other devices is communicatively connected to the second pogo pin block device. During testing, devices (DUTs) for testing are transferrable (by one or more handlers) to the respective test sockets of the first DIB and the second DIB for respective tests by the ATE, in accordance with test resources of the ATE provided via the first group of test pins or the second group of test pins, respectively. More than one handler can be multiplexed via the system, or more than one manipulator of a single handler can be multiplexed via the system. Conventional or unmodified DIBs can be employed for testing if the first pogo pin block and the second pogo pin block include conventional or applicable DIB connections. | 2011-08-11 |
20110193585 | CONVEYOR-BASED MEMORY-MODULE TESTER WITH ELEVATORS DISTRIBUTING MOVING TEST MOTHERBOARDS AMONG PARALLEL CONVEYORS FOR TESTING - A conveyor-stack test system has motherboards that test memory modules. The motherboards are not stationary but are placed inside movable trays that move along conveyors. A loader-unloader removes tested memory modules from test sockets on the motherboards and inserts untested memory modules into the motherboards using a robotic arm. A conveyor carries the motherboards from the loader-unloader to an elevator. The elevator raises or lowers the motherboards to different levels in a conveyor stack with multiple levels of conveyors each with many test stations. The motherboards move along conveyors in the conveyor stack until reaching test stations. A retractable connector from the test station extends to make contact with a motherboard connector to power up the motherboard, which then tests the memory modules. Test results are communicated from the test station to a host controller, which instructs the loader-unloader to sort the tested memory modules once the motherboard returns. | 2011-08-11 |
20110193586 | Alternating Current (AC) Stress Test Circuit, Method for Evaluating AC Stress Induced Hot Carrier Injection (HCI) Degradation, and Test Structure for HCI Degradation Evaluation - An AC stress test circuit for HCI degradation evaluation in semiconductor devices includes a ring oscillator circuit, first and second pads, and first and second isolating switches. The ring oscillator circuit has a plurality of stages connected in series to form a loop. Each of the stages comprises a first node and a second node. The first and second isolating switches respectively connect the first and second pads to the first and second nodes of a designated stage and both are switched-off during ring oscillator stressing of the designated stage. The present invention also provides a method of evaluating AC stress induced HCI degradation, and a test structure. | 2011-08-11 |
20110193587 | Anti-Tampering Obscurity Using Firmware Power Mirror Compiler - In a preferred embodiment of the invention, a mirror compiler is provided for each protected device or circuit resulting in a program that is embedded into the protected device's source code. The mirror compiler can be configured to have multiple selectable compilation parameters offering the programmer flexible options for mirrored power cancellations. | 2011-08-11 |
20110193588 | MULTI-MODE CIRCUIT AND A METHOD FOR PREVENTING DEGRADATION IN THE MULTI-MODE CIRCUIT - Multi-mode circuit (the circuit) and a method for preventing degradation in the circuit. The circuit includes a first transistor that enables functioning of the circuit in a first mode. The first transistor is responsive to a first signal to become inactive when the circuit enters into a second mode, thereby preventing degradation of the first transistor when the circuit enters into the second mode. A second transistor is coupled to the first transistor. The second transistor is responsive to a second signal to generate a third signal. A third transistor is coupled to the second transistor. The third transistor is responsive to the third signal to become inactive when the circuit enters into the second mode, thereby preventing degradation of the third transistor when the circuit enters into the second mode. | 2011-08-11 |
20110193589 | On-Chip Sensor For Measuring Dynamic Power Supply Noise Of The Semiconductor Chip - An on-chip sensor measures dynamic power supply noise, such as voltage droop, on a semiconductor chip. In-situ logic is employed, which is sensitive to noise present on the power supply of functional logic of the chip. Exemplary functional logic includes a microprocessor, adder, and/or other functional logic of the chip. The in-situ logic performs some operation, and the amount of time required for performing that operation (i.e., the operational delay) is sensitive to noise present on the power supply. Thus, by evaluating the operational delay of the in-situ logic, the amount of noise present on the power supply can be measured. | 2011-08-11 |
20110193590 | SEMICONDUCTOR DEVICE AND CIRCUIT BOARD HAVING THE SEMICONDUCTOR DEVICE MOUNTED THEREON - To provide a semiconductor device including a first replica buffer connected to a calibration terminal, an impedance adjusting circuit that changes an impedance of the first replica buffer according to a comparison result between a potential of the terminal and a reference potential, and an impedance adjusting circuit that changes an impedance of a third replica buffer according to a comparison result between a potential of a connection node of a second replica buffer and the third replica buffer and a potential of the terminal. According to the present invention, both impedances of the first and third replica buffers are adjusted based on the potential of the terminal, and therefore an adjustment error of one of the replica buffers is not superimposed with an adjustment error of the other replica buffer. | 2011-08-11 |
20110193591 | Calibration Methods and Circuits to Calibrate Drive Current and Termination Impedance - Described are on-die termination (ODT) systems and methods that facilitate high-speed communication between a driver die and a receiver die interconnected via one or more signal transmission lines. An ODT control system in accordance with one embodiment calibrates and maintains termination resistances and drive currents to produce optimal output swing voltages. Comparison circuitry employed to calibrate the reference resistance is also used to calibrate the drive current. Termination elements in some embodiments are divided into two adjustable resistive portions, both of which are designed to minimize capacitive loading. One portion is optimized to produce a relatively high range of adjustment, while the other is optimized for fine-tuning and glitch-free switching. | 2011-08-11 |
20110193592 | VOLTAGE LEVEL SHIFTER WITH DYNAMIC CIRCUIT STRUCTURE HAVING DISCHARGE DELAY TRACKING - An apparatus is disclosed. In a particular embodiment, the apparatus includes a a dynamic circuit structure that includes a dynamic node coupling a precharge circuit, a discharge circuit, and a gated keeper circuit. The gated keeper circuit is enabled by a signal from a discharge delay tracking circuit. | 2011-08-11 |
20110193593 | Apparatus for Metastability-Hardened Storage Circuits and Associated Methods - A metastability-hardened storage circuit includes at least one inverting circuit. The inverting circuit has a logical input. The logical input of the inverting circuit is split into a pair of physical inputs. | 2011-08-11 |
20110193594 | SEMICONDUCTOR INTEGRATED CIRCUIT - Each of a plurality of inverters includes: a first transistor having one end connected to a first terminal; and a second transistor having one end connected to a second terminal and the other end connected to the other end of the first transistor. | 2011-08-11 |
20110193595 | OUTPUT DRIVER CIRCUIT - Disclosed is an output driver circuit capable of realizing reduction in power consumption, and/or enhancement in transmission waveform quality in addition to an increase in transmission speed. The output driver circuit is provided with, for example, a voltage-signal generation circuit block VSG_BK for driving positive negative output-nodes (TXP, TXN) by voltage, -pulse-signal generation circuits PGEN | 2011-08-11 |
20110193596 | CLOCK FREQUENCY DIVIDER CIRCUIT, CLOCK DISTRIBUTION CIRCUIT, CLOCK FREQUENCY DIVISION METHOD, AND CLOCK DISTRIBUTION METHOD - A clock frequency divider circuit | 2011-08-11 |
20110193597 | METHOD AND APPARATUS FOR PRODUCING TRIANGULAR WAVEFORM WITH LOW AUDIO BAND CONTENT - A triangular waveform generator includes a square waveform clock circuit and an active integrator. The active integrator receives input from the square waveform clock circuit and generates a triangular waveform output. An active feedback network is operatively added to the active integrator to reduce the audio band noise content in the triangular waveform output. The feedback network acts as a DC balance without significant sacrifice in the linearity of the triangular waveform output. | 2011-08-11 |
20110193598 | EFFICIENT RETIMER FOR CLOCK DIVIDERS - Conventional retimers generally consume too much power, are too noisy, and are too large. Additionally, phase noise and jitter are generally a function of retiming. As a result, a retimer is provided with a smaller footprint that has reduced power consumption and improved noise characteristics over other conventional retimers. | 2011-08-11 |
20110193599 | PHASE FREQUENCY TO DIGITAL CONVERTER - A circuit arrangement is described comprising a first receiver configured to receive a first input signal, a second receiver configured to receive a second input signal, a first signal generator configured to generate a first pulse signal, a second signal generator configured to generate a second pulse signal, wherein a delay between a rising edge of the first pulse signal and a rising edge of the second pulse signal is proportional to a difference between the first input signal and the second input signal, a first converter configured to convert the first pulse signal to a first digital number proportional to a width of the first pulse signal, a second converter configured to convert the second pulse signal to a second digital number proportional to a width of the second pulse signal, wherein at least one of the first converter and the second converter comprises a cascade of at least two converter stages, wherein each converter stage of the at least two converter stages is configured to propagate and shrink the respective pulse signal. Also a corresponding method is described. | 2011-08-11 |
20110193600 | Methods of Frequency versus Temperature Compensation of Existing Crystal Oscillators - Methods for compensating the existing crystal oscillator frequencies in extended temperature ranges. These are utilizing existing crystal oscillators on any system design which may have quartz crystals with associated circuitry to deliver frequency or timing reference signals. They are increasing these existing circuitry's accuracy simply by adding small integrated circuit component. | 2011-08-11 |
20110193601 | FRACTIONAL TYPE PHASE-LOCKED LOOP CIRCUIT WITH COMPENSATION OF PHASE ERRORS - A fractional-type phase-locked loop circuit is proposed for synthesising an output signal multiplying a frequency of a reference signal by a fractional conversion factor, the circuit including means for generating a modulation value, means for generating a feedback signal dividing the frequency of the output signal by a dividing ratio, the dividing ratio being modulated according to the modulation value for providing the conversion factor on the average, means for generating a control signal indicative of a phase difference between the reference signal and the feedback signal, means for controlling the frequency of the output signal according to the control signal, and means for compensating a phase error caused by the modulation of the dividing ratio; in the circuit of an embodiment of the invention, the means for compensating includes means for calculating an incremental value, indicative of an incremental phase error, according to the conversion factor and the modulation value, means for calculating a correction value accumulating the incremental value, and means for conditioning the control signal according to the correction value. | 2011-08-11 |
20110193602 | JITTER SUPPRESSION CIRCUIT AND JITTER SUPPRESSION METHOD - There is provided a jitter suppression circuit and a jitter suppression method in which both shortening of a pull-in time and high jitter suppression characteristics is satisfied. | 2011-08-11 |
20110193603 | FAST MEASUREMENT INITIALIZATION FOR MEMORY - Systems and methods for synchronization of clock signals are disclosed. In a feedback system such as a delay-lock loop circuit, delays to be applied can be determined adaptively based on a phase difference between a reference signal and a clock signal being delayed. Such adaptive decisions can be made during each feedback cycle, thereby making it possible to achieve a phase lock faster and more efficiently. In some embodiments, such adaptive functionality can be incorporated into existing circuits with minimal impact. | 2011-08-11 |
20110193604 | PULSE CONTROL DEVICE - A pulse control device is maintained with a constant pulse width corresponding to a change of process or temperature. The pulse control device comprises a fuse set for selectively outputting a delay increase signal and a delay decrease signal that have a different state based on a cutting or non-cutting state of a fuse on which information on a change of process is programmed, and a pulse generator provided with a plurality of delay cells with predetermined time delay for selectively increasing or decreasing the number of the plurality of delay cells depending on the delay increase signal and the delay decrease signal to generate an internal clock with a pulse width corresponding to the number of the increased or decreased delay cells. | 2011-08-11 |
20110193605 | DUTY TRANSITION CONTROL IN PULSE WIDTH MODULATION SIGNALING - A pulse width modulation (PWM) signal generator generates a PWM signal with an adjustable PWM duty based on a programmable or otherwise adjustable value. In response to a change or update to this value, the PWM signal generator initiates a duty transition process that generates a series of groups of PWM cycles that gradually transition from the original duty to the new duty. Each group includes a corresponding set of a predetermined number of PWM cycles that is repeated one or more times over a predetermined duration for the group. Each set has a certain proportion of PWM cycles having the new duty to PWM cycles having the original duty, whereby the proportion increases for each successive group of the series. This gradual transition in the PWM signal from the original duty to the new duty effectively provides an effective higher duty resolution for the PWM signal generator during the duty transition. | 2011-08-11 |
20110193606 | RADIO FREQUENCY MODULATOR AND METHOD THEREOF - A radio frequency (RF) modulator includes: converting means for up-converting a first and second baseband signals into a first and second up-converted signals with a reference clock, wherein a phase difference between the first and second baseband signals substantially equals 180°/N; and combining means for combining the first and second up-converted signals to generate an output signal. | 2011-08-11 |
20110193607 | Method and Apparatus for Clock Calibration in a Clocked Digital Device - Methods and apparatuses provide a clocked digital device having dynamically adjustable operating characteristics. The digital device comprises a digital clock management (“DCM”) circuit in which the amount of delay between receipt of an active edge of a clock signal at the input of the DCM circuit and appearance of an active edge of another clock signal at the output of the DCM circuit depends on a phase adjustment signal applied to the DCM circuit's phase adjust input. A phase adjustment circuit provides the phase adjustment signal to the DCM circuit's phase adjust input for controlling the amount of the delay between the clock signal at the input of the DCM circuit and the clock signal at the output of the DCM circuit. | 2011-08-11 |
20110193608 | Square Wave For Vessel Sealing - A square wave generator suitable for use with an electrosurgical device is provided. The square wave generator includes a voltage source configured to output a waveform and a comparator operatively coupled to the voltage source and configured to output energy in the form of a square wave. The generator may also include at least one sensor configured to sense an operational parameter of the energy outputted from the comparator and to provide a sensor signal corresponding thereto and a controller adapted to receive the at least one sensor signal and in response thereto control the voltage source. | 2011-08-11 |
20110193609 | Voltage Level Shifter with Dynamic Circuit Structure having Discharge Delay Tracking - In a particular embodiment, an apparatus includes a dynamic circuit structure that includes a dynamic node coupling a precharge circuit, a discharge circuit, and a gated keeper circuit. The gated keeper circuit is enabled by a signal from a discharge delay tracking circuit. | 2011-08-11 |
20110193610 | Efficient Computation of Driving Signals for Devices with Non-Linear Response Curves - Apparatus comprising an input connected to receive an input signal, a lookup table comprising a plurality of input entries and first and second output entries for each input entry. The look up table receives the input signal and returns a lower input entry, an upper input entry, the second output entry for the lower input entry, and the first output entry for the upper input entry. A first subtractor subtracts the lower input entry from the input signal to produce a first difference. A second subtractor subtracts the input signal from the upper input entry to produce a second difference. First and second multipliers multiply the first and second differences by the first output entry for the upper input entry and the second output entry for the lower input entry, respectively, to produce first and second products. An adder adds the first and second products to produce an output signal. | 2011-08-11 |
20110193611 | SWITCHED CAPACITOR CIRCUIT - A switched capacitor circuit includes: an operational amplifier; a first capacitor; a first switch that charges the first capacitor by connecting the first capacitor between an inverting input terminal and an output terminal of the operational amplifier, and discharges the first capacitor by disconnecting the inverting input terminal and the output terminal of the operational amplifier in a predetermined period; and a first output terminal that outputs an output voltage of the switched capacitor circuit, wherein after a predetermined period from a time when the first switch connects the first capacitor between the inverting input terminal and the output terminal of the operational amplifier, the first output terminal and the output terminal of the operational amplifier are connected to each other. | 2011-08-11 |
20110193612 | METHODS OF CONTROLLING A SYNCHRONOUS RECTIFIER - Consistent with an example embodiment, there is a method of controlling a synchronous rectifier having an input signal having oscillations therein and a switch which is switchable between an open state and a closed state. The method comprises filtering the input signal to produce a filtered signal, comparing the filtered signal with a reference value, and opening the switch in response to the comparison, in which the filtering is active filtering. | 2011-08-11 |
20110193613 | SWITCHABLE CURRENT SOURCE CIRCUIT AND METHOD - A method and circuit for providing a switched current source output has a precharge mode, in which a charge storage device is charged to a reference voltage, and the gate of an output transistor is discharged. In a discharge mode, the charge storage device is discharged to the gate of the output transistor to raise the gate voltage by an amount depending on the charge flow. | 2011-08-11 |
20110193614 | HIGH-FREQUENCY SWITCH MODULE AND HIGH-FREQUENCY SWITCH APPARATUS - A high-frequency switch module includes a multi-layer substrate, and a switch circuit mounted on the multi-layer substrate. The multi-layer substrate includes a terminal through which a plurality of high-frequency signals in a plurality of frequency bands are input and output, a plurality of switch terminals, terminals to which control signals to control the switch circuit are supplied, current paths that connect the terminals to the switch circuit, and resistors that are provided on the current paths and have resistance values greater than the resistance values of the current paths. The switch circuit connects the terminal to the switch terminals corresponding to the frequency bands of high-frequency signals input and output through the terminal based on the control signals. | 2011-08-11 |
20110193615 | TRANSMISSION GATE AND SEMICONDUCTOR DEVICE - Provided is a transmission gate capable of adapting to various input voltages to attain high S/N characteristics. The transmission gate includes: a PMOS transistor ( | 2011-08-11 |
20110193616 | SEMICONDUCTOR INTEGRATED CIRCUIT AND DATA PROCESSING SYSTEM - An arrangement for detecting local light irradiation in an illegal attack attempt to intentionally induce a malfunction or faulty condition is formed on a small chip occupancy area so as to provide high detection sensitivity. In a region containing a logic circuit, a plurality of series-coupled detection inverters are distributively disposed as photodetector elements having a constant logical value of primary-stage input. When at least one of the series-coupled detection inverters is irradiated with light, an output thereof is inverted, thereby producing a final output through the series-coupled detection inverters. Based on the final output thus produced, local light irradiation can be detected. | 2011-08-11 |
20110193617 | SEMICONDUCTOR CARD - Portability of an electronic device with a semiconductor card is improved. The semiconductor card is insertable to a card slot in an electronic device, can engage a card socket formed inside the card slot, and has a base part and an expansion part. The base part has a terminal part and a first connection unit, and engages the card socket with the terminal part. The expansion part has a second connection unit, and can be moved between two positions when the second connection unit is connected to the first connection unit, a closed position where the expansion part is overlapping and substantially parallel to the base part, and an open position where the expansion part is extended at an angle greater than a perpendicular with respect to the base part. When the expansion part is in the closed position and the terminal part is engaged in the card socket, the expansion part and the base part are inserted to the card slot. When in the open position with the terminal part engaged in the card socket, the base part is inserted to the card slot and part of the expansion part protrudes from the card slot. | 2011-08-11 |
20110193618 | Semiconductor integrated circuit - A semiconductor integrated circuit includes: a main-interconnect to which supply voltage or reference voltage is applied; a plurality of sub-interconnects; a plurality of circuit cells configured to be connected to the plurality of sub-interconnects; a power supply switch cell configured to control, in accordance with an input control signal, connection and disconnection between the main-interconnect and the sub-interconnect to which a predetermined one of the circuit cells is connected, of the plurality of sub-interconnects; and an auxiliary interconnect configured to connect the plurality of sub-interconnects to each other. | 2011-08-11 |
20110193619 | SEMICONDUCTOR ELECTRONIC COMPONENTS AND CIRCUITS - An electronic component includes a high-voltage depletion-mode transistor and a low-voltage enhancement-mode transistor both encased in a single package. A source electrode of the high-voltage depletion-mode transistor is electrically connected to a drain electrode of the low-voltage enhancement-mode transistor, a drain electrode of the high-voltage depletion-mode transistor is electrically connected to a drain lead of the single package, a gate electrode of the low-voltage enhancement-mode transistor is electrically connected to a gate lead of the single package, a gate electrode of the high-voltage depletion-mode transistor is electrically connected to an additional lead of the single package, and a source electrode of the low-voltage enhancement-mode transistor is electrically connected to a conductive structural portion of the single package. | 2011-08-11 |
20110193620 | Reference Voltage Generator for Single-Ended Communication Systems - An improved reference voltage (Vref) generator for a single-ended receiver in a communication system is disclosed. The Vref generator in one example comprises a cascoded current source for providing a current, I, to a resistor, Rb, to produce the Vref voltage (I*Rb). Because the current source isolates Vref from a first of two power supplies, Vref will vary only with the second power supply coupled to Rb. As such, the improved Vref generator is useful in systems employing signaling referenced to that second supply but having decoupled first supplies. For example, in a communication system in which the second supply (E.g. Vssq) is common to both devices, but the first supply (Vddq) is not, the disclosed Vref generator produces a value for Vref that tracks Vssq but not the first supply. This improves the sensing of Vssq-referenced signals in such a system. | 2011-08-11 |
20110193621 | Semiconductor Die with Event Detection in Thick Oxide for Reduced Power Consumption - According to one exemplary embodiment, a power managing semiconductor die with reduced power consumption includes a power island including an event detection block and an event qualification block. The event detection block is configured to activate the event qualification block in response to an input signal initiated by an external event. The input signal is coupled to the event detection block, for example, via a bond pad situated in an I/O region of the power managing semiconductor die. The event qualification block is configured to determine if the external event is a valid external event. The event qualification block resides in a thin oxide region and the event detection block resides in a thick oxide region of the semiconductor die. The power managing semiconductor die further includes a power management unit configured to activate the event qualification block in response to power enable signal outputted by the event detection block. | 2011-08-11 |
20110193622 | PULSE OUTPUT CIRCUIT, SHIFT REGISTER, AND DISPLAY DEVICE - An object is to suppress change of a threshold voltage of a transistor in a shift register and to prevent the transistor from malfunctioning during a non-selection period. A pulse output circuit provided in the shift register regularly supplies a potential to a gate electrode of a transistor which is in a floating state so that the gate electrode is turned on during a non-selection period when a pulse is not outputted. In addition, supply of a potential to the gate electrode of the transistor is performed by turning on or off another transistor regularly. | 2011-08-11 |
20110193623 | Large Time Constant Steering Circuit and Instrumentation Amplifier Implementing Same - The present invention relates to a large time constant steering circuit for slowly changing a voltage on a node between at least two discrete voltage levels. The present invention further relates to a slow steering current DAC comprising said large time constant steering circuit. The present invention further relates to an instrumentation amplifier device comprising a current balancing instrumentation amplifier for amplifying an input signal to an amplified output signal and a DC servo-loop for removing a DC-component from the input signal. The present invention further relates to an EEG acquisition ASIC comprising said instrumentation amplifier device. | 2011-08-11 |
20110193624 | TUNABLE IMPEDANCE INVERTER FOR DOHERTY AMPLIFIER CIRCUIT - A tunable impedance inverter is presented for a Doherty amplifier circuit having first and second amplifiers connected in parallel between an input circuit for receiving an input signal and an output circuit for supplying an output signal to a load. An impedance inverter is coupled between the first amplifier and the output circuit. The inverter has an input and an output and a tunable mechanical strip line of variable electrical length interposed between the input and the output. An adjuster adjusts the electrical length of the strip line. The adjuster adjustably varies the electrical length of said pathway to thereby adjust the center frequency of said output signal. | 2011-08-11 |
20110193625 | Amplifier for Cable and Terrestrial Applications with Independent Stage Frequency Tilt - A system comprises a first amplifier stage including a first amplifier, a second amplifier stage including second and third amplifiers, and a fourth amplifier. The first amplifier stage includes an input and an output. The second amplifier stage is coupled between the output of the first amplifier stage and a first output node. The fourth amplifier is coupled between the input of the first amplifier stage and a second output node. | 2011-08-11 |
20110193626 | FREQUENCY RESPONSE COMPENSATION AMPLIFIER ARRANGEMENTS - An embodiment of the present invention provides a system comprising a summing device and first amplifier portion. The summing device is coupled to an output node. The first amplifier portion is coupled between an input node and the summing device. The first amplifier portion includes a first amplifier, a first filter, and first and second switches. The first amplifier is coupled between the input node and the summing device on a first path. The first filter is coupled between the input node and the first amplifier on a second path, the second path being in parallel to the first path. The first switch is coupled between the input node and the first amplifier along the first path. The second switch is coupled between the input node and the first filter along the second path. | 2011-08-11 |
20110193627 | Method and Amplifier for Cancelling Magnetic Coupling - A method for cancelling magnetic coupling in an amplifier is disclosed. The amplifier includes a first path and a second path for outputting a first signal and a second signal, respectively, and the first signal and the second signal have a specific phase difference. The method includes forming a first LC tank and a second LC tank in the first path, and forming a third LC tank and a forth LC tank in the second path. | 2011-08-11 |