33rd week of 2020 patent applcation highlights part 58 |
Patent application number | Title | Published |
20200258813 | ELECTRONIC DEVICE | 2020-08-13 |
20200258814 | METHOD OF FORMING CONDUCTIVE BUMPS FOR COOLING DEVICE CONNECTION AND SEMICONDUCTOR DEVICE | 2020-08-13 |
20200258815 | HEAT SINK | 2020-08-13 |
20200258816 | BONDED THREE-DIMENSIONAL MEMORY DEVICES AND METHODS OF MAKING THE SAME BY REPLACING CARRIER SUBSTRATE WITH SOURCE LAYER | 2020-08-13 |
20200258817 | BONDED THREE-DIMENSIONAL MEMORY DEVICES AND METHODS OF MAKING THE SAME BY REPLACING CARRIER SUBSTRATE WITH SOURCE LAYER | 2020-08-13 |
20200258818 | ASSEMBLY COMPRISING A VERTICAL POWER COMPONENT ASSEMBLED ON A METAL CONNECTION PLATE | 2020-08-13 |
20200258819 | FLOATED SINGULATION | 2020-08-13 |
20200258820 | MICROELECTRONIC DEVICE WITH FLOATING PADS | 2020-08-13 |
20200258821 | ELECTRONIC MODULE AND METHOD OF MANUFACTURING ELECTRONIC MODULE | 2020-08-13 |
20200258822 | HIGH I/O DENSITY FLIP-CHIP QFN | 2020-08-13 |
20200258823 | POWER SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME | 2020-08-13 |
20200258824 | POWER SEMICONDUCTOR DEVICE PACKAGE | 2020-08-13 |
20200258825 | HIGH CURRENT PACKAGES WITH REDUCED SOLDER LAYER COUNT | 2020-08-13 |
20200258826 | SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR MANUFACTURING PROCESS | 2020-08-13 |
20200258827 | ELECTROLESS METAL-DEFINED THIN PAD FIRST LEVEL INTERCONNECTS FOR LITHOGRAPHICALLY DEFINED VIAS | 2020-08-13 |
20200258828 | INTERPOSER AND ELECTRONIC DEVICE | 2020-08-13 |
20200258829 | Surface Mount Semiconductor Device and Method of Manufacture | 2020-08-13 |
20200258830 | DIE PACKAGE AND METHOD OF FORMING A DIE PACKAGE | 2020-08-13 |
20200258831 | CONDUCTIVE TRACE DESIGN FOR SMART CARD | 2020-08-13 |
20200258832 | ELECTRONIC DEVICE | 2020-08-13 |
20200258833 | BUSBAR ASSEMBLY | 2020-08-13 |
20200258834 | EXTERNAL CONNECTION PART OF SEMICONDUCTOR MODULE, SEMICONDUCTOR MODULE, EXTERNAL CONNECTION TERMINAL, AND MANUFACTURING METHOD OF EXTERNAL CONNECTION TERMINAL OF SEMICONDUCTOR MODULE | 2020-08-13 |
20200258835 | SEMICONDUCTOR DEVICE | 2020-08-13 |
20200258836 | PACKAGE STRUCTURE, PACKAGE-ON-PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF | 2020-08-13 |
20200258837 | WORD LINE CONTACT STRUCTURE FOR THREE-DIMENSIONAL MEMORY DEVICES AND FABRICATION METHODS THEREOF | 2020-08-13 |
20200258838 | SYSTEMS AND METHODS FOR SCALE OUT INTEGRATION OF CHIPS | 2020-08-13 |
20200258839 | ZERO-MISALIGNMENT TWO-VIA STRUCTURES USING PHOTOIMAGEABLE DIELECTRIC, BUILDUP FILM, AND ELECTROLYTIC PLATING | 2020-08-13 |
20200258840 | RADIO-FREQUENCY MODULE AND COMMUNICATION DEVICE | 2020-08-13 |
20200258841 | ELECTRONIC COMPONENT MODULE | 2020-08-13 |
20200258842 | Semiconductor Package Having a Filled Conductive Cavity | 2020-08-13 |
20200258843 | MARKS FOR LOCATING PATTERNS IN SEMICONDUCTOR FABRICATION | 2020-08-13 |
20200258844 | PROCESS VARIATION AS DIE LEVEL TRACEABILITY | 2020-08-13 |
20200258845 | METHODS RELATED TO SHIELDED MODULE HAVING COMPRESSION OVERMOLD | 2020-08-13 |
20200258846 | ELECTROMAGNETIC SHIELDING METAL-INSULATOR-METAL CAPACITOR STRUCTURE | 2020-08-13 |
20200258847 | CHIPLET FIRST ARCHITECTURE FOR DIE TILING APPLICATIONS | 2020-08-13 |
20200258848 | SEMICONDUCTOR DEVICE | 2020-08-13 |
20200258849 | METHOD FOR MANUFACTURING SEMICONDUCTOR PACKAGE STRUCTURE | 2020-08-13 |
20200258850 | METHOD FOR FABRICATING AN ELECTRONIC DEVICE AND A STACKED ELECTRONIC DEVICE | 2020-08-13 |
20200258851 | ELECTRONIC MODULE | 2020-08-13 |
20200258852 | DEVICE, SYSTEM AND METHOD FOR PROVIDING INDUCTOR STRUCTURES | 2020-08-13 |
20200258853 | POWER CONVERSION DEVICE | 2020-08-13 |
20200258854 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE | 2020-08-13 |
20200258855 | Semiconductor Device Having a Copper Pillar Interconnect Structure | 2020-08-13 |
20200258856 | EXPANDED HEAD PILLAR FOR BUMP BONDS | 2020-08-13 |
20200258857 | BONDED SEMICONDUCTOR STRUCTURES HAVING BONDING CONTACTS MADE OF INDIFFUSIBLE CONDUCTIVE MATERIALS AND METHODS FOR FORMING THE SAME | 2020-08-13 |
20200258858 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | 2020-08-13 |
20200258859 | Use of Pre-Channeled Materials for Anisotropic Conductors | 2020-08-13 |
20200258860 | APPARATUS AND METHOD FOR SECURING SUBSTRATES WITH VARYING COEFFICIENTS OF THERMAL EXPANSION | 2020-08-13 |
20200258861 | PROCESS FOR PACKAGING COMPONENT | 2020-08-13 |
20200258862 | Anodic Bonding of a Substrate of Glass having Contact Vias to a Substrate of Silicon | 2020-08-13 |
20200258863 | Anodic Bonding of a Substrate of Glass having Contact Vias to a Substrate of Silicon | 2020-08-13 |
20200258864 | DISPLAY DEVICE | 2020-08-13 |
20200258865 | Stacked Integrated Circuits with Redistribution Lines | 2020-08-13 |
20200258866 | DISPLAY PANEL, MANUFACTURING METHOD THEREOF AND DISPLAY DEVICE | 2020-08-13 |
20200258867 | Display apparatus | 2020-08-13 |
20200258868 | UNIFORMING AN ARRAY OF LEDS HAVING ASYMMETRIC OPTICAL CHARACTERISTICS | 2020-08-13 |
20200258869 | MICRO LIGHT EMITTING DEVICE DISPLAY APPARATUS | 2020-08-13 |
20200258870 | METHODS FOR MANUFACTURING A DISPLAY DEVICE | 2020-08-13 |
20200258871 | PACKAGE STACK STRUCTURE AND METHOD FOR MANUFACTURING THE SAME | 2020-08-13 |
20200258872 | LIGHT EMITTING DEVICE FOR DISPLAY AND DISPLAY APPARATUS HAVING THE SAME | 2020-08-13 |
20200258873 | Power Stage Device with Carrier Frame for Power Stage Module and Integrated Inductor | 2020-08-13 |
20200258874 | ISOLATOR INTEGRATED CIRCUITS WITH PACKAGE STRUCTURE CAVITY AND FABRICATION METHODS | 2020-08-13 |
20200258875 | DISPLAY WITH EMBEDDED PIXEL DRIVER CHIPS | 2020-08-13 |
20200258876 | BONDED STRUCTURE INCLUDING A PERFORMANCE-OPTIMIZED SUPPORT CHIP AND A STRESS-OPTIMIZED THREE-DIMENSIONAL MEMORY CHIP AND METHOD FOR MAKING THE SAME | 2020-08-13 |
20200258877 | SEMICONDUCTOR DEVICE | 2020-08-13 |
20200258878 | INTELLIGENT DIODE STRUCTURES | 2020-08-13 |
20200258879 | ELECTROSTATIC DISCHARGE (ESD) ROBUST TRANSISTOR | 2020-08-13 |
20200258880 | SEMICONDUCTOR DEVICE | 2020-08-13 |
20200258881 | VERTICAL DIODE IN STACKED TRANSISTOR ARCHITECTURE | 2020-08-13 |
20200258882 | SEMICONDUCTOR DEVICE | 2020-08-13 |
20200258883 | MONOLITHIC MULTI-I REGION DIODE LIMITERS | 2020-08-13 |
20200258884 | CMOS CIRCUIT WITH A GROUP III-NITRIDE TRANSISTOR AND METHOD OF PROVIDING SAME | 2020-08-13 |
20200258885 | METHOD FOR CONVERTING A FLOATING GATE NON-VOLATILE MEMORY CELL TO A READ-ONLY MEMORY CELL AND CIRCUIT STRUCTURE THEREOF | 2020-08-13 |
20200258886 | ATOM IMPLANTATION FOR PASSIVATION OF PILLAR MATERIAL | 2020-08-13 |
20200258887 | Integrated Assemblies Having Threshold-Voltage-Inducing-Structures Proximate Gated-Channel-Regions, and Methods of Forming Integrated Assemblies | 2020-08-13 |
20200258888 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME | 2020-08-13 |
20200258889 | BIT LINE GATE STRUCTURE OF DYNAMIC RANDOM ACCESS MEMORY (DRAM) | 2020-08-13 |
20200258890 | ULTRA-DEEP COMPUTE STATIC RANDOM ACCESS MEMORY WITH HIGH COMPUTE THROUGHPUT AND MULTI-DIRECTIONAL DATA PROPAGATION | 2020-08-13 |
20200258891 | SRAM STRUCTURE | 2020-08-13 |
20200258892 | METAL ISOLATION TESTING IN THE CONTEXT OF MEMORY CELLS | 2020-08-13 |
20200258893 | METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE | 2020-08-13 |
20200258894 | 3D FLOATING-GATE MULTIPLE-INPUT DEVICE | 2020-08-13 |
20200258895 | 3-DIMENSIONAL JUNCTION SEMICONDUCTOR MEMORY DEVICE AND FABRICATION METHOD THEREOF | 2020-08-13 |
20200258896 | THREE-DIMENSIONAL MEMORY DEVICES USING CARBON-DOPED ALUMINUM OXIDE BACKSIDE BLOCKING DIELECTRIC LAYER FOR ETCH RESISTIVITY ENHANCEMENT AND METHODS OF MAKING THE SAME | 2020-08-13 |
20200258897 | DEVICE WITH EMBEDDED HIGH-BANDWIDTH, HIGH-CAPACITY MEMORY USING WAFER BONDING | 2020-08-13 |
20200258898 | THREE DIMENSIONAL MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME | 2020-08-13 |
20200258899 | Flash Memory Structure and Method of Forming the Same | 2020-08-13 |
20200258900 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | 2020-08-13 |
20200258901 | SEMICONDUCTOR DEVICE | 2020-08-13 |
20200258902 | 3-DIMENSIONAL JUNCTION SEMICONDUCTOR MEMORY DEVICE AND FABRICATION METHOD THEREOF | 2020-08-13 |
20200258903 | 3-DIMENSIONAL NOR MEMORY ARRAY ARCHITECTURE AND METHODS FOR FABRICATION THEREOF | 2020-08-13 |
20200258904 | BONDED THREE-DIMENSIONAL MEMORY DEVICES AND METHODS OF MAKING THE SAME BY REPLACING CARRIER SUBSTRATE WITH SOURCE LAYER | 2020-08-13 |
20200258905 | THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE | 2020-08-13 |
20200258906 | CHARGE TRAP STRUCTURE WITH BARRIER TO BLOCKING REGION | 2020-08-13 |
20200258907 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME | 2020-08-13 |
20200258908 | SEMICONDUCTOR DEVICES | 2020-08-13 |
20200258909 | MULTI-LAYER BARRIER FOR CMOS UNDER ARRAY TYPE MEMORY DEVICE AND METHOD OF MAKING THEREOF | 2020-08-13 |
20200258910 | Integrated Structures and Methods of Forming Vertically-Stacked Memory Cells | 2020-08-13 |
20200258911 | NONVOLATILE MEMORY DEVICE HAVING A VERTICAL STRUCTURE AND A MEMORY SYSTEM INCLUDING THE SAME | 2020-08-13 |
20200258912 | STACKED TYPE SEMICONDUCTOR MEMORY DEVICE | 2020-08-13 |