34th week of 2008 patent applcation highlights part 26 |
Patent application number | Title | Published |
20080198640 | Data Storage Device - In a non-volatile electric memory system a card-like memory unit ( | 2008-08-21 |
20080198641 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND LAYOUT METHOD THEREOF - A semiconductor integrated circuit device includes a memory macro and M (N is an integer more than 1) passage wirings. The memory macro includes a memory cell array comprising memory cells which are arranged in a matrix, digit line pairs connected with the memory cells and extending in a column direction, and a column peripheral circuit connected with the digit line pairs and comprising a sense amplifier circuit. The M (M is an integer more than 1) passage wirings are arranged to extend in a row direction orthogonal to the digit line pairs. The arrangement of the M passage lines above the column peripheral circuit is forbidden. | 2008-08-21 |
20080198642 | SEMICONDUCTOR MEMORY DEVICE - A memory cell includes an antifuse device that is capable of having data written thereto by breakdown of a gate dielectric film by application of a high voltage. A data inversion portion generates, according to a relationship between the sense amplifier's determination and write data to be written to the memory cell, inverted write data obtained by inverting the write data. The data inversion portion also inverts, when data is read from the memory cell to which the inverted write data is written, the read data and reads it. | 2008-08-21 |
20080198643 | One-time programmable cell and memory device having the same - One-time programmable cell and memory device having the same includes a first metal oxide semiconductor (MOS) transistor configured to form a current path between a first node and a second node in response to a read-control signal, a second MOS transistor configured to form a current path between a third node and the second node in response to a write-control signal and an anti-fuse connected between the second node and a ground voltage terminal, wherein a voltage applied to the second node is output as an output signal. | 2008-08-21 |
20080198644 | Data Storage Device - In a non-volatile electric memory system a memory unit ( | 2008-08-21 |
20080198645 | NONVOLATILE MEMORY DEVICE HAVING MEMORY AND REFERENCE CELLS - A nonvolatile memory device includes a stack-type memory cell array, a selection circuit and a read circuit. The memory cell array includes multiple memory cell layers and a reference cell layer, which are vertically laminated. Each of the memory cell layers includes multiple nonvolatile memory cells for storing data, and the reference cell layer includes multiple reference cells for storing reference data. The selection circuit selects a nonvolatile memory cell from the memory cell layers and at least one reference cell, corresponding to the selected nonvolatile memory cell, from the reference cell layer. The read circuit supplies a read bias to the selected nonvolatile memory cell and the selected reference cell corresponding to the selected nonvolatile memory cell, and reads data from the selected nonvolatile memory cell. | 2008-08-21 |
20080198646 | NONVOLATILE MEMORY DEVICE USING RESISTANCE MATERIAL - The present invention provides a nonvolatile memory device that uses a resistance material. The nonvolatile memory device includes: a stacked memory cell array having a plurality of memory cell layers stacked in a vertical direction, the stacked memory cell array having at least one memory cell group and at least one redundancy memory cell group; and a repair control circuit coupled to the stacked memory cell array, the repair control circuit configured to repair a defective one of the at least one memory cell group with a selected one of the at least one redundancy memory cell group. The features that enable repair improve the fabrication yield of the nonvolatile memory device. | 2008-08-21 |
20080198647 | METHOD AND APPARATUS FOR BITLINE AND CONTACT VIA INTEGRATION IN MAGNETIC RANDOM ACCESS MEMORY ARRAYS - In one embodiment, the invention is a method and apparatus for bitline and contact via integration in magnetic random access memory arrays. One embodiment of a magnetic random access memory according to the present invention includes a magnetic tunnel junction and a top wire that surrounds the magnetic tunnel junction on at least three sides. | 2008-08-21 |
20080198648 | WRITING METHOD FOR MAGNETIC MEMORY CELL AND MAGNETIC MEMORY ARRAY STRUCTURE - A writing method for a magnetic memory cell which has a magnetic free stack layer with a bi-directional easy axis. A magnetic X axis and a magnetic Y axis are taken as reference directions, and the bi-directional easy axis is substantially on the magnetic X axis. The method includes applying a first magnetic field in a first direction of the magnetic Y axis. Then, a second magnetic field added onto the first magnetic field is applied in a first direction of the magnetic X axis. Next, the application of the first magnetic field is terminated. Thereafter, a third magnetic field is applied on the magnetic Y axis in a second direction opposite to the first direction. The second magnetic field is terminated and the third magnetic field is terminated. | 2008-08-21 |
20080198649 | Memory device and method of manufacturing a memory device - A memory device includes a bit line, a reading word line, a bit line contact, an electrode, a writing word line and a contact tip. The bit line is formed on a substrate. The reading word line is formed over the bit line. The bit line contact is disposed between adjacent reading word lines. The electrode extends substantially in parallel to the reading word line and includes a conductive material being bent in response to an applied voltage. The writing word line is formed over the electrode and is separated from the electrode. The contact tip is formed at an end portion of the electrode and is separated from the reading and the writing word lines. The contact tip protrudes toward the reading word line or writing word line. | 2008-08-21 |
20080198650 | Distortion Estimation And Cancellation In Memory Devices - A method for operating a memory ( | 2008-08-21 |
20080198651 | NON-VOLATILE MEMORY WITH DYNAMIC MULTI-MODE OPERATION - A method and system for extending the life span of a flash memory device. The flash memory device is dynamically configurable to store data in the single bit per cell (SBC) storage mode or the multiple bit per cell (MBC) mode, such that both SBC data and MBC data co-exist within the same memory array. One or more tag bits stored in each page of the memory is used to indicate the type of storage mode used for storing the data in the corresponding subdivision, where a subdivision can be a bank, block or page. A controller monitors the number of program-erase cycles corresponding to each page for selectively changing the storage mode in order to maximize lifespan of any subdivision of the multi-mode flash memory device. | 2008-08-21 |
20080198652 | Memory Device Programming Using Combined Shaping And Linear Spreading - A method for data storage includes accepting data for storage in a memory ( | 2008-08-21 |
20080198653 | CIRCUIT ARRANGEMENT AND METHOD FOR OPERATING A CIRCUIT ARRANGEMENT - A circuit arrangement includes a nonvolatile memory cell having a continuously variable characteristic that can be read out. A programming unit is coupled to the memory cell and designed to apply an analog signal to the memory cell in order to vary the characteristic, if the characteristic lies within a predetermined range of values, in such a way that the characteristic lies outside the predetermined range of values. A supply voltage unit is provided for providing a supply voltage. A changeover unit is coupled to the supply voltage unit and to the programming unit and designed to trigger the application of the analog signal to the memory cell if the supply voltage is interrupted. | 2008-08-21 |
20080198654 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device includes: first and second cell arrays each having a plurality of memory cells; and a sense amplifier circuit for reading out data of the first and second cell arrays, wherein plural information cells and at least one reference cell are set in each of the first and second cell arrays, one of four data levels L | 2008-08-21 |
20080198655 | Integrated circuit, method of reading data stored within a memory device of an integrated circuit, method of writing data into a memory device of an integrated circuit, memory module, and computer program - A memory device comprises a plurality of memory cells, each of which comprising a first electrode, a second electrode and an active material arranged between the first electrode and the second electrode, wherein the memory cells are grouped into memory cell groups, each memory cell group defining a memory cell group area and being configured such that corresponding first electrodes are individually addressable, and corresponding second electrodes are commonly addressable via a common select device provided within the memory cell group area of the memory cell group. | 2008-08-21 |
20080198656 | TIME-DEPENDENT COMPENSATION CURRENTS IN NON-VOLATILE MEMORY READ OPERATIONS - Shifts in the apparent charge stored on a floating gate of a non-volatile memory cell can occur because of coupling of an electric field based on the charge stored in adjacent floating gates. The shift in apparent charge can lead to erroneous readings by raising the apparent threshold voltage, and consequently, lowering the sensed conduction current of a memory cell. The read process for a selected memory cell takes into account the state of one or more adjacent memory cells. If an adjacent memory cell is in one or more of a predetermined set of programmed states, a compensation current can be provided to increase the apparent conduction current of the selected memory cell. An initialization voltage is provided to the bit line of the programmed adjacent memory cell to induce a compensation current between the bit line of the programmed adjacent memory cell and the bit line of the selected memory cell. | 2008-08-21 |
20080198657 | NON-VOLATILE SEMICONDUCTOR MEMORY HAVING MULTIPLE EXTERNAL POWER SUPPLIES - A memory device includes core memory such as flash memory for storing data. The memory device includes a first power input to receive a first voltage used to power the flash memory. Additionally, the memory device includes a second power input to receive a second voltage. The memory device includes power management circuitry configured to receive the second voltage and derive one or more internal voltages. The power management circuitry supplies or conveys the internal voltages to the flash memory. The different internal voltages generated by the power management circuitry (e.g., voltage converter circuit) and supplied to the core memory enable operations such as read/program/erase with respect to cells in the core memory. | 2008-08-21 |
20080198658 | MEMORY CARD, SEMICONDUCTOR DEVICE, AND METHOD OF CONTROLLING MEMORY CARD - A semiconductor device includes a transfer section which receives, from an external source, a second program for modifying a function of a first program stored in a read-only memory (ROM) and information required in activation of the second program, and which writes the program and the information to a nonvolatile semiconductor memory, and a load section which activates the second program on the basis of the information written to the nonvolatile semiconductor memory to modify the function of the first program. | 2008-08-21 |
20080198659 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device includes: a memory cell array having a plurality of memory cells arranged therein; and a sense amplifier circuit configured to read data of the memory cell array, wherein a comparison operation is performed between read out data from the memory cell array and externally supplied expectance data in the sense amplifier circuit. | 2008-08-21 |
20080198660 | MULTIPLE PASS WRITE SEQUENCE FOR NON-VOLATILE STORAGE - A set of non-volatile storage elements are erased to an erased threshold voltage distribution. A multi-pass programming process is performed that programs the set of non-volatile storage elements from the erased threshold voltage distribution to a set valid data threshold voltage distributions. Each programming pass has one or more starting threshold voltage distributions and programs non-volatile storage elements to at least two ending threshold voltage distributions. | 2008-08-21 |
20080198661 | NON-VOLATILE STORAGE APPARATUS WITH VARIABLE INITIAL PROGRAM VOLTAGE MAGNITUDE - Multiple programming processes are performed for a plurality of non-volatile storage elements. Each of the programming process operates to program at least a subset of said non-volatile storage elements to a set of target conditions using program pulses. In one embodiment, a first programming pass includes soft programming and additional programming passes include the programming of data. In another embodiment, all of the programming process include programming data. For at least a subset of said programming processes, a program pulse associated with achieving a particular result for a respective programming process is identified. The identified program pulse is used to adjust programming for a subsequent programming process. | 2008-08-21 |
20080198662 | DYNAMIC VERIFY BASED ON THRESHOLD VOLTAGE DISTRIBUTION - After erasing a plurality of non-volatile storage elements, a soft programming process is performed to tighten the erase threshold distribution for the non-volatile storage elements. During the soft programming process, the system identifies the number of programming pulses needed for a first set of the non-volatile storage elements to complete the soft programming and the number of programming pulses needed for the all but a last set of non-volatile storage elements to complete soft programming. These two numbers are used to characterize the threshold distribution of the non-volatile storage elements. This characterization of the threshold distribution and the program pulse step size are used to limit the number of verify pulses used during subsequent programming. | 2008-08-21 |
20080198663 | FLASH MEMORY DEVICE AND PROGRAM METHOD THEREOF - A flash memory device which comprises a memory cell array having memory cells arranged in rows and columns; a word line voltage generator circuit configured to generate a program voltage, a dielectric breakdown prevention voltage, and a pass voltage at a program operation; and a row selector circuit that receives the program voltage, the dielectric breakdown prevention voltage, and the pass voltage and selecting one of the rows in response to a row address. The dielectric breakdown prevention voltage is lower than the program voltage and higher than the pass voltage; and the row selector circuit drives the selected row with the program voltage, drives at least one row just adjacent to, or neighboring, the selected row with the dielectric breakdown prevention voltage and drives remaining rows with the pass voltage. | 2008-08-21 |
20080198664 | NON-VOLATILE STORAGE APPARATUS WITH MULTIPLE PASS WRITE SEQUENCE - A set of non-volatile storage elements are erased to an erased threshold voltage distribution. A multi-pass programming process is performed that programs the set of non-volatile storage elements from the erased threshold voltage distribution to a set valid data threshold voltage distributions. Each programming pass has one or more starting threshold voltage distributions and programs non-volatile storage elements to at least two ending threshold voltage distributions. | 2008-08-21 |
20080198665 | VARIABLE INITIAL PROGRAM VOLTAGE MAGNITUDE FOR NON-VOLATILE STORAGE - Multiple programming processes are performed for a plurality of non-volatile storage elements. Each of the programming process operates to program at least a subset of said non-volatile storage elements to a set of target conditions using program pulses. In one embodiment, a first programming pass includes soft programming and additional programming passes include the programming of data. In another embodiment, all of the programming process include programming data. For at least a subset of said programming processes, a program pulse associated with achieving a particular result for a respective programming process is identified. The identified program pulse is used to adjust programming for a subsequent programming process. | 2008-08-21 |
20080198666 | Semiconductor device including adjustable driver output impedances - A semiconductor device is disclosed. In one embodiment, the device includes a first circuit, a second circuit, and a third circuit. The first circuit is configured to drive output signals and includes an adjustable output impedance. The second circuit is configured to adjust the adjustable output impedance. The third circuit is configured to sense a first parameter and to activate the second circuit to adjust the adjustable output impedance based on changes in the first parameter exceeding a first threshold value. | 2008-08-21 |
20080198667 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - According to one embodiment, a nonvolatile semiconductor memory device includes: a memory cell array having: a cell string including a plurality of memory cells connected in series; a plurality of word lines respectively connected to the plurality of memory cells; a source side selecting gate connected to one end of the cell string; and a drain side selecting gate connected to the other end of the cell string; a word line selector that selects one of the word lines connected to a target memory cell to be written; and an equalizing unit that equalizes voltages of the plurality of word lines after data write of the target memory cell is finished. | 2008-08-21 |
20080198668 | NONVOLATILE SEMICONDUCTOR MEMORY AND DRIVING METHOD THEREOF - A nonvolatile semiconductor memory according to an aspect of the invention comprises a plurality of serially connected memory cells arranged on a P-well area within a semiconductor substrate, select gate transistors connected to one end and the other of the serially connected memory cells, a P-well control circuit which controls the P-well area, a plurality of word lines connected to the plurality of memory cells, a row control circuit which controls the plurality of word lines, and an operation control circuit which controls the P-well control circuit and the row control circuit, wherein, when writing to a selected one of the plurality of memory cells, the operation control circuit controls the P-well control circuit to apply a precharge potential to the P-well area and thus precharge channel areas of the plurality of memory cells. | 2008-08-21 |
20080198669 | METHOD OF OPERATING NON-VOLATILE MEMORY - A non-volatile memory is provided. A substrate having a number of trenches and a number of select gates is provided. The trenches are arranged in parallel and extend in a first direction. Each of the select gates is disposed on the substrate between two adjacent trenches respectively. A number of select gate dielectric layers are disposed between the select gates and the substrate. A number of composite layers are disposed over the surface of the trenches and each composite layer has a charge trapping layer. A number of word lines are arranged in parallel in a second direction, wherein each of the word lines fills the trenches between adjacent select gates and is disposed over the composite layers. | 2008-08-21 |
20080198670 | Reduced power programming of non-volatile cells - Methods for minimizing current consumption in a memory array during programming of non-volatile memory cells, such as NROM cells, in the array include: programming a cell without having a direct current flowing from a positive supply to ground through the array, programming a plurality of cells with programming pulses without discharging a global bit line carrying a programming voltage between programming pulses, and programming a cell with transient currents. | 2008-08-21 |
20080198671 | Enqueue Event First-In, First-Out Buffer (FIFO) - In one embodiment, an apparatus comprises a queue, write control logic coupled to the queue and operable in a write clock domain, and a first-in, first-out buffer (FIFO) coupled to the write control logic. The queue is configured to store a plurality of data items, wherein each data item has a type which is one of a plurality of types of data items that can be stored in the queue. The write control logic is configured to maintain write pointers that identify entries in the queue for each of the plurality of types. The write control logic is configured to update the write pointer corresponding to an input type for an input data item written to the queue. Additionally, the write control logic is configured to enqueue a write event in the FIFO to transport the enqueue event to a read clock domain different from the write clock domain. | 2008-08-21 |
20080198672 | Power Supply Control Circuit and Controlling Method Thereof - The present invention provides a power supply control circuit and a control method thereof, capable of securing an accurate operation of a GIO in a burst data transmission having a high compression rate. The power supply control circuit of a semiconductor memory device includes: a counter which is reset in response to a read command signal or a write command signal to count an input clock and then, to output a counting completion signal; and a power supply enable signal generator enabled in response to the read command signal or the write command signal and disabled in response to the counting completion signal, for generating a power supply enable signal. | 2008-08-21 |
20080198673 | SEMICONDUCTOR MEMORY DEVICE AND DRIVING METHOD FOR THE DEVICE - This disclosure concerns a semiconductor memory device comprising: memory cells including floating bodies storing data; word lines connected to gates of the memory cells; a bit line pair connected to the memory cells and transmitting data stored in the memory cells; a sense node pair connected to the bit line pair and transmitting data stored in the memory cells; transfer gates connected between the bit line pair and the sense node pair; latch circuits latching a high-level potential in one sense node of the sense node pair, and latching a first low-level potential in the other sense node of the sense node pair; and a level shifter applying a second low-level potential lower than the first low-level potential to one bit line of the bit line pair according to the electric potentials latched in the sense node pair at the time of writing data or writing back data. | 2008-08-21 |
20080198674 | Method of testing an integrated circuit, method of determining defect resistivity changing cells, testing device, and computer program adapted to perform a method for testing an integrated circuit - A method for testing an integrated circuit having an array of resistivity changing cells, wherein the method includes selecting a plurality of cells, setting the state of each selected cell to a defined state, measuring a resistance value being dependent on the resistances of the selected cells, comparing the resistance value with a resistance target value, and classifying the integrated circuit in dependence on the result of the comparison. | 2008-08-21 |
20080198675 | Semiconductor device including a plurality of memory units and method of testing the same - In a semiconductor device including a plurality of memory units and a method of testing the same, the semiconductor device includes a plurality of memory units each comprising a plurality of input lines; and an input unit configured to provide a plurality of test signals to the input lines, respectively, included in each of the memory units in response to a test enable signal. A data input/output unit can be configured to receive Z-bit data from test equipment and to distribute the Z-bit data to the plurality of memory units in response to the test enable signal, where Z is a natural number. The data input/output unit outputs K-bit data, which are output from each of the plurality of memory units, through data input/output lines included in the plurality of memory units in response to the test enable signal, where K≦Z and K is a natural number. | 2008-08-21 |
20080198676 | SEMICONDUCTOR MEMORY DEVICE AND METHOD WITH A CHANGEABLE SUBSTRATE POTENTIAL - A semiconductor memory device and method with a changeable substrate potential. One embodiment provides for operating a semiconductor memory device having at least one read or write/sense amplifier. The method includes changing the substrate potential of the read or write/sense amplifier. | 2008-08-21 |
20080198677 | Internal voltage detection circuit and internal voltage generation device using the same - An internal voltage detection circuit and an internal voltage generation device using the same are disclosed. The internal voltage detection circuit includes a first detect signal generator for generating a first detect signal to detect a level of an internal voltage corresponding to an operating temperature of a memory cell, a second detect signal generator for generating a second detect signal to detect a specific level of the internal voltage corresponding to a preset temperature, and a detect signal clamp unit for comparing a level of the first detect signal and a level of the second detect signal with each other and clamping the first detect signal according to a result of the comparison. | 2008-08-21 |
20080198678 | PROGRAMMABLE SRAM SOURCE BIAS SCHEME FOR USE WITH SWITCHABLE SRAM POWER SUPPLY SETS OF VOLTAGES - A memory circuit has a high voltage and low voltage supply nodes. One of a first and second sets of voltages is selectively applied to the supply nodes of the memory circuit in dependence upon memory operational mode. If in active read/write mode, then the first set of voltages is selectively applied. Conversely, if in standby no-read/no-write mode, then the second set of voltages is selectively applied. A low voltage in the second set of voltages is greater than a low voltage in the first set of voltages by a selected one of a plurality of low offset voltages, and a high voltage in the second set of voltages is less than a high voltage in the first set of voltages by a selected one of a plurality of high offset voltages. The offset voltages are provided by diode-based circuits that are selectively active. Selective activation is provided by either selectably blowable fuse elements or selectively activated switching elements. | 2008-08-21 |
20080198679 | SRAM WITH SWITCHABLE POWER SUPPLY SETS OF VOLTAGES - A circuit includes a memory cell having a high voltage supply node and a low voltage supply node. Power multiplexing circuitry is provided to selectively apply one of a first set of voltages and a second set of voltages to the high and low voltage supply nodes of the cell in dependence upon a current operational mode of the cell. If the cell is in active read or write mode, then the multiplexing circuitry selectively applies the first set of voltages to the high and low voltage supply nodes. Conversely, if the cell is in standby no-read or no-write mode, then the multiplexing circuitry selectively applies the second set of voltages to the high and low voltage supply nodes. The second set of voltages are offset from the first set of voltages. More particularly, a low voltage in the second set of voltages is higher than a low voltage in the first set of voltages, and wherein a high voltage in the second set of voltages is less than a high voltage in the first set of voltages. The cell can be a member of an array of cells, in which case the selective application of voltages applies to the array depending on the active/standby mode of the array. The array can comprise a block or section within an overall memory device including many blocks or sections, in which case the selective application of voltages applies to individual blocks/sections depending on the active/standby mode of the block/section itself. | 2008-08-21 |
20080198680 | SEMICONDUCTOR MEMORY DEVICE HAVING INPUT/OUTPUT SENSE AMPLIFICATION CIRCUIT WITH REDUCED JUNCTION LOADING AND CIRCUIT LAYOUT AREA - A semiconductor memory device includes an input/output sense amplifier that amplifies a read data and provides it to the external, when making a read operation. The semiconductor memory device includes a plurality of sense amplifiers that amplify data transferred from each bank and output them as amplified signals; a controller that judges the output states of the amplified signals in each sense amplifier to output driving signals corresponding to the output amplified signals; and a driver that drives an global input/output line with the driving signal, wherein the first and second sense amplifiers share the one driver, making it possible to reduce ‘tAA’ and get an advantage of a layout area. | 2008-08-21 |
20080198681 | MULTIPLE PORT MEMORY WITH PRIORITIZED WORD LINE DRIVER AND METHOD THEREOF - A multiple port memory has a word line driver that provides a word line signal to access a first write port of a multiple port memory cell in an array of multiple port memory cells during a write operation. A first logic circuit has a first input for receiving a first port selection signal, a second input for receiving a disable signal, and an output. A buffer circuit has an input coupled to the output of the first logic circuit, and an output for providing the word line signal. The disable signal is asserted to prevent the word line driver from accessing the first write port when a second write port of the multiple port memory cell is accessed during the write operation and the second write port has a higher priority than the first write port. | 2008-08-21 |
20080198682 | SEMICONDUCTOR DEVICE AND METHOD FOR SELECTION AND DE-SELECTION OF MEMORY DEVICES INTERCONNECTED IN SERIES - A system includes a plurality of memory devices connected in-series that communicate with a memory controller. When a memory device receives a command strobe signal indicating the start of a command having an ID number, the memory device is placed in a de-selected state and the ID number is compared to the memory device's device address. Delayed versions of the command strobe signal and the command are forwarded while the memory device is in the de-selected state. If the ID number matches the device address with reference to the ID number, the memory device is placed in a selected state. In the selected state, the memory device may refrain from forwarding the delayed versions of the command strobe signal and the command, such that if there is a match, a truncated part of the command is forwarded before the memory device is placed in the selected state. | 2008-08-21 |
20080198683 | Semiconductor memory apparatus - A semiconductor memory that includes a row decoder part, a first cell array placed on either side of the row decoder part, a second cell array placed on the other side of the row decoder part, and a wiring layer that short-circuits word lines corresponding to a specified row address on the first cell array with word lines corresponding to a specified row address on the second cell array. | 2008-08-21 |
20080198684 | Semiconductor memory integrated circuit - A semiconductor memory integrated circuit having an X-row controller which includes a high-speed-operation control circuit by which when receiving a bank active signal, a period for stopping a latch circuit from receiving the X address is produced after a predetermined time has elapsed, and in the other periods, the latch circuit receives and holds the X address; a low-current-operation control circuit by which when receiving no bank active signal, the latch circuit stops receiving the X address, and when receiving the bank active signal, the latch circuit holds the X address after a predetermined time has elapsed; a circuit for selecting whether the bank active signal is output to the high-speed-operation control circuit or the low-current-operation control circuit; and a circuit for selecting whether the latch-circuit control signal from the high-speed-operation control circuit or the latch-circuit control signal from the low-current-operation control circuit is output to the latch circuit. | 2008-08-21 |
20080198685 | Method of Preparing Sea Bed for Jack Up Rig Deployment - A method of filling seabed holes involves vessels that locate the holes with sonar and one of which has onboard capabilities for storage of a solid and mixing it with liquid to create a pumpable slurry. The slurry is delivered through a coiled line that is fed out overboard and the end of the line is held in position by maintaining the vessel at the desired location during slurry pumping. The hose end can be held fixed or progressively raised during slurry delivery, depending on the starting depth. The hose further has an end feature that counteracts the tendency of the hose to whip from the force created by the pumped slurry exiting the end. The slurry encounters a plate at the hose end with lateral exits preferably equally spaced circumferentially to maintain the hose end in a steady position as the slurry is delivered. | 2008-08-21 |
20080198686 | POWER SYSTEM FOR A CONCRETE TRUCK DRUM - A power take-off unit is connected to a power take-off gear/port on a concrete mixing truck transmission, the power take-off unit being driven by the engine so it is always providing power as long as the engine is running. A hydraulic pump is connected to and driven by the power take-off unit. Hydraulic lines connect the pump to a planetary drive assembly for the concrete mixing drum; the drum itself is capable of receiving only a small/light load of concrete, in the range of two to five cubic yards. | 2008-08-21 |
20080198687 | Extruder - An extruder for viscous masses, and including an extruder screw and a positive-displacement gear pump disposed downstream of the extruder screw as viewed in the conveying direction. The positive-displacement gear pump has at least one conveying gear and at least one positive-displacement gear. The axis of the conveying gear is disposed essentially at right angles to the axis of the extruder screw, and the axis of the positive-displacement gear is disposed essentially in the same direction as the axis of the extruder screw. | 2008-08-21 |
20080198688 | BLEND SOUP MAKER - A blend soup maker ( | 2008-08-21 |
20080198689 | Apparatus and process for mixing at least two fluids - The apparatus comprises a first fluid line for conducting an intermittently flowing first fluid and a second fluid line for conducting an intermittently flowing second fluid, the two fluid lines being connected at a junction to a third fluid line, which forwards the two, particularly mixed, fluids. Further, the apparatus comprises a first flow adjuster, inserted in the first fluid line for setting a volumetric or mass flow rate of the first fluid, and a second flow adjuster, inserted in the second fluid line for setting a volumetric or mass flow rate of the second fluid, as well as apparatus for generating a first control signal, representing an instantaneous setting value for the first flow adjuster, and a second control signal, representing an instantaneous setting value for the second flow adjuster. To produce the fluid mixture, the first fluid and the second fluid are made to flow into the third fluid line alternately. The invention is particularly suited for mixing fluids having different viscosities. | 2008-08-21 |
20080198690 | Mixing Device - A device is provided for mixing mixable and unmixable liquids and/or producing emulsions, which has a first connection to a pressure-operated system and second connection for supplying the liquid to be admixed and which is sucked in by the flow of the pressurized liquid. | 2008-08-21 |
20080198691 | Blender/food processor blade arrangement for small throated blender jars - A blade assembly suited for both blending and food processing in small throat blender jars is provided. The blade assembly comprises a plurality of blade forms each designed to perform a specific blending or processing task while simultaneously working together and with the geometric restrictions of the jar to optimize the assembly's capability to crush ice, blend or mix liquids and/or semi-solid materials, and to chop, cut, or slice solid food items without the need for user interaction to clear compacted items from the blades and/or the walls or bottom of the jar during its operation. The improved performance also serves the beneficial side effect of improved bearing and motor life in the blender/food processor. | 2008-08-21 |
20080198692 | MIXING MACHINE AND ASSOCIATED BOWL GUARD SYSTEM - A mixer may include one or more of (i) a readily installable and removable bowl guard member, (ii) a bowl guard sensor arrangement, (iii) a bowl guard support ring assembly including a plastic part and a metal part, (iv) a bowl guard support ring assembly and bowl guard member that interact for limiting movement of the bowl guard member. | 2008-08-21 |
20080198693 | Blender Arm and Food Processor - A blender arm ( | 2008-08-21 |
20080198694 | Patch test for 3D sonar data - A method of automatically performing a patch test for a sonar system is disclosed, where data from a plurality of overlapping 3D sonar scans of a surface as the platform is moved are used to compensate for biases in mounting the sonar system on the platform. | 2008-08-21 |
20080198695 | System and method for using acoustic field parameters for communication - A system and a method for conveying data using the vector components of the acoustic field, in addition to the scalar component is described. Receivers capable of determining the transmitted data values by measuring one or more parameters of an acoustic field are utilized. Measured parameters of the acoustic field may include both the scalar and vector components. The described system and method may optimize the conveyance of communications through a fluid. | 2008-08-21 |
20080198696 | Timepiece - The invention concerns a timepiece comprising a dial provided with means ( | 2008-08-21 |
20080198697 | Analog radio-controlled timepiece - There is provided an analog radio-controlled timepiece made so as to be capable of performing a time difference correction by a simple operation while maintaining an operability of a time difference correction timepiece. A radio reception section receives, through an antenna, information of a minute and a second in a time code included in a standard radio, and an operation section corrects only a minute hand and a second hand to the minute and the second, which were received. A correction of an hour hand is performed by operating a crown included in a time difference correction mechanism. | 2008-08-21 |
20080198698 | WIRELESS SYNCHRONOUS TIME SYSTEM - A wireless synchronous time keeping system includes a primary device and a secondary device. The primary device includes a receiving unit to receive a first signal having a time component, a processor coupled to the receiving unit and operable to process the signal to produce a processed time component, an internal clock to store the processed time component and to increment the component thereafter to produce a first internal time, and a transmitting unit to transmit a second signal having the first internal time and an event having an instruction and a time element. The secondary device includes a transceiving unit to receive the second signal and transmit a third signal, an internal clock to store the first internal time and to increment the internal time to produce a second internal time, and an event switch operable to execute the instruction when the second internal time matches the time element. | 2008-08-21 |
20080198699 | METHOD FOR BUILT IN SELF TEST FOR MEASURING TOTAL TIMING UNCERTAINTY IN A DIGITAL DATA PATH - A circuit for measuring timing uncertainty in a clocked digital path and in particular, the number of logic stages completed in any clock cycle. A local clock buffer receives a global clock and provides a complementary pair of local clocks. A first local (launch) clock is an input to a delay line, e.g., 3 clock cycles worth of series connected inverters. Delay line taps (inverter outputs) are inputs to a register that is clocked by the complementary clock pair to capture progression of the launch clock through the delay line and identify any variation (e.g., from jitter, VDD noise) in that progression. Global clock skew and across chip gate length variation can be measured by cross coupling launch clocks from a pair of such clock buffers and selectively passing the local and remote launch clocks to the respective delay lines. | 2008-08-21 |
20080198700 | DUTY CYCLE MEASURMENT CIRCUIT FOR MEASURING AND MAINTAINING BALANCED CLOCK DUTY CYCLE - A circuit for measuring timing uncertainty in a clocked digital path and in particular, the number of logic stages completed in any clock cycle. A local clock buffer receives a global clock and provides a complementary pair of local clocks. A first local (launch) clock is an input to a delay line, e.g., 3 clock cycles worth of series connected inverters. Delay line taps (inverter outputs) are inputs to a register that is clocked by the complementary clock pair to capture progression of the launch clock through the delay line and identify any variation (e.g., from jitter, VDD noise) in that progression. Global clock skew and across chip gate length variation can be measured by cross coupling launch clocks from a pair of such clock buffers and selectively passing the local and remote launch clocks to the respective delay lines. | 2008-08-21 |
20080198701 | Timepiece - In order to counter the effects of the Earth's gravitational force on the operation of a watch movement, the timepiece includes an escapement mechanism designed to drive a finish gear-train of a watch movement which defines a reference plane, and a balance co-operating with the escapement mechanism. Particularly, the balance is mounted in a frame ( | 2008-08-21 |
20080198702 | Analogue Display Member Made of Crystalline Material, Timepiece Fitted Therewith and Method for Fabricating the Same - The invention proposes an analogue display member ( | 2008-08-21 |
20080198703 | Children's time signal - A children's time signal device whereby a parent can set a predetermined time of day or period of time at which a decorative feature of the face plate would illuminate, such as a clown's nose on a clown face plate, to be used to teach and inform a child or toddler when to start or stop an activity, when to get up from a nap, as a meal-time signal informing the toddler when meal time occurs, or as a discipline timer, informing the toddler when the time-out discipline ends. | 2008-08-21 |
20080198704 | Methods and Systems for Providing a Moveable Cover for a Timepiece - Embodiments of the invention can provide systems and methods for providing a moveable cover for a timepiece. In one embodiment, a timepiece includes a housing with a display face capable of displaying a time. The timepiece can also include a plurality of covers each capable of covering a portion of the display face, wherein each cover is moveable between an open and a closed position, and wherein the display face can be viewed when the covers are in an open position and the display face can be covered when the covers are in a closed position. Furthermore, the timepiece can include a control device capable of manipulating the plurality of covers between the open and closed positions. | 2008-08-21 |
20080198705 | Recording apparatus, recording method and program - A recording apparatus including: a receiving portion for receiving a content data sent using radio wave; a recording portion for recording the content data received by the receiving portion in a storage medium; a determining portion for determining whether or not a receiving status of the content data by the receiving portion satisfies a predetermined standard; and a control portion for when the determining portion determines that the standard is not satisfied, controlling the recording portion to stop recording of the content data to the storage medium. | 2008-08-21 |
20080198706 | BUFFER MANAGEMENT METHOD AND OPTICAL DISC DRIVE - An optical disc drive is provided, mainly comprising a buffer, a processor and a driving module for accessing an optical disc. The optical disc drive receives a plurality of write commands. Each write command comprises a data block and a destination address. The buffer buffers data blocks to be recorded to the optical disc with corresponding write commands in either a random mode or a sequential mode. The processor schedules a recording operation based on the write commands, and selectively switches the buffer to the random mode or to the sequential mode based on arrangements of data blocks buffered in the buffer. The driving module is controlled by the processor to perform the recording operation, whereby the data blocks are recorded to the optical disc when a start recording condition is met. Specifically, the start recording condition varies with the random or sequential modes. | 2008-08-21 |
20080198707 | OPTICAL PICK-UP AND DISC APPARATUS HAVING THE SAME - An optical pick-up and a disc apparatus having the same to overcome an inferiority of a tracking signal caused by an adjacent layer during the recording and/or reproducing of an optical disc with multiple recording layers, the optical pick-up including: a light source to emit light with a wavelength corresponding to a type of the optical disc; a light collecting unit to focus the light emitted from the light source to form a light spot on a signal recording layer of an optical disc having a plurality of recording layers; a photodetector to receive a signal light reflected by the signal recording layer and a noise light reflected by an adjacent recording layer different from the signal recording layer, and to detect a signal from the signal light; and an optical member to change an optical transmission of the noise light according to an incident angle of the noise light so as to decrease an intensity of the noise light entering the photodetector. | 2008-08-21 |
20080198708 | OPTICAL PICK-UP AND DISC APPARATUS HAVING THE SAME - An optical pick-up and a disc apparatus having the same. The inferiority of a tracking signal caused by an adjacent layer during the recording and/or reproducing of an optical disc with multiple recording layers is effectively prevented. The optical pickup includes a light source to emit light with a predetermined wavelength, a light collecting unit to collect the light emitted from the light source to form a light spot on a signal recording layer of an optical disc having a plurality of recording layers, a photodetector to receive the light reflected by the optical disc to detect a signal, and an optical member to change the optical transmission of the light reflected by the optical disc according to an incident angle of the reflected light to decrease an optical transmission of a noise light entering the photodetector. | 2008-08-21 |
20080198709 | RANDOM ACCESS CONTROL METHOD AND OPTICAL DISC DRIVE - A random access control method is provided, implemented in an optical disc drive for recording data to an optical disc. In the optical disc drive, a buffer stores a plurality of write commands each associated with a data block bound to a destination address. A processor controls the buffer to build a disc write task from the write commands in which addresses are organized in order. A drive unit is controlled by the processor, performing a recording operation to record the data blocks to the optical disc according to the disc write task; wherein the processor further controls the drive unit to verify the recorded data blocks after completing the recording operation. | 2008-08-21 |
20080198710 | Drive Device - A drive apparatus of the present invention includes a recording/reproduction section and a drive control section. The drive control section at least performs a process including: performing an RMW process of reproducing data recorded in an original ECC cluster including the location specified by the recording instruction, modifying at least a portion of the reproduced data, and recording the modified data in a replacement ECC cluster; determining whether or not there is any physical sector, in which the reproduction of data has failed, in the original ECC cluster in the RMW process; and setting status information value in status information of replacement management information when it is determined that there is any physical sector, in which the reproduction of data has failed, in the original ECC cluster in the RMW process, the status information value indicating that there is any physical sector, in which the reproduction of data has failed, in the original ECC cluster, the status information indicating that the original ECC cluster is replaced with the replacement ECC cluster. | 2008-08-21 |
20080198711 | Power Calibration Method For Visible Label Recording - In summary, the present invention provides an efficient method of calibrating power for writing visible labels on an optical record medium. If the writing power is too low, the label will have a low contrast, while the image might even disappear after some time. If the writing power is too high, ablation might occur which means that the layer comes off forming blisters or flakes. The present invention solves this problem by providing a calibration method wherein a test pattern is recorded on an optical record medium with different power of the beam of light, the patterns recorded are read back and a reference power value is obtained from the patterns read back using a predetermined criterion. This reference power value obtained is used to calibrate the power needed for writing visible labels on the label side of an optical record medium. | 2008-08-21 |
20080198712 | OPTICAL INFORMATION RECORDING MEDIUM, OPTICAL INFORMATION RECORDING METHOD, AND OPTICAL INFORMATION RECORDING APPARATUS - An information recording medium according to the present invention includes a plurality of recording layers, and a test area for determining a recording power of a laser light for each of the plurality of recording layers, in which a first test area of a first layer and a second test area of a second layer adjacent to the first layer are provided at different radial positions. | 2008-08-21 |
20080198713 | OPTICAL INFORMATION RECORDING MEDIUM, OPTICAL INFORMATION RECORDING METHOD, AND OPTICAL INFORMATION RECORDING APPARATUS - An information recording medium according to the present invention includes a plurality of recording layers, and a test area for determining a recording power of a laser light for each of the plurality of recording layers, in which a first test area of a first layer and a second test area of a second layer adjacent to the first layer are provided at different radial positions. | 2008-08-21 |
20080198714 | OPTICAL INFORMATION RECORDING MEDIUM, OPTICAL INFORMATION RECORDING METHOD, AND OPTICAL INFORMATION RECORDING APPARATUS - An information recording medium according to the present invention includes a plurality of recording layers, and a test area for determining a recording power of a laser light for each of the plurality of recording layers, in which a first test area of a first layer and a second test area of a second layer adjacent to the first layer are provided at different radial positions. | 2008-08-21 |
20080198715 | RECORDING METHOD, REPRODUCTION METHOD, RECORDING APPARATUS, REPRODUCTION APPARATUS, AND INFORMATION RECORDING MEDIUM - A recording method for recording, on a write once type information recording medium, management information representing a recording state of the write once type information recording medium is provided. The information recording medium includes data including a first synchronization signal. The information recording medium has a second synchronization signal pre-recorded by cutting. The recording method includes the steps of (a) performing a recording operation for recording the management information at a predetermined position of the information recording medium based on the first synchronization signal; (b) determining whether the recording operation in step (a) is normally terminated or not; and (c) when the recording operation in step (a) is not normally terminated, performing a recording operation for recording the management information at the predetermined position of the information recording medium based on the second synchronization signal. | 2008-08-21 |
20080198716 | METHOD OF RECORDING DATA TO AN INFORMATION RECORDING MEDIUM - A method of recording data optically to an optical disk having a plurality of sectors, in which each sector has a region to be recorded with data, the data is recorded in units of blocks, and the block includes a predetermined number of sectors and is a data unit including error correction codes. In recording data related to a content by dividing and recording the data in a plurality of sectors continuously, dummy data to be used for extracting a clock in phase lock loop (PLL) for data reproduction is recorded on a region adjacent before a sector from which data recording is started. The data related to the contents is recorded on sectors following the region recorded with the dummy data. | 2008-08-21 |
20080198717 | Aberration Correcting Apparatus, Optical Pickup, and Aberration Correcting Method - A kind of an optical disc is discriminated by a disc discriminating section, an order of aberrations to be corrected is set by an order setting section by the kind of the optical disc, drive of a liquid crystal optical element is controlled by a drive control section through a liquid crystal driver, and an aberration of an optical beam is corrected based on the order of the aberration. The level of importance of the aberration correction differs by the kind of the optical disc, and the order of the aberration is set by the level of importance of the aberration correction. | 2008-08-21 |
20080198718 | RECORDING APPARATUS - A recording apparatus includes a write unit to write information data read from a memory by irradiating a disk medium with a beam in accordance with the information data, and a control unit to, upon the amount of information data stored in the memory reaching a threshold, instruct the write unit to start writing of the information data. In response to the write instruction, the write unit reads the information data stored in the memory and writes the read information data onto the disk medium while it is rotating. Upon the amount of information data in the memory decreasing to a predetermined value, the write unit stops reading and writing of the information data from the memory and onto the disk medium. The control unit sets a value of the threshold in accordance with the number of times the write unit has performed writing of the information data. | 2008-08-21 |
20080198719 | Method and Device for Recording Marks in an Information Layer of an Optical Disc - A method of recording marks onto an optical disc, the optical disc comprising an information layer, by irradiating the information layer by a pulsed radiation beam, a mark (I | 2008-08-21 |
20080198720 | OPTICAL DISK REPRODUCING APPARATUS - The present invention relates to an optical disk reproducing apparatus, and provides a technology capable of supporting even a situation in which a reproduction signal characteristic is changed due to a factor other than recording density of an optical disk by using PRML of different constrained length and capable of improving reading accuracy. The optical disk reproducing apparatus includes a PRML circuit of first constrained length (for example, 4) and a PRML circuit of second constrained length (for example, 5). Equalization error values obtained during calculation of equalization learning in respective circuits are compared with each other in a determination circuit. Switching control of a switch is performed so that an output of one of the PRML circuits having a smaller equalization error value is selected. | 2008-08-21 |
20080198721 | Method of Recording Data on a Dual-Layer Optical Write-Once Disc - The present invention relates to a method of recording data on a dual-layer optical write-once disc ( | 2008-08-21 |
20080198722 | Optical Recording Using Secondary Tracking Method - The present invention is embodied in a method for storing computer readable data on a removable storage medium, including using a first wavelength to write data to the removable storage medium, using a second wavelength to maintain radial tracking on the removable storage medium, wherein the second wavelength is shorter than the first wavelength, and maintaining axial tracking on the removable storage medium with at least one of the first wavelength or the second wavelength. | 2008-08-21 |
20080198723 | Method and Apparatus of Controlling Playback of an Optical Disc Program - A method and apparatus for controlling playback of an optical disc program are provided. The method for controlling playback of an optical disc program comprises the steps of determining an execution condition of a markup sentence corresponding to the optical disc program, judging if the execution condition is a specific execution condition, generating a controlling message if the execution condition is the specific execution condition, wherein the controlling message is used for processing a markup file comprising the sentence based on the specific execution condition, so as to play back of the optical disc program. By the method and apparatus for controlling playback of an optical disc program provided by the present invention, a huge original markup file may be divided into a plurality of markup files. In addition, the preset playback effects will still be retained and at the same time, the occupation of the memory resource, the tedious work for re-editing the markup file and so on can be reduced. | 2008-08-21 |
20080198724 | Method For Recording Data In Holographic Data Storage Systems - The invention relates to a method for recording data in a holographic recording medium ( | 2008-08-21 |
20080198725 | Holographic Storage Medium, Method of Manufacturing a Holographic Storage Medium and Method of Reading Data From a Holographic Storage Medium - The present invention relates to a holographic storage medium ( | 2008-08-21 |
20080198726 | Apparatus and method for recording an information on a recordable optical record carrier using oval spot profile - The present invention relates to a method and a corresponding apparatus for recording an information on a recordable optical record carrier ( | 2008-08-21 |
20080198727 | Optical Pickup Unit for a Desk Drive and Disk Drive Comprising Such an Optical Pick up Unit - An optical pickup unit for an optical disk drive, comprises a lens holder ( | 2008-08-21 |
20080198728 | OPTICAL INFORMATION RECORDING-REPRODUCTION APPARATUS - An optical information recording-reproduction apparatus comprises: a light source; an objective lens and a SIL (solid immersion lens) for focusing a light beam from the light source on an optical recording medium; an aperture element for collecting a part of the light beam reflected by an optical recording medium, corresponding to the effective aperture number of the objective lens and SIL of less than 1; a detecting element for detecting the part of the light beam from the aperture element corresponding to the effective aperture number of less than 1; a speed-generating circuit for reducing the speed of approach of the SIL to the recording medium in accordance with the level of the signal detected by the detecting element; and a driver circuit for driving the objective lens and the SIL in accordance with output from the speed-generating circuit. | 2008-08-21 |
20080198729 | LENS APPARATUS - A lens apparatus has a focusing lens unit, a separating optical unit disposed on an optical axis of the lens apparatus, a focus detection unit that detects focus condition using a light beam from the separating optical unit, a first drive unit that drives the focusing lens unit based on an output of the focus detection unit, and a second drive unit that drives the separating optical unit. An optical separating surface that the separating optical unit has reflectance that varies continuously in a first direction. The second drive unit drives or moves the separating optical unit in the first direction. | 2008-08-21 |
20080198730 | Optical head and apparatus for optically recording and reproducing information - An optical sensor has first light receiving surfaces having respective pentagonal or hexagonal shapes and being independent of each other, and second light receiving surfaces having respective hexagonal shapes and being independent of each other, third light receiving surfaces having respective hexagonal shapes and being independent of each other, fourth light receiving surfaces having respective hexagonal shapes and being independent of each other, and fifth light receiving surfaces having respective hexagonal shapes and being independent of each other. A relationship between a size of each of the light receiving surfaces and a diameter of respective one of light beams received by corresponding one of the light receiving surfaces is set within a predetermined range. A light beam multiple-dividing element diffracts the light beams received by a first grating area to form +primary lights, and diffracts the light beams received by second and third grating areas to form +primary lights and −primary lights. Relationships of U/D and V/D are set within predetermined ranges. | 2008-08-21 |
20080198731 | OPTICAL INFORMATION RECORDING MEDIUM - An optical information recording medium having a disk-shaped substrate formed with spiral grooves on one main surface, and having an optical reflection layer formed with grooves at the surface corresponding to the grooves of the substrate for reflecting a laser beam, an optical recording layer, a protective layer, and an optical transparency layer in this order on the main surface thereof. The optical information recording medium has a main information area and a sub-information area to the inner circumferential side thereof, in which the track pitch TrB of the grooves in the sub-information area is about 0.32 μm or less, and the depth D of the grooves and the half-band width W of the grooves satisfy a relation represented by: W≧2D+70, whereby the difference between the reflectivity at the land surface and the reflectivity at the groove surface in the sub-information area can be restricted to less than 30%, thereby preventing occurrence of mis-decipherment for BCA marks. | 2008-08-21 |
20080198732 | Data Recorder And Data Recording Method, And Computer Program - Additional recording is performed on a recording medium without using a VAT technique. | 2008-08-21 |
20080198733 | INFORMATION STORAGE MEDIUM, INFORMATION RECORDING METHOD, AND INFORMATION REPRODUCING METHOD - According to one embodiment, an information storage medium comprising a lead-in area, and a data area, wherein the lead-in area includes a control data zone storing physical format information which includes first information common to book types, second information peculiar to a book type, and third information peculiar to each kind of second information. The first information includes byte information indicating the book type and a version number, and the second information includes byte information indicating the major digit of a revision number and a disc indicator. | 2008-08-21 |
20080198734 | METHOD OF RECORDING DATA TO AN INFORMATION RECORDING MEDIUM - A method of recording data optically to an optical disk having a plurality of sectors, in which each sector has a region to be recorded with data, the data is recorded in units of blocks, and the block includes a predetermined number of sectors and is a data unit including error correction codes. In recording data related to a content by dividing and recording the data in a plurality of sectors continuously, dummy data to be used for extracting a clock in phase lock loop (PLL) for data reproduction is recorded on a region adjacent before a sector from which data recording is started. The data related to the contents is recorded on sectors following the region recorded with the dummy data. | 2008-08-21 |
20080198735 | METHOD OF RECORDING DATA TO AN INFORMATION RECORDING MEDIUM - A method of recording data optically to an optical disk having a plurality of sectors, in which each sector has a region to be recorded with data, the data is recorded in units of blocks, and the block includes a predetermined number of sectors and is a data unit including error correction codes. In recording data related to a content by dividing and recording the data in a plurality of sectors continuously, dummy data to be used for extracting a clock in phase lock loop (PLL) for data reproduction is recorded on a region adjacent before a sector from which data recording is started. The data related to the contents is recorded on sectors following the region recorded with the dummy data. | 2008-08-21 |
20080198736 | METHOD OF RECORDING DATA TO AN INFORMATION RECORDING MEDIUM - A method of recording data optically to an optical disk having a plurality of sectors, in which each sector has a region to be recorded with data, the data is recorded in units of blocks, and the block includes a predetermined number of sectors and is a data unit including error correction codes. In recording data related to a content by dividing and recording the data in a plurality of sectors continuously, dummy data to be used for extracting a clock in phase lock loop (PLL) for data reproduction is recorded on a region adjacent before a sector from which data recording is started. The data related to the contents is recorded on sectors following the region recorded with the dummy data. | 2008-08-21 |
20080198737 | METHOD OF RECORDING DATA TO AN INFORMATION RECORDING MEDIUM - A method of recording data optically to an optical disk having a plurality of sectors, in which each sector has a region to be recorded with data, the data is recorded in units of blocks, and the block includes a predetermined number of sectors and is a data unit including error correction codes. In recording data related to a content by dividing and recording the data in a plurality of sectors continuously, dummy data to be used for extracting a clock in phase lock loop (PLL) for data reproduction is recorded on a region adjacent before a sector from which data recording is started. The data related to the contents is recorded on sectors following the region recorded with the dummy data. | 2008-08-21 |
20080198738 | Thin film structure with controlled lateral thermal spreading in the thin film - An apparatus includes a magnetic layer, a heat sink layer, and a thermal resistor layer between the magnetic layer and the heat sink layer. The apparatus may be configured as a thin film structure arranged for data storage. The apparatus may also include an interlayer positioned between the magnetic layer and the thermal resistor layer. | 2008-08-21 |
20080198739 | Optical Recording Medium - An optical recording medium records information in a mechanism of generating new material, having reflectance different from that of others in information recording layer, when laser beam is projected thereonto. The optical recording medium includes a substrate, and a reflective layer positioned on the substrate to reflect an entering laser beam and having an information recording layer. The information recording layer includes a first information recording layer containing one or more elements selected from a group of Si, Ge, and Sb, and a second information recording layer containing one or more elements selected from a group of Si, Sb, Te, and Al. Data can be recorded in high density and the optical recording medium provides high recording stability and recording sensitivity. | 2008-08-21 |