35th week of 2010 patent applcation highlights part 36 |
Patent application number | Title | Published |
20100221801 | YEAST WITH INCREASED BUTANOL TOLERANCE INVOLVING A MULTIDRUG EFFLUX PUMP GENE - Increasing tolerance to butanol in yeast has been accomplished by decreasing activity of Pdr5p encoded by an endogenous PDR5 gene. A deletion mutation of the PDR5 gene led to improved growth yield in the presence of butanol. Yeast cells with reduced Pdr5p activity, or other multidrug resistance ATP-binding cassette transporter protein activity encoded by CDR1 or BFR1, and a butanol biosynthetic pathway may be used for improved butanol production | 2010-09-02 |
20100221802 | METHOD FOR PRODUCING BUTANOL USING TWO-PHASE EXTRACTIVE FERMENTATION - A method of making butanol from at least one fermentable carbon source that overcomes the issues of toxicity resulting in an increase in the effective titer, the effective rate, and the effective yield of butanol production by fermentation utilizing a recombinant microbial host wherein the butanol is extracted into specific organic extractants during fermentation | 2010-09-02 |
20100221803 | MATERIAL CONVERSION METHOD USING CELLULOSE-BASED BIOMASS - It is an object of the present invention to develop a conversion method for easily obtaining a useful substance such as ethanol from a cellulose-based biomass at a good yield via enzyme reaction and microbial fermentation. It has been found that the conversion efficiency can be increased with the use of hard balls or the like when a cellulose-based biomass is converted into sugar with the use of enzyme(s) and then a useful substance such as ethanol with the use of microorganism(s). | 2010-09-02 |
20100221804 | BIOGAS APPARATUS AND BIOGAS PRODUCTION PROCESS FOR INTEGRATION WITH AN ETHANOL PRODUCTION SYSTEM AND PROCESS - An integrated system produces ethanol and biogas from raw plant materials. The system includes a pretreatment apparatus for converting raw plant materials into sugars and a fermenter for fermenting the sugars to produce a beer including ethanol. A distillation apparatus separates the beer into the ethanol and a whole stillage, and a separator then separates the whole stillage into a thin stillage and wet distillers grains. A biogas apparatus processes a first portion of the thin stillage to produce biogas and a biogas effluent, and converts a percentage of the non-fermentable solids and organic acids in the thin stillage into biogas. The pretreatment apparatus is supplied with an amount of fresh water and an amount of backset, the backset including the biogas effluent recycled from the biogas apparatus to the pretreatment apparatus. | 2010-09-02 |
20100221805 | METHODS FOR PRODUCING FERMENTATION PRODUCTS - The invention relates to methods for producing a fermentation product from a lignocellulose-containing material comprising: i) pre-treating lignocellulose-containing material; ii) introducing pre-treated lignocellulose-containing material into medium comprising fermentable sugars derived from starch-containing material; ii) fermenting using a fermenting organism. | 2010-09-02 |
20100221806 | APPARATUS AND METHOD FOR GROWING PLANTS, A BIOMASS, OR MICRORGANISMS IN WATER THROUGH PHOTOSYNTHESIS - Presented is an apparatus for growing plants, a biomass, or a microorganism through photosynthesis. The apparatus includes a hollow tube-like structure of flexible transparent material having a first end, a second end, and a middle section, and defining an interior for receiving, through one of the ends, an aqueous solution, a gas comprising carbon dioxide, and at least one of seeds of the plants, a sample of the biomass, and a sample of the microorganism to be grown. The apparatus further includes a support connected to the first or second end of the tube-like structure for positioning the first or second end at a height above the middle section, and an agitator connected to the tube-like structure to impart motion to the aqueous solution in the interior such that when the tube-like structure is exposed to electromagnetic radiation, growth of the plants, biomass, or microorganism occurs through photosynthesis. | 2010-09-02 |
20100221807 | CELLULASE ENZYME AND METHOD FOR PRODUCING THE SAME - This invention provides a cellulase enzyme derived from intestinal symbiotic protists of insects selected from the group consisting of | 2010-09-02 |
20100221808 | POLYSIALIC ACID DERIVATIVES - A polysialic acid compound is reacted with a hetero-bifunctional reagent to introduce a pendant functional group for site-specific conjugation to sulfhydryl groups, for instance side chains of cysteine units in drugs, drug delivery systems, proteins or peptides. The functional group is, for instance, an N-maleimide group. | 2010-09-02 |
20100221809 | Compositions and Methods for the Isolation of Biologically Active Proteins - This invention is directed to compositions and methods for the isolation and further characterization of eukaryotic, mammalian, and/or human PC-PLC. In addition, the present invention discloses methods for the synthesis of an affinity chromatography resin for the isolation and purification of biologically active proteins, including eukaryotic PC-PLC. | 2010-09-02 |
20100221810 | NOVEL DIGLYCOSIDASE AND GENE ENCODING THE SAME - A novel diglycosidase produced by a microorganism belonging to the genus | 2010-09-02 |
20100221811 | RECOMBINANT ADENOVIRUS USEFUL FOR TREATING MALIGNANCY OVER-EXPRESSING PROTO-ONCOGENE NEU/ERB B2 - A recombinant adenovirus is applied for treating malignancy of over-expressing proto-oncogene neu/erbB2, wherein an expression cassette, which co-expresses the humanized monoclonal antibody variable region gene of anti proto-oncogene neu/erbB2 and the Mda-7/IL-24 gene, is inserted into E1 deletion region of the recombinant adenovirus. The recombinant adenovirus effectively treats the malignancy of overexpressing proto-oncogene neu/erbB2 without damaging normal cells, such that the recombinant adenovirus is able to be used for the gene therapy of malignancy tumors over-expressing proto-oncogene neu/erbB2. | 2010-09-02 |
20100221812 | PRODUCTION OF GENETICALLY MODIFIED ACTINOMYCETES BY RECOMBINATION - The present invention relates to the recombinant modification of microorganisms, in particular actinomycetes. This is effected with the use of the recombination systems Dre-rox and Cre-lox. The present invention provides novel nucleotide sequences for the recombinases of the abovementioned recombination systems. Here, synthetic genes which have the codons preferred by actinomycetes and can therefore be used in these host organisms were produced. | 2010-09-02 |
20100221813 | Regulation of heterologous recombinant protein expression in methylotrophic and methanotrophic bacteria - Methylotrophic or methanotrophic bacteria such as | 2010-09-02 |
20100221814 | TEMPERATURE CONTROL METHOD AND SYSTEM - For heating or cooling a sample contained in a vessel portion through a heat transfer member held in contact with the vessel portion, there is used the vessel portion, which has a part formed of an elastic member, expands and contracts for injection and discharge of the sample, is closed other than a connecting port with a channel connected to the vessel, and expands and contracts for injection and discharge of the sample. The vessel portion expands correspondingly to the injection when the sample is injected through an inflow path serving as the channel into the vessel portion contracting in a non-contacting state with the heat transfer member. A predetermined amount of sample is injected into the vessel portion so as to expand the vessel portion, and the vessel portion comes into contact with the heat transfer member. The vessel portion is heated or cooled through the heat transfer member. | 2010-09-02 |
20100221815 | SUBSTRATES, DEVICES, AND METHODS FOR QUANTITATIVE LIQUID CRYSTAL ASSAYS - The present invention relates to the field of molecular diagnostics, and in particular to diagnostics based on a liquid crystal assay format. In particular, the present invention provided improved substrates and methods of using liquid crystal assays for quantitating the amount of an analyte in a sample. The present invention also provides materials and methods for detecting non-specific binding of an analyte to a substrate by using a liquid crystal assay format. | 2010-09-02 |
20100221816 | REACTION KIT - Disclosed is a reaction kit for preventing the entry of foreign matter into a reaction plate from the outside and the pollution of a surrounding environment. The reaction kit includes: a reaction plate ( | 2010-09-02 |
20100221817 | Whole-Cell Sensor - The invention relates to whole-cell sensors for monitoring bioavailable nitrogen, phosphorus and sulphur, individually or in at least one combination in a medium, and to the use thereof. The whole-cell sensors consist of genetically modified yeast cells which are immobilised in a xerogel matrix and contain at least one marker gene controlled by a promoter of a gene, the transcription of said gene being significantly increased or reduced in the absence of nitrogen, phosphorus or sulphur, and the yeast cells are at least coupled to a signal detector. | 2010-09-02 |
20100221818 | Device for the extemporaneous preparation of active preparations - The invention relates to an autonomous portable device for the storage of at least two formulations and for the automatic extemporaneous preparation of an active solution from the two formulations, said device comprising: a first compartment for containment of a first formulation, a second compartment for containment of a second formulation, a retaining chamber which communicates at least with the first compartment by means of at least one transfer channel and which comprises at least one outlet channel for the active solution, manually triggered mixing and expelling means suitable for, after triggering, automatically: bringing the two formulations into contact, and expelling, via the outlet channel, at least a part of the active solution at the end of a minimum reaction time. | 2010-09-02 |
20100221819 | UPFLOW HYDROLYSIS REACTOR SYSTEM FOR HYDROLYZING CELLULOSE - A process for the enzymatic hydrolysis of cellulose to produce a hydrolysis product from a pre-treated cellulosic feedstock is provided. The process comprises introducing an aqueous slurry of the pre-treated cellulosic feedstock at the bottom of a hydrolysis reactor. Axial dispersion in the reactor is limited by avoiding mixing and maintaining an average slurry flow velocity of about 0.1 to about 20 feet per hour, such that the undissolved solids flow upward at a rate slower than that of the liquid. Cellulase enzymes are added to the aqueous slurry before or during the step of introducing. An aqueous stream comprising hydrolysis product and unhydrolyzed solids is removed from the hydrolysis reactor. Also provided are enzyme compositions which comprise cellulase enzymes and flocculents for use in the process. In addition, a kit comprising cellulase enzymes and flocculent is provided. | 2010-09-02 |
20100221820 | Use of triplex structure DNA in transferring nucleotide sequences - The invention concerns a recombinant vector characterised in that it comprises a polynucleotide comprising a central initiation cis-active region (cPPT) and a termination cis-active region (CTS), said regions being of retroviral or retroviral-like origin, said vector further comprising a predetermined nucleotide sequence (transgene or nucleotide sequence of interest) and retranscription regulating, expressing and packaging signals of retroviral or retroviral-like origin. | 2010-09-02 |
20100221821 | METHODS AND COMPOSITIONS RELATED TO RIBOSWITCHES THAT CONTROL ALTERNATIVE SPLICING AND RNA PROCESSING - Disclosed are methods and compositions related to riboswitches that control alternative splicing. | 2010-09-02 |
20100221822 | Humanized and chimeric antibodies specific for lipoteichoic acid of gram positive bacteria - The present invention encompasses monoclonal and chimeric antibodies that bind to lipoteichoic acid of Gram positive bacteria. The antibodies also bind to whole bacteria and enhance phagocytosis and killing of the bacteria in vitro and enhance protection from lethal infection in vivo. The mouse monoclonal antibody has been humanized and the resulting chimeric antibody provides a previously unknown means to diagnose, prevent and/or treat infections caused by gram positive bacteria bearing lipoteichoic acid. This invention also encompasses a peptide mimic of the lipoteichoic acid epitope binding site defined by the monoclonal antibody. This epitope or epitope peptide mimic identifies other antibodies that may bind to the lipoteichoic acid epitope. Moreover, the epitope or epitope peptide mimic provides a valuable substrate for the generation of vaccines or other therapeutics. | 2010-09-02 |
20100221823 | METHOD FOR CULTURING MAMMALIAN CELLS TO IMPROVE RECOMBINANT PROTEIN PRODUCTION - The present invention relates to methods for mammalian cell culture, wherein the methods make use of media containing polyamines, such as putrescine, spermidine and spermine. | 2010-09-02 |
20100221824 | Methods and compositions for transposition using minimal segments of the eukaryotic transformation vector piggyBac - The present invention provides a method for transforming an insect genome that has a much enhanced transformation frequency. The vectors and plasmids employed in the method are further described as transposition vectors that include a minimal amount of nucleotide sequence homologous to a 5′ region and a 3′ region of a native piggyBac nucleic acid sequence. The transformed cells or embryos may also be developed into transgenic organisms. Disclosed are minimal piggyBac-based plasmid constructs that comprises a minimal nucleic acid sequence homologous to a 5′ end of a piggyBac nucleic acid sequence (about 60-80 bp, particularly 66 bp) and a relatively long (300 to about 380 bp, particularly 311 by or 378 bp) continuous nucleic acid sequence homologous to a 3′ end of a piggyBac native nucleic acid sequence. Methods employing these constructs include the use of a helper plasmid. Transformation frequencies employing the constructs are enhanced 100-fold or higher over that transformation frequency obtained using other than the herein described constructs. | 2010-09-02 |
20100221825 | AVIAN CELL LINES USEFUL FOR THE PRODUCTION OF SUBSTANCES OF INTEREST - The present invention relates to a method for producing avian cell lines, comprising gradual or complete withdrawal of growth factors, serum and/or feeder layer so that the established lines are adherent or nonadherent cells capable of proliferating indefinitely in a basic culture medium. The invention also relates to the cells derived from such lines which are particularly useful for the production of substances of interest. | 2010-09-02 |
20100221826 | INFECTIOUS cDNA CLONE OF THE MODIFIED LIVE VIRUS VACCINE STRAIN OF EQUINE ARTERITIS VIRUS - An isolated polynucleotide molecule includes a DNA sequence encoding an infectious RNA molecule encoding a modified live viral strain of an Equine arteritis virus, wherein the DNA sequence is SEQ ID NO:1 or a degenerate variant thereof. Also provided are transformed or transfected host cells including that sequence, vectors including the sequence, and isolated infectious RNA molecules encoded by the sequence. Further, a modified DNA sequence encoding an infectious RNA molecule encoding a modified live viral strain of an Equine arteritis virus is provided wherein the DNA sequence is SEQ ID NO:2 or a degenerate variant thereof, including a si lent point mutation allowing distinguishing the modified sequence from the parent and other strains of Equine arteritis virus. | 2010-09-02 |
20100221827 | METHODS FOR REPROGRAMMING SOMATIC CELLS - The invention provides methods for reprogramming somatic cells to generate multipotent or pluripotent cells. Such methods are useful for a variety of purposes, including treating or preventing a medical condition in an individual. The invention further provides methods for identifying an agent that reprograms somatic cells to a less differentiated state. | 2010-09-02 |
20100221828 | RECOMBINANT CELL CLONES HAVING INCREASED STABILITY AND METHODS OF MAKING AND USING THE SAME - Disclosed are a stable recombinant cell clones which are stable in serum- and protein-free medium for at least 40 generations, a biomass obtained by multiplying the stable cell clone under serum- and protein-free culturing conditions, and a method of preparing recombinant proteins by means of the biomass. Furthermore, the invention relates to a method of recovering stable recombinant cell clones. | 2010-09-02 |
20100221829 | Media for culturing stem cells - Well-defined, xeno-free culture media which comprise a TGF-beta isoform or the chimera formed between IL6 and the soluble IL6 receptor (IL6RIL6), which are capable of maintaining stem cells, and particularly, human embryonic stem cells, in an undifferentiated state are provided. Also provided are cell cultures comprising the culture media and the stem cells and methods of expanding and deriving embryonic stem cells in such well-defined, xeno-free culture media. In addition, the present invention provides methods of differentiating ESCs or EBs formed therefrom for the generation of lineage specific cells. | 2010-09-02 |
20100221830 | Device and Method for Ambient Storage of Fresh/Frozen Tissue Sections Via Desiccation - The present invention discloses a method for storing and preserving previously sectioned, snap-frozen, and desiccated biological tissue samples at ambient conditions. Also disclosed are devices and systems for ambient storage of biological tissue sections, and methods for forming said devices. | 2010-09-02 |
20100221831 | LIVING BODY HOLDING METHOD, LIVING BODY TEST METHOD, LIVING BODY GROWING METHOD, LIVING BODY HOLDING SHEET, AND LIVING BODY PROCESSING DEVICE - A method of arranging a large number of living bodies, such as cells, embryos, or organisms rapidly, individually, and one by one, a holding sheet for the method, and a device for processing the living bodies. The method of holding living bodies includes using a sheet in which multiple through-holes with a size capable of holding one of the target living bodies, but not capable of holding two or more of the living bodies, are provided, to thereby arrange and hold the living bodies one by one in the multiple through-holes in the sheet together with a liquid. | 2010-09-02 |
20100221832 | ADSORBENT FOR LYMPHOCYTE PROLIFERATION INHIBITOR AND TREATING METHOD - The invention has for its object to provide a porous material capable of relieving the lymphocyte proliferation inhibition in lymphocyte culture and improving the proliferative nature of lymphocytes as well as a method for proliferating lymphocytes and a method for producing lymphocytes each of which utilizes such porous material. | 2010-09-02 |
20100221833 | PROCESS FOR DIFFERENTIATION OF VASCULAR ENDOTHELIAL PROGENITOR CELLS FROM EMBRYOID BODIES DERIVED FROM EMBRYONIC STEM CELLS USING HYPOXIC MEDIA CONDITION - The present invention provides a process for differentiation of vascular endothelial progenitor cells from embryoid bodies derived from embryonic stem cells, the process comprising: (a) treating a culture medium comprising embryoid bodies derived from embryonic stem cells such that the concentration of oxygen dissolved in the culture medium is in the range of about 1 ppm to about 5 ppm; (b) culturing the culture medium prepared in step (a) in an incubator in which the oxygen (O | 2010-09-02 |
20100221834 | LIQUID CRYSTALLINE SUBSTRATES FOR CULTURING CELLS - The present invention is directed to liquid crystalline substrates useful in the culture of cells and methods of their use. In certain embodiments, the invention provides methods and devices for imaging changes (e.g., reorganization) of extracellular matrix components by living cells. | 2010-09-02 |
20100221835 | METHOD FOR CARTILAGE TISSUE REGENERATION VIA SIMULATED MICROGRAVITY CULTURE USING SCAFFOLDS - This invention relates to a method for cartilage tissue engineering using scaffolds in simulated microgravity culture. This invention enables engineering of homogeneous cartilage tissue using bone marrow cells in a more rapid manner in a simulated microgravity environment, while allowing control of the configuration of the resulting cartilage tissue. | 2010-09-02 |
20100221836 | SOL-GEL MATERIALS FOR CELLULAR MODULATION - A modified sol-gel material and method of making the same is provided herein. More particularly, sol-gels disclosed herein have been modified to have one or more bioactive peptides covalently bound to the surface of the sol-gel. In one embodiment the peptide presenting sol-gels are prepared as thin film coatings and in a further embodiment the sol-gels are combined with living cells. The present disclosure is also directed to a novel one vessel reaction process for preparing the sol-gel-based peptide material. | 2010-09-02 |
20100221837 | METHOD FOR EXAMINING ION-CONDUCTIVE ELECTROLYTE MEMBRANE - A light-control membrane ( | 2010-09-02 |
20100221838 | DIALYSIS ADAPTER CELL AND METHOD OF USE - A dialysis adapter cell includes a housing comprising a plurality of pillars extending between and attached to a top plate and a bottom plate to form a hollow receptacle, wherein the top plate comprises an aperture configured to provide access to the hollow receptacle; a dialysis membrane disposed about the housing and sealingly engaged to the top plate and the bottom plate; and a platform in physical communication with the bottom plate and configured to position the dialysis adapter cell in a sample holder of a United States Pharmacopoeia dissolution apparatus 4 flow-through cell. | 2010-09-02 |
20100221839 | Metal Abstraction Peptide (MAP) Tag and Associated Methods - Compositions comprising a tripeptide having the sequence XC | 2010-09-02 |
20100221840 | METHODS FOR TESTING FOR AND INHIBITING THE DEVELOPMENT OF HUNTINGTON'S DISEASE - This invention relates to Huntington's disease and more specifically to methods for testing and inhibiting the development of Huntington's disease. | 2010-09-02 |
20100221841 | SEMICONDUCTOR DNA SENSING DEVICE AND DNA SENSING METHOD - A semiconductor DNA sensing device is provided herein, which includes a detection section with a field-effect transistor including a semiconductor substrate and a first insulator layer formed thereon as a reactive gate insulator, the first insulating layer including silicon oxide or an inorganic oxide, a first organic monolayer formed on the first insulator layer, the first organic monolayer comprising an organic molecule having a reactive functional group, and a probe DNA containing 3 to 35 nucleotides bonded to the first organic monolayer by the reactive functional group either directly or by an intervening crosslinker, the structure of the probe DNA/the first organic monolayer/the insulating layer/the semiconductor constituting the detection section. | 2010-09-02 |
20100221842 | SENSOR DEVICE FOR THE DETECTION OF TARGET COMPONENTS - There is provided a microelectronic sensor device for the detection of target components comprising label-particles, comprising a carrier with a binding surface at which target components can collect; a light source for emitting a light beam incident at the binding surface; a light detector for determining the amount of light in a reflected light beam. In one aspect of the invention, the binding surface is provided by a plurality of aperture defining structures having a smallest in plane aperture dimension (W | 2010-09-02 |
20100221843 | Device for Investigating Chemical Interactions and Process Utilizing Such Device - The invention relates to a device for investigating reactions between interactive species, said device comprising: one or more plasma deposited layers, which layers comprise one or more first pre-selected functional group species, which functional group species are interactible with a pre-selectable second species. | 2010-09-02 |
20100221844 | Caustic stable chromatography ligands - The present invention relates to chromatography ligands having improved caustic stability, e.g., ligands based on immunoglobulin-binding proteins such as, | 2010-09-02 |
20100221845 | BIOSENSOR - One object of the present invention is to provide a biosensor and a production method therefor, by which hydrogel that enables immobilization of a physiologically active substance can be conveniently produced using safe raw materials. The present invention provides a biosensor which comprises a substrate having a metal layer on its surface, wherein a hydrophilic polymer having a reactive functional group capable of reacting with a hydroxyl group or an amino group of a physiologically active substance is bound to the metal layer directly or indirectly via an intermediate layer. | 2010-09-02 |
20100221846 | SENSOR, A SENSOR ARRAY, AND A METHOD OF OPERATING A SENSOR - In an example embodiment, there is a sensor for detecting particles. The sensor comprises an electrode, a sensor active region covering the electrode and the sensor active region is sensitive-for the particles. A first switch element is operable to bring the electrode to a first electric potential when the first switch element is closed, and a second switch element is operable to bring the electrode to a second electric potential when the second switch element is closed. A detector is adapted to detect the particles based on a change of the electric properties of the sensor in an operation mode in which the electrode is brought to the first electric potential and an operation mode in which the electrode is brought to the second electric potential. | 2010-09-02 |
20100221847 | Photonic crystal sensors with integrated fluid containment structure, sample handling devices incorporating same, and uses thereof for biomolecular interaction analysis - Photonic crystal (PC) sensors, and sensor arrays and sensing systems incorporating PC sensors are described which have integrated fluid containment and/or fluid handling structures. The PC sensors are further integrated into a sample handling device such as a microwell plate. Sensors and sensing systems of the present disclosure are capable of high throughput sensing of analytes in fluid samples, bulk refractive index detection, and label-free detection of a range of molecules, including biomolecules and therapeutic candidates. The present disclosure also provides a commercially attractive fabrication platform for making photonic crystal sensors and systems wherein an integrated fluid containment structure and a photonic crystal structure are fabricated in a single molding or imprinting processing step amendable to high throughput processing. | 2010-09-02 |
20100221848 | Embedded Magnetic Random Access Memory (MRAM) - A magnetic random access memory (MRAM) cell includes an embedded MRAM and an access transistor. The embedded MRAM is formed on a number of metal-interposed-in-interlayer dielectric (ILD) layers, which each include metal dispersed therethrough and are formed on top of the access transistor. An magneto tunnel junction (MTJ) is formed on top of a metal formed in the ILD layers that is in close proximity to a bit line. An MTJ mask is used to pattern the MTJ and is etched to expose the MTJ. Ultimately, metal is formed on top of the bit line and extended to contact the MTJ. | 2010-09-02 |
20100221849 | METHOD AND SYSTEM FOR CONTROLLING AN IMPLANTATION PROCESS - A method for implant uniformity is provided that includes determining a variation of critical dimensions (CD) of a semiconductor wafer, moving the semiconductor wafer in a two-dimensional mode during an implantation process, and controlling a velocity of the movement of the semiconductor wafer so that an implant dose to the semiconductor wafer is varied based on the variation of CD. | 2010-09-02 |
20100221850 | CARBON-CONTAINING SEMICONDUCTING DEVICES AND METHODS OF MAKING THEREOF - Embodiments of the present invention relate to semiconducting carbon-containing devices and methods of making thereof. The semi-conducting carbon containing devices comprise an n-type semiconducting layer and a p-type semiconducting layer, both of which are positioned over a substrate. The n-type semiconducting layer can be formed by pyrolyzing a carbon- and nitrogen-containing polymer, and the p-type semiconducting layer can be formed by pyrolyzing an aromatic- and aliphatic-group-containing polymer. In some embodiments, the devices are solar cell devices. | 2010-09-02 |
20100221851 | TEST STRUCTURE AND METHOD FOR DETECTING CHARGE EFFECTS DURING SEMICONDUCTOR PROCESSING - A semiconductor process test structure comprises an electrode, a charge-trapping layer, and a diffusion region. The test structure is a capacitor-like structure in which the charge-trapping layer will trap charges during various processing steps. Gate-induced drain leakage (GIDL) measurement techniques can then be used to characterize the charging status of the test structure. | 2010-09-02 |
20100221852 | Method for fabricating light emitting diode - A method of fabricating a light emitting diode includes the following steps. A substrate is provided and a first semiconductor layer, an active layer, and a second semiconductor layer are placed on the substrate. A carbon nanotube structure is provided and the carbon nanotube structure is lie on the second semiconductor layer. A first electrode is formed on the carbon nanotube structure. A portion of the first semiconductor layer is exposed and a second electrode is formed on the exposed portion of the first semiconductor layer to obtain the light emitting diode. | 2010-09-02 |
20100221853 | METHOD FOR GENERATING AN ELECTRODE LAYER PATTERN IN AN ORGANIC FUNCTIONAL DEVICE - A method for generating an electrode layer pattern in an organic functional device ( | 2010-09-02 |
20100221854 | SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device includes attaching a first semiconductor substrate to a support substrate, and thinning the first semiconductor substrate to form a thinned semiconductor layer. The method additionally includes integrating a functional element with the thinned semiconductor layer, and forming at least one through-connect through the thinned semiconductor layer. | 2010-09-02 |
20100221855 | Light Emitting Device and Method of Manufacturing the Same - In a top emission structure, there has been a problem in that a wiring, a TFT, or the like is provided in regions other than a light emitting region so that light reflected by the wiring reaches eyes of an observer. The present invention prevents light that is reflected by a wire from reaching eyes of an observer by providing a light-absorbing multilayer film ( | 2010-09-02 |
20100221856 | SEMICONDUCTOR LIGHT-EMITTING DEVICE AND PROCESS FOR PRODUCTION THEREOF - One aspect of the present invention provides a semiconductor light-emitting device improved in luminance, and also provides a process for production thereof. The process comprises a procedure of forming a relief structure on the light-extraction surface of the device by use of a self-assembled film. In that procedure, the light-extraction surface is partly covered with a protective film so as to protect an area for an electrode to be formed therein. The electrode is then finally formed there after the procedure. The process thus reduces the area incapable, due to thickness of the electrode, of being provided with the relief structure. Between the electrode and the light-extraction surface, a contact layer is formed so as to establish ohmic contact between them. | 2010-09-02 |
20100221857 | CONTROL CIRCUIT FOR STACKED OLED DEVICE - A plurality of organic light-emitting diode (OLED) control circuits, each circuit comprising three electrodes, a first electrode, a second electrode independently controlled from the first electrode, and a third electrode is connected in common with the third electrode from another OLED control circuit and independently controlled from the first and second electrode. Given a first and second OLED, the first electrode is connected to a first terminal of the first OLED, the second electrode is connected to a second terminal of the first OLED and to a first terminal of the second OLED, and the third electrode is connected to a second terminal of the second OLED. At least one bypass transistor, responsive to a bypass signal, connects the second electrode and third electrode. | 2010-09-02 |
20100221858 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - To provide a semiconductor device with high performance and low cost and a manufacturing method thereof. A first region including a separated (cleavage) single-crystal semiconductor layer and a second region including a non-single-crystal semiconductor layer are provided over a substrate. It is preferable that laser beam irradiation be performed to the separated (cleavage) single-crystal semiconductor layer in an inert atmosphere, and laser beam irradiation be performed to the non-single-crystal semiconductor layer in an air atmosphere at least once. | 2010-09-02 |
20100221859 | Semiconductor Structure and Method for Manufacturing the Same - A semiconductor structure and a method for manufacturing the same are provided. Compared to conventional structures of thin film transistors, the structure of the present invention uses a patterned first metal layer as a data line, and a patterned second metal layer as a gate line. In a thin film transistor, a gate is also located in the patterned first metal layer, and is electrically connected to the gate line located in the patterned second metal layer through a contact hole. A source and a drain of the thin film transistor are electrically connected to the data line through a contact hole. The structure of the present invention increases a storage capacitance and an aperture ratio. | 2010-09-02 |
20100221860 | PRECISION MICRO-ELECTROMECHANICAL SENSOR (MEMS) MOUNTING IN ORGANIC PACKAGING - Apparatus and methods for mounting micro-electromechanical (MEMS) sensors in three dimensions, using horizontal and vertical substrates. | 2010-09-02 |
20100221861 | Efficient Thermoelectric Device and Associated Method - A high efficiency thermo electric device and associated method of making, the device comprising a multilayer structure of alternating insulator and insulator/metal material that is irradiated across the plane of the layer structure with ionizing radiation. The ionizing radiation produces nanoclusters of the metal material in the layered structure that increase the electrical conductivity and decrease the thermal conductivity thereby increasing the thermoelectric figure of merit. Figures of merit as high as 2.5 have been achieved using layers of co-deposited gold and silicon dioxide interspersed with layers of silicon dioxide. The gold to silicon dioxide ratio was 0.04. 5 MeV silicon ions were used to irradiate the structure. Other metals and insulators may be substituted. Other ionizing radiation sources may be used. The structure tolerates a wide range of metal to insulator ratio. | 2010-09-02 |
20100221862 | IMAGING OPTICAL MODULE DESIGNED TO BE ASSOCIATED WITH AN OPTICAL SEMICONDUCTOR COMPONENT AND METHOD OF FABRICATING SAME - An imaging optical module is designed to be placed in front of an optical image sensor of a semiconductor component. The module includes at least one element which has a refractive index that varies between its optical axis and its periphery, over at least an annular part and/or over its central part. The element may be a tablet in front of the semiconductor sensor or a lens in front of the semiconductor sensor. The direction of variation in refractive index may be oppositely oriented with respect to the table and lens. | 2010-09-02 |
20100221863 | DYE-SENSITIZED SOLAR CELL BASED ON ELECTROSPUN ULTRA-FINE TITANIUM DIOXIDE FIBERS AND FABRICATION METHOD THEREOF - A dye-sensitized solar cell comprising a semiconductor electrode comprising electrospun ultra-fine titanium dioxide fibers and fabrication method thereof are disclosed. The dye-sensitized solar cell comprises a semiconductor electrode comprising an electrospun ultra-fine fibrous titanium dioxide layer, a counter electrode and electrolyte interposed therebetween. A non-liquid electrolyte such as polymer gel electrolyte or the like having low fluidity, as well as the liquid electrolyte, can be easily infiltrated thereinto. In addition, electrons can be effectively transferred since titanium dioxide crystals are one-dimensionally arranged. | 2010-09-02 |
20100221864 | SOLID-STATE IMAGE SENSOR AND IMAGING SYSTEM - At least one exemplary embodiment is directed to a solid state image sensor including at least one antireflective layer and/or non rectangular shaped wiring layer cross section to reduce dark currents and 1/f noise. | 2010-09-02 |
20100221865 | Crosstalk Improvement Through P On N Structure For Image Sensor - The present disclosure provides an image sensor semiconductor device. The semiconductor device includes a semiconductor substrate having a first type of dopant; a semiconductor layer having a second type of dopant different from the first type of dopant and disposed on the semiconductor substrate; and an image sensor formed in the semiconductor layer. | 2010-09-02 |
20100221866 | Nano/Microwire Solar Cell Fabricated by Nano/Microsphere Lithography - Techniques for fabricating nanowire/microwire-based solar cells are provided. In one, a method for fabricating a solar cell is provided. The method includes the following steps. A doped substrate is provided. A monolayer of spheres is deposited onto the substrate. The spheres include nanospheres, microspheres or a combination thereof The spheres are trimmed to introduce space between individual spheres in the monolayer. The trimmed spheres are used as a mask to pattern wires in the substrate. The wires include nanowires, microwires or a combination thereof A doped emitter layer is formed on the patterned wires. A top contact electrode is deposited over the emitter layer. A bottom contact electrode is deposited on a side of the substrate opposite the wires. | 2010-09-02 |
20100221867 | LOW COST SOI SUBSTRATES FOR MONOLITHIC SOLAR CELLS - A lost cost method for fabricating SOI substrates is provided. The method includes forming a stack of p-type doped amorphous Si-containing layers on a semiconductor region of a substrate by utilizing an evaporation deposition process. A solid phase recrystallization step is then performed to convert the amorphous Si-containing layers within the stack into a stack of p-type doped single crystalline Si-containing layers. After recrystallization, the single crystalline Si-containing layers are subjected to anodization and at least an oxidation step to form an SOI substrate. Solar cells and/or other semiconductor devices can be formed on the upper surface of the inventive SOI substrate. | 2010-09-02 |
20100221868 | Active Material Devices with Containment Layer - An active material electronic device is described with a containment layer. The device includes an active chalcogenide, pnictide, or phase-change material in electrical communication with an upper and lower electrode. The device includes a containment layer formed over the active material that prevents escape of volatilized matter from the active material when the device is exposed to high temperatures during fabrication or operation. The containment layer further prevents chemical contamination of the active material by protecting it from reactive species in the processing or ambient environment. The containment layer and intermediate layers formed between the active material and containment layer are formed at temperatures sufficiently low to prevent volatilization of the active material. Once the containment layer is formed, the device may be subjected to high temperature or chemically aggressive environments without impairing the compositional or structural integrity of the active material. Inclusion of the containment layer is shown to extend the cycle life of the device by over two orders of magnitude. | 2010-09-02 |
20100221869 | Semiconductor Wafer and Process For Its Production - A layered semiconductor wafer contains the following layers in the given order:
| 2010-09-02 |
20100221870 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - An IC card is more expensive than a magnetic card, and an electronic tag is also more expensive as a substitute for bar codes. Therefore, the present invention provides an extremely thin integrated circuit that can be mass-produced at low cost unlike a chip of a conventional silicon wafer, and a manufacturing method thereof. One feature of the present invention is that a thin integrated circuit is formed by a formation method that can form a pattern selectively, on a glass substrate, a quartz substrate, a stainless substrate, a substrate made of synthetic resin having flexibility, such as acryl, or the like except for a bulk substrate. Further, another feature of the present invention is that an ID chip in which a thin film integrated circuit and an antenna according to the present invention are mounted is formed. | 2010-09-02 |
20100221871 | Multi-Surface IC Packaging Structures and Methods for their Manufacture - An IC package having multiple surfaces for interconnection with interconnection elements making connections from the IC chip to the I/O terminations of the package assembly which reside on more than one of its surfaces and which make interconnections to other devices or assemblies that are spatially separated. | 2010-09-02 |
20100221872 | REVERSIBLE LEADLESS PACKAGE AND METHODS OF MAKING AND USING SAME - A method for manufacturing a semiconductor device package including an electrically conductive lead frame having a plurality of posts disposed at a perimeter of the package. Each of the posts has a first contact surface at the first package face and a second contact surface at the second package face. The lead frame also includes a plurality of post extensions disposed at the second package face. Each of the post extensions includes a bond site formed on a surface of the post extension opposite the second package face. At least one I/O pad on the semiconductor device is electrically connected to the post extension at the bond site using wirebonding, tape automated bonding, or flip-chip methods. The package can be assembled using a lead frame having pre-formed leads, with or without taping, or using partially etched lead frames. A stack of the semiconductor device packages may be formed. | 2010-09-02 |
20100221873 | Semiconductor Device and Method of Forming an Interconnect Structure for 3-D Devices Using Encapsulant for Structural Support - A semiconductor device has a first interconnect structure formed over a first side of a substrate. A semiconductor die is mounted to the first interconnect structure. An encapsulant is deposited over the semiconductor die and first interconnect structure for structural support. A portion of a second side of the substrate, opposite the first side of the substrate, is removed to reduce its thickness. The encapsulant maintains substrate robustness during thinning process. A TSV is formed through the second side of the substrate to the first interconnect structure. A second interconnect structure is formed in the TSV. The TSV has a first insulating layer formed over the second side of the substrate and first conductive layer formed over the first insulating layer and into the TSV. The second interconnect structure has a second conductive layer formed over the first conductive layer in an area away from the TSV. | 2010-09-02 |
20100221874 | Method for Multi-Level Interconnection Memory Device - A method for preventing arcing during deep via plasma etching is provided. The method comprises forming a first patterned set of parallel conductive lines over a substrate and forming a plurality of semiconductor pillars on the first patterned set of parallel conductive lines and extending therefrom, wherein a pillar comprises a first barrier layer, an antifuse layer, a diode, and a second barrier layer, wherein an electric current flows through the diode upon a breakdown of the antifuse layer. The method further comprises depositing a dielectric between the plurality of semiconductor pillars, and plasma etching a deep via recess through the dielectric and through the underlying layer after the steps of forming a plurality of semiconductor pillars and depositing a dielectric. An embodiment of the invention comprises a memory array device. | 2010-09-02 |
20100221875 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICES INCLUDING GATE PATTERNS HAVING STEP DIFFERENCE THEREBETWEEN AND A CONNECTION LINE DISPOSED BETWEEN THE GATE PATTERNS AND METHODS OF FABRICATING THE SAME - Provided are semiconductor integrated circuit (IC) devices including gate patterns having a step difference therebetween and a connection line interposed between the gate patterns. The semiconductor IC device includes a semiconductor substrate including a peripheral active region, a cell active region, and a device isolation layer. Cell gate patterns are disposed on the cell active region and the device isolation layer. A peripheral gate pattern is disposed on the peripheral active region. A cell electrical node is disposed on the cell active region adjacent to the cell gate patterns. Peripheral electrical nodes are disposed on the peripheral active region adjacent to the peripheral gate pattern. Connection lines are disposed on the cell gate patterns disposed on the device isolation layer. The connection lines are connected between the cell gate patterns and the peripheral gate pattern. | 2010-09-02 |
20100221876 | FIELD EFFECT TRANSISTORS WITH VERTICALLY ORIENTED GATE ELECTRODES AND METHODS FOR FABRICATING THE SAME - In semiconductor devices, and methods of formation thereof, both planar-type memory devices and vertically oriented thin body devices are formed on a common semiconductor layer. In a memory device, for example, it is desirable to have planar-type transistors in a peripheral region of the device, and vertically oriented thin body transistor devices in a cell region of the device. In this manner, the advantageous characteristics of each type of device can be applied to appropriate functions of the memory device. | 2010-09-02 |
20100221877 | METHOD OF MANUFACTURING A SOI STRUCTURE HAVING A SIGE LAYER INTERPOSED BETWEEN THE SILICON AND THE INSULATOR - A semiconductor structure and a method of manufacturing a silicon on insulator (SOI) structure having a silicon germanium (SiGe) layer interposed between the silicon and the insulator. According to one manufacturing method, a first SiGe layer, a silicon layer, and a second SiGe layer are epitaxially grown in sequence over a first substrate, and then an insulating layer is formed on the second SiGe layer. Then, impurity ions are implanted into a predetermined location of the first substrate underlying the first SiGe layer to form an impurity implantation region. A second substrate is bonded to the insulating layer on the first substrate. After the first substrate is separated along the impurity implantation region and removed, the first SiGe layer remaining on the surface of the separated region is removed so that the surface of the silicon layer may be exposed. | 2010-09-02 |
20100221878 | Hybrid Metal Fully Silicided (FUSI) Gate - A semiconductor device and system for a hybrid metal fully silicided (FUSI) gate structure is disclosed. The semiconductor system comprises a PMOS gate structure, the PMOS gate structure including a first high-κ dielectric layer, a P-metal layer, a mid-gap metal layer, wherein the mid-gap metal layer is formed between the high-κ dielectric layer, the P-metal layer and a fully silicided layer formed on the P-metal layer. The semiconductor system further comprises an NMOS gate structure, the NMOS gate structure includes a second high-κ dielectric layer, the fully silicided layer, and the mid-gap metal layer, wherein the mid-gap metal layer is formed between the high-κ dielectric and the fully silicided layer. | 2010-09-02 |
20100221879 | Methods of Manufacturing Phase-Changeable Memory Devices - A phase-changeable memory device includes a substrate having a contact region on an upper surface thereof. An insulating interlayer on the substrate has an opening therein, and a lower electrode is formed in the opening. The lower electrode has a nitrided surface portion and is in electrical contact with the contact region of the substrate. A phase-changeable material layer pattern is on the lower electrode, and an upper electrode is on the phase-changeable material layer pattern. The insulating interlayer may have a nitrided surface portion and the phase-changeable material layer may be at least partially on the nitrided surface portion of the insulating interlayer. Methods of forming phase-changeable memory devices are also disclosed. | 2010-09-02 |
20100221880 | NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME - A non-volatile semiconductor memory device is disclosed, which comprises a memory cell unit including at least one memory cell transistor formed on a semiconductor substrate and having a laminated structure of a charge accumulation layer and a control gate layer, and a selection gate transistor one of the source/drain diffusion layer regions of which is connected to a bit line or a source line and the other of the source/drain diffusion layer regions of which is connected to the memory cell unit. The shape of the source diffusion layer region of the selection gate transistor is asymmetrical to the shape of the drain diffusion layer region thereof below the selection gate transistor. | 2010-09-02 |
20100221881 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - According to an aspect of the invention, there is provided a semiconductor device including a plurality of memory cells, comprising a plurality of floating gate electrodes which are formed on a tunnel insulating film formed on a semiconductor substrate and have an upper portion which is narrower in a channel width direction than a lower portion, an interelectrode insulating film formed on the floating gate electrodes, and a control gate electrode which is formed on the interelectrode insulating film formed on the floating gate electrodes and partially buried between the floating gate electrodes opposing each other. | 2010-09-02 |
20100221882 | Nanoelectronic structure and method of producing such - The present invention relates to semiconductor devices comprising semiconductor nanoelements. In particular the invention relates to devices having a volume element having a larger diameter than the nanoelement arranged in epitaxial connection to the nanoelement. The volume element is being doped in order to provide a high charge carrier injection into the nanoelement and a low access resistance in an electrical connection. The nanoelement may be upstanding from a semiconductor substrate. A concentric layer of low resistivity material forms on the volume element forms a contact. | 2010-09-02 |
20100221883 | ADJUSTING OF A NON-SILICON FRACTION IN A SEMICONDUCTOR ALLOY DURING TRANSISTOR FABRICATION BY AN INTERMEDIATE OXIDATION PROCESS - The concentration of a non-silicon species in a semiconductor alloy, such as a silicon/germanium alloy, may be increased after a selective epitaxial growth process by oxidizing a portion of the semiconductor alloy and removing the oxidized portion. During the oxidation, preferably the silicon species may react to form a silicon dioxide material while the germanium species may be driven into the remaining semiconductor alloy, thereby increasing the concentration thereof. Consequently, the threshold adjustment of sophisticated transistors may be accomplished with enhanced process uniformity on the basis of a given parameter setting for the epitaxial growth process while nevertheless providing a high degree of flexibility in adjusting the composition of the threshold adjusting material. In other cases, in addition to or alternatively to forming a threshold adjusting semiconductor alloy, a strain-inducing semiconductor alloy may also be provided with enhanced flexibility using the above-described process sequence. | 2010-09-02 |
20100221884 | Semiconductor device and manufacturing method thereof - A semiconductor device includes a semiconductor layer with an impurity of a first conductivity type diffused therein, and a local insulating layer, source layer, and a drain layer formed therein. The drain layer has an impurity of a second conductivity type opposite to the first conductivity type. A gate electrode is formed over the semiconductor layer extending from over the local insulating layer to the source layer. A low-concentration diffusion layer is formed in the semiconductor layer below the drain layer. First and second gate insulating films are formed between the gate electrode and the semiconductor layer, and respectively extending from an end, on the source layer side, of the gate electrode to the local insulating layer without reaching the local insulating layer, and extending from an end on another side of the local insulting layer to the source layer. | 2010-09-02 |
20100221885 | METHOD OF MANUFACTURING DIELECTRIC FILM - The present invention provides a method of manufacturing a dielectric film having a high permittivity. An embodiment of the present invention is a method of manufacturing, on a substrate, a dielectric film including a metallic oxynitride containing an element A made of Hf or a mixture of Hf and Zr, an element B made of Al, and N and O. The manufacturing method includes: a step of forming a metallic oxynitride whose mole fractions of the element A, the element B, and N expressed as B/(A+B+N) has a range of 0.015≦(B/A+B+N))≦0.095 and N/(A+B+N) has a range of 0.045≦(N/(A+B+N)) and a mole fraction O/A of the element A and O has a range expressed as 1.0<(O/A)<2.0, and having a noncrystalline structure; and a step of performing an annealing treatment at 700° C. or higher on the metallic oxynitride having a noncrystalline structure to form a metallic oxynitride including a crystalline phase with a cubical crystal incorporation percentage of 80% or higher. | 2010-09-02 |
20100221886 | Methods of Forming Charge-Trap Type Non-Volatile Memory Devices - Methods of forming a non-volatile memory device may include forming a tunnel insulating layer on a semiconductor substrate and forming a charge-trap layer on the tunnel insulating layer. A trench may then be formed extending through the tunnel insulating layer and the charge-trap layer and into the semiconductor substrate so that portions of the charge-trap layer and the tunnel insulating layers remain on opposite sides of the trench. A device isolation layer may be formed in the trench, and a blocking insulating layer may be formed on the device isolation layer and on remaining portions of the charge-trap layer. A gate electrode may be formed on the blocking insulating layer, and the blocking insulating layer and remaining portions of the charge-trap layer may be patterned to provide a blocking insulating pattern and a charge-trap pattern between the gate electrode and the semiconductor substrate. | 2010-09-02 |
20100221887 | Oxygen-Rich Layers Underlying BPSG - An integrated circuit structure and a method of forming the same are provided. The method includes providing a surface; performing an ionized oxygen treatment to the surface; forming an initial layer comprising silicon oxide using first process gases comprising a first oxygen-containing gas and tetraethoxysilane (TEOS); and forming a silicate glass over the initial layer. The method may further include forming a buffer layer using second process gases comprising a second oxygen-containing gas and TEOS, wherein the first and the second process gases have different oxygen-to-TEOS ratio. | 2010-09-02 |
20100221888 | Programmable Resistive RAM and Manufacturing Method - Integrated circuit nonvolatile memory uses programmable resistive elements. In some examples, conductive structures such as electrodes are prepared, and the programmable resistive elements are laid upon the prepared electrodes. This prevents contamination of the programmable resistive elements from previous fabrication steps. | 2010-09-02 |
20100221889 | Method of manufacturing semiconductor device having capacitor under bit line structure - Provided is a method of manufacturing a semiconductor device having a capacitor under bit line (CUB) structure capable of increasing a gap between a bit line in a cell area and an upper plate of a capacitor, reducing coupling capacitance therebetween, and forming deep contacts in a logic area. A capacitor including a lower electrode, a dielectric material layer, and an upper electrode is formed in an opening of a first insulating layer for exposing a first part of a semiconductor substrate in a cell area. A second insulating layer is formed on the first insulating layer. The first and second insulating layers are etched. First and second contact plugs are formed in first and second contact holes for exposing second and third parts in the cell area and the logic area. A third insulating layer including first through third conductive studs is formed on the second insulating layer. A fourth insulating layer including a bit line and first and second wires contacted with the first through third conductive studs is formed. | 2010-09-02 |
20100221890 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - In forming an element isolation trench, an insulating film formed above a semiconductor substrate is etched such that relatively thin insulating film situated in the memory cell region is fully removed whereas relatively thick insulating film situated in the peripheral circuit region is etched so as to leave a remainder insulating film. Then, using the remainder insulating film in the peripheral circuit region as an etch stopper, the semiconductor substrate is etched, whereafter the remainder insulating film in the peripheral circuit region is fully removed to subsequently etch the semiconductor substrate. | 2010-09-02 |
20100221891 | METHOD OF PRODUCING A HYBRID SUBSTRATE BY PARTIAL RECRYSTALLIZATION OF A MIXED LAYER - A method of producing a hybrid substrate includes preparing a monocrystalline first substrate to obtain two surface portions. A temporary substrate is prepared including a mixed layer along which extends one surface portion and is formed of first areas and adjacent different second areas of amorphous material, the second areas forming at least part of the free surface of the first substrate. The first substrate is bonded to the other surface portion with the same crystal orientation as the first surface portion, by molecular bonding over at least the amorphous areas. A solid phase recrystallization of at least part of the amorphous areas according to the crystal orientation of the first substrate is selectively carried and the two surface portions are separated. | 2010-09-02 |
20100221892 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A BGA type semiconductor device having high reliability is offered. A pad electrode is formed on a surface of a semiconductor substrate and a glass substrate is bonded to the surface of the semiconductor substrate. A via hole is formed from a back surface of the semiconductor substrate to reach a surface of the pad electrode. An insulation film is formed on an entire back surface of the semiconductor substrate including an inside of the via hole. A cushioning pad is formed on the insulation film. The insulation film is removed from a bottom portion of the via hole by etching. A wiring connected with the pad electrode is formed to extend from the via hole onto the cushioning pad. A conductive terminal is formed on the wiring. Then the semiconductor substrate is separated into a plurality of semiconductor dice. | 2010-09-02 |
20100221893 | METHOD FOR SEPARATING A SEMICONDUCTOR WAFER INTO INDIVIDUAL SEMICONDUCTOR DIES USING AN IMPLANTED IMPURITY - Provided is a method for separating a semiconductor wafer into individual semiconductor dies. The method for separating the semiconductor wafer, among other steps, may include implanting an impurity into regions of a semiconductor wafer proximate junctions where semiconductor dies join one another, the impurity configured to disrupt bonds in the semiconductor wafer proximate the junctions and lead to weakened regions. The method for separating the semiconductor wafer may further include separating the semiconductor wafer having the impurity into individual semiconductor dies along the weakened regions. | 2010-09-02 |
20100221894 | METHOD FOR MANUFACTURING NANOWIRES BY USING A STRESS-INDUCED GROWTH - Provided is a method for manufacturing a nanowire using stress-induced growth. The method includes: providing a substrate with an intermediate layer formed thereon; forming thin film on the intermediate layer, wherein the thin film made of material having more than 2×10 | 2010-09-02 |
20100221895 | SURFACE TREATMENT APPARATUS AND SURFACE TREATMENT METHOD - HF-originated radicals generated in a plasma-forming chamber are fed to a treatment chamber via feed holes, while HF gas molecules as the treatment gas are supplied to the treatment chamber from near the radical feed holes to suppress the excitation energy, thereby increasing the selectivity to Si to remove a native oxide film. Even with the dry-treatment, the surface treatment provides good surface flatness equivalent to that obtained by the wet-cleaning which requires high-temperature treatment, and further attains growth of Si single crystal film on the substrate after the surface treatment. The surface of formed Si single crystal film has small quantity of impurities of oxygen, carbon, and the like. After sputtering Hf and the like onto the surface of the grown Si single crystal film, oxidation and nitrification are applied thereto to form a dielectric insulation film such as HfO thereon, thus forming a metal electrode film. All through the above steps, the substrate is not exposed to atmospheric air, thereby suppressing the adsorption of impurities onto the interface, and thus obtaining a C-V curve with small hysteresis. As a result, good device characteristics are obtained in MOS-FET. | 2010-09-02 |
20100221896 | Electrical Device with Improved Electrode Surface - An electronic device having a reduced-roughness electrode surface. The device includes an active material that forms an interface with a treated electrode surface. Treatment of the electrode surface reduces the roughness of the surface to promote adhesion, conformality, and/or electrical contact of the active material to the electrode. The reduced-roughness electrode surface facilitates the formation of a regular, uniform interface with the active material and minimizes the formation of interfacial voids and/or localized contact points that compromise device performance or endurance. Active materials include variable resistance materials and electrical switching materials. | 2010-09-02 |
20100221897 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - Disclosed is a semiconductor device. The semiconductor device includes a first type nitride-based cladding layer formed on a growth substrate having an insulating property, a multi quantum well nitride-based active layer formed on the first type nitride-based cladding layer and a second type nitride-based cladding layer, which is different from the first type nitride-based cladding layer and is formed on the multi quantum well nitride-based active layer. A tunnel junction layer is formed between the undoped buffering nitride-based layer and the first type nitride-based cladding layer or/and formed on the second type nitride-based cladding layer. | 2010-09-02 |
20100221898 | LASER ANNEALING METHOD AND LASER ANNEALING DEVICE - The energy distribution in the short-side direction of a rectangular laser beam applied to an amorphous semiconductor film (amorphous silicon film) is uniformized. It is possible to the energy distribution in the short-side direction of the rectangular laser beam by the use of a cylindrical lens array | 2010-09-02 |
20100221899 | METHOD OF MANUFACTURING A POLYCRYSTALLINE SEMICONDUCTOR THIN FILM - A TFT and the like capable of realizing performances such as a low threshold voltage value, high carrier mobility and a low leak current easily. A TFT consists of a polycrystalline Si film having a small heat capacity part and a large heat capacity part, and the small heat capacity part is used at least as a channel part. The polycrystalline Si film is formed of a crystal grain film through laser annealing of an energy density with which the small heat capacity part melts completely but the large heat capacity part does not melt completely. Since the channel part is formed of large crystal grains grown from the boundaries between the small heat capacity part and the large heat capacity parts, it is possible to realize performances such as a low threshold voltage value, high carrier mobility and a low leak current by using a typical laser annealing device. | 2010-09-02 |
20100221900 | MASK FOR SEQUENTIAL LATERAL SOLIDIFICATION (SLS) PROCESS AND A METHOD FOR CRYSTALLIZING AMORPHOUS SILICON BY USING THE SAME - A mask for sequential lateral solidification (SLS) processes including at least one first window, one second window, one third window, and one fourth window is provided. Each window has a length extending longitude on the mask. The second window is aligned to the first window. The width of the first window is greater than that of the second window. The fourth window is aligned to the third window. The width of the third window is greater than that of the fourth window. | 2010-09-02 |