37th week of 2008 patent applcation highlights part 29 |
Patent application number | Title | Published |
20080219006 | Display apparatus - The present invention supplied a display apparatus using plastic substrate instead of glass substrate, which can solve such problems that the plastic substrate has a low heat conductivity and its heat release performance becomes bad so that it is difficult to obtain stable performance and reliability. In the display apparatus, inner surface electrode integrated with vertical wiring between plastic substrate and thin film LED | 2008-09-11 |
20080219007 | Thermal management system for LED array - A device, comprising (a) a chamber having a liquid disposed therein, (b) an LED array having a first surface which is in contact with said liquid, and (c) at last one actuator adapted to dislodge vapor bubbles from said first surface through the emission of pressure vibrations. | 2008-09-11 |
20080219008 | Lighting Device with Composite Reflector - A light fixture device comprises a reflector portion having a pair of parallel longitudinal boundary regions and a pair of parallel lateral boundary regions; the reflector portion being shaped according to a longitudinal focal line, a pair of housing portions, each for engaging a corresponding lateral boundary region; at least one connector portion for coupling the housing portions together with the reflector portion. | 2008-09-11 |
20080219009 | PROJECTOR TYPE LAMP - An projector type lamp includes a casing formed with a front open end and configured by connecting an upper casing member and a lower casing member to each other; a concave mirror formed on an inside face of the casing; a light source provided at the first focal point of the concave mirror; a convex lens configured to be held between the upper casing member and the lower casing member at the front open end of the casing and adapted to refract a reflected light that is emitted from the light source and reflected on the concave mirror so as to project a substantially parallel pencil beam forward from the project type lamp; provisional fixers provided on the upper casing member and the lower casing member respectively and configured to latch one another so as to provisionally fix the casing members to one another in place; and a fastener configured to fasten the provisionally-fixed casing members together. | 2008-09-11 |
20080219010 | Light distribution control method, light distribution control device, and greenhouse using the same - Provided is a plurality of structures each having a number of ridges and formed in a long and thin plate shape or a long and thin film shape. The cross section of each of the ridges forms a portion of a substantial circle and a surface thereof is a practically specular surface. The structures are arrayed such that the ridges of each thereof become parallel to each other and respective adjacent surfaces thereof are corresponding to each other in parallel and apart from each other at a predetermined distance. When light is incident on a point of a surface of one of the structures at an incident angle, in either its reflection or transmittance, the light is diffused in circular conical plane whose vertex is the incident point and center axis is a line parallel to the ridges, by a diffraction effect caused by the arrayed ridges. The flux of reflected diffused light is spread in one lengthwise half of the circular conical plane and the flux of transmitted diffused light is spread in the other lengthwise half of the circular conical plane. | 2008-09-11 |
20080219011 | Optical member and filter for display apparatus having the same - Disclosed is an optical member for a display apparatus which includes a plurality of colorants. The optical member includes a neoncut colorant where the full width half maximum (FWHM) of the peak wavelength is about 35 nm or less, wherein a transmittance ratio (B/R) of blue light (B) with a wavelength of about 400 to 500 nm with respect to red light (R) with a wavelength of about 600 to 700 nm is about 0.84 or less. | 2008-09-11 |
20080219012 | Illumination in the Area of Aircraft Cabins - The present invention relates to an illumination strip by means of which a handrail recess that itself at the same time forms a handrail can be illuminated; to a hatrack for installation in an aircraft cabin with a correspondingly designed handrail recess that at least in sections can be illuminated; as well as to the use of an illumination strip or a hatrack in an aircraft. The illumination strip comprises carrier module for accommodating an illumination means and a multitude of illumination means that are accommodated by the carrier module. The carrier module is strip shaped and comprises at least one positive locking means by means of which, for the purpose of illuminating the handrail recess, the carrier module can be fitted into the handrail so as to provide a positive-locking fit and so as to be exchangeable. | 2008-09-11 |
20080219013 | Aircraft having an illumination device - An illumination device and an aircraft having an illumination device which by a corresponding selection of the wavelength and of the irradiation angle prevents a person situated in the aircraft from becoming tired. The illumination device is arranged in an aircraft such that light given off by the illumination device can be irradiated onto the retinohypothalamic tract of a person who is present in the aircraft in a predetermined position, and the illumination device is designed to give off light at a predetermined wavelength, which light achieves the desired effect. | 2008-09-11 |
20080219014 | Bicycle bumper with a light generating a bike lane - A bicycle bumper system with a light source which creates a bike lane is disclosed. The bicycle bumper includes a sturdy lightweight body generally made from a single sheet comprising a center wall and at least one sidewall. The sidewall includes a light source which shines a streak of light displaying a minimal safe passing distance on the bicycle's riding surface. The bumper also includes a rear light which may be configured to blink and protect the cyclist from rear impact. | 2008-09-11 |
20080219015 | Vehicle Mini Lamp Retrofit Attachment Assembly - A retrofit vehicle mini lamp assembly for attaching a mini lamp to an existing opening in a vehicle surface includes a housing having a body with an interior portion and a lens portion covering a top end of the interior portion. The lamp assembly also includes circuitry disposed within the interior portion of the housing and at least one light source being electrically connected to the circuitry. An attachment member is also provided. The attachment member includes an aperture therein adapted to receive the housing, a rim adapted to abut the vehicle surface around the existing opening, and a spacer portion extending laterally from the aperture to the rim. The spacer portion includes an outer surface, wherein the lens portion of the housing is substantially continuous with the outer surface of the spacer portion. | 2008-09-11 |
20080219016 | AUTOMOBILE SEAT LIGHT FOR REAR COMPARTMENT LIGHTING - The present invention provides a light located in a carved out portion of the front seat back in an automobile. In an exemplary embodiment, the light includes a light-emitting diode (LED) lamp attached to the top ledge that the carved out portion creates. This LED lamp is small in nature, and therefore hidden from the view of passengers and out of the way as to not interfere with the front seat back. Additional exemplary embodiments can include incandescent lamps, fluorescent lamps, and the like. Advantageously, the light in the carved out portion can be utilized as a courtesy lamp, a reading lamp, a map pocket lamp, and the like. Additionally, the present invention is designed to allow illumination while the automobile is operating without interference with the driver or neighboring automobiles by positioning the light such that the light angles downward while on. | 2008-09-11 |
20080219017 | Multi-Color to White Light-Emitting Diode for Map Pocket Light - An automobile interior component having color adjustable illumination has a plurality of light-emitting diodes of varying color spectra, a controller that adjusts the color spectrum of the diodes, and a control switch to set the emitted light to a first predetermined color. An activation switch functions as an on/off switch and/or as a switch that transitions the emitted light from the first predetermined color to a second predetermined color and back again if desired. | 2008-09-11 |
20080219018 | Instrument Cluster - An instrument cluster for a passenger vehicle is disclosed. The instrument cluster has a plurality of illumination devices and a partially translucent appliqué with a plurality of light transmissive portions. The illumination devices can be configured to illuminate the plurality of light transmissive portions. | 2008-09-11 |
20080219019 | VEHICLE EXTERIOR MIRROR SYSTEM WITH SIGNAL LIGHT - An exterior mirror assembly for a vehicle includes a signal light or security light that provides illumination at a side of the vehicle. The exterior mirror assembly includes a housing with a reflective element, and may include a positioning device for adjusting the position of the reflective element in the housing. The signal light includes a light source and may be adapted to project light from a non-folding portion or support member of the mirror housing. | 2008-09-11 |
20080219020 | Lighting Assembly with Safety and Signalling Functions for Motor Vehicles - Comprises in combination: at least one light source; a support plate for the light source, which is at least one; a protective cover that permits the light emitted by the light source to reach the outside; at least one wall which, in combination with the cover, forms a casing to hold the said light source, in which at least the said support plate has a black coloured surface facing the said cover; and in which the position of said light source, which is at least one, in relation to the casing, is such that it emits the light directly to the exterior. | 2008-09-11 |
20080219021 | Vehicular Lighting Assembly - A vehicular lighting assembly with a reflection mirror formed of a BMC resin is provided which prevents glass fiber in the resin from separating and flying away when the direction of illumination is changed for aiming, which can result in degradation in appearance of the reflector or occurrence of glare. The vehicular lighting assembly can be configured such that a high-beam reflector and a low-beam lighting assembly attachment are formed of a plastic member made of the BMC resin as an integrated lighting assembly holder portion. The low-beam lighting assembly attachment of the lighting assembly holder portion can include a low-beam reflector, ball joints, and an adjusting nut attachment engaged with an adjusting screw, so that it can be aimed. The ball joints and the adjusting nut attachment are formed at their respective positions on an integrated metallic member so that they can be attached as an aiming unit to the low-beam lighting assembly attachment. | 2008-09-11 |
20080219022 | Vehicle Lamp - A vehicle lamp can include a wiring harness, a wiring clip for fixing the wiring harness in the lamp, and a casing for fixing the wiring clip. A force needed for fixing the wiring clip to a rib in the casing can be adjustable. The wiring clip can include both a clip body including at least one wire holder and a spring clip that is located in the clip body. The wiring clip can hold a wiring harness between the at least one wire holder and an inner surface of the casing and at the same time can be affixed to the rib of the casing. The width of the rib can differ in accordance with a longitudinal position of the rib, and the rib can be inserted between a U-shaped spring of the spring clip. Thus, the vehicle lamp can provide for fixing the wiring clip to the rib of the casing while also holding the wiring harness using the wiring clip to firmly fix the wiring harness in the lamp. | 2008-09-11 |
20080219023 | Printed circuit board for fitting with a punched grid - In a printed circuit board for fitting with a three-dimensionally shaped punched grid comprising a plurality of current paths partially encapsulated by plastic and at least one electric or electronic component the punched grid is of angular construction. In this case free end faces of the current paths of the punched grid extending over the legs make contact with the printed circuit board and between the current paths the component is arranged in a defined orientation. | 2008-09-11 |
20080219024 | Backlight unit with reduced color separation including a polarizing turning film - A backlight unit contains a light source, a light guiding plate, and a turning film having a light entry and a light exit surface comprising first prismatic structures on the exit surface, wherein
| 2008-09-11 |
20080219025 | Bi-directional backlight assembly - A backlight assembly emits light out of two light emitting faces using a light source such as side-emitting LEDs that send light into an optical guide or body of optical material that diffuses the light uniformly and emits bi-facially. In this way, two displays, such as LCDs, can be illuminated at the same time and the efficiency is increased. The backlight assembly can be incorporated into an eyewear system such as a binocular display system. | 2008-09-11 |
20080219026 | LIGHT GUIDE PLATE AND METHOD FOR MAKING THE SAME - An exemplary light guide plate includes a light output surface, a light reflective surface opposite to the light output surface, a light input surface interconnecting with the light output surface and the light reflective surface, and a plurality of microstructures formed on the light reflective surface. Each of the microstructures defines a specular reflection surface and a diffuse reflection surface. External light enters the light guide plate via the light input surface, a part of light rays undergo specular reflection at the specular reflection surfaces of the microstructures, and other parts of light rays undergo diffuse reflection at the diffuse reflection surfaces of the microstructures. A backlight module using the light guide plate can have a good optical performance. | 2008-09-11 |
20080219027 | LIGHT REDIRECTING FILM HAVING VARIABLE THICKNESS - A display comprises a light source and a light redirecting polymeric film containing a structured surface on at least one side of the film and bearing a polymeric coating over at least part of the structured surface wherein the coating exhibits a variable thickness. | 2008-09-11 |
20080219028 | LIGHT REDIRECTING FILM HAVING DISCONTINUOUS COATING - The invention relates to a display comprising a light source and a light redirecting polymeric film containing a structured surface on at least one side of the film and bearing a discontinuous population of adherent beads bonded to the structured surface. | 2008-09-11 |
20080219029 | PLUG AND PLAY UTILITY CONTROL MODULES - A utility control device, such as a light socket, a switch or a plug socket, is designed with universal terminals so that when plugged into a pre-wired utility box (box socket), the terminals will make the proper electrical connections with the premises wiring. In one embodiment, a “shell” is inserted into a common utility box. The shell would then be wired to the building wiring on the “back-side” of the shell and when the shell is installed within the utility box the wiring is sandwiched inside the box and behind the shell and therefore not easily seen. A standard socket is positioned within the shell and provides a quick no-wiring required connection to the mating terminals on the actual device, for example a light-switch, or plug, or thermostat, or any other device normally installed and wired as a permanent fixture. Systems and methods are disclosed for arranging the premises power grid such that any device type can be “plugged” into the shells that are pre-wired inside the utility box. In one embodiment, the grid is constructed exactly as it has always been with each box pre-established for a particular type of control but with a plug/play adapter. In another embodiment, the grid is universally wired and each device instructs the system as to its type and as to its intended use. In operation, such a universal plan would allow a device, for example, to “announce” what light, or set of lights, it will control. The system can handle power wiring as well as control wiring. | 2008-09-11 |
20080219030 | ISOLATED DC/DC AND DC/AC CONVERTERS AND CONTROLLING METHODS THEREOF HAVING RELATIVELY BETTER EFFECTIVENESS - The configurations of an isolated DC/DC converter and an isolated DC/AC converter and the controlling methods thereof are provided. The proposed isolated DC/DC converter includes a DC/AC switching device, a transformer, a rectifier, and a duty ratio and frequency modulating apparatus coupled to the rectifier and the DC/AC switching device for generating a driving signal to adjust a duty ratio and a frequency of the switching device so as to regulate an output DC voltage of the converter. | 2008-09-11 |
20080219031 | Apparatus and methods for improving the transient response capability of a switching power supply - The transient response of a switching power supply is improved by providing one or more supplemental power sources connected to the output terminal of the power supply. In one embodiment additional current is provided when a sudden increase in load current causes a corresponding decrease in output voltage. In one embodiment current is discharged when a sudden decrease in load current causes a corresponding increase in output voltage. The supplemental power sources provide a fixed current for a fixed duration. In one embodiment the current provided from the power sources is variable according to the increase or decrease in load current. In some embodiments the supplemental current is provided for a time period approximating the time required for the switching power converter coil current to equal the new load current. | 2008-09-11 |
20080219032 | METHOD AND SYSTEM FOR OPERATING A POWER CONVERTER - A method and system for operating a power converter having an electrical component and a switch coupled to a voltage source are provided. A signal is received that is representative of a desired current flow through the electrical component. A signal is generated that is representative of a difference between the desired current flow and an actual current flow through the electrical component. A duty cycle for the switch is calculated based on the signal representative of the difference and a voltage generated by the voltage source. | 2008-09-11 |
20080219033 | Switching power supply device - A switching power supply device includes a first series circuit of first and second switching elements connected in parallel with a DC power supply. An isolation transformer has primary and secondary windings and first and second auxiliary windings, a first layer including the primary windings between a second layer of the two auxiliary windings, and a third layer of the secondary windings. A capacitor in series with the primary windings defines a second series circuit in parallel with the second switching element. A rectifying and smoothing circuit includes a rectifying diode and a smoothing capacitor, connected to the secondary windings. First and second control circuits turn on and off the first and second switching elements based on voltages generated in the two auxiliary windings, to obtain a DC output from the rectifying and smoothing circuit, enabling an adequate auxiliary windings voltage and stable switching operation including stable zero-voltage turn-on. | 2008-09-11 |
20080219034 | Circuit, Shrink Fixing and Regulation Method | 2008-09-11 |
20080219035 | Active Power Filter - An active power filter comprises an energy storage capacitor, an inverter, a filtering circuit and a controller. The inverter is controlled to act as a virtual resister at a fundamental frequency for compensating for the power loss of the active power filter, act as a virtual capacitor at a fundamental frequency for compensating for a fundamental reactive power of the load, and/or generate a harmonic current for suppressing the harmonic currents of specific orders of the load. | 2008-09-11 |
20080219036 | CLEAN INPUT UPS WITH FAST RECTIFIER CONTROL AND IMPROVED BATTERY LIFE - The present invention relates to the control of active rectifiers for UPS systems. Aspects of the present invention relate to a control algorithm that is implemented to realize a fast rectifier control operation that results in the improved life of a battery that is linked to the active rectifier of the UPS system. Within aspects of the present invention under unbalanced load conditions, it is possible to select (he desired behavior between the two possible extreme conditions, i.e. implement a clean power input that results in the reduced life of the battery or implement a non-clean power input resulting in the improved life of the battery. Additionally, the present invention utilizes fast rectifier control and specific feed-forward action to make it possible to obtain the very rigid control of a dc link voltage, even under extreme step load variations. | 2008-09-11 |
20080219037 | INTEGRATED CIRCUIT, MEMORY DEVICE, METHOD OF OPERATING AN INTEGRATED CIRCUIT, AND METHOD OF DESIGNING AN INTEGRATED CIRCUIT - An integrated circuit, a memory device, a method of operating an integrated circuit and a method of designing an integrated circuit are provided. An integrated circuit comprises a plurality of logical elements and a bus carrying signals for said plurality of logical elements. The integrated circuit also comprises a routing unit having an input coupled to said bus and a plurality of outputs to route signals received at said input to at least one of said outputs. The integrated circuit also comprises a plurality of lines coupled to said plurality of outputs to conduct said signals from said routing unit to at least one of said plurality of logical elements, wherein at least one of said plurality of lines couples said routing unit to only one of said logical elements. | 2008-09-11 |
20080219038 | FERROELECTRIC MEMORY DEVICE - Disclosed is a ferroelectric memory device. Multiple memory cells are connected between bit lines and a plate line, and constitute a memory cell array. Each of the memory cells is composed of a first ferroelectric capacitor and a memory cell transistor. The gates of the memory cell transistors are connected to multiple word lines, respectively. The bit lines are connected to multiple sense amplifiers for amplifying information. One end of the second ferroelectric capacitor is electrically connected to a corresponding one of the bit lines, and the other end of the second ferroelectric capacitor is electrically connected to a power supply. | 2008-09-11 |
20080219039 | Nonvolatile memory elements with metal-deficient resistive-switching metal oxides - Nonvolatile memory elements are provided that have resistive switching metal oxides. The nonvolatile memory elements may be formed by depositing a metal-containing material on a silicon-containing material. The metal-containing material may be oxidized to form a resistive-switching metal oxide. The silicon in the silicon-containing material reacts with the metal in the metal-containing material when heat is applied. This forms a metal silicide lower electrode for the nonvolatile memory element. An upper electrode may be deposited on top of the metal oxide. Because the silicon in the silicon-containing layer reacts with some of the metal in the metal-containing layer, the resistive-switching metal oxide that is formed is metal deficient when compared to a stoichiometric metal oxide formed from the same metal. | 2008-09-11 |
20080219040 | Method to prevent overreset - A method of addressing a memory cell includes applying a plurality of pulses to the memory cell, wherein a subsequent pulse has an amplitude greater than an initial pulse. In addition, a memory includes a memory cell and a control circuit configured to address the memory cell by applying a plurality of pulses to the memory cell, wherein a subsequent pulse has an amplitude greater than an initial pulse. | 2008-09-11 |
20080219041 | Processing Systems and Methods for Molecular Memory - Molecular memories, i.e., memories that incorporate molecules for charge storage, are disclosed. Molecular memory cells, molecular memory arrays, and electronic devices including molecular memory are also disclosed, as are processing systems and methods for manufacturing molecular memories. Methods of manufacturing molecular memories that enable semiconductor devices and interconnections to be manufactured monolithically with molecular memory are also disclosed. | 2008-09-11 |
20080219042 | Magnetic memory cell - By inserting a spin polarizing layer (typically pure iron) within the free layer of a MTJ or GMR memory cell, dR/R can be improved without significantly affecting other free layer properties such as Hc. Additional performance improvements can be achieved by also inserting a surfactant layer (typically oxygen) within the free layer. | 2008-09-11 |
20080219043 | Word Line Transistor Strength Control for Read and Write in Spin Transfer Torque Magnetoresistive Random Access Memory - Systems, circuits and methods for controlling word line voltage at a word line transistor in Spin Transfer Torque Magnetoresistive Random Access Memory (STT-MRAM) are disclosed. A first voltage can be supplied to the word line transistor for write operations. A second voltage, which is less than the first voltage, can be supplied to the word line transistor during read operations. | 2008-09-11 |
20080219044 | Read Disturb Reduction Circuit for Spin Transfer Torque Magnetoresistive Random Access Memory - Systems, circuits and methods for reducing read disturbances in Spin Transfer Torque Magnetoresistive Random Access Memory (STT-MRAM) are disclosed. A resistive element can be used during the read operation to control the read current and control read disturbances. An isolation element can be used to isolate the resistive element from the circuit during write operations. | 2008-09-11 |
20080219045 | Semiconductor memory device and magneto-logic circuit - Provided are a semiconductor memory device and a magneto-logic circuit which change the direction of a magnetically induced current according to a logical combination of logic states of a plurality of input values. The semiconductor memory device comprises a current driving circuit, a magnetic induction layer, and a resistance-variable element. The current driving circuit receives a plurality of input values and changes the direction of a magnetically induced current according to a logical combination of logic states of the input values. The magnetic induction layer induces magnetism having a direction varying according to the direction of the magnetically induced current. The resistance-variable element has a resistance varying according to the direction of the magnetism induced by the magnetic induction layer. | 2008-09-11 |
20080219046 | Writing method and system for a phase change memory - A writing method for a phase change memory is disclosed. The writing method inputs a first writing pulse signal to a phase change memory to heat the phase change memory to above a first temperature and inputting a second writing pulse signal to the phase change memory to keep the phase change memory at a second temperature. | 2008-09-11 |
20080219047 | APPARATUS AND METHOD FOR WRITING DATA TO PHASE-CHANGE MEMORY BY USING POWER CALCULATION AND DATA INVERSION - Provided are an apparatus and method for writing data to a phase-change random access memory (PRAM) by using writing power calculation and data inversion functions, and more particularly, an apparatus and method for writing data which can minimize power consumption by calculating the power consumed while input original data or inverted data is written to a PRAM and storing the data consuming less power. A PRAM consumes a significant amount of power in order to store data in a memory cell since a large electric current is required to flow for a long period of time. According to the present invention, since the PRAM consumes different amounts of power when writing data with a value of 0 and data with a value of 1, the power consumed when input original data is stored and the power consumed when the input original data is inverted and stored are compared to each other, the data with a smaller power consumption is stored when the data is written to the PRAM as a word unit, and thus the power consumption of the PRAM can be reduced. | 2008-09-11 |
20080219048 | Multibit electro-mechanical memory device and method of manufacturing the same - A multibit electro-mechanical memory device capable of increasing an integrated level of memory devices, and a method of manufacturing the same, are provided. The memory device includes a substrate, a bit line on the substrate; a lower word line and a trap site isolated from the bit line, a pad electrode isolated from a sidewall of the trap site and the lower word line and connected to the bit line, a cantilever electrode suspended over a lower void in an upper part of the trap site, and connected to the pad electrode and curved in a third direction vertical to the first and second direction by an electrical field induced by a charge applied to the lower word line, a contact part for concentrating a charge induced from the cantilever electrode thereon in response to the charge applied from the lower word line and the trap site, the contact part protruding from an end part of the cantilever electrode, and an upper word line formed with an upper void on the cantilever electrode. | 2008-09-11 |
20080219049 | ELECTRICALLY ALTERABLE NON-VOLATILE MEMORY WITH N-BITS PER CELL - An electrically alterable, non-volatile memory cell has more than two memory states that can be programmed selectively. Programming of the cell can be performed without actually reading the memory state of the cell during the programming operation. A plurality of the memory cells are preferably arranged in a matrix of rows and columns disposed substantially in a rectangle, with a plurality of word lines coupled with memory gate electrodes intersecting a first side of the rectangle substantially perpendicularly, a plurality of bit lines coupled with memory drain-source current paths intersecting a second side of the rectangle substantially perpendicularly (the second side also substantially perpendicularly intersecting the first side), a row select circuit being disposed at the first side for coupling with the word lines, and peripheral circuitry including a column select circuit and a sense circuit being disposed at the second side. | 2008-09-11 |
20080219050 | REDUCTION OF BACK PATTERN DEPENDENCY EFFECTS IN MEMORY DEVICES - A method for operating a memory that includes multiple analog memory cells includes storing data in the memory by writing first storage values to the cells, so as to cause the cells to hold respective electrical charge levels. After storing the data, second storage values are read from at least some of the cells, including at least one interfered cell that belongs to a group of cells. A Back Pattern Dependency (BPD) distortion caused by the electrical charge levels of one or more interfering cells in the group to at least one of the second storage values read from the at least one interfered cell is detected and canceled. The second storage values, including the at least one of the second storage values in which the BPD distortion was canceled, are processed so as to reconstruct the data. | 2008-09-11 |
20080219051 | SYSTEM THAT COMPENSATES FOR COUPLING DURING PROGRAMMING - Shifts in the apparent charge stored on a floating gate (or other charge storing element) of a non-volatile memory cell can occur because of the coupling of an electric field based on the charge stored in adjacent floating gates (or other adjacent charge storing elements). To compensate for this coupling, the read or programming process for a given memory cell can take into account the programmed state of an adjacent memory cell. To determine whether compensation is needed, a process can be performed that includes sensing information about the programmed state of an adjacent memory cell (e.g., on an adjacent bit line or other location). | 2008-09-11 |
20080219052 | ALWAYS-EVALUATED ZERO STANDBY-CURRENT PROGRAMMABLE NON-VOLATILE MEMORY - In an integrated circuit device, a continuous-output, zero-standby-current non-volatile storage cell is formed by P-MOS and N-MOS transistor elements coupled in series between first and second power supply nodes (e.g., V | 2008-09-11 |
20080219053 | PARTIAL BLOCK ERASE ARCHITECTURE FOR FLASH MEMORY - A method and system for increasing the lifespan of a flash memory device by selectively erasing sub-blocks of a memory block. Each physical memory block of the flash memory device is dividable into at least two logical sub-blocks, where each of the at least two logical sub-blocks is erasable. Therefore, only the data of the logical sub-block is erased and reprogrammed while unmodified data in the other logical sub-block avoids unnecessary program/erase cycles. The logical sub-blocks to be erased are dynamically configurable in size and location within the block. A wear leveling algorithm is used for distributing data throughout the physical and logical sub-blocks of the memory array to maximize the lifespan of the physical blocks during programming and data modification operations. | 2008-09-11 |
20080219054 | SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING OF THE SAME - A semiconductor memory device includes a plurality of active areas each extending in a first direction and including a memory cell string which includes select transistors and memory cells, current paths of which are connected in series, a first extension portion which is provided between one-side terminal end portions of two active areas neighboring in a second direction that crosses the first direction, and a second extension portion which is provided between other-side terminal end portions of the two active areas neighboring in the second direction, the first and second extension portions connecting the two active areas in a loop configuration. | 2008-09-11 |
20080219055 | MULTIPLE LEVEL PROGRAMMING IN A NON-VOLATILE MEMORY DEVICE - The programming method of the present invention minimizes program disturb by initially programming cells on the same word line with the logical state having the highest threshold voltage. The remaining cells on the word line are programmed to their respective logical states in order of decreasing threshold voltage levels. | 2008-09-11 |
20080219056 | SYSTEM THAT COMPENSATES FOR COUPLING DURING PROGRAMMING - Shifts in the apparent charge stored on a floating gate (or other charge storing element) of a non-volatile memory cell can occur because of the coupling of an electric field based on the charge stored in adjacent floating gates (or other adjacent charge storing elements). To compensate for this coupling, the read or programming process for a given memory cell can take into account the programmed state of an adjacent memory cell. To determine whether compensation is needed, a process can be performed that includes sensing information about the programmed state of an adjacent memory cell (e.g., on an adjacent bit line or other location). | 2008-09-11 |
20080219057 | Non-Volatile Memory With Cache Page Copy - A non-volatile memory and methods includes cached page copying using a minimum number of data latches for each memory cell. Multi-bit data is read in parallel from each memory cell of a group associated with a first word line. The read data is organized into multiple data-groups for shuttling out of the memory group-by-group according to a predetermined order for data-processing. Modified data are returned for updating the respective data group. The predetermined order is such that as more of the data groups are processed and available for programming, more of the higher programmed states are decodable. An adaptive full-sequence programming is performed concurrently with the processing. The programming copies the read data to another group of memory cells associated with a second word line, typically in a different erase block and preferably compensated for perturbative effects due to a word line adjacent the first word line. | 2008-09-11 |
20080219058 | SEMICONDUCTOR MEMORY DEVICE WHICH STORES PLURAL DATA IN A CELL - A memory cell array is configured to have a plurality of memory cells arranged in a matrix, each of the memory cells being connected to a word line and a bit line and being capable of storing n values (n is a natural number equal to or larger than 3). A control circuit controls the potentials of the word line and bit line according to input data and writes data into a memory cell. The control circuit writes data into the memory cell to a k-valued threshold voltage (k<=n) in a write operation, precharges the bit line once, and then changes the potential of the word line an i number of times to verify whether the memory cell has reached an i-valued (i<=k) threshold voltage. | 2008-09-11 |
20080219059 | Method for Cache Page Copy in a Non-Volatile Memory - A non-volatile memory and methods include cached page copying using a minimum number of data latches for each memory cell. Multi-bit data is read in parallel from each memory cell of a group associated with a first word line. The read data is organized into multiple data-groups for shuttling out of the memory group-by-group according to a predetermined order for data-processing. Modified data are returned for updating the respective data group. The predetermined order is such that as more of the data groups are processed and available for programming, more of the higher programmed states are decodable. An adaptive full-sequence programming is performed concurrently with the processing. The programming copies the read data to another group of memory cells associated with a second word line, typically in a different erase block and preferably compensated for perturbative effects due to a word line adjacent the first word line. | 2008-09-11 |
20080219060 | DEVICE AND METHOD FOR INTERNAL VOLTAGE MONITORING - A memory device and method for internal voltage monitoring is disclosed. One embodiment includes at least one error register configured to store a particular error flag during the stress test. This error flag is generated if the supply voltage applied at the memory device during the test method in the memory device or an internally generated voltage of the memory device lies below a predetermined threshold value. | 2008-09-11 |
20080219061 | APPARATUS AND METHOD FOR DETECTING LEAKAGE CURRENT OF SEMICONDUCTOR MEMORY DEVICE, AND INTERNAL VOLTAGE GENERATING CIRCUIT USING THE SAME - A semiconductor memory device is capable of generating a back bias voltage based on a target level changed according to a leakage current of the semiconductor memory devices, thereby minimizing the amount of the leakage current. The semiconductor memory device includes a leakage current detector and a back bias voltage generator. The leakage current detector is configured to detect a leakage current of a cell array. The back bias voltage generator is configured to generate a back bias voltage having a target level changed according to the leakage current. | 2008-09-11 |
20080219062 | SEMICONDUCTOR MEMORY DEVICE - In one embodiment, a semiconductor memory device includes a plurality of pairs of bit lines, each of the pairs including a first bit line, a second bit line, a memory cell coupled to the first bit line, a sense amplifier determining the logical value stored in the memory cell according to a potential difference between the first and the second bit line, a reference voltage generation circuit, and a reference voltage supply switch coupling an output of the reference voltage generation circuit to the second bit line. | 2008-09-11 |
20080219063 | SYSTEM AND METHOD OF SELECTIVE ROW ENERGIZATION BASED ON WRITE DATA - A system and method of selective row energization based on write data, with a selective row energization system including a storage array | 2008-09-11 |
20080219064 | Semiconductor memory apparatus with write training function - A semiconductor memory apparatus having a write training function includes a storage unit that stores write data or read data output from a memory cell block and outputs data according to an output control signal, and a control unit that controls the output control signal to be generated at different timings according to whether or not a write training signal is activated. | 2008-09-11 |
20080219065 | DELAY LOCKED LOOP CIRCUIT FOR A SYNCHRONOUS SEMICONDUCTOR MEMORY DEVICE AND A METHOD OF GENERATING INFORMATION ABOUT A LOAD CONNECTED TO A DATA PIN OF A SYNCHRONOUS SEMICONDUCTOR MEMORY DEVICE - A delay locked loop (DLL) circuit for a synchronous semiconductor memory device which can control a delay time of a feedback loop within the DLL circuit according to the magnitude of an external load, and a method of generating information about a load connected to a data pin of a synchronous semiconductor memory device are provided. The DLL circuit includes a replica output driver delaying an internal clock signal by a first delay time to output a first internal clock signal, the first delay time is a delay time of the internal clock signal which is generated by an output driver when a first load of a first magnitude is connected to an output terminal of the output driver, and a transfer/delay circuit transferring the first delay internal clock signal to a phase detector as a second delay internal clock signal when the first load is connected to the output terminal, and outputting the second delay internal clock signal to the phase detector by delaying the first delay internal clock signal by a second delay time, the second delay time is a delay time of the internal clock signal which is generated by the output driver when a second load of a second magnitude, which is larger than the first magnitude, is connected to the output terminal. | 2008-09-11 |
20080219066 | MEMORY SYSTEM AND METHOD ENSURING READ DATA STABILITY - A memory system and related method of operation are disclosed. The memory system includes a memory configured to generate a data strobe signal including “(n/2)+1” clock signals, where “n” is a number of base data blocks in read data synchronously transferred by the memory during a read operation, and a memory controller configured to receive the read data, receive the data strobe signal, delay the data strobe signal to generate a delayed data strobe signal, and synchronously output “n/2” sampled data blocks to a requesting device in relation to the delayed data strobe signal. | 2008-09-11 |
20080219067 | INDIVIDUAL I/O MODULATION IN MEMORY DEVICES - A DRAM circuit with reduced power consumption and in some circumstances faster memory array access speed. Input/output lines connected to a memory array are sensed according to their capacitance/length in comparison to a threshold capacitance/length. The input/output lines that are shorter, or less capacitive, than the threshold are sensed sooner than those input/output lines that are longer, more capacitive, than the threshold. Since shorter input/output lines are sensed sooner, they require less power and may be accessed faster. | 2008-09-11 |
20080219068 | ZQ CALIBRATION CONTROLLER AND METHOD FOR ZQ CALIBRATION - A ZQ calibration circuit performs a ZQ calibration additionally in an initial operation of a semiconductor memory device. The ZQ calibration controller of the ZQ calibration circuit includes a first signal generator, a second signal generator, and a control unit. The first signal generator generates a pre-calibration signal during an initialization of the semiconductor memory device. The second signal generator generates ZQ calibration signals in response to a ZQ calibration command. The control unit outputs signals to control a ZQ calibration in response to the pre-calibration signal and the ZQ calibration signals. | 2008-09-11 |
20080219069 | DEVICE THRESHOLD CALIBRATION THROUGH STATE DEPENDENT BURNIN - Disclosed are embodiments of a method for reducing and/or eliminating mismatch. The embodiments sample the bias of one or more circuit sub-components that require a balanced state (e.g., sampling the bias of the cross-coupled transistors in each memory cell and/or sense amp in a memory array) before chip burn-in, by initiating a burn-in process during which an individually selected state is applied to each of the devices in the circuit. This fatigues the devices away from their preferred states and towards a balanced state. The bias is periodically reassessed during the burn-in process to avoid over-correction. By using this method both memory cell and sense-amplifier mismatch can be reduced in memory arrays, resulting in smaller timing uncertainty and therefore faster memories. | 2008-09-11 |
20080219070 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device includes: memory cells respectively arranged on intersecting points of a plurality of word lines and a plurality of data lines, and respectively having a capacitor for storing data; a sense amplifier provided in between the data lines forming a data line pair so as to amplify an electric potential difference between the data lines and to perform data reading; and a test memory cell arranged on each of the data lines and having a test capacitor with a capacitance value set smaller than the above capacitor, and when performing a test for a memory cell, inversed data of the data to be stored into a target memory cell of a test target is pre-written into the test memory cell. | 2008-09-11 |
20080219071 | Data flow scheme for low power DRAM - Circuits and methods to minimize power required for sensing and precharge of DRAMs have been achieved. A control circuit ensures that during READ operations the duration of sensing of DRAM cell and precharging is kept to a minimum. A test DRAM cell is used to determine the exact time required for data sensing. Furthermore no precharging is performed during WRITE-operations. In case data is changing from “1” to “0” or vice versa data lines are inverted accordingly during WRITE operation. | 2008-09-11 |
20080219072 | Method and apparatus for a dynamic semiconductor memory with compact sense amplifier circuit - A high-density dynamic memory device with compact sense amplifier circuit is described. The memory device achieves high density through the use of a compact sense amplifier circuit that employs a single transistor to sense stored dynamic data. Functionality of the device is enabled by an architecture and method of operation that support a compact sense amplifier circuit. Enabling techniques include sequential sensing of memory columns, a two-pass write operation, a two-step refresh operation, a reference scheme that uses reference data stored in regular memory cells, and the application of digital signal processing to determine sensed data and cancel crosstalk noise. | 2008-09-11 |
20080219073 | Semiconductor memory device and method for driving the same - A semiconductor memory device can stabilize a voltage level of a normal driving voltage terminal in a normal driving operation, which is performed after an overdriving operation, even when an overdriving voltage is unstable due to environmental factors of the semiconductor memory device in the overdriving operation. The semiconductor memory device includes a bit line sense amplifier for performing an amplification operation using a normal driving voltage or an overdriving voltage to sense and amplify data applied to bit lines, a normal driving voltage compensator configured to drive a normal driving voltage terminal according to a voltage level of the normal driving voltage terminal and target normal driving voltage levels, and a discharge enable signal generator configured to generate a discharge enable signal by adjusting an activation period of the discharge enable signal according to the overdriving voltage. | 2008-09-11 |
20080219074 | Abbreviated Burst Data Transfers for Semiconductor Memory - An integrated circuit having a nominal minimum burst length defined by a nominal data prefetch size transfers data by accepting an abbreviated burst data read request directed to a first bank, prefetching less than the nominal data prefetch size, and providing the data in an abbreviated burst data transfer less than the nominal minimum burst length. | 2008-09-11 |
20080219075 | Control of inputs to a memory device - A memory device includes a command decoder and control interface logic. One or more external inputs, such as row and column address strobes, communicate with the command decoder through the control interface logic. A control signal is also in communication with the control interface logic. During operation of a drowsy mode in the memory device, a self-refresh signal causes the control signal to disable the external inputs. With the external inputs disabled, command hazards are reduced when exiting drowsy mode. | 2008-09-11 |
20080219076 | SEMICONDUCTOR CIRCUITS - Semiconductor circuit capable of selecting a corresponding adjusting parameter to adjust the received signal according to different voltages and frequencies. A voltage detector detects a voltage level of an external power voltage to generate a voltage detection signal, a frequency detector detects frequency of a main clock to generate a frequency detection signal, and a signal adjustment unit receives a first signal and selects one of a plurality of different adjusting parameters to adjust the first signal according to the voltage detection signal and the frequency detection signal. | 2008-09-11 |
20080219077 | INTERNAL VOLTAGE GENERATION CIRCUIT AND METHOD FOR SEMICONDUCTOR DEVICE - An internal voltage generation circuit for a semiconductor device and method therefor includes a voltage generator configured to generate voltages with different levels by using an external voltage. A code storing unit is configured to store a selection code to select an internal voltage out of the plurality of voltages. A decoding unit selects the internal voltage from among the plurality of voltages in response to the selection code in a normal mode, and selects the internal voltage out of the plurality of voltages in response to a test selection code set in a test mode. The interval voltage selected in the normal mode is used as an initial value that is a reference of the selection in the test mode. | 2008-09-11 |
20080219078 | MEMORY SYSTEM AND METHOD OF CONTROLLING THE SAME - One aspect in accordance with the present invention provides a memory system receiving a power supply from a host device. The memory system includes a non-volatile semiconductor memory and a controller for controlling writing and reading data to and from the semiconductor memory. The controller operates in such a manner that an amount of each of n currents is deducted from an amount of a current supplied from the power supply, the n currents having n values that gradually increase from the first to n-th. | 2008-09-11 |
20080219079 | SEMICONDUCTOR MEMORY DEVICE AND OUTPUT DRIVE CIRCUIT THEREOF - An apparatus for supplying current to a semiconductor memory device. A current supply circuit supplies current to an input/output (I/O) drive circuit responsive to a pattern of data input to the I/O drive circuit. The current supply circuit configured to supply current generated by an external voltage to the I/O drive circuit responsive to a first pattern of data input to the I/O drive circuit, and to prevent the current generated by the external voltage from being supplied to the I/O drive circuit responsive to a second pattern of data input to the I/O drive circuit. | 2008-09-11 |
20080219080 | Memory Device with Reduced Standby Power Consumption and Method for Operating Same - Disclosed herein are memory devices comprising a plurality of memory cells to which a standby voltage is to be supplied during standby mode to avoid loss of data, and methods of operating said memory devices, the methods comprising: (a) determining an actual value of a bit integrity parameter of the memory cells; (b) comparing said actual value with a predetermined minimal value of the bit integrity parameter which takes into account possible variations in cell properties as a result of process variations; and (c) adjusting the standby voltage towards a more optimal value based on the result of the comparison in such a way that said bit integrity parameter determined for said more optimal value of the standby voltage approaches the predetermined minimal value. The circuitry for measuring the bit integrity parameter preferably comprises a plurality of replica test cells which are added to the memory matrix. | 2008-09-11 |
20080219081 | SEMICONDUCTOR MEMORY APPARATUS - A semiconductor memory apparatus includes first and second data storing/processing sections that have memory areas in a bank and the first and second data storing/processing sections share a circuit block that inputs and outputs the data, and a signal line that transmits the data. | 2008-09-11 |
20080219082 | NONVOLATILE SEMICONDUCTOR MEMORY - Disclosed is a nonvolatile memory system including at least one nonvolatile memory each having a plurality of nonvolatile memory cells and a buffer memory; and a control device coupled to the nonvolatile memory. The control device is enabled to receive external data and to apply the data to the nonvolatile memory, and the nonvolatile memory is enabled to operate a program operation including storing the received data to the buffer memory and storing the data held in the buffer memory to ones of nonvolatile memory cells. Moreover, the control device is enabled to receive external data while the nonvolatile memory is operating in the program operation. Also, the buffer memory is capable of receiving a unit of data, equal to the data length of data to be stored at one time of the program operation, the data length being more than 1 byte. | 2008-09-11 |
20080219083 | Semiconductor memory device and power control method thereof - A semiconductor memory device for saving power consumption and control method thereof are disclosed. The clock frequency on memory chips is dynamically adjusted to match the data transferring rate between the other units in computer system and the memory chips. A fill state of buffer and transferring rate on an input/output interface are detected by a monitor. A frequency adjuster increases or decrease the clock frequency on memory chips for keeping a good transferring rate and saving unnecessary power according to the monitor's detection. | 2008-09-11 |
20080219084 | Fabrication Methods of Metal/Polymer/Ceramic Matrix Composites Containing Randomly Distributed or Directionally Aligned Nanofibers - Disclosed herein is a method for manufacturing a composite having nanofibers uniformly dispersed in a metal, polymer or ceramic matrix. The method comprises mixing the nanofibers with a metallic, polymeric or ceramic material, followed by uniformly dispersing the nanofibers in the material via deformation of the metal, polymer or ceramic matrix by application of mechanical energy to the material; and imparting a directionality to the nanofibers via application of a mechanical mass flowing process to a composite material with the nanofibers uniformly dispersed in the metal, polymer or ceramic matrix. With the method, since the nanofibers can be uniformly dispersed in the metal, polymer or ceramic matrix via a simple mechanical process, the composite can be manufactured through a simple process, thereby enhancing manufacturing efficiency. | 2008-09-11 |
20080219085 | Vibration exciter - A vibration exciter, particularly for a vibration pile driver, comprises at least two axles disposed parallel to one another, as well as at least two imbalance masses, which are attached to one or more of the axles. The relative rotary position of the imbalance masses can be adjusted relative to one another by at least one rotary oscillating motor having a rotor shaft and a stator housing. The rotor shaft is an integral part of one of the axles, and the rotary position of the stator housing relative to the rotor shaft can be changed. The stator housing has at least one closure lid that is at least partially unreleasably coated with a slide alloy, for radial and axial bearing of the rotor shaft. At least one shaft seal is disposed between the rotor shaft and stator housing. The seal is hydraulically biased and provided with a support element. | 2008-09-11 |
20080219086 | Apparatus for the heat-exchanging and mixing treatment of fluid media - An apparatus for the mixing conveying of fluids with heat exchange includes a housing with installations that each include a first hollow structure for conveying a first fluid while a second fluid is able to flow around the first hollow structure. The second fluid flows along a main flow direction which is substantially disposed along the longitudinal axis of the housing. A second hollow structure is provided through which the first fluid can flow and which can be flowed around by the second fluid with the second hollow structure being arranged cross-wise with respect to the first hollow structure. The hollow structures have a flow cross-section with a first width B | 2008-09-11 |
20080219087 | Fluid Mixing Apparatus and Method - Methods and apparatus are provided for influencing mixing of a first fluid injected through a slot into a second fluid flowing through a conduit, by automatically or remotely adjusting the slot width to provide at least a certain slot velocity of the first fluid being introduced into the conduit. In particular, methods and apparatus are provided for mixing control in injecting titanium tetrachloride into an oxygen stream in a process for making titanium dioxide. | 2008-09-11 |
20080219088 | MIXING DEVICE - A mixing device for mixing a first and second material together to create an output mixture. The device includes a first chamber containing the first material coupled to a mixing chamber defined between a rotor and a stator. The rotor is disposed inside the stator and rotates therein about an axis of rotation. The first chamber houses an internal pump configured to pump the first material from the first chamber into the mixing chamber. The pump may be configured to impart a circumferential velocity into the first material before it enters the mixing chamber. At least one of the rotor and stator have a plurality of through-holes through which the second material is provided to the mixing chamber. Optionally, a second chamber is coupled to the mixing chamber. The second chamber may house an internal pump configured to pump the output material from the mixing chamber into the second chamber. | 2008-09-11 |
20080219089 | Mixing device configured to blend food - A mixing device, configured to blend food, including a housing, having a motor, and a jar removably mounted to the housing for containing food. The housing includes a base, a central body and a pair of side bodies that attach to the sides of the central body in an assembled configuration of the housing. Further, the housing includes a top removably mounted to the base to clamp the side bodies and the central body between the top and the base when the housing is in the assembled configuration. | 2008-09-11 |
20080219090 | Systems for mixing a frozen dessert - A dessert mixing machine comprises a housing and a motor driven drive shaft associated with the housing. An auger is operably attached to the drive shaft, the auger being rotated when the motor driven shaft is rotated. A mixing cone is provided, with the mixing cone and the auger being moveable relative to one another. A drive assembly for moving the mixing cone and the auger relative to one another is also provided. A locking system is operable to restrict or limit movement of the mixing cone and the auger relative to one while the auger is being rotated by the motor driven shaft. | 2008-09-11 |
20080219091 | FLUID MIXING APPARATUS - A reciprocating drive assembly is disclosed for use in a fluid mixer to impart reciprocating movement along a longitudinal axis to a shaft carrying a mixing head. The drive assembly includes a housing, a flywheel mounted for rotation about a rotational axis, a crank member projecting from the flywheel, and a yoke supported by the housing for movement along a yoke axis parallel to the longitudinal axis. The yoke is releasably connected to the shaft and has a linear race formed therein for receiving the crank member. Guide assemblies are connected to the housing and to the yoke for sliding engagement therewith along guide axes parallel to the yoke axis. The yoke is between the guide assemblies. The crank member is caused to translate linearly within the race, thereby urging the yoke to move along the yoke axis to effect longitudinal reciprocating movement of the mixing head. | 2008-09-11 |
20080219092 | WINE WHISK - A wine aeration tool comprises a bottle stopper for stoppering a bottle. The bottle stopper has a first end for insertion into the bottle and a second end. An agitator connects to the second end of the bottle stopper for aerating wine in a container. | 2008-09-11 |
20080219093 | Sensing System - The present invention relates to a sensing system, in particular to sensing system for sensing undersea seismic events. A vibration sensor is provided for sensing seismic vibrations on the sea bed is provided. The vibration sensor is electrically coupled to a transmitter unit, the transmitter unit being arranged to transmit, in use, an acoustic wave from which the presence of a seismic vibration can be inferred. The acoustic wave modulates light travelling along a nearby optical cable, the modulation being recovered at a distant monitoring station. A flotation arrangement is provide for retaining the transmitter unit in a raised position relative to the sea bed to facilitate the coupling of the acoustic wave to the optical cable. | 2008-09-11 |
20080219094 | Systems and Methods for Seismic Data Acquisition Employing Asynchronous, Decoupled Data Sampling and Transmission - Systems and methods for asynchronously acquiring seismic data are described, one system comprising one or more seismic sources, a plurality of sensor modules each comprising a seismic sensor, an A/D converter for generating digitized seismic data, a digital signal processor (DSP), and a sensor module clock; a seismic data recording station; and a seismic data transmission sub-system comprising a high precision clock, the sub-system allowing transmission of at least some of the digitized seismic data to the recording station, wherein each sensor module is configured to periodically receive from the sub-system an amount of the drift of its clock relative to the high precision clock. This abstract is provided to comply with rules requiring an abstract to ascertain the subject matter of the disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. | 2008-09-11 |
20080219095 | Technique and System to Cancel Noise from Measurements Obtained from a Multi-Component Streamer - A technique includes receiving a pressure measurement and a particle motion measurement from at least towed seismic sensor. The pressure measurement contains signal and noise. The technique includes estimating the signal in the pressure measurement and based at least on the estimated signal in the pressure measurement, estimating a noise in the pressure measurement. Noise in the particle motion measurement is predicted based on at least the estimated noise in the pressure measurement, and the particle motion measurement is processed to remove noise based on at least the predicted noise. | 2008-09-11 |
20080219096 | METHODS AND APPARATUS FOR PERFORMING MOVING CHECKSHOTS - Methods and apparatus for creating a velocity profile of a formation surrounding a borehole by checkshot measurements while moving the tool along the borehole. A conveyance and a sensor section are configured to move the sensor section in the borehole. At least one receiver is configured to detect signals generated at or near the surface while the sensor section is moving in the borehole. | 2008-09-11 |
20080219097 | ACOUSTIC TELEMETRY TRANSCEIVER - One embodiment includes an apparatus that includes a piezoelectric transducer to generate an acoustic signal that is to modulate along a mandrel, wherein the piezoelectric transducer includes at least one piezoelectric element and at least one electrode that is without non-permanent joints. | 2008-09-11 |
20080219098 | Acoustic Waveguide Plate With Nonsolid Cores - An acoustic (sound or ultrasound) wave transmitter having a plurality of waveguides is described, and a method of making such a transmitter is described. Each waveguide may have a cladded core. The core may be a liquid such as water, alcohol or mineral oil. Alternatively, the core may be a colloidal gel, such as gelatin dissolved in at least one of water, vinyl plastisol or silicone gel. The cladded core is capable of transmitting acoustic wave energy from a first end surface to a second end surface of the cladded core. The waveguides may be substantially fixed relative to each other by a binder. The binder may be formed by fusing the claddings together, potting a material between the waveguides and/or mechanically holding the waveguides. | 2008-09-11 |
20080219099 | DETERMINING ANGLES OF ARRIVAL USING MULTIPATHS - In one aspect, a method to determine multipath angles of arrival includes performing an autocorrelation on a first signal received at a first received beam from a signal source, performing a cross-correlation between the first signal and a second signal received at a second receive beam from the signal source, and determining an angle of arrival for a first path from the signal source and an angle of arrival for a second path from the signal source based on the autocorrelation and the cross-correlation. | 2008-09-11 |
20080219100 | Systems and Methods Related to Identifying and/or Locating Weapon Fire Incidents - A system and method for detecting, identifying, and fixing the location of the source of an acoustic event. The inventive system includes: a plurality of sensors dispersed at somewhat regular intervals throughout a monitored area; a communication network adapted to deliver information from the sensors to a host processor; and a process within the host processor for determining, from the absolute times of arrival of an event at two or more sensors, a position of the source of the event. Acoustic events are detected and analyzed at each sensor so that the sensor transmits over the network: an identifier for the sensor; an identifier for the type of event; and a precise absolute time of arrival of the event at the sensor. In a preferred embodiment, the system also identifies the type of weapon firing a gunshot. | 2008-09-11 |
20080219101 | Acoustic Projector Having Minimized Mechanical Stresses - An acoustic projector which includes an outer shell ( | 2008-09-11 |
20080219102 | Apparatus for forming an apparatus for indicating the passage of time and the formed apparatus - The present invention discloses a time passage indicating apparatus which comprises a substrate, a background layer on the substrate, and a time passage indicating layer on the background layer. The background layer and the time passage indicating layer bond to each other through a first and second polymer binder. The background layer diplays a background color. The time passage indicating layer displays an initial color in an initial state that is different from the background color, and a final color in a final state that is substantially the same as the background color, so as to indicate the end of a time period where the time passage indicating layer transforms from the initial state to the final state. | 2008-09-11 |
20080219103 | Detent Escapement for Timepiece - An escapement for a timepiece movement includes a toothed escape wheel, a balance and a detent respectively pivoted on rotation axes. The detent supports a pallet lock that interacts with the first tooth of the escape wheel along a certain length of penetration in order to block it in an idle phase during which the balance executes a free arc of oscillation. An impulse pallet rotationally driven by the balance interacts with a second tooth when the detent is pivoted in order to release the escape wheel, this wheel turning by a forward pitch before being blocked again by the pallet lock by interaction with the second tooth. The escapement also includes a limiting plate, which is coaxial and rotationally secured to the balance, has a periphery including a substantially circular main portion and a cutout positioned facing the pallet lock in the release phase. | 2008-09-11 |
20080219104 | TANGENTIAL IMPULSE ESCAPEMENT - The tangential impulse escapement includes a lever device ( | 2008-09-11 |
20080219105 | Al zimuth Christian meter with formula, and tables - This invention is a Mathematical Formula, T=d/p, and corresponding tables, that are meant to initiate a manual Method of Process. This process is intended to meter the time differential between the LORDS 360 degree Day, vs. Mans 360 degree Day. Sort of like a shot clock in basketball, vs the basketball game clock. The method is used to acquire exact information concerning ones inquiries concerning the time differential between these two ‘Days’. | 2008-09-11 |