37th week of 2022 patent applcation highlights part 65 |
Patent application number | Title | Published |
20220293625 | METHODS OF FORMING MICROELECTRONIC DEVICES WITH NITROGEN-RICH INSULATIVE STRUCTURES, AND RELATED MICROELECTRONIC DEVICES, MEMORY DEVICES, AND ELECTRONIC SYSTEMS - A method of forming a microelectronic device comprises forming a stack structure comprising a vertically alternating sequence of insulative structures and additional insulative structures, at least some of the additional insulative structures comprising silicon nitride having a ratio of nitrogen atoms to silicon atoms greater than about 1.58:1.00, forming openings through the stack structure, and forming cell pillar structures within the openings, the cell pillar structures individually comprising a semiconductor channel material vertically extending through the stack structure. Related methods, microelectronic devices, memory devices, and electronic systems are also described. | 2022-09-15 |
20220293626 | THREE-DIMENSIONAL MEMORY DEVICE ERASE OPERATION - Implementations of the present disclosure provide 3D memory devices and methods for operating the 3D memory devices. In an example, a 3D memory device includes a plurality of memory layers and a dummy memory layer between the plurality of memory layers and a NAND memory string extending through the memory layers and the dummy memory layer. The NAND memory string includes a source, a drain, and a plurality of memory cells at intersections with the plurality of memory layers and between the source and the drain. The 3D memory device also includes a peripheral circuit configured to erase the plurality of memory cells. To erase the plurality of memory cells, the peripheral circuit includes a word line driving circuit configured to apply a positive bias voltage on the dummy memory layer. | 2022-09-15 |
20220293627 | THREE-DIMENSIONAL MEMORY DEVICES AND METHODS FOR FORMING THE SAME - A three-dimensional (3D) memory device is provided. In an example, the 3D memory device includes a staircase and a plurality of groups of support structures through the staircase. The plurality of groups of support structures are arranged in a first direction, and each of the groups of support structures comprises three support structures, wherein projections of the three support structures form a triangular shape in a plane parallel to the first direction. | 2022-09-15 |
20220293628 | MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME AND METHOD FOR OPERATING THE SAME - A memory device includes a stack and a plurality of memory strings respectively penetrating the stack along the first direction and including adjacent ones of the first memory string and the second memory string. The first memory string and the second memory string include conductive pillars (including first to third conductive pillars), channel structures, and memory structures. The first memory string and the second memory string share the second conductive pillar. The channel structures include first to fourth channel layers respectively extending along the first direction. The first channel layer and the second channel layer correspond to the first memory string and are separated from each other. The third channel layer and the fourth channel layer correspond to the second memory string and are separated from each other. The memory structures are disposed between the stack and the channel structures. | 2022-09-15 |
20220293629 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device includes forming a stacked structure with first material layers and second material layers that are alternately stacked with each other, forming a first opening that passes through the stacked structure, forming second openings between the first material layers, forming first sacrificial layers in the second openings, forming first isolation layers that protrude into the first opening by oxidizing the first sacrificial layers, forming mold patterns on the first material layers between the protruding portions of the first isolation layers, forming third openings by etching portions of the first isolation layers that are exposed between the mold patterns, forming second sacrificial layers in the third openings, and forming second isolation layers that protrude farther toward the center of the first opening than the mold patterns by oxidizing the second sacrificial layers. | 2022-09-15 |
20220293630 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device includes a plurality of first conductive layers, a first semiconductor layer opposed to them, a first insulating film disposed between the plurality of first conductive layers and the first semiconductor layer, a second semiconductor layer connected to the first semiconductor layer, a second conductive layer opposed to this, a second insulating film disposed between the second semiconductor layer and the second conductive layer, and a third semiconductor layer connected to the first semiconductor layer via the second semiconductor layer. The second conductive layer includes a first part and a second part disposed between the first part and the second semiconductor layer. A thickness in the first direction of the second part is smaller than a thickness in the first direction of the first part. | 2022-09-15 |
20220293631 | Integrated Assemblies, and Methods of Forming Integrated Assemblies - Some embodiments include an integrated assembly having a memory array region, a staircase region, and an intervening region between the staircase region and the memory array region. The intervening region includes first and second slabs of insulative material extending through a stack of alternating insulative and conductive levels. Bridging regions are adjacent to the slabs. First slits are along the bridging regions, and second slits extend through the slabs. First panels are within the first slits, and second panels are within the second slits. The second panels are compositionally different from the first panels. Some embodiments include methods of forming integrated assemblies. | 2022-09-15 |
20220293632 | INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING THE SAME - An integrated circuit device includes a plurality of conductive lines extending in a horizontal direction parallel to a main surface of a substrate and overlapping one another in a vertical direction vertical to the main surface, on the substrate, a plurality of insulation layers each between two adjacent conductive lines of the plurality of conductive lines to extend in the horizontal direction, a channel layer extending in the vertical direction in a channel hole passing through the plurality of conductive lines and the plurality of insulation layers, and a plurality of outer blocking dielectric layers between the plurality of conductive lines and the channel layer, in at least some of the plurality of conductive lines, wherein a width of each of the plurality of outer blocking dielectric layers in the horizontal direction increases toward the main surface. | 2022-09-15 |
20220293633 | THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES - A three-dimensional (3D) semiconductor memory device includes a source structure disposed on a horizontal semiconductor layer and including a first source conductive pattern and a second source conductive pattern which are sequentially stacked on the horizontal semiconductor layer, an electrode structure including a plurality of electrodes vertically stacked on the source structure, and a vertical semiconductor pattern penetrating the electrode structure and the source structure, wherein a portion of a sidewall of the vertical semiconductor pattern is in contact with the source structure. The first source conductive pattern includes a discontinuous interface at a level between a top surface of the horizontal semiconductor layer and a bottom surface of the second source conductive pattern. | 2022-09-15 |
20220293634 | SEMICONDUCTOR DEVICE - A semiconductor device includes a first chip including a substrate and a first wiring layer formed on a first surface of the substrate; and a second wiring layer formed on a second surface of the substrate opposite to the first surface of the substrate. The second wiring layer includes a first power line to which a first power potential is applied; a second power line to which a second power potential is applied; a third power line to which a third power potential is applied; a first switch connected between the first power line and the second power line; and a second switch provided on one of the first power line or the third power line. The first chip includes a first circuit provided between the first power line and the third power line. | 2022-09-15 |
20220293635 | SEMICONDUCTOR APPARATUS AND METHOD FOR MANUFACTURING THE SAME - A semiconductor apparatus and a method for manufacturing the semiconductor apparatus are provided. The semiconductor apparatus includes: a base substrate; a plurality of chips arranged on the base substrate each including a chip main body and a plurality of terminals arranged thereon; a plurality of fixed connection portions arranged on the base substrate, and adjacent to the plurality of chips; a terminal expansion layer arranged on the base substrate; and a plurality of expansion wires in the terminal expansion layer and configured to electrically connect the chips, wherein an expansion wire configured to electrically connect two chips includes at least a first wire segment and a second wire segment, and the first wire segment is configured to electrically connect a terminal of a chip and a fixed connection portion adjacent to the chip, and the second wire segment is configured to connect two fixed connection portions between the two chips. | 2022-09-15 |
20220293636 | DISPLAY DEVICE AND TILED DISPLAY DEVICE INCLUDING THE SAME - A display device includes a first substrate including a display area and a non-display area adjacent to the display area, a first voltage line disposed on the first substrate and supplying a first voltage, a second substrate disposed on the first voltage line, and a thin film transistor layer disposed on the second substrate and comprising a plurality of thin film transistors and a second voltage line disposed in the non-display area and electrically connected to the first voltage line through a first contact hole penetrating the second substrate. | 2022-09-15 |
20220293637 | ARRAY SUBSTRATE AND DISPLAY PANEL - An array substrate and a display panel are provided. The array substrate includes a base substrate and a first conductive layer, a first insulating layer, a second conductive layer and a third conductive layer which are sequentially stacked on the base substrate, the first insulating layer insulates the first conductive layer from the second conductive layer, the first conductive layer includes a first signal line, the second conductive layer includes a second signal line and a first connection part spaced apart from each other, the third conductive layer includes a second connection part, the first connection part is electrically connected with the first signal line through a first via hole in the first insulating layer; the second connection part is electrically connected with the first connection part and the second signal line to constitute a connection structure electrically connecting the first signal line with the second signal line. | 2022-09-15 |
20220293638 | SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor structure includes a first transistor, a second transistor, a first dummy source/drain, a third transistor, a fourth transistor, and a second dummy source/drain. The first transistor and a second transistor adjacent to the first transistor are at a first elevation. The first dummy source/drain is disposed at the first elevation. The third transistor and a fourth transistor adjacent to the third transistor, are at a second elevation different from the first elevation. The second dummy source/drain is disposed at the second elevation. The second transistor is vertically aligned with the third transistor. The first dummy source/drain is vertically aligned with a source/drain of the fourth transistor. The second dummy source/drain is vertically aligned with a source/drain of the first transistor. The gate structure between the second dummy source/drain and a source/drain of the third transistor is absent. A method for manufacturing a semiconductor structure is also provided. | 2022-09-15 |
20220293639 | DISPLAY PANEL AND DISPLAY APPARATUS - A display panel and a display apparatus are provided. The display panel includes a substrate, binding pins provided at a side of the substrate, and insulating layers. The substrate has a display region and a binding region that are arranged along a first direction. The binding pins are arranged along a second direction and are located in the binding region of the substrate. The insulating layers and the binding pins are arranged on a same side of the substrate. At least one insulating layer includes at least one first aperture provided at a side of the binding region away from the display region. An orthographic projection of the first aperture on the substrate overlaps with an orthographic projection of the binding pin on the substrate in the first direction. | 2022-09-15 |
20220293640 | DISPLAY DEVICE - A display device includes: a bending region including a bending peripheral opening passing through the first interlayer insulating film and the first gate insulating film and a bending opening in the bending peripheral opening and passing through the second interlayer insulating film and the buffer layer to expose the substrate, a first sidewall of the bending peripheral opening includes a side surface of the first interlayer insulating film and a side surface of the first gate insulating film, the second interlayer insulating film covers the first sidewall of the bending peripheral opening, the bending opening includes a second sidewall including a side surface of the buffer layer and a portion of a side surface of the second interlayer insulating film arranged with the side surface of the buffer layer, and the first via layer fills the bending opening. | 2022-09-15 |
20220293641 | SEMICONDUCTOR DEVICE - A semiconductor device including an oxide semiconductor in which on-state current is high is provided. The semiconductor device includes a first transistor provided in a driver circuit portion and a second transistor provided in a pixel portion; the first transistor and the second transistor have different structures. Furthermore, the first transistor and the second transistor are transistors having a top-gate structure. In an oxide semiconductor film of each of the transistors, an impurity element is contained in regions which do not overlap with a gate electrode. The regions of the oxide semiconductor film which contain the impurity element function as low-resistance regions. Furthermore, the regions of the oxide semiconductor film which contain the impurity element are in contact with a film containing hydrogen. The first transistor provided in the driver circuit portion includes two gate electrodes between which the oxide semiconductor film is provided. | 2022-09-15 |
20220293642 | ISOLATION EPITAXIAL BI-LAYER FOR BACKSIDE DEEP TRENCH ISOLATION STRUCTURE IN AN IMAGE SENSOR - In some embodiments, the present disclosure relates to an integrated chip, including a substrate, a first image sensing element and a second image sensing element arranged next to one another over the substrate, the first image sensing element and the second image sensing element having a first doping type, and a backside deep trench isolation (BDTI) structure arranged between the first and second image sensing elements and including a first isolation epitaxial layer setting an outermost sidewall of the BDTI structure and having the first doping type, a second isolation epitaxial layer arranged along inner sidewalls of the first isolation epitaxial layer and having a second doping type different than the first doping type, and an isolation filler structure filling between inner sidewalls of the second isolation epitaxial layer. | 2022-09-15 |
20220293643 | SOLID-STATE IMAGING DEVICE AND IMAGING DEVICE WITH SHARED CIRCUIT ELEMENTS - An imaging device includes a plurality of unit pixels disposed into pixel groups that are separated from one another by isolation structures. Unit pixels within each pixel group are separated from one another by isolation structures and share circuit elements. The isolation structures between pixel groups are full thickness isolation structures. At least a portion of the isolation structures between unit pixels within a pixel group are deep trench isolation structures. | 2022-09-15 |
20220293644 | MECHANISMS FOR FORMING IMAGE-SENSOR DEVICE WITH DEEP-TRENCH ISOLATION STRUCTURE - An image-sensor device is provided. The image-sensor device includes a semiconductor substrate and a radiation-sensing region in the semiconductor substrate. The image-sensor device also includes a doped isolation region in the semiconductor substrate and a dielectric film extending into the doped isolation region from a surface of the semiconductor substrate. A portion of the doped isolation region is between the dielectric film and the radiation-sensing region. | 2022-09-15 |
20220293645 | CMOS IMAGE SENSORS - Disclosed is a complementary metal oxide semiconductor (CMOS) image sensor. The image sensor comprises a first separation zone in a substrate, the first separation zone defining first and second pixel regions arranged in a first direction, the first separation zone including first parts substantially parallel extending in the first direction, and the substrate including a first active region vertically overlapping one of the first parts and a second active region vertically overlapping another of the first parts. The image sensor further comprises first and second photoelectric conversion devices arranged in the first direction on at least one of the first and second pixel regions in the substrate, and a source follower gate on the first active region of the substrate. | 2022-09-15 |
20220293646 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR - A semiconductor device and a method of manufacturing the semiconductor device are disclosed. The method of manufacturing the semiconductor device includes: forming a trench fill structure in a pixel region of a substrate, where a high-k dielectric layer is sandwiched between a side wall of a fill material in the trench fill structure and the substrate; forming a plug structure in a pad region of the substrate; covering a surface of the substrate in the pixel region and the pad region with a buffer dielectric layer; etching the buffer dielectric layer to form first opening exposing at least part of the substrate around a top side wall portion of the trench fill structure and/or at least a top portion of the trench fill structure; and forming a metal grid layer on the buffer dielectric layer in the pixel region. | 2022-09-15 |
20220293647 | DIELECTRIC STRUCTURE OVERLYING IMAGE SENSOR ELEMENT TO INCREASE QUANTUM EFFICIENCY - Various embodiments of the present disclosure are directed towards a pixel sensor. The pixel sensor includes a substrate having a front-side opposite a back-side. An image sensor element comprises an active layer disposed within the substrate, where the active layer comprises germanium. An anti-reflective coating (ARC) structure overlies the back-side of the substrate. The ARC structure includes a first dielectric layer overlying the back-side of the substrate, a second dielectric layer overlying the first dielectric layer, and a third dielectric layer overlying the second dielectric layer. A first index of refraction of the first dielectric layer is less than a second index of refraction of the second dielectric layer, and a third index of refraction of the third dielectric layer is less than the first index of refraction. | 2022-09-15 |
20220293648 | PHOTOELECTRIC CONVERSION DEVICE AND X-RAY IMAGING DEVICE - A photoelectric conversion device includes a photoelectric conversion area in which photoelectric conversion elements each including a first electrode, a second electrode, and a photoelectric conversion layer, provided between the first electrode and the second electrode, that contains a semiconductor material are provided in a matrix and a guard ring surrounding a periphery of the photoelectric conversion area in a form of a frame. The guard ring has an intermediate layer containing the same semiconductor material as the photoelectric conversion layer. | 2022-09-15 |
20220293649 | IMAGE SENSOR AND METHOD OF MANUFACTURING THE SAME - A method of manufacturing an image sensor includes forming a first dopant region having a second conductivity type in a semiconductor substrate including first and second surfaces. The semiconductor substrate has a first conductivity type different from the second conductivity type. The method further includes forming a pixel isolation structure defining pixel regions in the semiconductor substrate, forming a vertical trench by patterning the first surface in each of the pixel regions, forming a mask pattern exposing each of the pixel regions on the first surface, in which the mask pattern includes a residual mask pattern filling at least a portion of the vertical trench, forming a second dopant region having the second conductivity type in the semiconductor substrate by using the mask pattern as an ion-implantation mask, in which the second dopant region is adjacent to the vertical trench, and forming a transfer gate electrode in the vertical trench. | 2022-09-15 |
20220293650 | WIDE CHANNEL SEMICONDUCTOR DEVICE - A semiconductor device includes a plurality of isolation structures, wherein each isolation structure of the plurality of isolation structures is spaced from an adjacent isolation structure of the plurality of isolation structures in a first direction. The semiconductor device further includes a gate structure. The gate structure includes a top surface; a first sidewall angled at a non-perpendicular angle with respect to the top surface; and a second sidewall angled with respect to the top surface. The gate structure further includes a first horizontal surface extending between the first sidewall and the second sidewall, wherein the first horizontal surface is parallel to the top surface, and a dimension of the gate structure in a second direction, perpendicular to the first direction, is less than a dimension of each of the plurality of isolation structures in the second direction. | 2022-09-15 |
20220293651 | PIXEL SENSOR INCLUDING A LAYER STACK - A pixel sensor may include a layer stack to reduce and/or block the effects of plasma and etching on a photodiode and/or other lower-level layers. The layer stack may include a first oxide layer, a layer having a band gap that is approximately less than 8.8 electron-Volts (eV), and a second oxide layer. The layer stack may reduce and/or prevent the penetration and absorption of ultraviolet photons resulting from the plasma and etching processes, which may otherwise cause the formation of electron-hole pairs in the substrate in which the photodiode is included. | 2022-09-15 |
20220293652 | GRID STRUCTURE WITH AT LEAST PARTIALLY ANGLED SIDEWALLS - A grid structure in a pixel array may be at least partially angled or tapered toward a top surface of the grid structure such that the width of the grid structure approaches a near-zero width near the top surface of the grid structure. This permits the spacing between color filter regions in between the grid structure to approach a near-zero spacing near the top surfaces of the color filter regions. The tight spacing of color filter regions provided by the angled or tapered grid structure provides a greater surface area and volume for incident light collection in the color filter regions. Moreover, the width of the grid structure may increase at least partially toward a bottom surface of the grid structure such that the wider dimension of the grid structure near the bottom surface of the grid structure provides optical crosstalk protection for the pixel sensors in the pixel array. | 2022-09-15 |
20220293653 | IMAGE SENSORS AND CAMERA MODULES INCLUDING THE SAME - An image sensor includes a pixel array, a color filter array including a plurality of color filters arranged in a matrix on the pixel array, and a micro lens array arranged on the color filter array. The plurality of color filters are divided into a plurality of groups that each include nine color filters arranged in three rows and three columns. A plurality of first color filters among the nine color filters included in each group of the plurality of groups face one another in a diagonal direction, and a plurality of second color filters among the nine color filters included in each group of the plurality of groups respectively include identical color filters corresponding to a corresponding group of the plurality of groups. | 2022-09-15 |
20220293654 | IMAGE SENSING DEVICE WITH GRID STRUCTURE AND FABRICATION METHOD THEREOF - The present disclosure provides an optical structure and a method for fabricating an optical structure, the method includes forming a light detection region in a substrate, forming an isolation structure at surrounding the light detection region, and forming a primary grid over the isolation structure, including forming a metal layer over the isolation structure, forming a first dielectric layer over the metal layer, and partially removing the metal layer and the first dielectric layer with a first mask by patterning, and forming a secondary grid at least partially surrounded by the primary grid laterally. | 2022-09-15 |
20220293655 | SEMICONDUCTOR DEVICE - A semiconductor device is provided. The semiconductor device includes a substrate having photoelectric conversion elements. The semiconductor device also includes a first light-shielding layer disposed on the substrate and having first apertures. The semiconductor device further includes a light-adjusting structure disposed on the first light-shielding layer. Moreover, the semiconductor device includes a second light-shielding layer disposed on the light-adjusting structure and having second apertures. The semiconductor device also includes first light-condensing structures covering the second apertures. The semiconductor device further includes a third light-shielding layer disposed on the first light-condensing structure and having third apertures. Furthermore, the semiconductor device includes second light-condensing structures covering the third apertures. The semiconductor device also includes a first light-transmitting layer disposed between the second light-shielding layer and the third light-shielding layer. The refractive index of each first light-condensing structure and the refractive index of the first light-transmitting layer are different. | 2022-09-15 |
20220293656 | SOLID-STATE IMAGING DEVICE AND ELECTRONIC APPARATUS - To provide a solid-state imaging device capable of preventing color mixing due to scattering of light. Provided is a solid-state imaging device including a plurality of pixels arranged therein, in which in each of the pixels, one on-chip lens that condenses incident light and at least one photoelectric converter formed in a semiconductor substrate are provided in order from a light incident side, at least one pixel among the plurality of pixels includes the one on-chip lens and the plurality of photoelectric converters, and between the plurality of photoelectric converters, a light absorbing member that absorbs at least a part of light condensed by the one on-chip lens is provided, or between the plurality of photoelectric converters, a light reflecting member that reflects at least a part of light condensed by the one on-chip lens is provided. | 2022-09-15 |
20220293657 | INTEGRATED OPTICAL SENSOR AND METHOD OF MANUFACTURING THE SAME - An integrated optical sensor includes a substrate, an optical module layer and micro lenses. The substrate has sensing pixels. The optical module layer is disposed on the substrate. The micro lenses are disposed on the optical module layer. A thickness of the optical module layer defines a focal length of the micro lenses, and the sensing pixels sense object light of an object, which is focused by the micro lenses and optically processed by the optical module layer. The optical module layer includes a metal light shielding layer and an inter-metal dielectric layer disposed above the metal light shielding layer. The object light reaches the sensing pixels through apertures of the metal light shielding layer. A method of manufacturing the integrated optical sensor is also provided. | 2022-09-15 |
20220293658 | LIGHT RECEIVING ELEMENT, DISTANCE MEASUREMENT MODULE, AND ELECTRONIC EQUIPMENT - The present technology relates to a light receiving element, a distance measurement module, and electronic equipment which are capable of reducing leakage of incident light to adjacent pixels. The light receiving element includes an on-chip lens, a wiring layer, and a semiconductor layer which is disposed between the on-chip lens and the wiring layer and includes a photodiode. The wiring layer includes a reflection film which is disposed such that at least a portion thereof overlaps the photodiode when seen in a plan view, and a transfer transistor which reads charge generated by the photodiode, and the reflection film is formed of a material different from that of a metal wiring electrically connected to a gate of the transfer transistor. The present technology can be applied to, for example, a distance measurement module that measures a distance to a subject, and the like. | 2022-09-15 |
20220293659 | IMAGE SENSING DEVICE - An image sensing device for preventing a crosstalk path is disclosed. The image sensing device includes a substrate including a plurality of photoelectric conversion elements, each of which generates and accumulates photocharges corresponding to incident light and a plurality of lenses disposed over the substrate, and arranged to receive the incident light and to direct received incident light to the plurality of photoelectric conversion elements, wherein the plurality of lenses includes a first lens and a second lens that are arranged to contact each other and have different refractive indexes from each other. | 2022-09-15 |
20220293660 | CMOS Image Sensors with Per-Pixel Micro-Lens Arrays - An image sensor includes an array of CMOS pixels and a plurality of micro-lens arrays. Each micro-lens array of the plurality of micro-lens arrays includes a plurality of horizontally adjacent micro-lenses. Each micro-lens array of the plurality of micro-lens arrays is situated above a respective CMOS pixel in the array of CMOS pixels. | 2022-09-15 |
20220293661 | OFFSET VERTICAL INTERCONNECT AND COMPRESSION POST FOR 3D-INTEGRATED ELECTRICAL DEVICE - An electrical device including a substrate, a dielectric layer supported by the substrate having at least one vertical post disposed within a via hole of the dielectric layer, and at least one electrically conductive vertical interconnect laterally offset from the post. The post is configured to impart a non-tensile state to a region of the electrical device underlying the post. The coefficient of thermal expansion (CTE) of the post may be configured to cooperate with the CTE of the dielectric layer to provide the non-tensile state, such as the dielectric layer having a CTE that is equal to or greater than a CTE of the post. The dielectric layer may have a CTE that is less than the CTE of the electrically conductive vertical interconnect, and may be arranged to provide a buffer to tensile forces imparted by the vertical interconnect. | 2022-09-15 |
20220293662 | SOLID-STATE IMAGE PICKUP ELEMENT AND ELECTRONIC APPARATUS - The present technique relates to a solid-state image pickup element and an electronic apparatus each of which enables a pad to be formed in a shallow position while reduction of a quality of a back side illumination type solid-state image pickup element is suppressed. The solid-state image pickup element includes a pixel substrate in which a light condensing layer for condensing incident light on a photoelectric conversion element, a semiconductor layer in which the photoelectric conversion element is formed, and a wiring layer in which a wiring and a pad for outside connection are formed are laminated on one another, and at least a part of a first surface of the pad is exposed through a through hole completely extending through the light condensing layer and the semiconductor layer. The present technique, for example, can be applied to a back side illumination type CMOS image sensor. | 2022-09-15 |
20220293663 | SEMICONDUCTOR DEVICE - A purpose of the present invention is to countermeasure a connection failure of an electrode in an optical sensor using PIN type photo conductive film. A structure of the present invention is as follows. A semiconductor device including an optical sensor, the optical sensor including: a thin film transistor formed on a substrate, and a photo diode formed above the thin film transistor, in which the photo diode includes an anode, a photo conductive film and a cathode, the cathode is constituted from a titanium film, and a first transparent conductive film is formed between the titanium film and the photo conductive film. | 2022-09-15 |
20220293664 | MANUFACTURING METHOD OF FILTER FOR SOLID-STATE IMAGING ELEMENT AND MANUFACTURING METHOD OF SOLID-STATE IMAGING ELEMENT - A method of manufacturing a filter for a solid-state imaging element, including forming a color filter on a semiconductor substrate, forming an etching stopper layer on the semiconductor substrate and the color filter, forming an infrared cut precursor layer on the etching stopper layer, forming a resist pattern that covers a portion on the color filter in the infrared cut precursor layer, and forming an infrared cut filter by dry etching the infrared cut precursor layer using the resist pattern. The dry etching of the infrared cut precursor layer is conducted at an etching rate different from an etching rate of the etching stopper layer. | 2022-09-15 |
20220293665 | IMAGE SENSOR AND MANUFACTURING METHOD THEREOF - A method includes at least the following steps. A material layer is formed over an image capture chip. A patterned mask layer is formed on the material layer, wherein a pattern density of the patterned mask layer varies from a central region of the patterned mask layer to a periphery region of the patterned mask layer. The material layer is polished by using the patterned mask layer as a mask to form a lens layer including a single lens portion on the image capture chip. | 2022-09-15 |
20220293666 | Multi-Bandgap Charge-Coupled Device (CCD) - A CCD comprises: a primary device configured to capture visible light and comprising: a first layer comprising a first semiconductor material; and a second layer comprising a second semiconductor material; and a secondary device configured to capture near-IR light and comprising: a third layer comprising a third semiconductor material and positioned such that the second layer is between the first layer and the third layer; and a fourth layer comprising a fourth semiconductor material and positioned such that the third layer is between the second layer and the fourth layer. | 2022-09-15 |
20220293667 | MONOLITHIC MULTI-COLOR MATRIX EMITTER WITH PATTERNED PHOSPHOR LAYER - A lighting device is disclosed that includes a plurality of light emitting diodes arranged in an array, a plurality of trenches disposed between and optically isolating the light emitting diodes, and a patterned converter layer disposed over an array surface formed by light emitting surfaces of the light emitting diodes and upper surfaces of the trenches, the patterned converter layers including a first region having a first converter and a second region having a second converter different from the first converter, the first region and second region disposed over different areas of the array surface. | 2022-09-15 |
20220293668 | DISPLAY DEVICE - A display device including a substrate, a bank pattern extending in a first direction on the substrate, a first electrode on the bank pattern, a second electrode on the substrate, a first insulating layer on the first electrode and the second electrode, a light emitting element on the first insulating layer, and including a first end on the first electrode, and a second end on the second electrode, a first connection electrode contacting the first end of the light emitting element, and a second connection electrode contacting the second end of the light emitting element, wherein the bank pattern overlaps the first electrode and does not overlap the second electrode. | 2022-09-15 |
20220293669 | DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME - A display apparatus includes a driving substrate including a plurality of grooves, micro light-emitting devices provided in the plurality of grooves and configured to emit light of a first color, and a color conversion layer provided on the micro light-emitting devices and configured to convert the light of the first color into light of at least one second color, wherein the color conversion layer includes light blocking patterns spaced apart from the micro light-emitting devices and spaced apart from each other on a same plane, a nano-porous layer provided between adjacent ones of the light blocking patterns, spaced apart from the micro light-emitting devices, and including a plurality of nano-pores, and quantum dots impregnated in the nano-porous layer and configured to convert the light of the first color into the light of the at least one second color. | 2022-09-15 |
20220293670 | DISPLAY DEVICE, METHOD OF MANUFACTURING THE SAME, AND TILED DISPLAY DEVICE INCLUDING THE SAME - A display device includes a first substrate including a first contact hole, a pad part disposed on the first substrate, the pad part overlapping the first contact hole, a second substrate disposed on the pad part and the first substrate, a display layer disposed on the second substrate, a flexible film disposed on a bottom surface of the first substrate, and a connecting film inserted in the first contact hole, the connecting film electrically connecting the pad part and the flexible film. An upper width of the first contact hole is greater than a lower width of the first contact hole. | 2022-09-15 |
20220293671 | DISPLAY DEVICE - A display device includes conductive layers on a substrate, a via layer on the conductive layers, a first electrode and a second electrode extending in one direction on the via layer and spaced from each other, a first insulating layer on the first electrode and the second electrode, a plurality of light emitting elements on the first insulating layer, each of the light emitting elements having one end on the first electrode and an other end on the second electrode, and a first connection electrode and a second connection electrode on the first insulating layer, the first connection electrode overlapping the first electrode, and the second connection electrode overlapping the second electrode, wherein the first connection electrode and the second connection electrode are in contact with the conductive layers through contact portions. | 2022-09-15 |
20220293672 | DISPLAY DEVICE - A display device includes a first electrode and a second electrode extending in one direction on a substrate and spaced from each other, a first insulating layer on the first electrode and the second electrode, and a plurality of light emitting elements located on the first electrode and the second electrode, the plurality of light emitting elements being on the first insulating layer, wherein each of the first electrode and the second electrode includes a main electrode portion and a plurality of sub-electrode portions having a thickness smaller than that of the main electrode portion, the plurality of sub-electrode portions of each of the first electrode and the second electrode are connected to respective sides of the main electrode portion of the corresponding ones of the first electrode and the second electrode in the one direction. | 2022-09-15 |
20220293673 | LED ARRAY AND METHOD OF FORMING A LED ARRAY - A Light Emitting Diode (LED) array precursor is provided. The LED array precursor comprises a substrate having a substrate surface, a first LED stack, a p++ layer, a n++ layer and a second LED stack. The first LED stack is provided on a first portion of the substrate surface. The first LED stack comprises a plurality of first Group III-nitride layers defining a first semiconductor junction configured to output light having a first wavelength wherein a n-type side of the first semiconductor junction is orientated towards the substrate surface. The p++ layer is provided on the first LED stack, the p++ layer comprising a Group III-nitride. The n++ layer has a first portion covering the p++ layer of the first LED stack and a second portion covering a second portion of the substrate surface, wherein a tunnel junction is formed at an interface between the n++ layer and the p++ layer, the n++ layer comprising a Group III-nitride. The second LED stack is provided on the second portion of the n++ layer covering the second portion of the substrate surface. The second LED stack comprises a plurality of second Group III-nitride layers defining a second semiconductor junction configured to output light having a second wavelength different to the first wavelength, wherein a n-type side of the semiconductor junction is provided towards the n++ layer. A method of manufacturing a LED array precursor is also provided. | 2022-09-15 |
20220293674 | Light emitting module and display device comprising the same - A light emitting module and a display device including the same are disclosed. The light emitting module including: a substrate; a plurality of light emitting units disposed on the substrate; a plurality of encapsulating elements covering the plurality of light emitting units; and a reflective layer surrounding each of the plurality of light emitting units. | 2022-09-15 |
20220293675 | MONOLITHIC SEGMENTED LED ARRAY ARCHITECTURE - A first component with a first sidewall and a second component with a second sidewall may be mounted onto an expandable film such that an original distance X is the distance between the first sidewall and the second sidewall. The expandable film may be expanded such that an expanded distance Y is the distance between the first sidewall and the second sidewall and expanded distance Y is greater than original distance X. A first sidewall material may be applied within at least a part of a space between the first sidewall and the second sidewall. The expandable film may be expanded such that a contracted distance Z is the distance between the first sidewall and the second sidewall, and contracted distance Z is less than expanded distance Y. | 2022-09-15 |
20220293676 | MAGNETIC MEMORY DEVICE - According to one embodiment, a magnetic memory device includes a bottom electrode, a stacked structure provided on the bottom electrode, and including a first magnetic layer having a variable magnetization direction, a second magnetic layer having a fixed magnetization direction, and a nonmagnetic layer provided between the first magnetic layer and the second magnetic layer, a first sidewall insulating layer provided on a sidewall of the bottom electrode and containing a predetermined element and oxygen (O), and a second sidewall insulating layer provided on a sidewall of the stacked structure and containing the predetermined element and oxygen (O). | 2022-09-15 |
20220293677 | Multilayered Seed for Perpendicular Magnetic Structure Including an Oxide Layer - The present invention is directed to a perpendicular magnetic structure including a seed layer structure that includes a first seed layer comprising a metal element and oxygen, and a second seed layer formed on top of the first seed layer and comprising chromium. The metal element is one of titanium, tantalum, or magnesium. The perpendicular magnetic structure further includes a magnetic fixed layer structure formed on top of the seed layer structure and having an invariable magnetization direction substantially perpendicular to a layer plane of the magnetic fixed layer structure. The magnetic fixed layer structure includes layers of a magnetic material interleaved with layers of a transition metal. The magnetic material includes cobalt. The transition metal is one of nickel, platinum, palladium, or iridium. | 2022-09-15 |
20220293678 | MAGNETIC MEMORY - A magnetic memory includes a planar electrode and a first wiring spaced from the electrode. A first magnetic member is between the electrode and the first wiring. The first magnetic member has a first end facing the first wiring and a second end facing the electrode. A magnetoresistive element is connected to the first end. A transistor is between the magnetoresistive element and the first wiring. The transistor has a channel layer and a gate electrode covering at least part of an outer periphery of the channel layer. One end of the channel layer is connected to the magnetoresistive element, and another end of the channel layer is connected to the first wiring. A second wiring has a portion between the electrode and the second end of the first magnetic member. A control circuit is electrically connected to the gate electrode, the electrode, and the first and second wirings. | 2022-09-15 |
20220293679 | SEMICONDUCTOR MEMORY DEVICE AND FABRICATION METHOD THEREOF - A semiconductor memory device includes a substrate, a dielectric layer on the substrate, and a contact plug in the dielectric layer. An upper portion of the contact plug protrudes from a top surface of the dielectric layer. The upper portion of the contact plug acts as a first electrode. A buffer layer is disposed on the dielectric layer and beside the upper portion of the contact plug. A resistive-switching layer is disposed beside the buffer layer. A second electrode is disposed beside the resistive-switching layer. | 2022-09-15 |
20220293680 | VARIABLE RESISTANCE MEMORY DEVICE - A variable resistance memory device includes memory cell structures on a substrate and spaced apart from each other in first and second directions, the first and second directions being parallel to a top surface of the substrate and intersecting each other, and a dummy cell structure surrounding each of the memory cell structures, as viewed in a plan view, the dummy cell structure being a single body structure extending continuously between all the memory cell structures, wherein each of the memory cell structures includes first conductive line on and intersecting second conductive lines, and memory cells between the first and second conductive lines, and wherein the dummy cell structure includes first dummy conductive lines on and intersecting second dummy conductive lines, and dummy memory cells between the first and second dummy conductive lines. | 2022-09-15 |
20220293681 | METHOD TO FORM MEMORY CELLS SEPARATED BY A VOID-FREE DIELECTRIC STRUCTURE - Various embodiments of the present application are directed towards an integrated chip comprising memory cells separated by a void-free dielectric structure. In some embodiments, a pair of memory cell structures is formed on a via dielectric layer, where the memory cell structures are separated by an inter-cell area. An inter-cell filler layer is formed covering the memory cell structures and the via dielectric layer, and further filling the inter-cell area. The inter-cell filler layer is recessed until a top surface of the inter-cell filler layer is below a top surface of the pair of memory cell structures and the inter-cell area is partially cleared. An interconnect dielectric layer is formed covering the memory cell structures and the inter-cell filler layer, and further filling a cleared portion of the inter-cell area. | 2022-09-15 |
20220293682 | Organic Photodetectors for In-Cell Optical Sensing - An organic light-emitting diode (OLED) display includes an array of OLED pixels and an array of organic photodetector (OPD) pixels. An OLED pixel in the array of OLED pixels includes an OLED hole transport layer (HTL), an OLED electron transport layer (ETL), and an emissive layer positioned between the OLED HTL and the OLED ETL. An OPD pixel in the array of OPD pixels includes the OLED HTL, the OLED ETL, and an electron donor material positioned between the OLED HTL and the OLED ETL, wherein the OLED ETL functions as an electron acceptor material for the OPD pixel. In other embodiments, the OPD pixel may be configured differently. | 2022-09-15 |
20220293683 | DISPLAY APPARATUS - A display apparatus includes: a first unit pixel including a plurality of light-emitting diodes, and a second unit pixel including a plurality of light-emitting diodes and a photodetector diode. Each of the plurality of light-emitting diodes includes a first electrode, a second electrode facing the first electrode, and an emission layer disposed between the first electrode and the second electrode, and the photodetector diode includes a third electrode, a fourth electrode facing the third electrode, an active layer disposed between the third electrode and the fourth electrode, and a color filter layer disposed between the fourth electrode and the active layer. | 2022-09-15 |
20220293684 | DISPLAY DEVICE - A display device includes first and second light-emitting diodes in respective first and second emission areas, an encapsulation layer thereon, and including at least one inorganic encapsulation layer and at least one organic encapsulation layer, a color conversion-transmission layer on the encapsulation layer, and including a color conversion part to convert light emitted from the first or second light-emitting diodes into a different color, and a light blocking partition wall surrounding the color conversion part, first and second color filters on the color conversion-transmission layer, and respectively corresponding to the first and second emission areas, wherein respective first end portions of the first and second color filters are spaced from each other while overlapping the light blocking partition wall, and are partly covered with a third color material having a color that is different from the first and second color filters. | 2022-09-15 |
20220293685 | DISPLAY PANEL AND MANUFACTURING METHOD THEREOF - A display panel may include first to third light emitting elements providing source light, first to third color filters, a first optical pattern between a first color filter and the first light emitting element, a second optical pattern between the second color filter and the second light emitting element, a third optical pattern between the third color filter and the third light emitting element, and a refractive layer between the first color filter and the first optical pattern, between the second color filter and the second optical pattern, and between the third optical pattern and the third light emitting element. | 2022-09-15 |
20220293686 | DISPLAY DEVICE HAVING LENS CORRESPONDING TO PIXEL, AND ELECTRONIC APPARATUS - A display device according to the present disclosure includes a substrate, a lens layer including a lens, a pixel electrode disposed between the substrate and the lens layer, and a color filter disposed between the pixel electrode and the lens layer. The color filter includes a colored portion that overlaps a part of the pixel electrode in plan view and is disposed between the substrate and the lens layer. The pixel electrode is provided in a display region in which an image is displayed. The lens overlaps a part of the pixel electrode in the plan view. A distance between the center of the pixel electrode and the display center of the display region is shorter than a distance between the center of the lens and the display center in the plan view. | 2022-09-15 |
20220293687 | OLED DISPLAY PANEL AND ELECTRONIC DEVICE - The present application provides an organic light-emitting diode (OLED) display panel and an electronic device. A projection of a touch electrode of the OLED display panel projected on a base substrate is at least partially overlapped with a projection of a support pillar projected on the base substrate. The support pillar includes at least one side surface. An angle between an upper top surface of the support pillar is less than or equal to 90 degrees, and/or an angle between the side surface and a lower bottom surface of the support pillar is greater than or equal to 90 degrees. A common electrode layer is disconnected at the support pillar. Accordingly, the present application improves a report rate for touch control and enhances touch sensitivity of the OLED display panel. | 2022-09-15 |
20220293688 | METHOD FOR MANUFACTURING DISPLAY DEVICE - The disclosure provides a method for manufacturing a display device, including the following steps. A substrate is provided. A pixel circuit is formed on the substrate. A light-emitting unit is formed on the pixel circuit. A touch sensing unit is formed on the light-emitting unit. An insulating layer is formed on the touch sensing unit. An anti-reflection layer is formed on the insulating layer. The method for manufacturing the display device of the embodiment of the disclosure can improve reliability. | 2022-09-15 |
20220293689 | ELECTRONIC DEVICE - An electronic device includes a display panel in which a first area including an electronic module, a display area, a line area and a transmission area, and a second area adjacent to the first area are defined, where the display panel includes a base layer, a light blocking layer disposed on the base layer, a plurality of insulating layers disposed on the base layer, a first pixel disposed in the first area, and a second pixel disposed in the second area, and an input sensor disposed on the display panel, where the input sensor includes sensing insulating layers. The first area has a higher light transmittance than the second area, the light blocking layer overlaps the display area and the line area, and the light blocking layer does not overlap the transmission area. | 2022-09-15 |
20220293690 | DISPLAY DEVICE - A display device includes an organic light emitting display panel defining a display area for displaying an image and a non-display area adjacent the display area, and including a base layer, a circuit layer on the base layer, a light emitting device layer on the circuit layer, and a thin film sealing layer on the light emitting device layer and divided into a first thin film sealing area, and a second thin film sealing area adjacent the first thin film sealing area, and a touch detection unit including a first sensor part on the first thin film sealing area of the thin film sealing layer, and a second sensor part on the second thin film sealing area of the thin film sealing layer, wherein an upper surface of the thin film sealing layer that faces the touch detection unit includes a first upper surface in the first thin film sealing area, and a second upper surface in the second thin film sealing area and protruding away from the base layer. | 2022-09-15 |
20220293691 | DISPLAY DEVICE - A display device may include a display panel and an input sensor. Mesh lines of the input sensor may include first mesh lines extending in a first direction and second mesh lines extending in a second direction crossing the first direction. The first mesh lines and the second mesh lines may cross each other at a plurality of cross points. In a unit region of the sensing electrode, first cutting points may be defined in the first mesh lines and the second mesh lines, and second cutting points may be defined in the first mesh lines and the second mesh lines. | 2022-09-15 |
20220293692 | ARRAY SUBSTRATE, METHOD FOR MANUFACTURING THE SAME, DISPLAY PANEL AND DISPLAY DEVICE - The present disclosure provides an array substrate, a method for manufacturing the array substrate, a display panel and a display device. A display region of the array substrate includes an opening region. The array substrate includes a base substrate, a driving circuitry structure and an anode layer. The driving circuitry structure includes a transparent conductive layer for forming a transparent line, and an active layer and a plurality of metal layers for forming a plurality of pixel driving circuitries, and the transparent conductive layer is laminated on and in contact with the active layer and/or one metal layer. The anode layer includes a plurality of anodes, and each anode arranged at the opening region is electrically coupled to a corresponding pixel driving circuitry via the transparent line. | 2022-09-15 |
20220293693 | Pixel Arrangement Structure, Electroluminescent Device and Display Device - The disclosure provides a pixel arrangement structure, an electroluminescent device and a display device. The pixel arrangement structure includes: a plurality of pixel groups, wherein each pixel group includes a plurality of pixels, and adjacent pixels in each pixel group are in up-and-down staggered arrangement. | 2022-09-15 |
20220293694 | PIXEL LAYOUT STRUCTURE, METAL MASK, AND DISPLAY APPARATUS - A pixel layout structure includes a plurality of first, second and third sub-pixels arranged as a plurality of first repeat units, each comprising a first sub-pixel and a second sub-pixel, and further as a plurality of second repeat units, each including a third sub-pixel and a second sub-pixel. The first repeat units and the second repeat units are alternately arranged along a first direction. The second sub-pixels are arranged in a matrix along the first direction and the second direction. Four second sub-pixels are disposed adjacent to and around each one first sub-pixel or each one third sub-pixel. The plurality of first sub-pixels and the plurality of third sub-pixels each have a shape of an irregular polygon with four sides facing respectfully four adjacent second sub-pixels, and each of the four sides has a shape of an inward curve in a direction distal from an adjacent second sub-pixel. | 2022-09-15 |
20220293695 | DISPLAY DEVICE - A display device may include a pixel circuit in a display area including a rounded corner portion, a scan driving circuit in a peripheral area surrounding the display area, and configured to provide a scan signal to the pixel circuit, a fan-out line between the pixel circuit and the scan driving circuit in the peripheral area adjacent to the corner portion, and configured to provide a pixel data signal to the pixel circuit, and a repair circuit between the scan driving circuit and the fan-out line in the peripheral area adjacent to the corner portion. | 2022-09-15 |
20220293696 | DISPLAY PANEL, DISPLAY APPARATUS AND MASK - A display panel, a display apparatus and a mask are provided. The display panel includes a substrate, first dummy sub-pixels and regular sub-pixels. The display panel has a display region and a non-display region, and the non-display region has an electrode contact region. The display panel includes a substrate, and first dummy sub-pixels and regular sub-pixels located at a same side of the substrate. At least a part of the first dummy sub-pixels overlaps with the electrode contact region in a direction perpendicular to the substrate. The regular sub-pixels are located in the display region and includes first-color sub-pixels, and the first-color sub-pixels each include a first light-emitting material layer. The first dummy sub-pixels have a same material as the first light-emitting material layer. | 2022-09-15 |
20220293697 | DISPLAY PANEL AND DISPLAY DEVICE - Disclosed are a display panel and a display device. The display panel includes a first display region and a second display region, the density of pixels of the first display region is lower than the density of pixels of the second display region; the display panel includes a base substrate and a cover plate, and an antenna arranged between the base substrate and the cover plate, the antenna is arranged in the first display region and among the pixels. | 2022-09-15 |
20220293698 | DISPLAY PANEL AND DISPLAY DEVICE - Embodiments of the disclosure provide a display panel and a display device. The display panel includes a substrate, a plurality of light emitting elements and at least one transmissive-reflective module, where the light emitting elements are arranged on the substrate; each of the light emitting elements includes a first electrode, a light emitting functional layer and a second electrode arranged along a direction vertical to the substrate and away from the substrate; the at least one transmissive-reflective module is arranged on a side, close to the substrate, of the first electrode of at least one of the light emitting elements, and/or on a side, away from the substrate, of the second electrode of at least one of the light emitting elements; the transmissive-reflective module is configured to switch between a transmissive state and a reflective state. | 2022-09-15 |
20220293699 | LIGHT-EMITTING DEVICE, SUBSTRATE THEREOF AND FABRICATION METHOD - A fabrication method for a substrate of a light-emitting device comprises: fabricating an organic photoresist layer on the surface of a substrate provided with a protruding structure, so that the organic photoresist layer covers the protruding structure, wherein by means of semi-exposing, developing and removing a portion of the thickness of a specific region of the organic photoresist layer, the specific region is a region of the organic photoresist layer that covers the protruding structure; and post-bake curing the remaining portion of the organic photoresist layer to form a planarization layer. | 2022-09-15 |
20220293700 | DISPLAY SUBSTRATE AND MANUFACTURING PROCESS THEREOF - A display substrate is described that comprises: a display area, a retaining wall surrounding the display area, and a thin film encapsulation layer comprising a first inorganic barrier layer, an organic barrier layer, and a second inorganic barrier layer. The display area has a corner portion being a portion of the display area surrounded by the retaining wall. Convex dams are provided at a position on the substrate corresponding to the corner portion. A portion of the first inorganic barrier layer corresponding to the corner portion covers the convex dams, and a portion of the first inorganic barrier layer between the two adjacent convex dams forms a diversion trench. The organic barrier layer comprises cured organic material, and the organic material is provided on the portion of the first inorganic barrier layer at the corner portion under a capillary action of the diversion trench before curing. | 2022-09-15 |
20220293701 | DISPLAY DEVICE - A display device includes a base layer; a first electrode located over the base layer; a bank located over the base layer; a light emitting element comprising a coupling electrode layer located over the first electrode; and a second electrode located over the light emitting element. The first electrode and the bank are spaced apart from each other. | 2022-09-15 |
20220293702 | LIGHT-EMITTING SUBSTRATE, DISPLAY PANEL, LIGHT-EMITTING EQUIPMENT, METHOD AND APPARATUS FOR MANUFACTURING LIGHT-EMITTING SUBSTRATE - A light-emitting substrate includes a base substrate, a pixel defining layer, a first electrode layer and a light-emitting functional layer. The pixel defining layer has a plurality of opening portions; the first electrode layer includes a plurality of first electrodes, at least a part of each first electrode is exposed to one of the opening portions and constitutes an accommodating portion with the opening portion; the light-emitting functional layer includes a plurality of functional sub-layers, at least one of which is a first functional sub-layer, the first functional sub-layer includes a plurality of functional patterns, each of which is located in one of the accommodating portions and is conformal to a surface of the accommodating portion, and a distance from an edge of the functional pattern to the base substrate is smaller than or equal to a distance from an edge of the accommodating portion to the base substrate. | 2022-09-15 |
20220293703 | DISPLAY SUBSTRATE, DISPLAY PANEL, AND DISPLAY APPARATUS - The display substrate includes sub-pixels of different colors. The sub-pixels are arranged as pixel columns in a first direction. Sub-pixels in the same pixel column have the same color. The display substrate includes a substrate, a first electrode layer, a pixel defining structure and an organic light-emitting layer. The pixel defining structure includes a first pixel defining structure, and a second pixel defining structure. The organic light-emitting layer includes color light-emitting layers with different colors. One light-emitting layer includes main body parts in a display region and a virtual part in a bezel region. The virtual part is connected to at least two main body parts in the light-emitting layer of the same color. | 2022-09-15 |
20220293704 | DISPLAY SUBSTRATE AND MANUFACTURING METHOD THEREFOR, AND DISPLAY DEVICE - A display substrate and a manufacturing method therefor, and a display device. The manufacturing method for the display substrate includes: forming a substrate, and forming a driving structural layer on the substrate, the driving structural layer including a thin film transistor; forming a planarization layer on the side of the driving structural layer away from the substrate, curing and polishing and planishing the planarization layer, and then forming a first via hole penetrating through the planarization layer and exposing a first pole of the thin film transistor; and forming a light emitting structural layer on the side of the planarization layer away from the substrate. | 2022-09-15 |
20220293705 | DISPLAY DEVICE AND METHOD OF MANUFACTURING DISPLAY DEVICE - A display device includes: a substrate; a first insulating layer disposed on the substrate and that includes an inorganic insulating material; an oxide semiconductor layer disposed on the first insulating layer; a second insulating layer disposed on the oxide semiconductor layer and that includes an inorganic insulating material; and a third insulating layer disposed on a gate electrode disposed on the second insulating layer and that includes an inorganic insulating material. The oxide semiconductor layer includes a first conductive region, a second conductive region, and a channel region located between the first conductive region and the second conductive region, and a value in the channel region of the oxide semiconductor layer of HC according to equation ( | 2022-09-15 |
20220293706 | DISPLAY PANEL HAVING DIVIDED AREA SUB-PIXEL UNITS - The present disclosure provides a display panel, a display device, and a method for manufacturing a display panel. The display panel includes a pixel unit. The pixel unit includes a plurality of sub-pixel units. Each of the plurality of sub-pixel units includes at least one transparent film layer. Each of the plurality of sub-pixel units is divided into a light-emitting area and a light-transmitting area, and the quantity of the transparent film layer in the light-transmitting area is smaller than the quantity of the transparent film layer in the light-emitting area. | 2022-09-15 |
20220293707 | DISPLAY PANEL AND DISPLAY DEVICE - A display panel and a display device are provided, and the display panel includes an array substrate. The array substrate includes a plurality of pixel circuits, a plurality of reference signal lines and a plurality of pixel connecting semiconductor portions. The plurality of pixel circuits is arranged in an array in a row direction and a column direction, each pixel circuit includes a pixel driving semiconductor portion which includes two fixed potential nodes, and the row direction intersects the column direction. The fixed potential nodes are electrically connected to at least one of the plurality of reference signal lines. Two fixed potential nodes adjacent in a first direction are electrically connected by one of the plurality of the pixel connecting semiconductor portions, and the first direction is parallel to a plane where the array substrate is located. | 2022-09-15 |
20220293708 | DISPLAY SUBSTRATE, METHOD FOR MANUFACTURING DISPLAY SUBSTRATE, AND DISPLAY DEVICE - A display substrate, a manufacturing method thereof, and a display device are provided. The display substrate includes a base substrate, a driving circuit layer and a light-emitting unit located on the base substrate, the light-emitting unit includes a first and a second electrodes being laminated, a light-emitting layer located therebetween; the display substrate includes a first and a second display regions, an opening region; the second display region is located between the first and the opening display regions; a pixel density of the first display region is greater than that of the second display region; and the display substrate further includes a compensation capacitor for compensating a sub-pixel in the second display region, the compensation capacitor includes a first and second plates, the first plate is electrically connected to the gate electrode of the sub-pixel in the second display region, the second plate is electrically connected to the first electrode. | 2022-09-15 |
20220293709 | ARRAY SUBSTRATE, MANUFACTURING METHOD THEREOF AND DISPLAY DEVICE - The present disclosure provides an array substrate, a manufacturing method thereof, and a display device including the array substrate. The array substrate includes a substrate, a first electrode on the substrate, a light-emitting layer on a side of the first electrode away from the substrate, a second electrode on a side of the light-emitting layer away from the first electrode, and an auxiliary electrode on the side of the light-emitting layer away from the first electrode and electrically connected with the second electrode. | 2022-09-15 |
20220293710 | DISPLAY SUBSTRATE AND DISPLAY DEVICE - A display substrate includes a plurality of pixel units arranged to form a plurality of pixel columns extending along a first direction, the display substrate further includes a plurality of groups of power source signal lines and pixel driving circuits located on the substrate, each group of power source signal lines includes a plurality of secondary signal lines, the pixel driving circuits of the pixel units in each pixel column are connected to different secondary signal lines in a same group of power source signal lines, each secondary signal line extends along the first direction from a starting end of the power source signal lines, extension lengths of the secondary signal lines in the same group of power source signal lines are different, and resistance values per unit length of different secondary signal lines along the first direction decrease as total lengths of the secondary signal lines increase. | 2022-09-15 |
20220293711 | DISPLAY SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME, AND DISPLAY DEVICE - A display substrate and a manufacturing method therefor, and a display device are provided. The display substrate includes: a base substrate; a planarization layer on the base substrate; an isolation structure and connection pads on the base substrate; and first protective parts on a side of the connection pads away from the base substrate, where the isolation structure includes a first groove formed in the planarization layer, and a first isolation sub-layer and a second isolation sub-layer on a side of the planarization layer away from the base substrate, a first space is provided between the first isolation sub-layer and the second isolation sub-layer, and an orthographic projection of the first space on the base substrate is within an orthographic projection of the first groove on the base substrate; and the first protective parts, the first isolation sub-layer and the second isolation sub-layer are disposed in a same layer. | 2022-09-15 |
20220293712 | DISPLAY DEVICE - A display device has a display area and a non-display area extending around the display area and includes: a plurality of pixels in the display area, a first voltage line in the display area; and a second voltage line in the non-display area. Each of the pixels includes an electrode pattern connected to the first voltage line, a pixel-defining film on the electrode pattern, an emission layer on the pixel-defining film, and a common electrode on the emission layer. The pixels include first-type pixels in which the common electrode and the electrode pattern are connected through an opening hole formed in the pixel-defining film and exposing part of the electrode pattern and second-type pixels in which the opening hole is not formed and the common electrode and the electrode pattern are not connected. The first-type pixels and the second-type pixels are adjacent to each other. | 2022-09-15 |
20220293713 | DISPLAY APPARATUS - A display apparatus includes a substrate having a first area, a second area, and a bending area disposed therebetween. The substrate is bent at the bending area about a bending axis. An inorganic insulating layer is disposed over the substrate and includes an opening or groove corresponding to the bending area. An organic material layer fills the opening or groove. A first conductive layer extends from the first area to the second area through the bending area. The first conductive layer is disposed over the organic material layer and includes a multipath portion having a plurality of through holes. A length of the multipath portion, in a direction from the first area to the second area, is greater than a width of the opening or groove, in the direction from the first area to the second area. | 2022-09-15 |
20220293714 | DISPLAY DEVICE - Contact holes related to routed wires electrically connected to data signal lines running through the corner portions of a display region are larger in number than contact holes related to routed wires electrically connected to data signal lines running through the center portion of the display region. | 2022-09-15 |
20220293715 | DISPLAY PANEL AND DISPLAY DEVICE - Provided are a display panel and a display device. A plurality of second pixel circuit groups in a first display region in the display panel includes a first-type second pixel circuit group distal from a second display region and a second-type second pixel circuit group proximal to the second display region. The first-type second pixel circuit group is connected to a first-type second light-emitting unit group, distal from the first display region, in the second display region through a first connection trace. The second-type second pixel circuit group is connected to a second-type second light-emitting unit group, proximal to the first display region, in the second display region through a second connection trace. | 2022-09-15 |
20220293716 | DISPLAY DEVICE AND ELECTRONIC DEVICE - A display device of the present disclosure includes an organic EL layer formed on a circuit portion, which is formed on a substrate, with an insulating film interposed therebetween, a cathode electrode formed on the organic EL layer in common to all pixels, and a metal wiring provided on an outer peripheral portion of an effective pixel region and electrically connecting the cathode electrode to a wiring of the circuit portion. Then, the metal wiring has a recess or a projection on a contact surface in a connection portion with the cathode electrode. Furthermore, an electronic device according to the present disclosure has the display device having the above configuration. | 2022-09-15 |
20220293717 | RESISTORS FOR INTEGRATED CIRCUITS - A thin-film integrated circuit comprising a first semiconductor device, a second semiconductor device, a first resistor, and a second resistor is provided. A semiconducting region of the first semiconductor device, a resistor body of the first resistor, a semiconducting region of the second semiconductor device, and a resistor body of the second resistor are formed from at least one of a first source material and a second source material, and a material of the resistor body of the first resistor and a material of the resistor body of the second resistor have different electrical properties. | 2022-09-15 |
20220293718 | SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF - A semiconductor structure manufacturing method includes: providing a substrate; forming, on the substrate, a stack structure including a sacrificial layer and a support layer which are alternately stacked on each other; forming a capacitance hole in the stack structure; forming a first electrode layer on a side wall and a bottom of each capacitance hole; forming a first dielectric layer on an inner surface of the first electrode layer; forming, on the stack structure, an opening from which the sacrificial layer is exposed, and removing the sacrificial layer through the opening; forming a second dielectric layer on an inner surface of the first dielectric layer and an outer surface of the first electrode layer; and forming a second electrode layer on an inner surface and an outer surface of the second dielectric layer. | 2022-09-15 |
20220293719 | METHOD OF MANUFACTURING METAL NITRIDE FILM AND ELECTRONIC DEVICE INCLUDING METAL NITRIDE FILM - A capacitor includes: a lower electrode including a metal nitride represented by MM′N, wherein M is a metal element, M′ is an element different from M, and N is nitrogen; a dielectric layer on the lower electrode; an interfacial layer between the lower electrode and the dielectric layer and including a metal nitrate represented by MM′ON, wherein M is a metal element, M′ is an element different from M, N is nitrogen, and O is oxygen; and an upper electrode on the dielectric layer. | 2022-09-15 |
20220293720 | SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF - Embodiments of the present disclosure provide a semiconductor structure and a manufacturing method thereof. The manufacturing method includes: providing a base; forming a bottom electrode layer on the base, wherein a crystal structure of the bottom electrode layer includes a tetragonal crystal system; forming a first dielectric layer on a surface of the bottom electrode layer by using the bottom electrode layer as a seed layer, wherein a crystal structure of the first dielectric layer includes a tetragonal crystal system; and forming a first current blocking layer on a surface of the first dielectric layer. | 2022-09-15 |
20220293721 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE - The present invention provides a manufacturing method of a semiconductor device and a semiconductor device. A semiconductor device is provided, the semiconductor device includes a substrate, a stacked structure disposed on the substrate, the substrate comprises a cell array region, a peripheral circuit region and a middle region between the cell array region and the peripheral circuit region, the stacked structure comprises a first support layer, a first trench located in the middle region, a second support layer located on an upper surface of the stacked structure, wherein parts of the second support layer is disposed in the first trench, a portion of a sidewall of the first support layer directly contacts a portion of a sidewall of the second support layer, and a capacitor structure located in the cell array region. | 2022-09-15 |
20220293722 | SEMICONDUCTOR STRUCTURE AND FORMING METHOD THEREOF - A semiconductor structure and a forming method thereof are disclosed in the embodiments of the present disclosure. The semiconductor structure includes: a base, wherein a gate dielectric layer defining a groove is provided in the base, a source region and a drain region are located on two opposite sides at a top of the groove, and the groove has an extension direction parallel to a surface of the base; a first gate, including a first work function layer and a first conductive layer, wherein the first work function layer covers a bottom surface and partial sidewall of the groove, and the first conductive layer covers a surface of the first work function layer; and a second gate, including a second work function layer and a second conductive layer, wherein the second gate is laminated on the first gate and has a top surface lower than the surface of the base. | 2022-09-15 |
20220293723 | SEMICONDUCTOR ISOLATION STRUCTURE AND METHOD FOR MAKING THE SEMICONDUCTOR ISOLATION STRUCTURE - A semiconductor isolation structure includes a handle layer, a buried insulation layer, a semiconductor layer, a deep trench isolation structure, and a heavy doping region. The buried insulation layer is disposed on the handle layer. The semiconductor layer is disposed on the buried insulation layer and has a doping type. The semiconductor layer has a functional area in which doped regions of a semiconductor device are to be formed. The deep trench isolation structure penetrates the semiconductor layer and the buried insulation layer, and surrounds the functional area. The heavy doping region is formed in the semiconductor layer, is disposed between the functional area and the deep trench isolation structure, and is surrounded by the deep trench isolation structure. The heavy doping region has the doping type. A doping concentration of the heavy doping region is higher than that of the semiconductor layer. | 2022-09-15 |
20220293724 | SEMICONDUCTOR DEVICE - A semiconductor device includes a semiconductor substrate, a top electrode in contact with a top surface of the semiconductor substrate, a bottom electrode in contact with a bottom surface of the semiconductor substrate, and an oxide film in contact with the top surface of the semiconductor substrate. The semiconductor substrate includes an element region and an outer peripheral region. The element region is a region where the top electrode is in contact with the top surface of the semiconductor substrate. The outer peripheral region is a region where the oxide film is in contact with the top surface of the semiconductor substrate, and is located between the element region and an outer peripheral end surface of the semiconductor substrate. The element region includes a semiconductor element connected between the top electrode and the bottom electrode. The outer peripheral region includes surface high-voltage-breakdown regions, deep high-voltage-breakdown regions, and a drift region. | 2022-09-15 |