37th week of 2022 patent applcation highlights part 73 |
Patent application number | Title | Published |
20220294425 | FILTER CIRCUIT - A filter circuit includes a processor configured to compare a current input value with a last-time output value, add a first correction value to the current input value and to the last-time output value if a comparison result between the current input value and the last-time output value is greater than a predetermined value, and add a second correction value smaller than the first correction value to the current input value and to the last-time output value if the comparison result is smaller than or equal to the predetermined value, and calculate a current output value based on the current input value and the last-time output value to each of which the first correction value or the second correction value has been added. | 2022-09-15 |
20220294426 | ULTRA-LOW ENERGY PER CYCLE OSCILLATOR TOPOLOGY - In described examples of an integrated circuit (IC), an oscillator includes Schmitt trigger delay cells connected in a ring topology. The Schmitt trigger delay cells have a high input threshold approximately equal to Vdd and a low input threshold approximately equal to Vss to increase delay through each cell. An output buffer receives a phase signal from an output terminal of one of the Schmitt trigger delay cells and converts a transition phase signal to a faster transition clock signal. The output buffer has control circuitry that generates non-overlapping control signals in response to the phase signal, to control an output stage to generate the fast transition clock signal while preventing short circuit current in the output stage. | 2022-09-15 |
20220294427 | VARIABLE CURRENT DRIVE FOR ISOLATED GATE DRIVERS - A method for controlling a high-power drive device includes providing a current having a first predetermined current level to an output node during a first phase of a multi-phase turn-on process for the high-power drive device coupled to the output node. The method includes transitioning from the first phase to a second phase of the multi-phase turn-on process based on a first indication of a sensed voltage level on the output node during the first phase and a second indication of a time elapsed from a start of the first phase during the first phase. The method includes providing the current having a second predetermined current level to the output node during the second phase. | 2022-09-15 |
20220294428 | Deterministic Jitter Generator with Controllable Probability Distribution - A jitter generator may include a duty cycle code generator that generates a duty cycle control signal and an input buffer that outputs a signal based on its duty cycle. The input buffer may be coupled to the duty cycle code generator and to a source of a clock signal. After receiving the clock signal, the input buffer outputs the clock signal having jitter relative to the clock signal received from the source. The jitter may be added at least in part by components of the input buffer offsetting different transitions of the clock signal according to the duty cycle. Jitter may be added when the duty cycle changes in response to changes in the duty cycle control signal, such as in response to number generator circuitry of the duty cycle code generator update its output number, in response to a mode change received from a controller, or the like. | 2022-09-15 |
20220294429 | CLOCK GENERATOR CIRCUIT FOR GENERATING DUTY CYCLE CLOCK SIGNALS AT LOW POWER - In one embodiment, an apparatus includes a clock generator circuit to receive a first clock signal at a first frequency and output a second clock signal at a second frequency less than the first clock frequency. The clock generator circuit may include: a divider circuit to divide the first clock signal to obtain at least a first divided clock signal and a second divided clock signal; and a gating circuit coupled to the divider circuit, the gating circuit to gate the first clock signal with at least one of the first divided clock signal and the second divided clock signal to output the second clock signal. | 2022-09-15 |
20220294430 | POWER CONVERTER SUITABLE FOR HIGH FREQUENCIES - A switching circuit comprises a main switch element having a gate as a control input; and a ring oscillator connected as a driver circuit to the gate to drive the main switch via the gate. The basic circuit is used to build various components which have the property that they can work at very high frequencies. | 2022-09-15 |
20220294431 | System, Device, and Methods for an Adaptive Frequency Adjustment Circuit - The present disclosure provides an adaptive adjustment circuit in a computer chip having a voltage-controlled oscillator (VCO) and a processor. The adaptive adjustment circuit comprises a frequency difference acquisition module to generate a frequency difference signal based on a first difference between an oscillation frequency of the VCO and a target frequency. The adaptive adjustment circuit also includes a power module to supply a working voltage to the VCO and the processor, adjust the working voltage based on the frequency difference signal, and supply the adjusted working voltage to the VCO and the processor. | 2022-09-15 |
20220294432 | MULTIPLE ADJACENT SLICEWISE LAYOUT OF VOLTAGE-CONTROLLED OSCILLATOR - Methods and systems are described for generating multiple phases of a local clock at a controllable variable frequency, using loop-connected strings of active circuit elements. A specific embodiment incorporates a loop of four active circuit elements, each element providing true and complement outputs that are cross-coupled to maintain a fixed phase relationship, and feed-forward connections at each loop node to facilitate high frequency operation. A particular physical layout is described that maximizes operating frequency and minimizes clock pertubations caused by unbalanced or asymmetric signal paths and parasitic node capacitances. | 2022-09-15 |
20220294433 | ANALOG-TO-DIGITAL CONVERTER, PHASE SAMPLER, TIME-TO-DIGITAL CONVERTER, AND FLIP-FLOP - A D-type flip-flop (DFF) includes an input circuit having a plurality of transistors configured to receive a clock signal and a data signal, a first inverter (INV | 2022-09-15 |
20220294434 | STAGGER SIGNAL GENERATION CIRCUIT - A stagger signal generation circuit is provided. The stagger signal generation circuit includes: a stagger pulse generation circuit, configured to generate a first pulse signal according to a first control signal and generate a second pulse signal according to a second control signal, the first control signal and the second control signal being inverted signals, and the first pulse signal and the second pulse signal being stagger pulse signals; and a delay signal output circuit including G signal output circuits, G being an integer greater than or equal to 2. Each non-first-stage signal output circuits receives a delay output signal outputted by a respective previous-stage signal output circuit as an input signal of a current-stage signal output circuit, and a first-stage signal output circuit receives an initial input signal as an input signal of the first-stage signal output circuit. | 2022-09-15 |
20220294435 | MINIMUM INTRINSIC TIMING UTILIZATION AUTO ALIGNMENT ON MULTI-DIE SYSTEM - The present invention provides a system including a transmitter and a receiver is disclosed. The transmitter includes a first main data path and a first main strobe path, wherein the first main data path is configured to generate a plurality of data signals, the first main strobe path is configured to generate a first strobe signal, and delay amount of the first main data path and delay amount of the first main strobe path are unbalanced. The receiver includes a second main data path and a second main strobe path, wherein the second main strobe path is configured to receive the first strobe signal to generate a plurality of second strobe signals, and the second main data path is configured to receive the plurality of data signals, and uses the plurality of second strobe signals to sample the plurality of data signals to generate a plurality of sampled signals, respectively. | 2022-09-15 |
20220294436 | POLYPHASE PHASE SHIFTER - In described examples, a quadrature phase shifter includes digitally programmable phase shifter networks for generating leading and lagging output signals in quadrature. The phase shifter networks include passive components for reactively inducing phase shifts, which need not consume active power. Output currents from the transistors coupled to the phase shifter networks are substantially in quadrature and can be made further accurate by adjusted by a weight function implemented using current steering elements. Example low-loss quadrature phase shifters described herein can be functionally integrated to provide low-power, low-noise up/down mixers, vector modulators and transceiver front-ends for millimeter wavelength (mmwave) communication systems. | 2022-09-15 |
20220294437 | PULSE GENERATION CIRCUIT AND STAGGER PULSE GENERATION CIRCUIT - A pulse generation circuit and stagger pulse generation circuit are provided. The pulse generation circuit includes: an oscillation circuit that receives a control signal and generates a first oscillation signal according to the control signal; a period adjustment circuit that receives the first oscillation signal and a magnification selection signal and outputs a second oscillation signal, the period of the second oscillation signal is a period of the first oscillation signal or a period of an oscillation adjustment signal, and the second oscillation signal is selected according to the magnification selection signal; and a pulse conversion circuit that receives the second oscillation signal and outputs a pulse signal, the pulse of the pulse signal is generated according to the rising or falling edge of the second oscillation signal, and the pulse period of the pulse signal is the same as the oscillation period of the second oscillation signal. | 2022-09-15 |
20220294438 | SIGNAL OUTPUT CIRCUIT AND CIRCUIT FOR OUTPUTTING DELAYED SIGNAL - A signal output circuit and a circuit for outputting a delayed signal are provided. The signal output circuit includes: a first control subcircuit, configured to receive a first pulse signal and an input signal and output a first adjustment signal, a first preset edge of the first adjustment signal has a first delay relative to a rising edge of the input signal; a second control subcircuit configured to receive a second pulse signal and the input signal and output a second adjustment signal; and the signal output subcircuit is configured to receive the first adjustment signal and the second adjustment signal, and output a delayed output signal, a rising edge of the delayed output signal is generated according to the first preset edge of the first adjustment signal, and a falling edge of the delayed output signal is generated according to the second preset edge of the second adjustment signal. | 2022-09-15 |
20220294439 | IC THERMAL PROTECTION | 2022-09-15 |
20220294440 | UNBALANCED FAILURE DETECTOR CIRCUIT FOR DETECTING UNBALANCED FAILURE OF ELECTRONIC DEVICE APPARATUS INCLUDING ELECTRONIC DEVICES - An unbalanced failure detector circuit according to one aspect of the present disclosure is provided for detecting an unbalanced failure of an electronic device apparatus including electronic devices, and the electronic device apparatus includes a plurality of current paths connected in parallel. The unbalanced failure detector circuit includes a detector unit, and a controller. The detector unit has a plurality of coils connected in series and arranged to surround the plurality of current paths, respectively, and is configured to output a coil sum voltage which is a sum of induced voltages generated across the plurality of coils by currents flowing through the plurality of current paths. The controller is configured to detect the unbalanced failure of the electronic device apparatus when the coil sum voltage outputted from the detector unit exceeds a predetermined value range. | 2022-09-15 |
20220294441 | METHOD AND DEVICE FOR SHORT-CIRCUIT DETECTION BY SATURATION DETECTION IN POWER SEMICONDUCTOR SWITCHES - The present invention relates to a method for short-circuit detection by saturation detection in power semiconductor switches and to a corresponding device. A reference voltage (U | 2022-09-15 |
20220294442 | DRIVE CIRCUIT - A drive circuit is provided. When the switching element is in turn-on state and a collector-emitter voltage of the switching element is equal to or higher than a first predetermined voltage value, the first diode is turned on; the first transistor and the second transistor are turned on; and, after a mask time in which a first capacitor is started to be charged with a current from a current source and a voltage value at two ends becomes equal to or higher than a second predetermined voltage value higher than the first predetermined voltage value, an abnormality detection signal is output to the control unit. The control unit stops an output of the pulse signal to the switching element in response to the abnormality detection signal. | 2022-09-15 |
20220294443 | SEMICONDUCTOR DEVICE - A semiconductor device that normally-off drives a first transistor that normally-on drives, the semiconductor device includes a first circuitry, a second circuitry, and a first diode. The first circuitry that is connected with a power supply voltage and a ground voltage, detects the power supply voltage, and outputs a transition state of the power supply voltage. The second circuitry that is connected with the power supply voltage, the ground voltage, the first circuitry, and a second transistor, and outputs a drive voltage of a second transistor connected in series with the first transistor, based on an output of the first circuitry. The first diode having an anode connected with a drive terminal of the first transistor and a cathode connected with an output terminal of the second transistor. | 2022-09-15 |
20220294444 | LOW LATENCY TACTILE CAPACITIVE KEYBOARDS - Example low latency tactile capacitive keyboards are disclosed. An example compute system includes a keyboard including a housing, a plurality of keys, and a touch sensor positioned between the housing and at least one of the plurality of keys, keyboard circuitry to detect a signal output by the touch sensor, the signal corresponding to a keystroke, and generate a code corresponding to the detected signal and processor circuitry to process the code to effect the keystroke. | 2022-09-15 |
20220294445 | COMPUTER SYSTEM AND INTERFACE CIRCUIT THEREFOR - A computer system may include a host device including a memory controller and a first interface circuit configured to provide the memory controller with an interface to other devices; and a data storage unit in communication with the host device through a channel and configured to communicate with the host device through a second interface circuit including a termination circuit. The first interface circuit is configured to select between different termination schemes. The first interface circuit is configured to add an addition signal to a transmission signal based on a termination scheme of the termination circuit and transmit the transmission signal with the addition signal to the termination circuit. | 2022-09-15 |
20220294446 | VOLTAGE CONVERSION CIRCUIT - A voltage conversion circuit is provided. The circuit includes a first input module and a second input module. The first input module is connected to a first voltage and has a first input terminal for receiving an input signal and outputting a conversion signal, a high level of the input signal is a second voltage which is less than the first voltage; The second input module is connected to the first input module and has a second input terminal and an output terminal, the second input terminal is configured to receive a sampling signal, and the second input module is configured to sample the conversion signal according to the sampling signal and output an output signal via the output terminal. | 2022-09-15 |
20220294447 | HIGH-PERFORMANCE TABLE-BASED STATE MACHINE - A table-based state machine is improved by reducing critical dependence path. In one aspect, all current states for a given input are read from a state table circuit, and the next state and output are then selected therefrom by an output multiplexer based on the current state, removing dependence on the current state from the table read, and allowing the read(s) to be pipelined. In a further aspect, multiple input units are configured to operate on multiple inputs in parallel, with each input unit propagating its state table circuit for its current input to the next downstream input unit. Each downstream input unit is configured to use the propagated state table circuit to provide the state table circuit reads to the proper output multiplexer input. The number of possible output states for a given input may be dynamically reduced, reducing the size of the output multiplexer selecting the next state. | 2022-09-15 |
20220294448 | MAGNETOELECTRIC XNOR LOGIC GATE DEVICE - A magneto-electric (ME) XNOR logic gate device includes a conducting device; and a ME-FET coupled to the conducting device. The ME-FET can be formed of a split gate; a first gate terminal coupled to a first portion of the split gate for receiving a first input signal; a second gate terminal coupled to a second portion of the split gate for receiving a second input signal; a source terminal coupled to a ground line; and a drain terminal coupled to the conducting device. | 2022-09-15 |
20220294449 | MAGNETOELECTRIC MAJORITY GATE DEVICE - A magneto-electric (ME) majority gate device includes a conducting device and a plurality of ME transistors coupled to the conducting device. In one implementation, the plurality of ME transistors include a ME AND gate device with downward interface polarization, a ME-transmission gate device with downward interface polarization, and a ME-XNOR gate device. In another implementation, the plurality of ME transistors is five single-input ME-FETs. | 2022-09-15 |
20220294450 | MAGNETOELECTRIC INVERTER - A magneto-electric (ME) inverter includes two anti-ferromagnetic spin orbit read (AFSOR) circuit elements, each AFSOR circuit element has a CMOS inverter; and an AFSOR device with a ME base layer; a semiconductor channel layer on the ME base layer and comprising a source terminal and a drain terminal, where the source terminal is coupled to an output of the CMOS inverter; and a gate electrode on the semiconductor channel layer. The gate electrode of a second AFSOR device of the two AFSOR circuit elements is coupled to the drain terminal of a first AFSOR device of the two AFSOR circuit elements. | 2022-09-15 |
20220294451 | METHOD AND APPARATUS FOR PROVIDING FIELD-PROGRAMMABLE GATE ARRAY (FPGA) INTEGRATED CIRCUIT (IC) PACKAGE - An integrated circuit (“IC”) module includes a substrate, multiple field-programmable gate array (“FPGA”) dies, and pads capable of being selectively configured to perform one or more user defined logic functions. The substrate is configured to house multiple FPGA dies side-by-side in an array formation facilitating transmission of signals between the FPGA dies or chips. The FPGA dies are placed on the substrate functioning as a single FPGA device. The periphery dies of the FPGA dies are configured for external connectivity and the interior dies which are interconnected to perform user defined logic functions. The pads, in one aspect, coupling to the FPGA dies, are configured to provide connections between at least some of the FPGA dies. | 2022-09-15 |
20220294452 | ANALOG HASHING ENGINES USING PHYSICAL DYNAMICAL SYSTEMS - An analog hashing system and method includes: an input port for accepting an input signal; a chaotic circuit including non-linear components and multiple chaotic attractors for generating an unpredictable output responsive to the input signal; a differential output port coupled to the chaotic circuit for producing an analog differential signal from the unpredictable output; and a clock circuit for producing a binary output, as a hash function, generated by the sign of the analog output in every clock cycle. | 2022-09-15 |
20220294453 | SPATIAL SEGREGATION OF FLEXIBLE LOGIC HARDWARE - The invention relates to an electronic system, comprising components and/or units of various kinds, hence the electronic system can be called a heterogeneous system. The invented electronic system can be applied in the electric system digital control domain and in particular it is targeting (but not limited to) control of power train of pure electric or hybrid vehicle electric motors that require hard real time and safe control. | 2022-09-15 |
20220294454 | EMBEDDED NETWORK ON CHIP ACCESSIBLE TO PROGRAMMABLE LOGIC FABRIC OF PROGRAMMABLE LOGIC DEVICE IN MULTI-DIMENSIONAL DIE SYSTEMS - An integrated circuit device may include programmable logic fabric disposed on a first integrated circuit die, such that the programmable logic fabric may include a first region of programmable logic fabric and a second region of programmable logic fabric. The first region of programmable logic fabric is configured to be programmed with a circuit design that operates on a first set of data. The integrated circuit may also include network on chip (NOC) circuitry disposed on a second integrated circuit die, such that the NOC circuitry is configured to communicate data between the first integrated circuit die and the second integrated circuit die. | 2022-09-15 |
20220294455 | SYSTEMS AND METHODS FOR DYNAMIC POWER AND THERMAL MANAGEMENT FOR PROGRAMMABLE LOGIC DEVICES - Systems or methods of the present disclosure may provide a programmable logic device including one or more power monitors and one or more thermal sensors. The programmable logic device may include control circuitry that may receive power data and thermal data for multiple die of the programmable logic device, and may implement one or more response based on the thermal and power data. | 2022-09-15 |
20220294456 | Compensation Technique for the Nonlinear Behavior of Digitally-Controlled Oscillator (DCO) Gain - Systems and methods are provided for hopping a digitally controlled oscillator (DCO) among a plurality of channels, wherein a gain of the DCO K | 2022-09-15 |
20220294457 | PLL CIRCUIT, SEMICONDUCTOR APPARATUS, EQUIPMENT - A PLL circuit includes: a charge pump; a voltage-controlled oscillator including an oscillation portion; and a voltage-converting circuit configured to convert a voltage from the charge pump and apply the converted voltage to the voltage-controlled oscillator. The power supply range supplied to the voltage-converting circuit is larger than the power supply range supplied to the oscillation portion of the voltage-controlled oscillator. | 2022-09-15 |
20220294458 | Control Signal Pulse Width Extraction-based Phase-locked Acceleration Circuit and Phase-locked Loop System - Disclosed are a control signal pulse width extraction-based phase-locked acceleration circuit and a phase-locked loop system, the phase-lock acceleration circuit includes a pulse width extraction control circuit and a current injection switch module; the control output terminal of the pulse width extraction control circuit is connected to the current injection control terminal of the current injection switch module, and the stepping current control terminal of the current injection switch module and the driving input terminal of the pulse width extraction control circuit are both connected to the preset control signal output end of a phase frequency detector for use in controlling, according to pulse width changes of signals outputted by the preset control signal output end, the current injection switch module to inject charges until the phases of a reference clock signal and feedback clock signal inputted by the phase frequency detector are synchronized. | 2022-09-15 |
20220294459 | FREQUENCY LOCKING METHOD AND CIRCUIT FOR PHASE-LOCKED LOOP - A frequency locking method for a phase-locked loop comprises the following steps: S1, a frequency control module controls a numerically controlled oscillator to obtain an maximum output frequency and a minimum output frequency; S2, obtain a minimum frequency ratio and a maximum frequency ratio by means of a time-to-digital converter and the frequency control module; S3, calculate a first frequency control word and a first frequency ratio according to the minimum frequency ratio and the maximum frequency ratio; S4, the frequency control module uses the Newton's iterative method to recalculate a new frequency control word; S5, obtain a new frequency ratio according to the new frequency control word; S6, if the new frequency ratio is within an error range, end iteration and stably output the new frequency control word, and otherwise, jump to step S4. | 2022-09-15 |
20220294460 | COMPENSATION CIRCUIT AND METHOD FOR FREQUENCY DIVIDER CIRCUIT - A counter signal counting at a frequency of a clock signal is generated. Among a plurality of different numeric ranges corresponding to a plurality of different thresholds, a threshold corresponding to a numeric range containing a frequency ratio is selected. In response to the counter signal reaching the selected threshold, a logic level of an output signal is switched. | 2022-09-15 |
20220294461 | Single-ended Linear Current Operative Analog to Digital Converter (ADC) with Thermometer Decoder - A high resolution analog to digital converter (ADC) with improved bandwidth senses an analog signal (e.g., a load current) to generate a digital signal. The ADC operates based on a load voltage produced based on charging of an element (e.g., a capacitor) by a load current and a digital to analog converter (DAC) output current (e.g., from a N-bit DAC). The ADC generates a digital output signal representative of a difference between the load voltage and a reference voltage. This digital output signal is used directly, or after digital signal processing, to operate an N-bit DAC to generate a DAC output current that tracks the load current. In addition, quantization noise is subtracted from the digital output signal thereby extending the operational bandwidth of the ADC. In certain examples, the operational bandwidth of the ADC extends up to 100s of kHz (e.g., 200-300 kHz), or even higher. | 2022-09-15 |
20220294462 | DIGITAL-TO-ANALOG CONVERTER, DATA PROCESSING SYSTEM, BASE STATION, AND MOBILE DEVICE - A Digital-to-Analog Converter, DAC, is provided. The DAC comprises one or more first DAC cells configured to generate a first analog signal based on first digital data. The one or more first DAC cells are coupled to a first output node for coupling to a first load. The DAC comprises one or more second DAC cells configured to generate a second analog signal based on second digital data. The one or more second DAC cells are coupled to a second output node for coupling to a second load. The one or more first DAC cells and the one or more second DAC cells are couplable to a power supply for drawing a supply current. The DAC further comprises a data generation circuit configured to generate the second digital data based on the first digital data. | 2022-09-15 |
20220294463 | Batteryless Wireless Sensor System - A batteryless wireless sensor system includes a data acquisition system, a radio frequency (RF) transceiver, and a batteryless wireless sensor device. The RF transceiver is in communication with the data acquisition system, transmits a RF signal, and receives sensor data and provide the sensor data to the data acquisition system. The batteryless wireless sensor device includes a RF transmitter, an analog to digital converter (ADC), and a sensor. The batteryless wireless sensor harvests energy from the RF signal and generates a DC signal based on the energy harvested from the RF signal, powers up and operates the ADC and the sensor based on the DC signal, and generates sensor data. The batteryless wireless sensor then transmits the sensor data via the RF transmitter to the RF transceiver. In certain examples, the ADC is implemented as a current mode ADC. | 2022-09-15 |
20220294464 | INTERCONNECTED INVERTER AND METHOD OF MANUFACTURING INTERCONNECTED INVERTER - A system of an interconnected inverter includes an inverter that converts DC power from a DC power supply into AC power and provides AC power to an AC power line, an RDC that converts a voltage value obtained by a voltage sensor into electrical angle information that shows a phase angle of an output voltage, the voltage sensor obtaining a voltage value of an output voltage from the inverter to a power grid, and an ECU that controls the inverter to provide an alternating current in synchronization with an alternating current that flows through the AC power line by using timing at which an angle shown in the electrical angle information given from the RDC attains to a prescribed angle. Extra cost for diversion can be reduced. | 2022-09-15 |
20220294465 | METHODS AND DEVICES FOR REDUCING POWER CONSUMPTION AND INCREASING FREQUENCY OF OPERATIONS IN DIGITAL TO ANALOG CONVERTERS - A RFDAC comprising an array of unit-cell power amplifiers, wherein the array comprises a first plurality of unit-cell power amplifiers, a second plurality of unit-cell power amplifiers, and a third plurality of unit-cell power amplifiers; wherein the first plurality of unit-cell power amplifiers are configured to operate in accordance with a first clock; wherein the second plurality of unit-cell power amplifiers are configured to operate in accordance with a second clock; wherein the third plurality of unit-cell power amplifiers are configured to operate in accordance with the first clock or the second clock. The RFDAC also comprising a decoder configured to output the first clock and an enablement signal of the first clock for the first plurality; output the second clock and an enablement signal of the second clock for the second plurality; distinguish between the first clock and the second clock for the third plurality. | 2022-09-15 |
20220294466 | ADAPTIVE ANALOG TO DIGITAL CONVERTER (ADC) MULTIPATH DIGITAL MICROPHONES - Exemplary multipath digital microphone described herein can comprise exemplary embodiments of adaptive ADC range multipath digital microphones, which allow low power to be achieved for amplifiers or gain stages, as well as for exemplary adaptive ADCs in exemplary multipath digital microphone arrangements described herein, while still providing a high DR digital microphone systems. Further non-limiting embodiments can comprise an exemplary glitch removal component configured to minimize audible artifacts associated with the change in the gain of the exemplary adaptive ADCs. | 2022-09-15 |
20220294467 | PROCESSING OF LOSSY-COMPRESSED ADAS SENSOR DATA FOR DRIVER ASSISTANCE SYSTEMS - Example embodiments relate to an ADAS sensor data processing unit, to an ADAS sensor system and to an ADAS sensor data evaluation method for use in driver assistance systems or systems for the automated driving of a vehicle. The ADAS sensor data processing unit includes an input interface, a decompression module, a processing unit and an output unit. The input interface is designed to receive data of an ADAS sensor that have been subjected to lossy compression by a compression module. The decompression module is designed to decompress the compressed data of the ADAS sensor. The processing unit is designed to process the decompressed data (IdSD) of the ADAS sensor, information relevant to an ADAS/AD function being ascertained from the decompressed sensor data. The output unit is designed to output the ascertained information relevant to the ADAS function. | 2022-09-15 |
20220294468 | MULTIPLIER AND OPERATOR CIRCUIT - A multiplier is configured to implement multiplication of a first value of M bits and a second value of N bits, and includes P groups of encoders and W layers of inversion compressors. Each group include N encoders and are configured to encode a part of bits in the second value, and a group selection signal and a symbol control input signal corresponding to the each group. The group selection signal and the symbol control input signal are generated based on a part of bits in the first value, and the P groups of encoders perform encoding to obtain P partial products. The W layers of inversion compressors are configured to compress the P partial products. | 2022-09-15 |
20220294469 | COMPRESSION DEVICE AND CONTROL METHOD - According to one embodiment, a compression device includes a coding information generation unit. The unit determines code lengths that are respectively associated with a plurality of symbols, based on a frequency of occurrence of each of the plurality of symbols. When the plurality of symbols include one or more first symbols that are respectively associated with one or more first code lengths exceeding an upper limit, the unit changes the first code lengths to the upper limit, selects, from one or more second symbols of the plurality of symbols that are respectively associated with one or more second code lengths shorter than the upper limit, at least one symbol in descending associated code length order, changes at least one code length associated with the symbol to the upper limit. | 2022-09-15 |
20220294470 | PROBABILISTIC MODEL FOR FILE-SPECIFIC COMPRESSION SELECTION UNDER SLA-CONSTRAINTS - One example method includes file specific compression selection. Compression metrics are generated for a chunk of a file. Using a set of training data, the compression metrics are corrected using a correction factor to determine estimated file compression metrics. A compressor is then selected to compress the file based on at least the estimated file compression metrics. | 2022-09-15 |
20220294471 | SMART DECODER - Embodiments herein provide a method for predicting iterations for decoding an encoded data at an electronic device. The method includes: receiving, by the electronic device, the encoded data; detecting, by the electronic device, signal parameters associated with the encoded data; predicting, by the electronic device, one of a cyclic redundancy check (CRC) failure, CRC success, and a CRC uncertainty in iterations for decoding the encoded data based on the signal parameters using a Neural Network (NN) model. | 2022-09-15 |
20220294472 | LOW DENSITY PARITY CHECK DECODER - A method and system for decoding low density parity check (“LDPC”) codes. An LDPC code decoder includes LDPC decoding circuitry comprising a Q message generator and a P sum adder array. The Q message generator combines an R message from a previous iteration with a P message to produce a Q message. The P sum adder array adds the P message to a difference of an R message from a current iteration and the R message from the previous iteration to produce an updated P message. | 2022-09-15 |
20220294473 | ITERATIVE ERROR CORRECTION WITH ADJUSTABLE PARAMETERS AFTER A THRESHOLD NUMBER OF ITERATIONS - A processing device in a memory system reads a sense word from a memory device and executes a plurality of parity check equations on corresponding subsets of the sense word to determine a plurality of parity check equation results. The processing device determines a syndrome for the sense word using the plurality of parity check equation results, determines whether the syndrome for the sense word satisfies a codeword criterion, and responsive to the syndrome for the sense word not satisfying the codeword criterion, performs an iterative low density parity check (LDPC) correction process, wherein at least one criterion of the iterative LDPC correction process is adjusted after a threshold number of iterations is performed. | 2022-09-15 |
20220294474 | METHODS AND APPARATUSES FOR GENERATING OPTIMIZED LDPC CODES - Methods and apparatuses for generating optimized LDPC codes are proposed. One of the methods is a method for generating an optimized LDPC code for an asymmetric transmission channel. The method includes receiving an initial LDPC code for the asymmetric transmission channel. Further, the method includes performing a density evolution threshold optimization for the initial LDPC code in order to obtain the optimized LDPC code for the asymmetric transmission channel. A uniformly mixed symmetric channel density for the asymmetric transmission channel is used in the density evolution threshold optimization. | 2022-09-15 |
20220294475 | PARITY INTERLEAVING APPARATUS FOR ENCODING VARIABLE-LENGTH SIGNALING INFORMATION AND PARITY INTERLEAVING METHOD USING SAME - A parity interleaving apparatus and method for variable length signaling information are disclosed. A parity interleaving apparatus according to an embodiment of the present invention includes a processor configured to generate a parity bit string for parity puncturing by segmenting parity bits of an LDPC codeword whose length is 16200 and whose code rate is 3/15, into a plurality of groups, and group-wise interleaving the groups using an order of group-wise interleaving; and memory configured to provide the parity bit string for parity puncturing to a parity puncturing unit. | 2022-09-15 |
20220294476 | ENCODING AND DECODING APPARATUSES AND METHODS FOR IMPLEMENTING MULTI-MODE CODING - Encoding and decoding apparatuses and methods for implementing multi-mode coding are provided. The apparatus includes a transmitter and a receiver connected to a data bus. When data bursts are converted by the transmitter into codewords each including a plurality of symbols and/or a codeword received by the receiver is recovered as data bursts, maximum transition avoidance (MTA) codeword mappings in which no maximum transition (MT) event occurs between the plurality of symbols and minimum DC current (MDC) codeword mappings related to minimum power consumption of the plurality of symbols are used. | 2022-09-15 |
20220294477 | DATA DECODING METHOD AND APPARATUS, AND COMPUTER STORAGE MEDIUM - Disclosed are a data decoding method and apparatus, and a computer storage medium. The data decoding method includes: after Polar code data to be decoded is acquired, transmitting the Polar code data to be decoded to at least two pre-configured independent U value calculation modules, the U value calculation modules being configured to calculate a U value required at a next iteration of a G node; controlling the at least two independent U value calculation modules to process the Polar code data to be decoded to obtain at least two sets of new decode data; and, processing the at least two sets of new decode data to obtain new Polar code data to be decoded. | 2022-09-15 |
20220294478 | DEVICE FOR TRANSFERRING HEAT BETWEEN A FIRST MODULE AND A SECOND MODULE - A device for transferring heat between a second module, for example an optical transceiver module, and a first module, for example a heat sink. The device comprises a holder for holding the second module, a first unit configured to be thermally coupled to the first module, and a second unit which is urged against the second module placed in the holder by a biasing apparatus. The first unit and the second unit are thermally coupled to one another through a heat-transferring apparatus such that an improved heat transfer can be provided between the first and second units, and hence between the second module and the first module. Furthermore, the disclosure also relates to an arrangement, including the device, and a network access node for a wireless communication system including any one of the device and the arrangement. | 2022-09-15 |
20220294479 | EFFICIENT MULTI-BAND TRANSMITTER - Transmitters, sensor systems, and methods of transmission include a frequency adjuster coupled to a ring oscillator to reduce latency and power consumption and to receive a signal from the ring oscillator. The frequency adjuster includes logic circuits to adjust the signal to a selected transmission frequency band. A band switch is coupled to the ring oscillator and the frequency adjuster to select logic circuits within the frequency adjuster to determine the selected transmission frequency band from a set of output frequency bands. A first radio front end is coupled to the frequency adjuster to transmit the signal on the selected transmission frequency band. | 2022-09-15 |
20220294480 | INTEGRATED RADIO FREQUENCY TRANSCEIVER - A direct digital radio having a high-speed RF front end in communication with an antenna, and a radio subsystem that can be configured to form a programmable multi-standard transceiver system. The high-speed RF front including RF inputs configured to receive a plurality of radio frequencies (e.g., frequencies between 400 MHz to 7.2 GHz, millimeter wave frequency signals, etc.) and wideband low noise amplifiers provides amplified signals to RF data converters, analog interfaces, digital interfaces, component interfaces, etc. The programmable multi-standard transceiver is operable in frequencies compatible with multiple networks such as private LTE and 5G networks as well as other wireless IoT standards and WiFi in multi-standard network access equipment. The programmable multi-standard transceiver can greatly reduce complexity for the baseband processing, lower the cost of the overall transceiver system, reduce power consumption, and at the same time, benefit from improvements on the digital functions through integration. | 2022-09-15 |
20220294481 | UE REPORTING FOR IMPROVING BASE STATION PRECODING - Apparatus, methods, and computer program products for improving precoding downlink signaling are provided. An example method may include determining one or more noise covariance parameters for a noise covariance report, the noise covariance parameters being associated with a noise covariance matrix for whitening. The example method further may include transmitting, to a base station, the noise covariance report including the one or more noise covariance parameters or a noise whitening matrix for the whitening, the noise covariance report being transmitted based on a transmission periodicity of one or more slots. | 2022-09-15 |
20220294482 | COMMUNICATION SYSTEMS AND METHODS FOR COGNITIVE INTERFERENCE MITIGATION - Systems and methods for operating a receiver. The methods comprise: receiving, at the receiver, a combined waveform comprising a combination of a desired signal and an interference signal; and performing, by the receiver, demodulation operations to extract the desired signal from the combined waveform. The demodulation operations comprise: obtaining, by the receiver, machine learned models for recovering the desired signal from combined waveforms; comparing, by the receiver, at least one characteristic of the received combined waveform to at least one of the machine learned models; and determining a value for at least one symbol of the desired signal based on results of the comparing. | 2022-09-15 |
20220294483 | FILTERS INCLUDING BANDPASS FILTER TRANSMISSION LINES - Filters include a housing having an input port and an output port and a plurality of resonant cavities within the housing. Each resonant cavity may include a respective notch resonator. The filter may further include a bandpass filter that includes a plurality of bandpass resonators, the bandpass filter extending between the input port and the output port. The bandpass filter may replace a transmission line that is included in conventional filters. | 2022-09-15 |
20220294484 | TRANSMISSION OF BODY STATUS INFORMATION BY A WEARABLE COMPUTING DEVICE - A method for wearable computing device, the method comprising acquiring, by the wearable computing device, a first body status information of a person from a first data acquisition unit, wherein the person is wearing the wearable computing device. Receiving, by the wearable computing device, external information from other wearable computing devices via a wireless communication interface. In response to a fulfillment of a predefined crowd detection criterion by the external information, automatically, by the wearable computing device, transmitting the first body status information by the wireless communications interface. | 2022-09-15 |
20220294485 | MAGNETIC HOUSING FOR MOBILE DEVICE AND MANUFACTURING PROCESS THEREOF - The present disclosure provides a magnetic housing for mobile device and a manufacturing process of the magnetic housing. The magnetic housing includes a housing body, an outer sleeve, a magnetic coil, and an inner lining. The housing body comprises a bearing part and a surrounding part. The surrounding part is connected to and intersecting with an outer periphery of the bearing part to form an accommodating space. The accommodating space accommodates a mobile device. The bearing part comprises a groove. The outer sleeve is disposed on a surface of the housing body away from the accommodating space. The magnetic coil is disposed in the groove. The inner lining is disposed on a surface of the housing body close to the accommodating space. The overall thickness of the housing for mobile device would not be increased when magnetic coils are disposed. | 2022-09-15 |
20220294486 | AVERAGE POWER TRACKING SYSTEMS WITH FAST TRANSIENT SETTLING - Average power tracking (APT) systems with fast transient settling are disclosed. In certain embodiments, an APT system is used to provide a power amplifier supply voltage to a power amplifier that amplifies a radio frequency (RF) signal. The APT system controls the power amplifier supply voltage to track an average power of the RF signal, and includes a DC-to-DC converter that is assisted by an error amplifier in transitioning from one power amplifier supply voltage level to another power amplifier supply voltage level. Thus, the combination of a DC-to-DC converter with a fast changing error amplifier can swing enough AC voltage with a low enough slew rate to be able to rapidly transition the power amplifier supply voltage from one APT voltage level to another APT voltage level. | 2022-09-15 |
20220294487 | RADIO-FREQUENCY MODULE AND COMMUNICATION APPARATUS - To provide a radio-frequency module and a communication apparatus capable of achieving more excellent impedance characteristics. A radio-frequency module includes a first acoustic-wave filter (a first reception filter), a second acoustic-wave filter (a second reception filter), a switch (an antenna switch), a first inductor, and a second inductor. The first acoustic-wave filter transmits a signal in a first communication band. The second acoustic-wave filter transmits a signal in a second communication band. The first inductor is provided between ground and a node on a signal path (a second reception path) with which the switch is connected to the second acoustic-wave filter. The second inductor is connected in series between the switch and the first inductor on the signal path. | 2022-09-15 |
20220294488 | SYSTEMS AND METHODS FOR SYNCHRONIZING TIME, FREQUENCY, AND PHASE AMONG A PLURALITY OF DEVICES - Aspects of the present disclosure describe a system and method for synchronizing time, frequency, and phase among a plurality of devices. | 2022-09-15 |
20220294489 | ELECTRONIC DEVICE AND METHOD FOR CONTROLLING COMMUNICATION IN ELECTRONIC DEVICE SUPPORTING HETEROGENEOUS COMMUNICATION TECHNOLOGIES SHARING A FREQUENCY BAND - According to various embodiments, an electronic device may comprise an ultra-wideband (UWB) communication circuit, a Wi-Fi communication circuit and a processor controlling the UWB communication circuit and the Wi-Fi communication circuit. The processor may be configured to identify an operation channel of the UWB communication circuit, identify a communication band of the Wi-Fi communication circuit, overlapping the operation channel of the UWB communication circuit, and when the communication band overlapping the operation channel is activated, determine whether to simultaneously perform Wi-Fi communication through the activated communication band and UWB communication through the operation channel. Other various embodiments are possible as well. | 2022-09-15 |
20220294490 | Multi-Bitrate Video With Dynamic Blocks - Methods, systems, computer-readable media, and apparatuses for providing dynamic block control of multi-bitrate video are described. In some embodiments, a computing device may determine transcoder conditions of a transcoder independent of a client device. The computing device may dynamically adjust a block size of one or more blocks of a stream based on the transcoder conditions. In some embodiments, a computing device may receive a stream. The client device may package the stream into a first packaged stream having a first block size and a second packaged stream having a second block size less than the first block size. In some embodiments, a client device may determine an actual minimum number of blocks to buffer prior to initiating content playback based on a received predicted network and/or transcoder quality of service forecast. The client device may adjust its preset minimum number of blocks to the actual minimum number of blocks. | 2022-09-15 |
20220294491 | POLARITY SWITCHING POWER LINE COMMUNICATION - Instead of the method of performing the power disconnection in the existing phase angle control AC power line communication, using relays or various power semiconductor devices, if communication is executed through data mapping on a pattern where polarity switching (in the case of AC, phase-shifting by 180°) occurs at a differential voltage level of a power line, no power disconnection occurs and high voltage interval is utilized so that the power line communication is strongly resistant to external noise and provides high communication speed, while transmitting several bits in one period of AC voltage waveform. This solves the disadvantages the existing classical condenser coupling type power line communication and the phase angle control AC power line communication for long distance have had. Even though the power line communication is utilized for DC power line communication, many advantages are obtained and high power transmission efficiency is achieved through the relays. | 2022-09-15 |
20220294492 | POWER LINE COMMUNICATION SYSTEM - A power line communication system ( | 2022-09-15 |
20220294493 | SPATIAL REUSE FOR HIDDEN NODE SCENARIO - This document discloses a solution for enabling spatial cooperation in a hidden node scenario. According to an aspect, a method comprises: detecting, by a station of a first wireless network managed by a first access node, that a second access node of a second wireless network is hidden to the first access node; in response to the detecting, transmitting by the station a spatial cooperation request message to the second access node; receiving, by the station from the second access node as a response to the spatial cooperation request message, a spatial cooperation response message comprising at least one information element acknowledging spatial cooperation; after receiving the spatial cooperation response message, receiving by the station a frame from the first access node while the second access node is transmitting another frame and while null steering is performed between the apparatus and the second access node. | 2022-09-15 |
20220294494 | METHOD AND COMMUNICATION DEVICE FOR TRANSMITTING AND RECEIVING CAMERA DATA AND SENSOR DATA - An embodiment of the present specification provides a TCU mounted in a vehicle. The TCU comprises: a plurality of transmission and reception units comprising one or more antennas; and a processor for controlling the plurality of transmission and reception units. The processor can carry out the steps of: receiving channel state information with respect to a wireless channel; determining a maximum data rate available for data transmission with respect to the base station; determining a data rate of at least one camera and a data rate of at least one sensor; and receiving camera data from the at least one camera and receiving sensor data from the at least one sensor. | 2022-09-15 |
20220294495 | ELECTRONIC DEVICE AND METHOD IN WIRELESS COMMUNICATION SYSTEM - A terminal-side electronic device can communicate with a transmitting device in a wireless communication system via a first type of antenna and a second type of antenna, respectively, wherein the electronic device further comprises a processing circuit configured to acquire a first information indicating communication condition between the terminal-side electronic device and the transmitting device via the first type of antenna; and acquires a second information indicating communication condition between the terminal-side electronic device and the transmitting device via the second type of antenna, wherein the communication between the terminal-side electronic device and the transmitting device via the second type of antenna is performed based on the first information; wherein a configuration for the communication between the electronic device and the transmitting device can be set based on at least the second information, and wherein the first type of antenna and the second type of antenna have different directivity characteristics. | 2022-09-15 |
20220294496 | ARRANGEMENT AND METHOD PERFORMED THEREIN FOR HANDLING COMMUNICATION - Embodiments herein disclose, e.g., an arrangement for handling radio signals, wherein the arrangement has an elongated housing. The elongated housing has at least one antenna processing unit (APU) and at least two groups of antenna elements, wherein each group of antenna elements includes antenna elements and a beamforming unit that generates one or more beams. The at least one APU is connected to both the groups of antenna elements. | 2022-09-15 |
20220294497 | ANTENNA ADAPTATION METHOD AND DEVICE IN WIRELESS COMMUNICATION SYSTEM - Disclosed are an antenna adaption method and device in a wireless communication system, the method comprising the steps in which: a terminal confirms that an operation is performed in a second antenna mode; whether a synchronization signal/physical broadcast channel block (SSB) to be measured exists in an activated bandwidth part is determined; and if the SSB to be measured does not exist in the activated bandwidth part, an SSB is measured in a first measurement gap set by a base station, wherein the second antenna mode is a mode operating by being set to the number of maximum multi-input multi-output (MIMO) layers, which is less than the number of maximum MIMO layers notified by the terminal to the base station through capacity reporting. | 2022-09-15 |
20220294498 | WIRELESS COMMUNICATION SYSTEM, RELAY DEVICE, AND RECEIVING DEVICE - A relay device relaying, to a reception device, a signal stream transmitted by a transmission device through MIMO transmission, the relay device including a lattice base reduction processing unit transforming bases of the signal stream transmitted by the transmission device through MIMO transmission, to increase orthogonality of a lattice of the signal stream, a MIMO equalization unit detecting, by equalization, reception symbols in the signal stream with the bases transformed by the lattice base reduction processing unit, a symbol quantization unit performing quantization by mapping the reception symbols detected by the MIMO equalization unit, to a region on a complex plane delimited by quantization threshold values, and a transmission unit transmitting, to the reception device, at least a signal quantized by the symbol quantization unit. | 2022-09-15 |
20220294499 | INFORMATION FEEDBACK METHOD AND DEVICE, INFORMATION RECEIVING METHOD AND DEVICE, AND STORAGE MEDIUM - Provided are an information feedback method and device, an information receiving method and device, and a storage medium. The information feedback method includes the following. Configuration information from a first communication node is received. Precoding matrix information is determined according to the configuration information, where a target frequency band of the precoding matrix information is determined through indication information of a precoding matrix information subband, and the precoding matrix information subband is determined according to the configuration information. The precoding matrix information is fed back to the first communication node. | 2022-09-15 |
20220294500 | METHOD FOR TRANSMITTING FEEDBACK INFORMATION, TERMINAL DEVICE AND NETWORK DEVICE - The embodiments of the present disclosure relate to a method for transmitting feedback information and a terminal device. The method includes receiving, by a terminal device, trigger signaling. The trigger signaling is used for triggering the terminal device to send feedback information. The method further includes determining, by the terminal device, to send a first feedback information codebook or a second feedback information codebook according to the trigger signaling. The first feedback information codebook includes feedback information corresponding to at least one downlink channel indicated by the trigger signaling, and the second feedback information codebook is a full codebook. | 2022-09-15 |
20220294501 | MICROWAVE TRANSMISSION METHOD AND RELATED DEVICE - A method includes: The receive end receives 2N channels of signals through N first antennas, where the 2N channels of signals are respectively from N second antennas of the transmit end. When transmission performance of any one of the 2N channels of signals is less than a first threshold, the receive end respectively receives, from two second antennas, two channels of signals whose polarization directions are orthogonal. When transmission performance of the two channels of signals is both greater than a second threshold, the receive end receives the 2N channels of signals through the N first antennas. | 2022-09-15 |
20220294502 | SIGNAL BLOCKAGE MITIGATION TECHNIQUES IN WIRELESS COMMUNICATIONS - Methods, systems, and devices for wireless communications are described for mitigation of blockages in wireless signals between wireless devices. A UE may detect that a blockage is present (e.g., a hand blockage), such as by detecting that a received signal strength from a transmitting device (e.g., a base station or access network entity) has dropped by greater than a threshold value. Based on the blockage detection, the UE may measure an amplitude of one or more reference signals at one or more antenna elements of multiple antenna elements. The UE may also measure one or more reference signals for one or more phase shifter values that are applied to the multiple antenna elements. The UE may determine a set of amplitude weightings, and a set of phase weightings, for the multiple antenna elements based on the measuring, and apply the sets of weightings for communications with the transmitting device. | 2022-09-15 |
20220294503 | TECHNIQUES FOR INDICATING PREFERRED BEAMS IN MULTI-TRANSMISSION AND RECEPTION POINT (MULTI-TRP) SYSTEMS BASED ON DEFAULT OPERATING FREQUENCY (DOF) MISMATCH - This disclosure provides systems, methods and apparatuses for a selection of one or more transmission and reception points (TRPs) within a multi-TRP system. In one aspect, a user equipment (UE) may transmit an indication of the selected TRPs and an indication of one or more beams that the selected TRPs may use to communicate with the UE based on a mismatch between a default operating frequency (DOF) of each TRP within the multi-TRP system and a DOF of the UE. For example, the UE may receive an indication of a DOF of each antenna port of the TRPs within the multi-TRP system and the UE may compare the indicated DOFs with a DOF of each antenna module of the UE. The UE may select to communicate with TRPs and select one or more ports that the selected TRPs may use to communicate with the UE based on the comparison. | 2022-09-15 |
20220294504 | COEXISTENCE OF CELLULAR NETWORKS WITH AERONAUTICAL RADIO ALTIMETERS - Systems, methods, apparatuses, and computer program products for coexisting cellular networks with aeronautical radio altimeters. The method may include receiving a first command from a network manager to reduce emissions. The method may also include reducing the emissions based on the received first command In certain example embodiments, the first command may be for one or more network nodes in a cluster including the network node. | 2022-09-15 |
20220294505 | MULTI-SITE MIMO COMMUNICATIONS SYSTEM WITH HYBRID BEAMFORMING IN L1-SPLIT ARCHITECTURE - A system, a method, and a computer program product for transmission of data using a multiple input, multiple output communications system with hybrid beamforming in a layer 1 split architecture. A first portion of a signal is processed at a first portion of a physical layer located in a first portion of a base station. A frequency domain compression with statistical multiplexing is applied to the processed first portion of the signal. A compressed first portion of the signal is generated. The compressed first portion of the signal and a second portion of the signal are transmitted to a second portion of the physical layer located in a second portion of the base station. | 2022-09-15 |
20220294506 | WIRELESS COMMUNICATION SYSTEM, WIRELESS COMMUNICATION METHOD, TRANSMITTING STATION DEVICE AND RECEIVING STATION DEVICE - A transmitting station device at least comprises a training signal generation unit, and a receiving station device at least comprises a communication path estimation unit which estimates a communication path response from the known signal, and a beam forming unit which performs a beam forming process using a weight to suppress inter-stream interference, a channel fluctuation amount calculation unit which calculates as a channel fluctuation amount a difference between the communication path responses estimated in a manner of one following another in time, and a weight calculation unit which calculates a new weight using an updated value of the weight calculated based on the channel fluctuation amount are included in one of the transmitting station device and the receiving station device. This can significantly reduce the amount of calculation related to update of a weight. | 2022-09-15 |
20220294507 | METHOD AND NETWORK NODE WITH IMPROVED BEAMFORMING - An antenna system includes at least a first antenna processing unit, APU1, and a second antenna processing unit, APU2, adjacently connected to each other through a serialized front haul. Each one of the APU1 and APU2 has at least two antenna elements. The antenna elements of APU1 are connected to their respective Radio Frequency, RF, chains via a first beamforming unit, and the antenna elements of APU2 are connected to their respective RF chains via a second beamforming unit. A network node configures the first beamforming unit and the second beamforming unit such that an absolute value of an angular difference between at least one of the beam directions generated by the first beamforming unit and each of the beam directions generated by the second beamforming unit exceeds or is equal to a threshold value. | 2022-09-15 |
20220294508 | BEAM SCHEDULING METHOD AND APPARATUS, DEVICE AND STORAGE MEDIUM - A beam scheduling method and apparatus, a device and a storage medium, the method comprising: when determining that a terminal has a specified capability, sending indication information to the terminal, the indication information being used to indicate whether the terminal measures RSRP on the basis of the restriction of an uplink MPE, and the specified capability being used to express that the terminal has the capability to measure the RSRP according to the restriction of the MPE; receiving a measurement result for each beam as reported by the terminal on the basis of the indication information; and performing beam scheduling on the basis of the measurement results. By using said means, the terminal may, according to a required dynamic or semi-static means, notify a base station that each beam is affected by the MPE, so that an uplink transmission beam may be better scheduled, thereby reducing the impact on uplink performance due to the restriction of the MPE. | 2022-09-15 |
20220294509 | Beam Activation and Determination in Wireless Networks - Beam determination and beam activation may be used in wireless communications. An initial (e.g., default) TCI state pool, of a plurality of TCI state pools, may be used to receive one or more messages indicating a second TCI state pool for communicating signals between a wireless device and a base station. The one or more messages may comprise an indication of a TCI state pair (e.g., an uplink TCI state and a downlink TCI state) of the second TCI state pool. | 2022-09-15 |
20220294510 | SIMULTANEOUS UPLINK TRANSMISSIONS ASSOCIATED WITH MULTIPLE SUBSCRIPTIONS - Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may perform, to a first base station and via a first radio frequency (RF) chain associated with a first subscription, a first uplink transmission based at least in part on one or more of an uplink carrier aggregation capability of the UE or an uplink multiple-input multiple-output (MIMO) capability of the UE. The UE may perform, to the first base station or to a second base station, and via a second RF chain associated with a second subscription and configured to operate simultaneously with the first RF chain, a second uplink transmission based at least in part on one or more of the uplink carrier aggregation capability of the UE or the uplink MIMO capability of the UE. Numerous other aspects are described. | 2022-09-15 |
20220294511 | METHOD AND APPARATUS FOR BEAM MANAGEMENT IN ANTENNA ARRAY SHARING RADAR AND COMMUNICATION SYSTEMS - An electronic device and methods for performing beam management (BM) in systems with antenna arrays capable of operating in combined radar and communication modes are disclosed herein. The electronic device comprises a processor and a plurality of antenna elements configured to operate in a first mode, in which the antenna elements are used for communications with beamforming, and a second mode, in which at least two of the antenna elements are used for radar and the remainder are used for the communications. The processor is configured to perform a mode switch on the antenna elements to switch between the first mode and the second mode, determine, after the mode switch, a new beam to use during a first BM cycle, perform, using the new beam, the first BM cycle to obtain signal quality measurements, and perform a second BM cycle using an updated beam based on the signal quality measurements. | 2022-09-15 |
20220294512 | TERMINAL AND RADIO COMMUNICATION METHOD - One aspect of a terminal in the present disclosure includes a receiving section that receives downlink control information that uses at least one of a specific RNTI (Radio Network Temporary Identifier) and a specific field; and a control section that, when a beam failure is detected, controls transmission of information related to at least one of a cell in which the beam failure is detected and a new candidate beam by using at least one of an uplink shared channel scheduled in the downlink control information and a configured grant based uplink shared channel configured after receiving the downlink control information. | 2022-09-15 |
20220294513 | Methods and Apparatuses for Adjusting a Set of Candidate Beams - Embodiments described herein relate to methods and apparatuses for adjusting a set of candidate beams that a wireless device is to perform measurements on. A method comprises obtaining an estimated gain value associated with a first narrow beam in the set of candidate beams, wherein the estimated gain value is determined based on a value indicative of first received energy of a first reference signal received by the wireless device on a first wide beam and a value indicative of a second received energy of a second reference signal received by the wireless device on the first narrow beam; comparing the estimated gain value to an expected gain value associated with the first narrow beam; and based on the comparison, determining whether to adjust which beams belonging to the candidate set of beams. | 2022-09-15 |
20220294514 | METHOD AND DEVICE FOR ASSESSING RADIO LINK QUALITY IN WIRELESS COMMUNICATION SYSTEM - Disclosed are a method and device for assessing radio link quality in a wireless communication system. A method for assessing radio link quality according to one embodiment of the present disclosure may comprise the steps of: receiving configuration information related to a control resource set (CORESET) from a base station; and assessing radio link quality on the basis of one or more reference signals (RS) for the CORESET related to a physical downlink control channel (PDCCH) monitored by a terminal. The radio link quality may be assessed on the basis of the one or more reference signals among a plurality of reference signals for which a quasi co-location (QCL) related to a spatial reception parameter for the CORESET has been set. | 2022-09-15 |
20220294515 | METHODS AND APPARATUS FOR MIMO TRANSMISSION - Methods for multiple input-multiple output (MIMO) transmission are provided herein. A method may include sensing, using at least one of a plurality of antenna chains, radio frequency (RF) energy on a channel in a first time duration and may indicate the channel is busy. RF energy may be sensed on the channel using the at least one of the plurality of antenna chains in a second time duration and may indicate the channel is not busy. A method may include sending energy level sensed during the second time duration, a frame using the at least one of the plurality of antenna chains. The frame may indicate timing information associated with a MIMO transmission. The MIMO transmission may be sent using the indicated timing information and the at least one of the plurality of antenna chains. | 2022-09-15 |
20220294516 | UPLINK CONTROL COMMUNICATIONS FOR SPATIAL DIVISION MULTIPLEXING - Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may receive, via a first beam of a set of beams configured for spatial division multiplexing (SDM), a downlink communication. The UE may transmit, via a second beam of the set of beams, uplink control information (UCI) associated with the first beam. Numerous other aspects are described. | 2022-09-15 |
20220294517 | DOWNLINK CONTROL COMMUNICATIONS FOR SPATIAL DIVISION MULTIPLEXING - Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may receive an indication of a first beam, of a set of beams configured for spatial division multiplexing (SDM), for reception of a downlink control information (DCI) message associated with a second beam of the set of beams. The UE may receive, via the first beam, the DCI message associated with the second beam. Numerous other aspects are described. | 2022-09-15 |
20220294518 | AUTONOMOUS BEAM SWITCH IN HAPS COVERAGE - A system, apparatus, method, and non-transitory computer readable medium for providing autonomous beam switching for user equipment (UE) within a cell coverage area of a high-altitude platform station (HAPS) network device, the HAPS network device may be caused the HAPS network device to, determine beam layer information corresponding to the plurality of beam layers; transmit the beam layer information to the at least one UE; receive an autonomous beam switch request from the at least one UE in response to the transmitted beam layer information, the request including beam switch parameters; determine a selected beam layer based on the beam switch parameters; and enable communication with the at least one UE using the selected beam layer. | 2022-09-15 |
20220294519 | BEAM CONFIGURATION METHOD AND APPARATUS - Embodiments of this application provide a beam configuration method and apparatus. The method includes: determining base station scheduling information rank, and determining a direction of arrival power spectrum; determining peak information based on the direction of arrival power spectrum; determining, based on the peak information, beam directions that meet power conditions; selecting, based on a preset filtering condition, at least one candidate beam direction from the beam directions that meet the power conditions; and determining a target beam direction of a terminal from the at least one candidate beam direction based on the base station scheduling information rank, a value of a channel quality indicator CQI, and the direction of arrival power spectrum. In this way, a beam configuration manner on a terminal side is more flexible, to meet requirements of different service scenarios, and improve stability of a communications link. | 2022-09-15 |
20220294520 | GROUP-BASED SCELL BEAM FAILURE RECOVERY - A communication apparatus includes a receiver and circuitry. The receiver receives configuration information for beam failure recovery (BFR) of a plurality of secondary cells (SCells) operating in a network. The circuitry performs beam failure detection (BFD) and reports based on the configuration information. | 2022-09-15 |
20220294521 | METHODS AND DEVICES FOR PROCESSING UPLINK SIGNALS - There is provided mechanisms for processing uplink signals. A method is performed by a RRU ( | 2022-09-15 |
20220294522 | INTEGRATED REPEATER SYSTEM AND METHOD TO OPERATE INTEGRATED REPEATER SYSTEM - An integrated repeater system that includes a repeater device having a first surface and a second surface that is opposite to the first surface. The repeater device further comprises phased array antenna receivers arranged on the first surface and receives a mmWave radio frequency signal from a base station, and one or more phased array antenna transmitters arranged on the second surface and transmits the received mmWave radio frequency signal through a glass structure to a user equipment. The integrated repeater system further comprises an impedance matching component between the second surface and the glass structure. Further, an impedance of the one or more phased array antenna transmitters is tuned in accordance with the glass structure based on the impedance matching component. | 2022-09-15 |
20220294523 | SYSTEM MODEL AND ARCHITECTURE FOR MOBILE INTEGRATED ACCESS AND BACKHAUL IN ADVANCED NETWORKS - Facilitating operation and support of mobile relays based on an integrated access and backhaul concept for advanced networks (e.g., | 2022-09-15 |
20220294524 | WIRELESS TRANSMISSION SYSTEM, WIRELESS TRANSMISSION DEVICE, WIRELESS TRANSMISSION METHOD, AND PROGRAM - A wireless transmission system ( | 2022-09-15 |