38th week of 2011 patent applcation highlights part 30 |
Patent application number | Title | Published |
20110228598 | TRANSMISSION GATE-BASED SPIN-TRANSFER TORQUE MEMORY UNIT - A transmission gate-based spin-transfer torque memory unit is described. The memory unit includes a magnetic tunnel junction data cell electrically coupled to a bit line and a source line. A NMOS transistor is in parallel electrical connection with a PMOS transistor and they are electrically connected with the source line and the magnetic tunnel junction data cell. The magnetic tunnel junction data cell is configured to switch between a high resistance state and a low resistance state by passing a polarized write current through the magnetic tunnel junction data cell. The PMOS transistor and the NMOS transistor are separately addressable so that a first write current in a first direction flows through the PMOS transistor and a second write current in a second direction flows through the NMOS transistor. | 2011-09-22 |
20110228599 | Non-Volatile Memory Cell with Programmable Unipolar Switching Element - A non-volatile memory cell with a programmable unipolar switching element, and a method of programming the memory element are disclosed. In some embodiments, the memory cell comprises a programmable bipolar resistive sense memory element connected in series with a programmable unipolar resistive sense switching element. The memory element is programmed to a selected resistance state by application of a selected write current in a selected direction through the cell, wherein a first resistance level is programmed by passage of a write current in a first direction and wherein a second resistance level is programmed by passage of a write current in an opposing second direction. The switching element is programmed to a selected resistance level to facilitate access to the selected resistance state of the memory element. | 2011-09-22 |
20110228600 | MEMORY PROGRAMMING - Systems, methods, and devices for iteratively writing contents to memory locations are provided. A statistical model is used to determine a sequence of pulses to write desired contents to a memory location. The contents can be expressed as a resistance value in a range to store one or more bits in a memory cell. For phase change memory, an adaptive reset pulse and one or more annealing pulses are selected based on a desired resistance range. Reading the resistance value of the memory cell can provide feedback to determine adjustments in an overall pulse application strategy. The statistical model and a look up table can be used to select and modify pulses. Adaptively updating the statistical model and look up table may reduce the number of looping iterations to shift the resistance value of the memory cell into the desired resistance range. | 2011-09-22 |
20110228601 | MLC SELF-RAID FLASH DATA PROTECTION SCHEME - A two-dimensional self-RAID method of protecting page-based storage data in a MLC multiple-level-cell flash memory device. The protection scheme includes reserving one parity sector across each data page, reserving one parity page as the column parity, selecting a specific number of pages to form a parity group, writing into the parity page a group parity value for data stored in the pages of the parity group. The parity sector represents applying a RAID technique in a first dimension. The group parity represents applying a RAID technique in a second dimension. Data protection is achieved because a corrupted data sector can likely be recovered by the two dimensional RAID data. | 2011-09-22 |
20110228602 | MEMORY DEVICE AND SEMICONDUCTOR DEVICE - One of objects is to provide a nonvolatile memory device in which the occurrence of a defect in data writing is suppressed and whose area can be suppressed, or a semiconductor device including the nonvolatile memory device. A first memory portion including a nonvolatile memory element and a second memory portion (data buffer) for temporarily storing data in verifying operation in which whether the data is correctly written into the first memory portion is verified are provided. Further, the second memory portion includes a memory element and an insulated gate field effect transistor for controlling the holding of charge in the memory element; the off-state current or the leakage current of the transistor is extremely low. | 2011-09-22 |
20110228603 | FUSION MEMORY - According to one embodiment, there is provided a fusion memory including a first memory cell array formed of a NAND cell unit and a second memory cell array formed of a DRAM cell on a semiconductor substrate. The NAND cell unit is formed of a non-volatile memory cell having a two-layer gate structure in which a first gate and a second gate are stacked, and a selective transistor connecting the first and second gates of the non-volatile memory cell. The DRAM cell is formed of a cell transistor having a structure same as the structure of the selective transistor, and a MOS capacitor having a structure same as the structure of the non-volatile memory cell or the selective transistor. | 2011-09-22 |
20110228604 | PRELOADING DATA INTO A FLASH STORAGE DEVICE - Programmer's data is initially stored in a memory device of the storage device by using an MBC storage scheme. After the storage device is embedded in a host device, the programmer's data is internally read from the memory device by using conventional read reference voltages, and the number of erroneous data bits in the programmer's data is calculated. If the programmer's data includes an uncorrectable number of erroneous data bits, the programmer's data is iteratively reread by using unconventional read reference voltages with decreased levels. The iteration process, which includes decreasing the level of the read reference voltages and recalculating the number of erroneous data bits, is terminated when the number of erroneous data bits in the programmer's is less than or equals a predetermined number of erroneous data bits, after which the storage device restores the programmer's data and conventionally rewrites it into the memory device. | 2011-09-22 |
20110228605 | NONVOLATILE MEMORY - A nonvolatile memory includes a memory cell array comprising an object block which includes a first data bit region capable of storing input data and a first flag bit region capable of storing first flag information, a redundant block which includes a second data bit region capable of storing input data and a second flag bit region capable of storing second flag information, and a special block including a special bit region capable of storing an object block address of the object block. The nonvolatile memory includes an object block retention part which retains the object block address. The nonvolatile memory includes an object block flag storage part which stores the first flag information therein. The nonvolatile memory includes a redundant block flag storage part which stores the second flag information. The nonvolatile memory includes a coincidence detection circuit which detects whether a block address which is input coincides with the object block address retained in the object block retention part. The nonvolatile memory includes a block changeover circuit which controls selection of one of the object block and the redundant block on the basis of the first and second flag information when the coincidence detection circuit has detected that the input block address coincides with the object block address. | 2011-09-22 |
20110228606 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - According to one embodiment, a nonvolatile semiconductor memory device comprises a first block, a second block, a storage circuit, a controller. A first block comprises a first select gate and a first word line. A second block comprises a second select gate and a second word line. A storage circuit configures to store first data concerning a voltage to be applied to the first select gate, and second data concerning a voltage to be applied to the second select gate. A controller configures to control the voltages to be applied to the first select gate and the second select gate. The controller applies, in a write operation, a first voltage to the first select gate based on the first data, and a second voltage different from the first voltage to the second select gate based on the second data. | 2011-09-22 |
20110228607 | ADJUSTING PROGRAM AND ERASE VOLTAGES IN A MEMORY DEVICE - A system and apparatus for adjusting threshold program and erase voltages in a memory array, such as a floating gate memory array, for example. One such method includes applying a first voltage level to a first edge word line of a memory block string and applying a second voltage level to a second edge word line of the memory block string. Such a method might also include applying a third voltage level to non-edge word lines of the memory block string. | 2011-09-22 |
20110228608 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - According to one embodiment, a nonvolatile semiconductor memory device comprises a first memory cell, a second memory cell, and a control circuit. The first memory cell is connected to a first word line. The second memory cell is connected to a second word line which is adjacent to the first word line and has a width different from a width of the first word line. The control circuit applies a first voltage to the first word line and a second voltage different from the first voltage to the second word line. At least one of the first voltage and the second voltage is corrected by the control circuit based on write loop counts of the first memory cell and the second memory cell when the first memory cell and the second memory cell are write target cells in a write operation. | 2011-09-22 |
20110228609 | CORRECTING FOR OVER PROGRAMMING NON-VOLATILE STORAGE - A non-volatile storage system corrects over programmed memory cells by selectively performing one or more erase operations on a subset of non-volatile storage elements that are connected to a common word line (or other type of control line). | 2011-09-22 |
20110228610 | NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND A PROGRAMMING METHOD THEREOF - A non-volatile semiconductor memory device according to one aspect of an embodiment of the present invention includes: a semiconductor substrate; an element region; a plurality of memory cell transistors which each include a control gate electrode; and programming means for programming data to a programming target memory cell transistor by applying a programming voltage to the programming target memory cell transistor. Moreover, the programming means applies a programming voltage incremented stepwise from an initial programming voltage, to the programming target memory cell transistor while applying a constant initial intermediate voltage to memory cell transistors adjacent to the programming target memory cell transistor. Thereafter, the programming means applies an intermediate voltage incremented stepwise from the initial intermediate voltage, to one of the respective memory cells adjacent to the programming target memory cell transistor, while applying a constant final programming voltage to the programming target memory cell transistor. | 2011-09-22 |
20110228611 | System and Method for Bit-Line Control - In one embodiment, a bit-line driver has a first driver having a source terminal coupled to a high-voltage supply bus and a drain terminal coupled to the bit-line, and a second driver having a source terminal coupled to a high-voltage return bus and a drain terminal coupled to the bit line. The bit-line driver also has a first pre-driver coupled to a gate terminal of the first driver and a second pre-driver coupled to a gate terminal of the second driver. The first and second drivers use a first type of transistor, and the first and second pre-drivers use a second type of transistor. The first type of transistor is rated at a higher voltage than the second type of transistor. | 2011-09-22 |
20110228612 | SEMICONDUCTOR MEMORY AND SEMICONDUCTOR MEMORY TEST METHOD - According to the embodiments, a read circuit is connected to the other end of the bit line for reading out data from read data storing memory cells and test data storing memory cells via the bit line, and a read control circuit makes data to be read out from the test data storing memory cells when testing the bit line and makes data to be read out from the read data storing memory cells when reading out the read data. | 2011-09-22 |
20110228613 | DEVICE AND METHOD FOR ACHIEVING SRAM OUTPUT CHARACTERISTICS FROM DRAMS - A method is provided for achieving SRAM output characteristics from DRAMs, in which a plurality of DRAMs are arranged connected in parallel to a controller in such a way as to be able to obtain SRAM output characteristics using the DRAMs, comprising a process in which data is output to an external device when a control signal for data reading has been input from the external device, by sequentially repeating a step in which the controller sends a data output state control signal to one DRAM and sends a refresh standby state control signal to the other DRAMs, the data is read and sent to the external device from the DRAM in the output state, and a refresh standby state control signal is sent to the DRAM which was in the output state while an output state control signal is sent to another DRAM and data is read out from the DRAM in the output state, and a step in which the controller sends a control signal for changing the output state to the refresh standby state. | 2011-09-22 |
20110228614 | Memory System Topologies Including A Buffer Device And An Integrated Circuit Memory Device - Systems, among other embodiments, include topologies (data and/or control/address information) between an integrated circuit buffer device (that may be coupled to a master, such as a memory controller) and a plurality of integrated circuit memory devices. For example, data may be provided between the plurality of integrated circuit memory devices and the integrated circuit buffer device using separate segmented (or point-to-point link) signal paths in response to control/address information provided from the integrated circuit buffer device to the plurality of integrated circuit buffer devices using a single fly-by (or bus) signal path. An integrated circuit buffer device enables configurable effective memory organization of the plurality of integrated circuit memory devices. The memory organization represented by the integrated circuit buffer device to a memory controller may be different than the actual memory organization behind or coupled to the integrated circuit buffer device. The buffer device segments and merges the data transferred between the memory controller that expects a particular memory organization and actual memory organization. | 2011-09-22 |
20110228615 | SEMICONDUCTOR MEMORY DEVICE - According to one embodiment, a semiconductor memory device includes unit structures. Each unit structure includes bit lines, memory cells, sense amplifiers, a first data line, a computing circuit, a second data line, and data latches. The bit lines are connected to memory cells. The sense amplifiers are connected to respective bit lines adjacent to each other. The first data line is commonly connected to the sense amplifiers. The computing circuit is connected to the first data line. The second data line is connected to the computing circuit. The data latches are connected to the second data line. The unit structures are independent from one another. At least one of the unit structures is a spare unit structure. One of the unit structures is configured to be replaceable with the spare unit structure. | 2011-09-22 |
20110228616 | Clock Generator Circuits with Non-Volatile Memory for Storing and/or Feedback-Controlling Phase and Frequency - A clock-signal generator (e.g. a PLL or a DLL) uses non-volatile memory to store an analog control voltage that determines an output phase and/or frequency of the clock-signal generator. Locked loops take time to lock on a given reference frequency. To keep this time to a minimum, NVM | 2011-09-22 |
20110228617 | TECHNIQUES FOR REDUCING A VOLTAGE SWING - Techniques for reducing a voltage swing are disclosed. In one particular exemplary embodiment, the techniques may be realized as an apparatus for reducing a voltage swing comprising: a plurality of dynamic random access memory cells arranged in arrays of rows and columns, each dynamic random access memory cell including one or more memory transistors. The one or more memory transistors of the apparatus for reducing a voltage swing may comprise: a first region coupled to a source line, a second region coupled to a bit line, a first body region disposed between the first region and the second region, wherein the first body region may be electrically floating, and a first gate coupled to a word line spaced apart from, and capacitively coupled to, the first body region. The apparatus for reducing a voltage swing may also comprise a first voltage supply coupled to the source line configured to supply a first voltage and a second voltage to the source line, wherein a difference between the first voltage and the second voltage may be less than 3.5V. | 2011-09-22 |
20110228618 | SYSTEM WITH CONTROLLER AND MEMORY - According to the system of the present invention, data (DQ) signals are outputted/received between a controller | 2011-09-22 |
20110228619 | MEMORY CONTROL APPARATUS AND MASK TIMING ADJUSTING METHOD - A disclosed synchronous memory control apparatus for enabling reception of data read from a memory circuit in synchronism with a strobe signal from the memory circuit includes a mask circuit masking the strobe signal using a mask signal; a timing measuring circuit delaying the strobe signal in plural units of delay and latching data of each of the delayed strobe signals; and a mask generating circuit generating the mask signal. The timing measuring circuit latches the data of each of the delayed strobe signals at the first rise edge of the corresponding masked strobe signal. The mask generating circuit includes a delay circuit having plural units of delay. A start timing of the mask signal is adjusted in synchronism with an internal clock, and a signal having a delay amount corresponding to a selected unit of delay by the delay circuit is outputted as the mask signal. | 2011-09-22 |
20110228620 | TESTING METHOD FOR SEMICONDUCTOR MEMORY DEVICE - A method comprises simultaneously writing a test bit to a plurality of memory cells in the selected sections of a memory array corresponding to column address signals; individually and successively reading output bits from the memory cells in one of the selected sections of a designated row of the memory array corresponding to column address signals and row address signals; and error-checking the output bits with the test bit, wherein the memory array comprises the plurality of memory cells arranged in rows and columns and the memory cells of each row are divided into a plurality of sections. | 2011-09-22 |
20110228621 | SEMICONDUCTOR DEVICE AND METHOD FOR TESTING THE SAME - A semiconductor device and a method for testing the same are disclosed, relating to a technology for simultaneously screening an off-leakage-current fail caused by a passing gate effect and a neighbor gate effect. The semiconductor device includes a memory cell configured to read and write data; a sense amplifier configured to sense and amplify cell data received from the memory cell through a pair of bit lines; a bit line precharge unit configured to equalize the pair of bit lines to a level of a ground voltage in response to a bit line equalization signal; a precharge voltage generator configured to provide the ground voltage to the bit line precharge unit during a test mode; and a test controller configured to, during the test mode, maintain an activation state of the bit line equalization signal during a test mode period, and control the sense amplifier to be deactivated. | 2011-09-22 |
20110228622 | VOLTAGE REGULATOR BYPASS IN MEMORY DEVICE - A memory chip comprises an internal voltage regulator that is selectively enabled/disabled to regulate an external voltage used by the memory chip subunit. | 2011-09-22 |
20110228623 | POWER-UP CIRCUIT - A power-up circuit comprises an external supply voltage potential detector, a first internal supply voltage potential detector, a second internal supply voltage potential detector, and a logic circuit. The external supply voltage potential detector is configured to detect a supply voltage that is external to the memory device and to generate a first detection signal indicating whether a voltage potential of the external supply voltage reaches a first predetermined value. The first internal supply voltage potential detector is configured to detect a first internal supply voltage that is internal to the memory device and to generate a second detection signal indicating whether a voltage potential of the first internal supply voltage reaches a second predetermined value. The second internal supply voltage potential detector is configured to detect a second internal supply voltage that is internal to the memory device and to receive the first detection signal and an output voltage of the first internal supply voltage potential detector for generating a third detection signal indicating whether the voltage potentials of the external supply voltage and the first and second internal supply voltages reach the first, second, and third predetermined values respectively. The logic circuit is configured to receive the third detection signal and to generate a power-up signal. | 2011-09-22 |
20110228624 | SUB-WORD-LINE DRIVING CIRCUIT, SEMICONDUCTOR MEMORY DEVICE HAVING THE SAME, AND METHOD OF CONTROLLING THE SAME - Provided is a semiconductor memory device including a sub-word-line driving circuit capable of reducing an amount of leakage current due to coupling. The semiconductor memory device includes a word-line enable signal generating circuit and a sub-word-line driving circuit. The sub-word-line driving circuit provides a pull-down current path between a selected word line and ground for a pulse type period of time in a precharge mode following an active mode for the selected word line, generates a word line driving signal on the basis of a main word line driving signal, a first sub-word-line control signal, and a second sub-word-line control signal, and provides the word line driving signal to a memory cell array. The semiconductor memory device may reduce an amount of leakage current flowing to a ground through the sub-word-line driving circuit. | 2011-09-22 |
20110228625 | WRITE COMMAND AND WRITE DATA TIMING CIRCUIT AND METHODS FOR TIMING THE SAME - Circuits, memories, and methods for latching a write command and later provided write data including write command and write data timing circuits. One such timing circuit includes internal write command latch to latch an internal write command in response to write command latch signal. The internal write command latch releases the latched write command in response to the write command latch signal after a latency delay. The timing circuit further includes a write leveling flip-flop (FF) circuit and a write data register. One such method includes generating and latching an internal write command. The latched internal write command is released after a latency delay responsive to the memory clock signal. The internal write command is propagated over an internal write command path. Write data is captured and internal write command latched in response to a write clock signal. The captured write data is released to be written to memory. | 2011-09-22 |
20110228626 | SYNCHRONIZATION CIRCUIT AND METHOD WITH TRANSPARENT LATCHES - A synchronization circuit for re-synchronizing data from an input clock to an output clock is presented. The first transparent latch receives data synchronized to an input clock. A second transparent latch receives data from the first transparent latch and outputs data dependent on a delayed output clock which is the output clock delayed by an insertion delay. An output latch receives data from the second transparent latch and synchronizes data to the output clock. | 2011-09-22 |
20110228627 | DOUBLE DATA RATE MEMORY DEVICE HAVING DATA SELECTION CIRCUIT AND DATA PATHS - A double data rate memory device comprises first and second sense amplifiers, a data selection circuit, and a data processing circuit. The first sense amplifier is configured to provide even data loaded on a first input and output data line, and the second sense amplifier is configured to provide odd data loaded on a second input and output data line. The data selection circuit is connected to the first and second sense amplifiers and is configured to provide output data loaded on a single data line, and the data processing circuit connected to the data selection circuit and configured to transfer the even data and the odd data in first and second data paths. The even data and the odd data are combined into the output data of the data selection circuit, and the data selection circuit selects the output data in response to a least significant bit of a column address and transfers the selected data on the single data line in response to a clock signal. | 2011-09-22 |
20110228628 | METHOD AND APPARATUS FOR THE TREATMENT OF FINE-GRAINED MATERIAL IN A SPOUTED BED - A method and an associated apparatus for treating fine-grained material in a spouted bed. Here, the method and design for an associated apparatus for treating fine-grained material in a spouted bed eliminate the drawbacks of the prior art, allow different process conditions in the process chamber to be adjusted in a regulated manner, and has a simple and inexpensive structure. The method is provides that a nearly circular gas flow of the fluidizer is generated in the process chamber ( | 2011-09-22 |
20110228629 | LIQUID CONTAINING CHAMBER AND LIQUID EJECTING APPARATUS - A liquid containing chamber that supplies liquid to a liquid ejecting apparatus includes a first liquid container that is capable of containing the liquid and has a vertically long shape in a mounted position when mounted in the liquid ejecting apparatus, a first projection provided in the first liquid container and a first stirring member supported by the first projection, wherein when the first liquid container in the mounted position is divided into an upper container which is located above the first projection and a lower container which is located below the upper container, the lower container contains the liquid and the upper container contains the liquid and a predetermined amount of air. | 2011-09-22 |
20110228630 | Reduced Transit Static Mixer Configuration - Excessive residence time in the conduits located between the outlet of a static mixer and a reactor/separator reservoir can lead to undesired by-products, formation of solids, and conduit fouling. This disclosure relates to an improved configuration for a static mixer with reduced transitory time to help reduce the creation of undesired by-products and fouling during the process of mixing, and more particularly to a phosgene reactor comprising a short or very short conduit for reducing the transit time from the static mixer to a reactor/separator reservoir to one second or less. | 2011-09-22 |
20110228631 | STATIC MIXER - The static mixer has a coupling section and a mixer housing in which mixer elements are arranged consecutively in the flow direction so as to be offset relative to one another by an angle, and are designed so as to apply an alternatingly directed rotation to the mixed material during the mixing operation. A mixer element has two transversal walls that are divided into sectors, the first transversal wall comprising sectors that are separated by an inflow separating wall directed to the inlet, and a separating wall directed to the outlet, the transitions between the sectors and the separating wall forming respective breakaway edges, the separating wall being arranged at an angle relative to the inflow separating wall, and the second transversal wall, which is divided into sectors, having an outflow separating wall directed to the outlet. Such a mixer allows a more efficient mixture particularly of very quickly reacting components and is also suitable for small dimensions as used in medicine. | 2011-09-22 |
20110228632 | Cup holding assembly for a food mixing machine - A food mixing machine ( | 2011-09-22 |
20110228633 | AGITATOR - An agitator assembly configured for mounting on a container such as a liquid manure or biogas tank. The assembly includes a tube with a closure member, a drive shaft operably connected to a motor and having a propeller attached thereto, and a flange with a seal. The drive shaft and propeller are longitudinally moveable in and out of the container within the tube while maintaining a seal on the tube to prevent the escape of liquids or gasses from the container. The tube can be closed and the drive shaft and propeller removed without having to empty the container. | 2011-09-22 |
20110228634 | METHOD AND APPARATUS FOR CONTROLLING TEMPERATURE OF AN ACOUSTIC TRANSDUCER - Embodiments relate to monitoring the temperature of a transducer and controlling the temperature as a function of adjusting one or more characteristics of the transducer. | 2011-09-22 |
20110228635 | Self-positioning nodal geophysical recorder - A nodal geophysical recorder includes a housing, at least one geophysical sensor disposed within the housing and a recording device for recording signals detected by the at least one geophysical sensor. A navigation device is configured to determine a path between an initial geodetic position of the housing and a selected geodetic position on the bottom of a body of water. At least one deflector is in signal communication with the navigation device and is configured to cause the housing to move along the determined path after the housing is released into the body of water from the initial position. | 2011-09-22 |
20110228636 | Cetacean Protection System - An embodiment according to one or more aspects of the present disclosure for conducting a marine survey includes a survey spread comprising a plurality of receivers and an energy source that is towed along a selected course while a signal is emitted from an energy source. A plurality of receivers receive data comprising a detection sampling frequency and a survey sampling frequency. The survey sampling frequency is monitored to detect a cetacean vocalization and to position the cetacean at least while conducting the seismic survey. Pursuant to the location of the cetacean actions can be taken to protect the cetacean and to minimize disruptions in conducting the seismic survey. | 2011-09-22 |
20110228637 | METHOD AND DEVICE FOR LOGGING THE FLUID DEPTH IN A WELLBORE - In a method for logging the location of a fluid depth in a wellbore, an acoustic event is allowed to take place in a specific manner at the ground surface. This acoustic event generates pressure waves. The pressure waves travel in the wellbore downward. The pressure waves traveling in the wellbore are reflected at least also at the fluid depth. At the ground surface, the pressure waves traveling there out of the wellbore are picked up and the time of travel since the acoustic event is measured. The picked-up and measured pressure waves are analyzed and, together with the associated time of travel, the location of the fluid depth is deduced. The acoustic event generates a signal pattern having a predetermined, time-variable frequency spectrum. The signal pattern is emitted as vibration event into the wellbore, travels downward, and is reflected. At the ground surface, the picked-up signals originating from the wellbore are analyzed. During the analysis, vibration events that do not correlate with the emitted signal pattern are filtered out. From the vibration events that are among the picked-up signals and correlate with the emitted signal pattern and from the time of travel since the radiation of the signal pattern, the location of the fluid depth is deduced. | 2011-09-22 |
20110228638 | SYSTEM AND METHOD OF 3D SALT FLANK VSP IMAGING WITH TRANSMITTED WAVES - According to a preferred aspect of the instant invention, there is provided herein a system and method for imaging complex subsurface geologic structures such as salt dome flanks using VSP data. In the preferred arrangement, a receiver wave field will be downward continued through a salt flood model and a source wave field will be upward continued through a sediment flood model until they “meet” at the subsurface locations of the VSP receivers. The source and receiver wave fields will be cross correlated as an imaging condition at each depth interval. | 2011-09-22 |
20110228639 | Active Sonar System and Active Sonar Method Using Noise Reduction Techniques and Advanced Signal Processing Techniques - An active sonar system and associated method combine signals from a plurality of receive beams in order to reduce a noise in a reference one of the signals from the plurality of receive beams. | 2011-09-22 |
20110228640 | Torsional Ultrasonic Wave Based Level Measurement System - A level measurement system suitable for use in a high temperature and pressure environment to measure the level of coolant fluid within the environment, the system including a volume of coolant fluid located in a coolant region of the high temperature and pressure environment and having a level therein; an ultrasonic waveguide blade that is positioned within the desired coolant region of the high temperature and pressure environment; a magnetostrictive electrical assembly located within the high temperature and pressure environment and configured to operate in the environment and cooperate with the waveguide blade to launch and receive ultrasonic waves; and an external signal processing system located outside of the high temperature and pressure environment and configured for communicating with the electrical assembly located within the high temperature and pressure environment. | 2011-09-22 |
20110228641 | Device for determining a filling level - A device for determining a filling level in a container, with a stillwell which has an entry opening and a vent opening, an ultrasonic transducer arranged in the base region of the stillwell and at least one pre-chamber. The pre-chamber has an inlet opening to the container and an outlet opening to the entry opening of the Stillwell. The pre-chamber of the device has a second outlet opening that opens out in a lead-off arrangement. By the lead-off arrangement, foamed medium flowing in quickly and suddenly into the pre-chamber of the device does not arrive into the measurement section of the ultrasonic transducer. | 2011-09-22 |
20110228642 | Electronic calendar - It is an object of this invention to provide an electronic calendar capable of automatically displaying an image related to a calendar. An electronic calendar includes, on its one side face of its main body, a liquid crystal display panel capable of displaying at least calendar information and image information. The electronic calendar incorporates a date counter for counting a date, an information database for recording the calendar information, which is based on a date counted by the date counter, and the image information, which corresponds to a future date in the calendar information. The image information relates to an event that occurred on a past date and not on the present date in the calendar information. The electronic calendar incorporates, in its main body, image display controller for displaying the image information on the liquid crystal display panel when a future date in the calendar information comes. | 2011-09-22 |
20110228643 | VACUUM PACKAGE, METHOD FOR MANUFACTURING VACUUM PACKAGE, PIEZOELECTRIC VIBRATOR, OSCILLATOR, ELECTRONIC DEVICE, AND RADIO-CONTROLLED TIMEPIECE - Provided are a vacuum package and a method for manufacturing the vacuum package having excellent airtightness and capable of improving mounting strength, and a piezoelectric vibrator, an oscillator, an electronic device, and a radio-controlled timepiece. The package includes a base substrate and a lid substrate bonded to each other, a cavity formed between the base substrate and the lid substrate and configured to be capable of sealing a piezoelectric vibrating reed, and penetration electrodes penetrating through the base substrate in the thickness direction so as to make the inner side of the cavity and the outer side conductive. Portions of the base substrate and the lid substrate in the vicinity of the cavity form bonding regions in which the two substrates are bonded. A notch portion through which the bonding surface of the lid substrate is exposed as seen from the thickness direction of the base substrate is formed on the corner portions of the base substrate. | 2011-09-22 |
20110228644 | Detachable Clock and Gear Assembly Structure - The present invention relates to an improved detachable clock and watch gear assembly structure, which divides the gear assembly into detachable and independent first and second devices; the first device comprises: main and pinion gear representing hour, minute and second hands, spiral spring wheel for storing energy and spiral spring for ringing; the second device comprises: time-controlled precision escapement wheel, pallet, balance spring and balance wheel; of which, the first device can clamp securely the main and pinion gears as well as spiral spring by using upper/lower plywood along with the fixed leg, so can the second device clamp securely the escapement wheel, pallet, balance spring and balance wheel in the same way; an fixed arm is extended from the upper/lower plywood at one side of the first device to clamp the second device and fix it by bolt for meshing and interlocking purpose; with this design, the first device can be checked or replaced in common repair or replacement process, helping to avoid error disassembly of the precision second device and difficult alignment or otherwise malfunction for easier and quicker assembly purpose. | 2011-09-22 |
20110228645 | Timepiece - A timepiece is equipped with a movement (module), a solar cell panel, a ring member, and a dial (timepiece display plate). The panel is fixed to the module. The ring member is fixed to the peripheral portion of the movement. The ring member has, at a plurality of positions thereof, recesses, and a pair of engagement protrusions protruding upwardly from the bottom of each recess. The recesses are respectively open in an upper surface and the outer peripheral surface of the ring member. The pair of engagement protrusions form a gap G between them, and are capable of elastic deformation. A proximal portion of each engagement protrusion is situated below the upper surface of the ring member. The dial has cutouts at a plurality of positions of its peripheral portion. Each of these cutouts is engaged with each pair of engagement protrusions to cover the panel, and the dial is mounted to the ring member such that the peripheral portions of the cutouts cover the recesses. | 2011-09-22 |
20110228646 | WINDING CROWN FOR A TIMEPIECE - Winding crown for a timepiece, said crown ( | 2011-09-22 |
20110228647 | STRIKING WATCH WITH AN ACOUSTIC MEMBRANE - The striking watch ( | 2011-09-22 |
20110228648 | CRYSTAL-BEZEL ASSEMBLY UNIT FOR A TIMEPIECE AND PROCESS ASSEMBLY - The invention relates to a process for assembly of a crystal and a bezel for use of said crystal as vibrating and radiating element, according to which unconnected junction zones are determined and formed that together form the only mechanical link for the transmission of vibrations of said bezel to said crystal, on which zones said crystal is secured on said bezel in order to transmit to said crystal any vibration communicated to said bezel, and outside these zones said crystal is held without direct contact with said bezel. | 2011-09-22 |
20110228649 | METHOD FOR MANUFACTURING THERMALLY-ASSISTED MAGNETIC RECORDING HEAD COMPRISING LIGHT SOURCE UNIT AND SLIDER - A method for manufacturing a thermally-assisted magnetic recording head is provided, in which a light source unit including a light source and a slider including an optical system are bonded. A unit substrate is made of a material transmitting light having a predetermined wavelength, and an adhesion material layer is formed on the light source unit and/or the slider. The manufacturing method includes: aligning the light source unit and the slider in such a way that a light from the light source can enter the optical system and the adhesion material layer is sandwiched therebetween; irradiating the adhesion material layer with a light including the predetermined wavelength through the unit substrate; and bonding them. The adhesion material layer melted by the light including the predetermined wavelength and transmitted through the unit substrate can ensure high alignment accuracy as well as higher bonding strength and less change with time. | 2011-09-22 |
20110228650 | METHOD FOR MANUFACTURING THERMALLY-ASSISTED MAGNETIC RECORDING HEAD COMPRISING LIGHT SOURCE UNIT AND SLIDER - A method for manufacturing a thermally-assisted magnetic recording head is provided, in which a light source unit including a light source and a slider including an optical system are bonded. A unit substrate is made of a material transmitting light having a predetermined wavelength, and a unit adhesion material layer that contains Sn, Sn alloy, Pb alloy or Bi alloy is formed on the light source unit and/or the slider. The manufacturing method includes: aligning the light source unit and the slider in such a way that a light from the light source can enter the optical system and the unit adhesion material layer is sandwiched therebetween; and causing a light including the predetermined wavelength to enter the unit substrate to melt the unit adhesion material layer. The unit adhesion material layer melted by the light including the predetermined wavelength can ensure high alignment accuracy as well as higher bonding strength and less change with time. | 2011-09-22 |
20110228651 | Slider For Heat Assisted Magnetic Recording Including A Thermal Sensor For Monitoring Laser Power - An apparatus includes a light source, a slider including a sensor having a resistance or voltage that varies with the temperature of the sensor, the sensor being mounted to be heated by a portion of light emitted by the light source, and a controller controlling the light source power in response to the resistance or voltage of the sensor. | 2011-09-22 |
20110228652 | Slider For Heat Assisted Magnetic Recording Including A Photo Detector For Monitoring Laser Power - An apparatus includes a slider including an air bearing surface and a waveguide configured to receive light from a light source, a sensor positioned to receive a portion of light emitted by the light source prior to the light exiting the slider at the air bearing surface, and a controller controlling the light source power in response to a characteristic of the sensor. | 2011-09-22 |
20110228653 | LIGHT SOURCE UNIT FOR THERMALLY-ASSISTED MAGNETIC RECORDING CAPABLE OF MONITORING OF LIGHT OUTPUT - Provided is a light source unit that is to be joined to a slider to form a thermally-assisted magnetic recording head. The light source unit comprises: a unit substrate having a source-installation surface; a light source provided in the source-installation surface and emitting thermal-assist light; and a photodetector bonded to a rear joining surface of the unit substrate in such a manner that a rear light-emission center of the light source is covered with a light-receiving surface of the photodetector. The photodetector can be sufficiently close to the light source; thus, constant feedback adjustment with high efficiency for the light output of the light source can be performed. This adjustment enables light output from the light source to be controlled in response to changes in light output due to surroundings and to changes with time to stabilize the intensity of light with which a magnetic recording medium is irradiated. | 2011-09-22 |
20110228654 | OPTICAL DISK APPARATUS - An optical disk apparatus includes an optical pickup and a signal processor. The optical pickup includes an actuator for driving an objective lens, and a detected light intensity signal output part for outputting a detected light intensity signal to the processor. The signal processor includes a servo signal generator for generating a main push-pull signal and a sub push-pull signal on the basis of the detected light intensity signal supplied from the detected light intensity signal output part, a signal generator for generating a differential push-pull signal and a lens error signal by conducting addition/subtraction on the main push-pull signal and the sub push-pull signal, and a tracking offset correction signal generator which is input with the lens error signal to output a tracking offset correction signal. The differential push-pull signal correction is conducted by conducting addition/subtraction between the differential push-pull signal and the tracking offset correction signal. | 2011-09-22 |
20110228655 | COMPENSATION METHOD IN RADIAL DIRECTION ON LABEL SIDE OF OPTICAL DISC - The disclosure discloses a compensation method in a radial direction on a label side of an optical disc. An optical disc is inserted into an optical disk drive. The data side of the optical disc is divided into at least one compensation area. An optical pick-up head (OPU) is moved from inner to outer rings by simulating a writing process. The OPU is moved to some pre-determined points and radial-directional compensation is performed to obtain radial-directional voltage gains at the pre-determined points. The voltage gains are recorded. The label side of an optical disc is inserted into the optical disk drive. The simulated track number is calculated on the basis of the required moving distance for the OPU to write pattern on the label side. The OPU is moved to write the label side by a radial-directional lens driving voltage compensated with a gain obtained from a compensation formula. | 2011-09-22 |
20110228656 | METHOD AND APPARATUS FOR RECORDING INTERFERENCE FRINGE PATTERN - In order to record an interference fringe pattern in a recording layer of a medium, a plurality of laser beams are caused to interfere so as to form interference fringes in the recording layer; and during a time period over which the plurality of laser beams are caused to interfere, the following steps are continuously performed: (1) producing a signal varying according to a shift of a specific position in the recording layer; and (2) shifting a fringe-forming position in the recording layer by changing a phase of at least one of the laser beams or moving the recording layer based upon the signal produced in the step (1). | 2011-09-22 |
20110228657 | Embedded Virtual Media - A method and an optical storage medium are provided for storing data to and accessing data from an embedded virtual medium within the optical storage medium. Information describing the embedded virtual medium may be stored on to the optical storage medium. Space for an embedded lead-in area of the embedded virtual medium, as well as user data for the embedded virtual medium, may be allocated within a data zone of the optical medium. A spare sector bitmap may be included in a lead-an area of the optical medium indicating spare sectors within the embedded virtual medium as being unavailable. A spare sector bitmap may be included within the embedded virtual medium indicating available spare sectors of the embedded virtual medium. Physical sector/logical block mapping of the optical storage medium may be modified for accessing data stored on the embedded virtual medium. | 2011-09-22 |
20110228658 | INFORMATION RECORDING METHOD, OPTICAL INFORMATION RECORDING/REPRODUCING DEVICE, AND OPTICAL INFORMATION RECORDING MEDIUM USED FOR THE SAME - An optical information recording reproducing apparatus precisely decides at least the time width of a recording pulse sequence so as to obtain a preferable signal quality by controlling a recording power and a pulse time width during a high-speed write. The apparatus includes: modulation instrument for generating a test pattern containing at least a first recording mark length; recording pulse sequence conversion instrument for converting the test pattern into a recording pulse sequence containing test recording pulses having different time widths corresponding to at least the first recording mark length; beam irradiation instrument; reproduced signal processing instrument for holding as a first signal index characteristic, the relation between a first signal index acquired according to the reproduced signal obtained from a predetermined area and the recording power; and recording condition calculation instrument for obtaining a desired time width of a recording pulse of the first recording mark length. | 2011-09-22 |
20110228659 | COLLISION PREVENTION METHOD AND APPARATUS BETWEEN RECORDING MEDIUM AND LENS - A method and apparatus for preventing a collision between a recording medium and a lens are disclosed. The method for preventing the collision between the recording medium and the lens includes controlling a gap error signal (GES) between the recording medium and the lens to be maintained at a near field level, detecting a collision between the recording medium and the lens, pulling out the lens from the recording medium during a predetermined time so as to prevent a re-collision between the recording medium and the lens, and re-controlling the gap error signal (GES) between the recording medium and the lens to be re-maintained at the near field level. | 2011-09-22 |
20110228660 | METHOD AND APPARATUS FOR MEASURING A SIGNAL, METHOD OF TESTING WITH A SPINSTAND, A METHOD OF WRITING A TEST DATA PATTERN AND A SPINSTAND - There is disclosed a method and apparatus for measuring a signal using a measurement system. The signal has a frequency component that is to be detected by the measurement. The frequency component has a varying phase. The signal has at least one interruption thereto. The method includes: processing the signal with the measurement system to detect the frequency component in the signal and stalling the measurement system before the start of the interruption. The stall period is calculated such that the processing of the signal is resumed: i) after the end of the interruption, and ii) where there is substantially no discontinuity between the phase of the frequency component in the signal at the end of the stall and in the phase of the frequency component in the signal at the beginning of the stall. | 2011-09-22 |
20110228661 | HYBRID LASER DIODE DRIVERS - A hybrid LDD includes a read channel to selectively output a read current, a plurality of write channels, each to selectively output a different write current, and an oscillator channel to selectively output an oscillator current. Additionally, the hybrid LDD includes programmable LDD controller that receives the plurality of enable signals from the external controller, and based on the enable signals, controls timing of the currents output by at least the write channels. The programmable LDD controller can also control timing of the currents output by the read and oscillator channels, based on the enable signals. Further and alternative embodiments are also provided. | 2011-09-22 |
20110228662 | OPTICAL DISK REPRODUCING APPARATUS - The present invention relates to an optical disk reproducing apparatus, and provides a technology capable of supporting even a situation in which a reproduction signal characteristic is changed due to a factor other than recording density of an optical disk by using PRML of different constrained length and capable of improving reading accuracy. The optical disk reproducing apparatus includes a PRML circuit of first constrained length (for example, 4) and a PRML circuit of second constrained length (for example, 5). Equalization error values obtained during calculation of equalization learning in respective circuits are compared with each other in a determination circuit. Switching control of a switch is performed so that an output of one of the PRML circuits having a smaller equalization error value is selected. | 2011-09-22 |
20110228663 | HOLOGRAPHIC RECORDING METHOD - A holographic recording method includes the following steps:
| 2011-09-22 |
20110228664 | OPTICAL INFORMATION RECORDING/REPRODUCING APPARATUS AND OBJECTIVE OPTICAL SYSTEM FOR THE SAME - An objective optical system for information recording/reproducing, at least one of optical surfaces of the objective optical system comprising a diffraction surface including a first region contributing to converging first, second and third beams and including a diffraction structure formed such that use diffraction orders for the first, second and third beams are 1st-orders and a condition 0.03<(λB | 2011-09-22 |
20110228665 | Locally Diagnosing and Troubleshooting Service Issues - A method includes detecting, at a customer premises equipment (CPE) device, a problem associated with a network device. The network device is communicatively coupled to the CPE device via a local area network. For example, the CPE device may include a residential gateway (RG). The method includes determining, at the CPE device, whether the problem associated with the network device is locally correctable. When the CPE device determines that the problem is locally correctable, the method includes initiating a corrective action to resolve the problem. When the CPE device determines that the problem is not locally correctable, the method includes sending data associated with the problem from the CPE device to a network system via a wide area network. | 2011-09-22 |
20110228666 | METHOD AND APPARATUS FOR ESTABLISHING AND MAINTAINING PEER-TO-PEER (P2P) COMMUNICATION ON UNLICENSED SPECTRUM - Techniques for establishing and maintaining peer-to-peer (P2P) communication are described. In an aspect, P2P communication on an unlicensed spectrum may be established and maintained with network assistance. In one design, a user equipment (UE) may communicate with a wide area network (WAN) to establish P2P communication with at least one other UE on a first frequency band that is not licensed to the WAN. For example, the UE may receive an assignment of at least one frequency channel in the first frequency band for P2P communication. The UE may then communicate peer-to-peer with the other UE(s) on the at least one frequency channel. The UE may also communicate with the WAN to maintain P2P communication with the other UE(s), e.g., to switch to another frequency channel if necessary. | 2011-09-22 |
20110228667 | ADDRESS REFRESHING METHOD AND DEVICE OF ETHERNET RING NETWORK - The present invention provides an address refreshing method and device of the Ethernet ring network, and the method comprises: when a current node state of each node in the Ethernet ring network is a protection state, if a failure of a first link in the Ethernet ring network disappears, transmitting a No Request (NR) protocol message indicating that the link failure disappears through node(s) connected with the first link; a node in the Ethernet ring network which receives the NR protocol message switching the node state of the node into a pending state; and when the current node state of each node in the Ethernet ring network is the pending state, if a link failure appears in the Ethernet ring network, transmitting a link failure notification (SF) protocol message through node(s) connected with the failed link; a node in the Ethernet ring network which receives the SF protocol message switching the node state of the node into the protection state, and refreshing an address forwarding table according to address refreshing information carried in the SF protocol message. | 2011-09-22 |
20110228668 | METHOD AND SYSTEM FOR AUTOMATIC FAILOVER OF DISTRIBUTED QUERY PROCESSING USING DISTRIBUTED SHARED MEMORY - A method and system for implementing automatic recovery from failure of resources in a grid-based distributed database is provided. The method includes determining the category of each node in the subgroup of nodes, where the determination identifies each node as at least one of a worker node and an idle node. The method further includes saving state of each worker node engaged in execution of a task in a shared memory at pre-determined time intervals. Each worker node is monitored by one or more idle nodes in each sub-group. Upon detection of no change in state of worker node for a pre-determined period of time, a failure notification is raised by one or more idle nodes that have detected failure of the worker node. | 2011-09-22 |
20110228669 | TECHNIQUES FOR LINK REDUNDANCY IN LAYER 2 NETWORKS - Techniques for facilitating link redundancy using an enhanced version of Virtual Switch Redundancy Protocol (VSRP), referred to herein as VSRP2. In one set of embodiments, a group of Layer 2 and/or Layer 2/3 devices (switches) can act in concert as a VSRP2 virtual switch. A first switch in the group (a VSRP2 master switch) can forward, via a first link, data traffic to/from a network device in a connected Layer 2 network. A second switch in the group (a VSRP2 backup switch) can block, at a second link, data traffic to/from the same network device. If the first link fails or otherwise becomes unavailable, the VSRP2 backup switch can detect the link failure and begin forwarding, via the second link, data traffic to/from the network device. In this manner, redundancy can be provided at the link level between the VSRP2 virtual switch and the Layer 2 network. | 2011-09-22 |
20110228670 | N_Port ID Virtualization node redundancy - In one embodiment, a method includes establishing a link between two N_Port Identifier Virtualization (NPIV) switches, the link having a high cost assigned thereto. The NPIV switches are in communication with a plurality of hosts through an N_Port Virtualization (NPV) device. The method further includes receiving at a first of the NPIV switches, an indication of a failure at a second of the NPIV switches, receiving data at the first NPIV switch, the data destined for one of the hosts associated with a domain of the second NPIV switch, and forwarding the data to the NPV device for delivery to the host, wherein a Fibre Channel Identifier (FCID) of the host is the same before and after the failure at the second NPIV switch. An apparatus is also disclosed. | 2011-09-22 |
20110228671 | Method and System for Regulating Reboot Traffic in a Telecommunications Network - A method of regulating traffic in a telecommunications network, including a first step of detecting a fault affecting a node or a link of the network. The second step below is then executed: the nodes located immediately upstream of said node/link that experienced the fault forward to the latter the registration requests sent by users of the network, to the extent that the throughput of said registration requests is below a predetermined clipping threshold associated with the registration requests; if the throughput of registration requests exceeds said clipping threshold, the excess requests are not forwarded to the node/link that experienced the fault, and the network sends to each user that sent a request refused in this way, a response prompting that user to observe a time-out period, said response specifying the recommended duration of said time-out period. Application in particular to IP networks using SIP signaling protocols. | 2011-09-22 |
20110228672 | METHODS, SYSTEMS, AND COMPUTER READABLE MEDIA FOR PROVIDING NON-ACCESS STRATUM (NAS) NODE SELECTION FUNCTION (NNSF) WITH CORE NETWORK (CN) NODE BEARER CIRCUIT AVAILABILITY MONITORING AND AVAILABILITY-BASED LOAD SHARING - The subject matter described herein includes methods, systems, and computer readable media for providing a NAS node selection function with CN node bearer circuit availability monitoring and availability-based load sharing. According to one aspect, the subject matter described herein includes a method for providing a NAS node selection function. The method includes performing various steps at a NAS node selection function which may be integrated with or separate from a media gateway. The method includes monitoring bearer circuit availability for each of a plurality of CN nodes. The method further includes storing an indication of bearer circuit availability for each of the CN nodes. The method further includes receiving initial layer | 2011-09-22 |
20110228673 | SYSTEM AND METHOD FOR PROVIDING RATE CONTROL IN A NETWORK ENVIRONMENT - A method is provided in one example embodiment and includes identifying a bandwidth parameter associated with a network link. The method includes evaluating a bandwidth request associated with user equipment, the bandwidth request is associated with a session, which involves the user equipment and which implicates the network link. The bandwidth request can be modified based on the bandwidth parameter that was identified. In more detailed embodiments, one or more header extensions in one or more packets are evaluated in order to assist in identifying the bandwidth parameter. The one or more header extensions can include a selected one of packet sequence numbers, an average packet transmission rate, an average packet receiving rate, and a packet reception error rate. In other examples, modifying the bandwidth request can include downgrading the bandwidth request to lower a bit rate based on the bandwidth parameter identified for the network link. | 2011-09-22 |
20110228674 | PACKET PROCESSING OPTIMIZATION - Some of the embodiments of the present disclosure provide a method comprising receiving a data packet that is transmitted over a network; generating classification information for the data packet; and selecting a memory storage mode for the data packet based on the classification information. Other embodiments are also described and claimed. | 2011-09-22 |
20110228675 | WIRELESS NODE - A module transmits a request for line connection to a module at a communication time notified from a module. The module proceeds to line connection processing in response to the request for line connection and notifies the module of success or failure of line connection. The module notifies a log database of the notified success or failure of line connection. The log database records success or failure of line connection in a database as log data and notifies the module of the log data at predetermined time intervals. The module revises a communication time based on the log data and notifies the module of the revised communication time. | 2011-09-22 |
20110228676 | COMMUNICATION NETWORK, DEVICE, AND METHOD - The present invention discloses a communication network, device and method. The communication method includes the following steps: a Mobile Broadband Edge (MBB-Edge) node sends a traffic offloading indication to a NodeB according to a traffic offloading policy; and the NodeB directs User Plane (UP) data of a Packet Switched (PS) service to a Public Data Network (PDN) through a fixed broadband bearer network of an offloading path according to the traffic offloading indication. The present invention increases the transmission efficiency of PS services. | 2011-09-22 |
20110228677 | WIRELESS VIRAL MESH NETWORK AND PROCESS FOR USING THE SAME - A sending subscriber system may participate in a wireless network by generating a message to transmit in a wireless network, identifying a local wireless subscriber system with which communications may be established, and determining whether to use the wireless local subscriber system as a relay. | 2011-09-22 |
20110228678 | OVERLAY NETWORK - Methods and apparatus are disclosed for dynamically discovering and utilizing an optimized network path through overlay routing for the transmission of data. A determination whether to use a default network path or to instead use an alternate data forwarding path through one or more overlay nodes is based on real-time measurement of costs associated with the alternative paths, in response to a user request for transmission of message data to a destination on the network. Cost metrics include delay, throughput, jitter, loss, and security. The system chooses the best path among the default forwarding path and the multiple alternate forwarding paths, and implements appropriate control actions to force data transmission along the chosen path. No modification of established network communication protocols is required. | 2011-09-22 |
20110228679 | ETHERNET PERFORMANCE MONITORING - One embodiment is a source router that monitors the performance of an Ethernet network. The source router generates an Ethernet connectivity check request frame that includes a transmission timestamp, and transmits the Ethernet connectivity check request frame to a destination router. The source router receives a reply from the destination router that is transmitted in response to receiving the Ethernet connectivity check request frame and determines a round trip time between the source router and the destination router based on a time of receipt of the reply and the transmission timestamp. | 2011-09-22 |
20110228680 | Methods, Apparatuses, System, Related Computer Program Product and Data Structure for Power Control and Resource Allocation - It is disclosed a method (and related apparatus) including transmitting, to each selected one of a plurality of terminals, a network control message including a plurality of limit values, each of the limit values being related to a first network communication parameter in relation to a second network communication parameter and being individually set for the selected terminal, based on a detected communication condition of each one of the plurality of terminals; and a method (and related apparatus) including configuring the terminal according to the first network communication parameter in relation to the second network communication parameter based on the received network control message including the plurality of limit values. | 2011-09-22 |
20110228681 | INPUT/OUTPUT CONNECTION DEVICE, INFORMATION PROCESSING DEVICE, AND METHOD FOR INSPECTING INPUT/OUTPUT DEVICE - An input/output connection device includes a generating section which generates an inspection packet that has a tag that uniquely identifies the packet, a transmitting section which transmits the inspection packet to the input/output device, a receiving section which receives a packet, a first determining section which determines, on the basis of a tag of the packet received by the receiving section, whether or not the received packet is a packet transmitted in response to the inspection packet transmitted by the transmitting section, and a second determining section which analyzes the received packet and determines whether or not the input/output device is normal when the first determining section determines that the received packet is the packet transmitted in response to the inspection packet. | 2011-09-22 |
20110228682 | COMMUNICATION NETWORK MANAGEMENT SYSTEM, METHOD AND PROGRAM, AND MANAGEMENT COMPUTER - A communication network includes a plurality of nodes and a plurality of links connecting between the nodes. A management computer managing the communication network has a storage means, an entry control means and a monitoring means. A route information indicating a transfer route of frames in the communication network is stored in the storage means. The monitoring means performs, based on the route information, transmission and reception of frames to and from the communication network. The entry control means instructs each node to set up a forwarding table indicating a correspondence relationship between an input source and a forwarding destination of frames. More specifically, the entry control means instructs the each node to set up the forwarding table such that frames are forwarded along the transfer route indicated by the route information. | 2011-09-22 |
20110228683 | RADIO COMMUNICATION METHOD, RADIO COMMUNICATION DEVICE, RADIO COMMUNICATION PROGRAM, AND RADIO COMMUNICATION SYSTEM - In cooperative sensing in which a plurality of cognitive radio apparatus collaboratively exchange sensing information on a status of frequency band usage as a secondary system, the sensing information is efficiently exchanged in the secondary system without influencing communication of the primary system. In a radio communication system according to this invention, a first radio communication device includes means for observing a surrounding radio communication environment, means for converting information obtained by the observation into a parameter used for radio communication, and means for performing transmission by using the parameter, and a second radio communication device includes means for receiving a signal transmitted from the first radio communication device and means for extracting, from the received signal, information on the surrounding radio communication environment that is observed on a transmission side. | 2011-09-22 |
20110228684 | COMPUTER PRODUCT, APPARATUS, AND METHOD FOR DEVICE TESTING - A non-transitory computer-readable recording medium storing therein a test program causing a computer to execute a process including acquiring a first packet and a second packet sent to a first device; transmitting, based on the acquired first packet, a third packet obtained by setting a destination of the first packet to a second device; and transmitting, based on the acquired second packet, a fourth packet obtained by setting a destination of the second packet to the second device, the fourth packet being transmitted upon elapse of a period from the transmission of the third packet and equal to a time interval between acquisition of the first packet and acquisition of the second packet. | 2011-09-22 |
20110228685 | WIRELESS NETWORK CONTROL DEVICE, WIRELESS NETWORK CONTROL METHOD, AND WIRELESS NETWORK CONTROL SYSTEM - A buffer has a predetermined storage capacity, and accumulates data received from an external device. A transmitting unit reads data from the buffer and transmits the data to a mobile terminal. A transmission rate determining unit determines the transmission rate for transmitting data from the external device to its own device, based on the free space in the buffer. The window size notifying unit notifies the mobile terminal of a window size in accordance with the determined transmission rate. | 2011-09-22 |
20110228686 | NODE, COMPUTER-READABLE MEDIUM STORING COMMUNICATION PROGRAM, AND COMMUNICATION METHOD - A computer of a first node executes primary communication and secondary communication between a first node group and a second node group provided with nodes. On the basis of the transmission capabilities of a network, the computer computes the required time required to transmit data that has been designated as outgoing data since the start time of a periodically executed transmission process up until the current time, wherein the designated data is data from among the received data that has been successively designated as outgoing data. The computer determines whether or not the time equal to the current time plus the required time matches the start time of the primary communication periodically conducted between the nodes. On the basis of the determined results, the computer decides which data from among the received data to designate as outgoing data. | 2011-09-22 |
20110228687 | METHODS AND APPARATUS FOR ESTABLISHING RECIPROCAL INTER-RADIO ACCESS TECHNOLOGY NEIGHBOR RELATIONS - A method and apparatus for establishing inter-RAT reciprocal neighbor relationships. The method may include receiving a neighbor relation notification from a first entity, wherein the neighbor relation notification indicates a neighbor relationship of a first cell to a second cell, wherein the first cell uses a first RAT, and wherein the second cell uses a second RAT that is different than the first RAT, determining, by a second network entity, that a reciprocal neighbor relationship of the second cell to the first cell does not exist in a neighbor list for the second cell, and generating the reciprocal neighbor relationship. | 2011-09-22 |
20110228688 | CONTROL SYSTEM, CONTROL DEVICE, COMPOSITE SWITCH DEVICE, AND CONTROL METHOD - A control system and method thereof is provided. The control system includes switch devices that operate on supplied power, each switch device includes multiple switch-side ports and a communication processing unit for relaying data, input to any of the switch-side ports on a basis of destination information set for the data, a relay device that includes first ports coupled to corresponding switch-side ports of the switch devices and second ports selectively coupled to the first ports and that relays the data, input to any of the second ports, to any of the first ports, and a control device that controls the switch devices and the relay device, where the control device includes a port monitoring unit, a port-assignment control unit, and a power control unit. | 2011-09-22 |
20110228689 | SYSTEM AND METHOD FOR UTILIZING SPECTRAL RESOURCES IN WIRELESS COMMUNICATIONS - A wireless communication system comprises a wavelet analyzer and a wavelet signal generator. The wavelet analyzer is operable to analyze wireless signals within a frequency and time map of a communications spectrum, whereby the wavelet analyzer is adapted to determine one or more available cells within the frequency and time map. The wavelet signal generator is operable to generate one or more wavelet signals for transmission within the determined one or more available cells of the frequency and time map based on the analyzed wireless signals within the frequency and time map. | 2011-09-22 |
20110228690 | Methods and Apparatus For Uplink Macro-Diversity in Packet-Switched Cellular Networks - A method and apparatus for providing uplink macro-diversity in packet-switched networks that allows packets and/or portions of packets, e.g., frames, to be selectively sent from an end node, e.g., wireless communication device or mobile terminal, over a set of multiple communication connections, e.g., physical-layer or link-layer connections, to one or more access nodes, e.g., base stations. Uplink macro-diversity is achieved in part through intelligent selective forwarding over multiple communication connections, where the forwarding decision is controlled by the end node based on a variety of factors, e.g., physical-layer channel conditions and/or higher layer policy. The forwarding decision is executed on a rapid timescale, e.g., on a per packet basis, to adapt to the dynamically varying conditions of the set of communication connections. | 2011-09-22 |
20110228691 | METHODS AND APPARTUS FOR CONTROLLING INTERFERENCE TO BROADCAST SIGNALING IN A PEER TO PEER NETWORK - Methods and apparatus related to broadcasting data and interference management in a peer to peer wireless communications network are described. Scheduling of traffic air link resources is performed on a slot by slot basis in a decentralized manner. Wireless devices intending to broadcast traffic signals transmit broadcast request signals, sometimes alternatively referred to as broadcast indicator signals. A priority level is associated with each of the broadcast request signals. A receiver device intending to receive broadcast signals detects the broadcast request signals and makes an interference determination as to whether the higher priority broadcast traffic signal can be successfully recovered in the presence of lower priority broadcast traffic signals. If the determination is that the expected interference from the lower priority broadcast traffic is unacceptable, the receiver device generates and transmits an interference control signal communicating to the lower priority device a command or request not to broadcast. | 2011-09-22 |
20110228692 | METHOD, SYSTEM AND SIGNAL GENERATOR FOR QUALITY DETERMINATION OF AN IP NETWORK CONNECTION - The present invention relates to a method, a system and a VoIP signal generator for determining the quality of an IP network connection, comprising the steps of generating a measuring signal by way of a signal generator for measuring the quality of an IP network connection; determining, by way of the signal generator, for each of the generated at least one measuring signal the respective signal quality of each generated measuring signal; and simultaneously transmitting the at least one measuring signal and the respective quality information over the IP network connection to a receiver. | 2011-09-22 |
20110228693 | Method Of Sensing - In a radio system where wireless nodes are in contact, the wireless nodes are enabled to exchange information, with adjacent nodes. In addition distant nodes out of range for direct communication can in accordance with one embodiment be communicated with by forwarding data over multiple hops. The wireless nodes are adapted to perform sensing of at least one radio resource in response to a request from a node. Based on the collective information from at least one other wireless nodes a wireless node can make an improved decision if a particular radio resource is free to use or not. | 2011-09-22 |
20110228694 | METHOD AND DEVICE FOR THE ANALYSIS OF CODE DOMAIN POWER AND CODE DOMAIN ERROR POWER - Method and apparatus for simultaneously showing Code Domain Power and Code Domain Error Power for various code channels by receiving a signal, evaluating the signal, ascertaining a Code Domain Power for a code channel, ascertaining a Code Domain Error Power for the code channel, and simultaneously showing the Code Domain Power and the Code Domain Error Power. | 2011-09-22 |
20110228695 | Method for Estimation of Residual Bandwidth - This invention related to a bandwidth estimation method which is easily implementable on network nodes and enables to be made better routing decisions (for example the link with higher residual bandwidth should be favored in routing decisions) and/or estimates the flow admission control (for example accept a new flow only if there is enough available path residual bandwidth) by enabling estimation of availability of the communication capacity estimates. | 2011-09-22 |
20110228696 | DYNAMIC DIRECTED ACYCLIC GRAPH (DAG) TOPOLOGY REPORTING - In one embodiment, a root device of a directed acyclic graph (DAG) may determine/detect a trigger to learn a network topology of the DAG. In response, the root device may transmit a DAG discovery request down the DAG with a route record request that requests that each device within the DAG add its device identification (ID) to a reverse route record stack for each route of a DAG discovery reply propagated up the DAG toward the root device. Upon receiving one or more DAG discovery replies, the root device may compile the recorded routes from the reverse route record stacks into a DAG network topology. Also, in one embodiment, the root device may determine “short-cuts” based on a traffic matrix generated in response to network statistics optionally included within the responses from the devices within the DAG. | 2011-09-22 |
20110228697 | Mobile Communication System and Communication Method - Disclosed is a mobile communication system preventing the transmission of acknowledgements at a burst leading to a decrease in throughput caused by detecting the retransmission and the congestion of packets at the protocol of a transport layer. In a mobile communication system including a mobile terminal and gateway equipment for relaying a packet between a communication partner and the mobile terminal, if the gateway equipment receives the acknowledgement from the mobile terminal, the gateway equipment waits the transmission of the received acknowledgement to the communication partner until the estimated transmission time passes from the time at which the gateway equipment receives the previous acknowledgement from the mobile terminal. | 2011-09-22 |