39th week of 2018 patent applcation highlights part 52 |
Patent application number | Title | Published |
20180276117 | AUTOMATED VIRTUAL MACHINE PERFORMANCE TUNING - Disclosed are systems, methods, and non-transitory computer-readable media for automated. VM performance tuning. An auto-tuning system implements a three stage automated VM performance tuning process to optimize garbage collection. In the first stage, the auto-tuning system analyzes garbage collection logs to calculate garbage collection parameters to configure the new generation portion of the memory heap (e.g., maximum tenuring age, maximum new size and survivor ratio). In the second stage, the auto-tuning system implements the calculated garbage collection parameter and monitors garbage collection activity for the VM to determine the resulting effects. In the third stage, the auto-tuning system tunes the old generation portion of the memory heap based on the monitored garbage collection activity. Specifically, the auto-tuning system determines a promotion rate from the monitored garbage collection activity and then determines a total memory heap size based on the promotion rate to achieve a target major garbage collection rate. | 2018-09-27 |
20180276118 | MEMORY SYSTEM AND CONTROL METHOD OF NONVOLATILE MEMORY - A memory system includes a nonvolatile memory that includes a plurality of blocks and a memory controller with a control circuit. The control circuit executes a first garbage collection for a first stream, which includes reading valid first data stored in a first block associated with the first stream and valid second data stored in a second block associated with the first stream and writing the read first data and the read second data into a third block associated with the first stream, and a second garbage collection for a second stream, which includes reading valid third data stored in a fourth block associated with the second stream and valid fourth data stored in a fifth block associated with the second stream and writing the read third data and the read fourth data into a sixth block associated with the second stream. | 2018-09-27 |
20180276119 | DISTRIBUTED GARBAGE COLLECTION FOR UNBALANCED WORKLOAD - A computer-implemented method is provided for distributed garbage collection (GC). The method includes increasing, an amount of heap collection in an origin JAVA Virtual Machine (JVM) by collecting unnecessary remote references to objects that belong to the origin JVM. The collecting step collects the unnecessary remote references by executing a local GC in one or more remote JVMs. | 2018-09-27 |
20180276120 | MANUAL MEMORY MANAGEMENT USING LAZY PATCHING - A method of manual memory management is described. In response to detecting an access violation triggered by the use of an invalid reference to an object in a manual heap, a source of the access in a register or stack is identified. An updated reference for the object using stored mapping data is determined and used to replace the invalid reference in the source. | 2018-09-27 |
20180276121 | DISTRIBUTED GARBAGE COLLECTION FOR UNBALANCED WORKLOAD - A computer-implemented method is provided for distributed garbage collection (GC). The method includes increasing an amount of heap collection in an origin JAVA Virtual Machine (JVM) by collecting unnecessary remote references to objects that belong to the origin JVM. The collecting step collects the unnecessary remote references by executing a local GC in one or more remote JVMs. | 2018-09-27 |
20180276122 | ASYNCHRONOUS GARBAGE COLLECTION IN PARALLEL TRANSACTION SYSTEM WITHOUT LOCKING - Methods, systems, and computer-readable storage media for determining that a transaction of a plurality of transactions performed in at least a portion of a system includes a delete operation, the plurality of transactions being managed by a secondary transaction manager and including a subset of all transactions performed in the system, in response to the delete operation, inserting a clean-up entry in the secondary transaction manager, attaching the clean-up entry to a subsequent transaction in order to determine and assign a time to the cleanup-entry that is used to subsequently trigger garbage collection, and selectively comparing the time to a most-recently-reported minimum read timestamp that is periodically reported to the secondary transaction manager from a primary transaction manager of the system, wherein the clean-up entry is executed in response to determining that the time is less than the most-recently-reported minimum read timestamp. | 2018-09-27 |
20180276123 | MEMORY SYSTEM AND CONTROL METHOD - According to one embodiment, a memory system is connectable to a host. The memory system includes a non-volatile memory and a memory controller. The non-volatile memory includes a storage area in which data received from the host is stored. The memory controller executes data transfer between the host and the memory. The memory controller executes garbage collection in a case where the quantity of vacant areas in the storage area is less than a threshold. The memory controller adjusts the threshold so that the threshold does not exceed over-provisioning capacity. | 2018-09-27 |
20180276124 | APPARATUS, SYSTEM, AND METHOD TO FLUSH MODIFIED DATA FROM A VOLATILE MEMORY TO A PERSISTENT SECOND MEMORY - Provided are an apparatus, system, and method to flush modified data from a first memory to a persistent second memory. A first memory controller coupled to the first memory includes at least one RAS controller to read a range of addresses in the first memory. In response to receiving a command from the power control unit, the at least one RAS controller is invoked to read data from at least one range of addresses specified for the RAS controller from the first memory. A second memory controller transfers data read from the first memory determined to be modified to the second memory. The first memory controller sends a signal to the power control unit to indicate that the modified data in the range of addresses specified for the RAS controller was flushed to the second memory in response to the RAS controller completing reading the range of addresses. | 2018-09-27 |
20180276125 | PROCESSOR - A processor includes a hierarchical cache memory having a higher-order cache memory and a lower-order cache memory. The hierarchical cache memory is in an inclusive state in which data stored in the higher-order cache memory is included in the lower-order cache memory. The processor also includes a cache hit determination unit configured to determine a cache hit/miss with respect to the higher-order cache memory and the lower-order cache memory at the time of accessing predetermined data, and a control unit configured to perform control to realize the inclusive state, based on the determination results of the cache hit/miss with respect to the higher-order cache memory and the lower-order cache memory. | 2018-09-27 |
20180276126 | INTERFACE DEVICE AND CONTROL METHOD THEREOF - In order to allow efficient data communication, an interface device that includes N ports, comprises: a cache memory that is shared by the N ports and includes a plurality of cache tags each of which is allocated to one of the N ports; and N cache determination units corresponding to the N ports. Each of the N cache determination units comprises: a determiner configured to determine, based on all of the values of the plurality of cache tags, whether a cache miss has occurred in the cache memory, and an update unit configured to update, when the determiner determines that a cache miss has occurred, cache tag values allocated to a self-port. | 2018-09-27 |
20180276127 | INFORMATION PROCESSING SYSTEM, INFORMATION PROCESSING APPARATUS, AND METHOD OF CONTROLLING INFORMATION PROCESSING SYSTEM - An information processing system includes: a first information processing apparatus; and a second information processing apparatus, the first information processing apparatus includes: a computation processing device that executes a first computation; a main storage device that stores data; and a control device that controls transfer of data among the first and second information processing apparatuses, the control device includes: a computation processor that executes a second computation; a buffer that holds data used in the second computation that the computation processor executes; and a transfer controller that controls transfer of data from the main storage device to the buffer and transfer of data from a different main storage device in the second information processing apparatus to the buffer, and controls transfer of result data of the second computation to the main storage device and transfer of the result data of the second computation to the different main storage device. | 2018-09-27 |
20180276128 | METHODS FOR PERFORMING A MEMORY RESOURCE RETRY - In an embodiment, an apparatus includes multiple memory resources, and a resource table that includes entries that correspond to respective memory resources of the multiple memory resources. The apparatus also includes a circuit configured to receive a first memory command. The first memory command is associated with a subset of the multiple memory resources. For each memory resource of the subset, the circuit is also configured to set a respective indicator associated with the first memory command, and to store a first value in a first entry of the resource table in response to a determination that the respective memory resource is unavailable. The circuit is also configured to store a second value in each entry of the resource table that corresponds to a memory resource of the subset in response to a determination that an entry corresponding to a given memory resource of the subset includes the first value. | 2018-09-27 |
20180276129 | PRE-FETCHING IN A MEMORY SYSTEM CONFIGURED WITH SYNTHESIZED LOGICAL BLOCKS - A memory system includes a memory and a memory controller. The memory includes first and second parallel operation elements, each including a plurality of first and second storage regions, respectively, and first and second buffers, respectively. The memory controller performs operations on the memory based on first and second group information. The first group information defines first groups, each first group including one first storage region and one second storage region, and each second group including at least two first groups. The memory controller, in response to a host command targeting a first storage region, (i) acquires first data from the first buffer, and thereafter (ii) causes the memory to read out second data to the first buffer. The first storage region storing the first data and the second storage region storing the second data belong to different first groups and to the same second group. | 2018-09-27 |
20180276130 | ELECTRONIC APPARATUS AND METHOD OF OPERATING THE SAME - An electronic apparatus and an operating method thereof. The electronic apparatus includes a memory which stores one or more instructions and a processor which executes one or more instructions stored in the memory. The processor executes the instructions to obtain one or more contents to be pre-fetched, to obtain one or more resources available in the electronic apparatus, to determine a priority of the one or more resources, and to allocate the one or more of the obtained resources, based on the obtained priority, forming a pipeline in which the obtained one or more contents are processed. | 2018-09-27 |
20180276131 | EXTRACT TARGET CACHE ATTRIBUTE FACILITY AND INSTRUCTION THEREFOR - A facility and cache machine instruction of a computer architecture for specifying a target cache cache-level and a target cache attribute of interest for obtaining a cache attribute of one or more target caches. The requested cache attribute of the target cache(s) is saved in a register. | 2018-09-27 |
20180276132 | OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING A LOAD/STORE UNIT MAINTAINING REJECTED INSTRUCTIONS - Operation of a multi-slice processor that includes a plurality of execution slices, a plurality of load/store slices, and one or more instruction sequencing units, where operation includes: receiving, at a load/store slice from an instruction sequencing unit, a instruction to be issued; determining, at the load/store slice, a rejection condition for the instruction; and responsive to determining the rejection condition for the instruction, maintaining state information for the instruction in the load/store slice instead of notifying the instruction sequencing unit of a rejection of the instruction. | 2018-09-27 |
20180276133 | LOCKING A CACHE LINE FOR WRITE OPERATIONS ON A BUS - Provided are a computer program product, system, and method for locking a cache line for a burst write operations on a bus. A cache line is allocated in a cache for a target address. A lock is set for the cache line, wherein setting the lock prevents the data in the cache line from being cast out. Data is written to the cache line. All the data in the cache line is flushed to the target address over a bus in response to completing writing to the cache line. | 2018-09-27 |
20180276134 | Managing Digital Datasets On A Multi-Tiered Storage System Based On Predictive Caching - A computer-implemented method is provided for managing digital datasets stored on a multi-tiered storage system that includes several tiers of storage, the datasets likely to be accessed by one or more applications interacting with the storage system. The method includes monitoring an access history of datasets accessed by the one or more applications; and while monitoring the access history: computing probabilities of access, by the one or more applications, of the datasets stored on the storage system according to metadata associated to given datasets as identified in the monitored access history; and based on the computed probabilities of access, selecting one or more of the datasets to be moved across the tiers. Related storage systems and computer program products are also provided. | 2018-09-27 |
20180276135 | MEMORY SYSTEM AND METHOD OF CONTROLLING NONVOLATILE MEMORY - According to one embodiment, for each area having a first size, a number of accesses to the area is recorded in first information. In units of sub areas each having a second size smaller than the first size, access information for the sub area is recorded in the second information. In the first information, the number of accesses to an area to which a sub area in which duplicate accesses occur belongs is updated. | 2018-09-27 |
20180276136 | DATA STORAGE DEVICE AND OPERATING METHOD THEREOF - An operating method for a data storage device may include: reading data from a first memory region of a storage medium; storing the read data in a data buffer; and writing the data stored in the data buffer to a second memory region of the storage medium, based on a read count for the first memory region. | 2018-09-27 |
20180276137 | APPARATUS AND METHOD FOR SYSTEM PHYSICAL ADDRESS TO MEMORY MODULE ADDRESS TRANSLATION - An apparatus and method are described for system physical address to memory module address translation. For example, one embodiment of an apparatus comprises: a fetch circuit of a core to fetch a system physical address (SPA) translate instruction from memory; a decode circuit of the core to decode the SPA translate instruction; a first register to store an SPA associated with the SPA translate instruction; a memory controller comprising one or more channel controllers to initiate a translation using the SPA, the memory controller to transmit a translation request to a first channel controller; the first channel controller to synthesize a response including dual in-line memory module (DIMM) address information; and a second register to store the DIMM address information to be used to identify the DIMM during subsequent memory transactions. | 2018-09-27 |
20180276138 | TRANSLATING VIRTUAL MEMORY ADDRESSES TO PHYSICAL ADDRESSES - A translation engine for a processor system to translate virtual memory addresses to physical addresses of a main memory of a computer system is provided, where a sequence of accesses to multiple address translation tables is performed to support a computer system virtualization level. The translation engine includes: a first pipeline having at least, a first pipeline stage to receive a value for an original address or an address translation table entry requested in a previous pass through the first pipeline; a second pipeline stage using the value as an operand in a translation operation eventually yielding the address translation result or yielding a table index to an entry in a next address translation table; and a third pipeline stage issuing a read request for the entry in the next address translation table. | 2018-09-27 |
20180276139 | LEAST RECENTLY USED-BASED HOTNESS TRACKING MECHANISM ENHANCEMENTS FOR HIGH PERFORMANCE CACHING - A method and apparatus for caching data accessed in a storage device, which include a selection of a list from a plurality of lists based on a cache block accessed from a cache memory, the cache memory being partitioned into a plurality of cache portions, each of the plurality of lists being assigned to a respective cache portion of the plurality of cache portions, each of the plurality of lists indicating an order in which cache blocks of the respective cache portion were accessed. Furthermore, a determination as to whether the accessed cache block meets a list update criteria, and an update the order in which cache blocks, assigned to the selected list, were accessed from the cache memory based on determining the accessed cache block meets the list update criteria may be included. | 2018-09-27 |
20180276140 | SNOOP FILTER WITH STORED REPLACEMENT INFORMATION, METHOD FOR SAME, AND SYSTEM INCLUDING VICTIM EXCLUSIVE CACHE AND SNOOP FILTER SHARED REPLACEMENT POLICIES - Embodiments of the present system and method provide cache replacement in a victim exclusive cache using a snoop filter where replacement information is not lost during a re-reference back to the CPU. Replacement information is stored in a snoop filter, meaning that historical access data may be fully preserved and allows for more flexibility in the LLC re-insertion points, without additional bits stored in a L2 cache. The present system and method further include snoop filter replacement technique. The present system and method passes replacement information between a snoop filter and a victim exclusive cache (e.g., LLC) when transactions move cachelines to and from a master CPU. This maintains and advances existing replacement information for a cacheline that is removed from the victim exclusive cache on a read, as well as intelligently replaces and ages cachelines in the snoop filter. | 2018-09-27 |
20180276141 | STORAGE CONTROL APPARATUS, STORAGE SYSTEM AND METHOD OF CONTROLLING A CACHE MEMORY - A storage control apparatus includes a cache memory, and a processor configured to access to a first area of the cache memory in accordance with a command, generate a first processing report identifying the first area, input the first processing report to a processing report queue when a plurality of second processing reports each of which identifies the first area are not stored in the processing report queue, execute management list update processing in which the access to the first area is recorded in a management list in accordance with the first processing report, identify data to be deleted from the cache memory in accordance with the management list, and not to input the first processing report to the processing report queue when the plurality of second processing reports are stored in the processing report queue. | 2018-09-27 |
20180276142 | FLUSHES AFTER STORAGE ARRAY EVENTS - Examples discussed herein include receiving a notification about an event occurring in a storage array. In response to receiving the notification a cache of the storage array may be frozen and the data in the cache may be flushed to a persistent storage. The data in the cache is stored in the cache prior to the event. Examples also include receiving first data in a first host write request that is received after the event from a host device, sending a write request complete signal to the host device, and flushing the first data to the persistent storage. The first data is flushed after the data in cache is flushed. | 2018-09-27 |
20180276143 | DYNAMIC CACHE BALANCING - Embodiments serve to balance overall performance of a finite-sized caching system having a first cache of a first cache size and a second cache of a second cache size. A tail portion and a head portion of each of the caches are defined wherein incoming data elements are initially stored in a respective head portion and wherein evicted data elements are evicted from a respective tail portion. Performance metrics are defined wherein a performance metric includes a predicted miss cost that would be incurred when replacing an evicted data elements. A quantitative function is defined to include cache performance metrics and a cache reallocation amount. The cache performance metrics are evaluated periodically to determine a then-current cache reallocation amount. The caches can be balanced by increasing the first cache size by the cache reallocation amount and decreasing the second cache size by the cache reallocation amount. | 2018-09-27 |
20180276144 | DETERMINING CORES TO ASSIGN TO CACHE HOSTILE TASKS - Provided are a computer program product, system, and method for determining cores to assign to cache hostile tasks. A computer system has a plurality of cores. Each core is comprised of a plurality of processing units and at least one cache memory shared by the processing units on the core to cache data from a memory. A task is processed to determine one of the cores on which to dispatch the task. A determination is made as to whether the processed task is classified as cache hostile. A task is classified as cache hostile when the task accesses more than a threshold number of memory address ranges in the memory. The processed task is dispatched to at least one of the cores assigned to process cache hostile tasks. | 2018-09-27 |
20180276145 | KERNEL SAME-PAGE MERGING FOR ENCRYPTED MEMORY - Systems and methods for performing data deduplication one storage blocks while the data is encrypted. An example method may comprise: selecting a first storage block and a second storage block from a plurality of encrypted storage blocks, wherein the first storage block and the second storage block are encrypted using different cryptographic input; causing the first storage block and the second storage block to be decrypted and further encrypted using a common cryptographic input; determining that a cipher text of the first storage block and a cipher text of the second storage block are the same; and updating a reference to the first storage block to reference the second storage block in response to the determining that the cipher text of the first storage block and the cipher text of the second storage block are the same. | 2018-09-27 |
20180276146 | MEMORY PROTECTION BASED ON SYSTEM STATE - Disclosed in some examples are memory systems, computing systems, and machine readable mediums for protecting memory at identified addresses based upon access rules defining permissible access to the identified memory addresses that depends on the value of one or more registers stored in the memory system. In some examples, the value of the registers (e.g., a Platform Configuration Register) may depend on a state of a computing device in which the memory system is installed. | 2018-09-27 |
20180276147 | 84942648 - Examples disclosed herein relate to capturing a first machine-readable link via an image capture device, retrieving a first content element associated with the first machine-readable link, determining whether the first content element is related to a second content element associated with a second machine-readable link, and in response to determining that the first content element is related to the second content element associated with a second machine-readable link, retrieving the second content element. | 2018-09-27 |
20180276148 | METHOD FOR SETTING UNIVERSAL SERIAL BUS (USB) INTERFACE OF ELECTRONIC DEVICE, AND ELECTRONIC DEVICE - A method includes processing a plurality of descriptors received from an electronic device. Each descriptor corresponds to a function of the electronic device. The processing includes determining a virtual function device corresponding to execution of at least one function based on a successful matching of one or more of the received descriptors with one or more driver files corresponding to at least one of the plurality of functions. The method also includes communicating an operating command to the virtual function device corresponding to execution of the at least one function based on an indication that the at least one function is to be executed. The operating command causes the virtual function device corresponding to execution of the at least one function to be operated on the electronic device. Two or more functions of the plurality of functions associated with different resources of the electronic device are selectable for execution. | 2018-09-27 |
20180276149 | COMMON DIE IMPLEMENTATION FOR MEMORY DEVICES WITH INDEPENDENT INTERFACE PATHS - A memory device includes at least two independent interface paths, an interface path including multiple memory banks. The memory device can selectively operate in a bank mode or a bank group mode. In bank mode, banks are operated as logical banks, where separate physical banks from different interface paths operate in parallel. When a logic bank is accessed, all physical banks belonging to the logical bank are accessed in parallel across the interface paths. In bank group mode, banks are operated independently, but accessed in bank groups. A separate interface path is operated as an independent bank group, and a bank is individually accessed in its bank group. In bank group mode, back to back access to separate bank groups is possible without resulting in access delay. | 2018-09-27 |
20180276150 | DYNAMIC MEMORY REMAPPING TO REDUCE ROW-BUFFER CONFLICTS - A data processing system includes a memory that includes a first memory bank and a second memory bank. The data processing system also includes a conflict detector connected to the memory and adapted to receive memory access information. The conflict detector tracks memory access statistics of the first memory bank, and determines if the first memory bank contains frequent row conflicts. The conflict detector also remaps a frequent row conflict in the first memory bank to the second memory bank. An indirection table is connected to the conflict detector and adapted to receive a memory access request, and redirects an address into a dynamically selected physical memory address in response to a remapping of the frequent row conflict to the second memory bank. | 2018-09-27 |
20180276151 | APPARATUS AND METHODS FOR IN DATA PATH COMPUTE OPERATIONS - The present disclosure includes apparatuses and methods for in data path compute operations. An example apparatus includes an array of memory cells. Sensing circuitry is selectably coupled to the array. A plurality of shared input/output (I/O) lines provides a data path. The plurality of shared I/O lines selectably couples a first subrow of a row of the array via the sensing circuitry to a first compute component in the data path to move a first data value from the first subrow to the first compute component and a second subrow of the respective row via the sensing circuitry to a second compute component to move a second data value from the second subrow to the second compute component. An operation is performed on the first data value from the first subrow using the first compute component substantially simultaneously with movement of the second data value from the second subrow to the second compute component. | 2018-09-27 |
20180276152 | RECORDING APPARATUS, CONTROL METHOD, AND STORAGE MEDIUM - There is provided a recording apparatus. An adjustment unit executes adjustment processing for adjusting a delay amount of a timing signal. A recording control unit performs recording control for performing recording of data to a file in a storage medium using an input/output unit configured to receive data from the storage medium according to the timing signal, and changes a recording destination of data from the file to a new file in response to a data amount recorded in the file reaching a threshold or more. A control unit controls such that the adjustment processing is performed in response to a sum of the data amount recorded in the file and a first data amount that is greater than or equal to a data amount corresponding to one instance of recording using the input/output unit reaching the threshold or more. | 2018-09-27 |
20180276153 | BUS ARRANGEMENT AND METHOD FOR OPERATING A BUS ARRANGEMENT - A bus arrangement includes a first subscriber, which includes a base module and a first number N of modules; a second subscriber; a coordinator, which includes a first bus terminal and a second bus terminal; and a bus that couples the first bus terminal with the first subscriber and the second subscriber. The coordinator is configured such that, in a configuration phase (K), it sends the first subscriber a first bus telegram for requesting information, the first subscriber being configured to transmit the first number N to the coordinator. The coordinator is configured to receive a fieldbus telegram via the second bus terminal and to convert the field bus telegram into a second bus telegram that is directed to the base module or to a module from the first number N of modules and to transmit the second bus telegram via the first bus terminal. | 2018-09-27 |
20180276154 | BUS ARRANGEMENT AND METHOD FOR OPERATING A BUS ARRANGEMENT - A bus arrangement includes a coordinator; a first subscriber; a first subscriber arrangement with a second subscriber; and a bus. The bus couples the coordinator with the first subscriber and the second subscriber. The first subscriber is arranged between the coordinator and the second subscriber on the bus. The bus arrangement is configured such that the first subscriber arrangement can be decoupled from the bus in an operating phase, and such that the first subscriber cannot be decoupled from the bus in the operating phase. | 2018-09-27 |
20180276155 | Timer Placement Optimization - A system and computer program product are provided for optimized timer placement. A request to apply a new timer in a computer system is received and an interrupt time for the new timer is extracted from the new timer. A timer list is accessed for each processor in the system responsive to the received request. A range for placement of the new timer is established with respect to each of the accessed timer lists. A timer expiry delay is calculated between proximal processor interrupts and the extracted interrupt time based on the established range placement. Proximity of the extracted interrupt time within the existing processor interrupts is determined and one of the processors is selected based on the calculation and the determined proximity. The new timer is placed on the selected processor. | 2018-09-27 |
20180276156 | Timer Placement Optimization - A method is provided for optimized timer placement. A request to apply a new timer in a computer system is received and an interrupt time for the new timer is extracted from the new timer. A timer list is accessed for each processor in the system responsive to the received request. A range for placement of the new timer is established with respect to each of the accessed timer lists. A timer expiry delay is calculated between proximal processor interrupts and the extracted interrupt time based on the established range placement. Proximity of the extracted interrupt time within the existing processor interrupts is determined and one of the processors is selected based on the calculation and the determined proximity. The new timer is placed on the selected processor. | 2018-09-27 |
20180276157 | SERIAL PERIPHERAL INTERFACE DAISY CHAIN MODE SYSTEM AND APPARATUS - SPI frame for simultaneously entering 8 bit daisy-chain mode from 16 bit register addressable mode. Some products that implement SPI may be connected in a daisy chain configuration, the first slave output being connected to the second slave input, etc. The SPI port of each slave is designed to send out during the second group of clock pulses an exact copy of the data it received during the first group of clock pulses. The whole chain acts as a communication shift register; daisy chaining is often done with shift registers to provide a bank of inputs or outputs through SPI. Large latency occurs during the entry into daisy-chain mode which increases as a function of the number of linked SPI devices. A means for simultaneously instructing all connected devices to enter/enable daisy-chain mode is disclosed. | 2018-09-27 |
20180276158 | SYSTEM INCLUDING INTERFACE CIRCUIT FOR HIGH SPEED COMMUNICATION - A system includes a data transmission unit, a termination resistor and a data reception unit. The data transmission unit may drive a data transmission line based on data, and drive the data transmission line to a voltage level corresponding to a termination voltage during a specified operation period. The termination resistor may be coupled between the data transmission line and a termination node. The data reception unit may receive a signal transmitted through the data transmission line. | 2018-09-27 |
20180276159 | SYSTEM-ON-CHIP AND DRIVING METHOD THEREOF - A system-on-chip (SoC) may include a master, a slave, and an asynchronous interface having a first first-in first-out (FIFO) memory connected to the master and the slave. A write operation of the FIFO memory is controlled based upon a comparison of a write pointer and an expected write pointer of the FIFO memory, and a read operation of the FIFO memory is controlled based upon a comparison of a read pointer and an expected read pointer of the FIFO. | 2018-09-27 |
20180276160 | SYSTEM ON CHIP (SoC), MOBILE ELECTRONIC DEVICE INCLUDING THE SAME, AND METHOD OF OPERATING THE SoC - A system on chip (SoC) is present that includes a plurality of master interfaces, a plurality of slave interfaces, and an interface circuit which is connected between the plurality of master interfaces and the plurality of slave interfaces and includes a plurality of components. When a first master interface among the plurality of master interfaces and a first slave interface among the plurality of slave interfaces are paired, a first group of the components which forms a first signal path between the first master interface and the first slave interface among the plurality of components is enabled according to a control of the first master interface. | 2018-09-27 |
20180276161 | PCIe VIRTUAL SWITCHES AND AN OPERATING METHOD THEREOF - A memory system and an operating method thereof include: at least a host; and at least PCIe coupled with the host, wherein the at least PCIe link includes at least a PCIe switch and a plurality of PCIe endpoints, wherein the plurality of PCIe endpoints includes used PCIe endpoints and unused PCIe endpoints, the used PCIe endpoints are mapped into a PCIe enumeration tree, and the unused PCIe endpoints are removed from the PCIe enumeration tree, at virtual switch mode. | 2018-09-27 |
20180276162 | Computing System Framework And Method For Configuration Thereof - A computing system framework and method for configuration thereof are provided. A plurality of processing modules is accessed. Each processing module includes a plurality of processing nodes and each processing node is associated with an intramodule port and an intermodule port. The processing modules are connected in a ring via intermodule connections between at least a portion of the intermodule ports of the processing modules. A network switch is arranged in a center of the ring of processing modules and connections are formed between the network switch and at least one of the processing modules by connecting every Sth processing module to the network switch, connecting every Sth and Sth- | 2018-09-27 |
20180276163 | USE OF PHYSICAL BLOCKS TO DEVELOP MICROSERVICES - A computer-implemented method includes detecting, using a processor, an arrangement of a plurality of blocks that are interconnected, where each block of the plurality of blocks is a physical block representing a corresponding atomic service. It is determined, using the processor, whether each atomic service represented by a block in the plurality of blocks is configured to communicate with each other atomic service represented by an other block with which the block is interconnected in the plurality of blocks. Based at least in part on determining that each atomic service represented by a block in the plurality of blocks is configured to communicate with each other atomic service represented by an other block with which the block is interconnected in the plurality of blocks, a microservice represented by the arrangement of the plurality of blocks is defined. The microservice is deployed. | 2018-09-27 |
20180276164 | EXTENDING MULTICHIP PACKAGE LINK OFF PACKAGE - An interconnect interface is provided to enable communication with an off-package device over a link including a plurality of lanes. Logic of the interconnect interface includes receiver logic to receive a valid signal from the off-package device on a dedicated valid lane of the link indicating that data is to arrive on a plurality of dedicated data lanes in the plurality of lanes, receive the data on the data lanes from the off-package device sampled based on arrival of the valid signal, and receive a stream signal from the off-package device on a dedicated stream lane in the plurality of lanes. The stream signal corresponds to the data and indicates a particular data type of the data. The particular data type can be one of a plurality of different data types capable of being received on the plurality of data lanes of the link. | 2018-09-27 |
20180276165 | BUS SYSTEM AND COMMUNICATION DEVICE - A bus system according to the present disclosure includes: three or more devices that include one or a plurality of imaging devices, and transmit and receive a data signal in a time-division manner; and a bus to which the three or more devices are coupled and through which the data signal is transmitted. A first device of the three or more devices includes: an equalizer having a first operation mode in which a received signal is equalized with use of a coefficient set including one or a plurality of equalization coefficients, a storage unit that stores a plurality of the coefficient sets, and a communication controller that selects one of the plurality of the coefficient sets stored in the storage unit and causes the equalizer to operate in the first operation mode with use of the selected coefficient set. | 2018-09-27 |
20180276166 | COUPLER FOR AN AUTOMATION SYSTEM - A coupler for an automation system for controlling a process having a network interface for connection to an Ethernet-based network for receiving an Ethernet telegram having process data of the process and having control data. A local bus interface connects to a local bus for transmitting a local bus telegram. A circuit is formed between the network interface and the local bus interface. The circuit includes an arithmetic circuit for retrieving the process data from a payload data area of the Ethernet telegram. The circuit includes a first data filter circuit, which differs from the arithmetic circuit, for filtering out a predetermined subset of the control data from a header of the Ethernet telegram preceding the payload data area. The circuit is configured to generate the local bus telegram and to insert the process data and the predetermined subset of the control data into the local bus telegram. | 2018-09-27 |
20180276167 | MEMORY CARD EXPANSION - An apparatus includes a memory card that includes at least one memory module and an expansion connector to connect with at least one expansion memory card. A lane distributor on the memory card interfaces with a set of bidirectional lanes and provides a base lane set and an expanded lane set of bidirectional lanes to support communications with the memory module and the expansion memory card via the expansion connector. | 2018-09-27 |
20180276168 | COMPUTING DEVICES WITH MOVABLE INPUT/OUTPUT CONNECTORS - Example implementations relate to computing devices with movable input/output (I/O) connectors. For example, a computing device may include a chassis of the computing device and an I/O connector to connect an I/O device to the computing device. The I/O connector may be movable about an axis relative to the chassis by at least 180 degrees such that the I/O connector is accessible from multiple sides of the chassis. | 2018-09-27 |
20180276169 | BUS ARRANGEMENT AND METHOD FOR OPERATING A BUS ARRANGEMENT - A bus arrangement includes a coordinator having a coordinator address; a first subscriber having a first subscriber address; and a bus, which couples the coordinator to the first subscriber. The first subscriber is configured to receive an information message from the coordinator in a configuration phase, to extract the coordinator address from the information message, and to establish and store a safety address as a function of the first subscriber address and the coordinator address. | 2018-09-27 |
20180276170 | COUPLER FOR AN AUTOMATION SYSTEM - A coupler for an automation system for controlling a process, having a first interface for connection to a field bus for receiving a field bus message with process data of the process, a second interface for connection to a local bus for transmitting a local bus message, and a circuit implemented between the first interface and the second interface. The circuit has a non-clocked logic circuit comprising a number of hardware logic elements. The non-clocked logic circuit is equipped to change process data received through the first interface. The circuit is equipped to output the changed process data in the local bus message. | 2018-09-27 |
20180276171 | NON-VOLATILE MEMORY DRIVES - Examples herein relate to non-volatile memory (NVM) drives. In one example, an NVM drive comprises a housing to support one or more printed circuit assemblies (PCA's), the housing comprising a front portion, a rear portion and a heat sink, a PCA disposed within the housing, the PCA comprising a connector, one or more NVM chips and a controller attached to the one or more NVM chips. The PCA is centered in the housing, the NVM drive is hot-plugged into a fabric attached memory pool or local to a server by the rear portion of the housing, and the NVM drive hot-plugged in the fabric attached memory pool is accessible by the front portion of the housing. | 2018-09-27 |
20180276172 | CIRCUIT FOR INHIBITING SINGLE-ENDED ANALOGUE SIGNAL NOISE, AND TERMINAL ATTACHMENT - The utility model discloses a circuit for inhibiting single-ended analogue signal noises and a terminal accessory. The circuit includes an input interface module, a differential amplification module, an analogue signal processing module, an isolation module and a control module, wherein the input interface module at least includes an analogue signal line and a digital signal line, the differential amplification module includes differential input ends and an output end; the analogue signal line and the digital signal line of the input interface module are respectively connected to the differential input ends of the differential amplification module, so that the analogue signal line and the digital signal line form a pseudo-differential pair, and the output end of the differential amplification module is connected to the analogue signal processing module; the digital signal line is further connected to the isolation module, and the isolation module is further connected to the control module. | 2018-09-27 |
20180276173 | COMMUNICATIONS DEVICE - A router for routing signals on communications networks; said router comprising a plurality of I/O ports for input to the router of said signals and for output from the router of said signals; said router comprising at least one microprocessor; said router adapted such that said microprocessor communicates with at least one of said I/O ports independently of any Southbridge or platform controller hub (SPCH) associated with said microprocessor. | 2018-09-27 |
20180276174 | METHOD FOR OPERATING A BUS SYSTEM OF AN AUTOMATION SYSTEM - A method for operating a bus system of an automation system, wherein the bus system has an Ethernet-based network and a coupler and a local bus and a local bus user. An Ethernet telegram is received via the Ethernet-based network at the coupler, wherein the Ethernet telegram has an identifier associated with a fieldbus protocol wherein the Ethernet telegram has process data, conforming to the fieldbus protocol, for the local bus user. The process data is acquired and the identifier from the Ethernet telegram by the coupler. A local bus telegram is generated by the coupler, wherein the local bus telegram has a local-bus-specific local bus header and a local bus payload section. The process data is inserted, together with the identifier, into the local bus telegram by the coupler. The local bus telegram is transmitted from the coupler to the local bus user. | 2018-09-27 |
20180276175 | Direct Network Access by a Memory Mapped Peripheral Device for Scheduled Data Transfer on the Network - A network interface peripheral device (NIP) may include a network interface for communicating with a network, and an interconnect interface for communicating with a processor subsystem. Peripheral data buffers (PDBs) in the NIP may hold data received from and/or distributed to peer peripherals by the NIP, and network data buffers (NDBs) may hold payload data of scheduled data streams transmitted to and/or received from the network by the NIP. A data handler in the NIP may generate the payload data from the data in the PDBs, and store the payload data in the NDBs according to scheduled data handler transmit events. The data handler may obtain the data from the payload data in the NDBs and store the obtained data in the PDBs according to scheduled data handler receive events. The NIP may include a mirrored finite state machine operating at the device level (of a device that may include the NIP) and controlled by a centralized system configuration entity to manage configuration of the NIP and coordinate the internal configuration of the NIP with a network configuration flow. | 2018-09-27 |
20180276176 | PERIPHERAL COMPONENT INTERCONNECT EXPRESS (PCIE) COMPLIANT THROUGH-HOLE AND PRESS-FIT CONNECTOR - Embodiments are directed to systems and device that include a printed circuit board (PCB) and a through-hole pin-field. The pin-field includes a plurality of ground through-holes arranged along a centerline; a plurality of ground pins, each of the plurality of ground pins coupled to a corresponding ground through-hole; a first signal though-hole arranged on a first side of the centerline; a second signal through-hole arrange on a second side of the centerline, the first side oppose the second side; a first signal pin electrically connected to the PCB through the first signal through-hole, the first signal pin comprising a bend in a first direction and disposed proximate the first through-hole; and a second signal pin electrically connected to the PCB through the second signal through-hole, the second signal pin comprising a bend in a second direction opposite the first direction and disposed proximate the second through-hole. | 2018-09-27 |
20180276177 | Memory Card Access Module and Memory Card Access Method - This invention discloses a memory card access module and a memory card access method. The memory card access method is applied to an electronic device. A processing unit of the electronic device accesses a memory card through a memory card slot. The method includes steps of: detecting whether the memory card supports a Peripheral Component Interconnect Express (PCIe) interface; when the memory card does not support the PCIe interface, controlling the processing unit to access the memory card through a first data transmission path and performing data format conversion between a transmission interface and the PCIe interface using a memory card access unit disposed on the first data transmission path; and when the memory card supports the PCIe interface, controlling the processing unit to access the memory card through a second data transmission path that allows the processing unit and the memory card to transmit data through the PCIe interface. | 2018-09-27 |
20180276178 | ELECTRONIC DEVICE AND METHOD FOR CONTROLLING EXTERNAL ELECTRONIC DEVICE CONNECTED TO USB TYPE-C CONNECTOR - In an electronic device and a method for operating the electronic device according to various embodiments, the electronic device may comprise a housing, a USB Type-C connector configured to be connected to the housing or exposed through the housing and to include at least one configuration channel (CC) pin, a circuit configured to be disposed in the housing and connected electrically to the connector, and a processor configured to be disposed in the housing and connected electrically to the circuit. The circuit may be configured to transmit and receive a packet through the CC pin. The packet may sequentially comprise a message header, a first vendor defined message (VDM) header, and a second VDM header including a product identifier and a data type. Further, various other embodiments can be implemented according to the present disclosure. | 2018-09-27 |
20180276179 | ASYNCHRONOUS TRANSCEIVER FOR ON-VEHICLE ELECTRONIC DEVICE - An on-vehicle system comprises a Clock Extension Peripheral Interface (CXPI) bus and a device coupled to the CXPI bus. The device comprises a transceiver configured to: detect a baud rate clock signal and a phase difference between the baud rate clock signal and an input data signal that was generated asynchronously from the baud rate clock signal; obtain a timing from an edge of the baud rate clock signal based the phase difference; capture a value of the input data signal at the timing; and transmit the captured value as an output data signal over the CXPI bus. | 2018-09-27 |
20180276180 | ELECTRONIC APPARATUS, ELECTRONIC APPARATUS SYSTEM, GRAPHING METHOD, AND NON-TRANSITORY COMPUTER-READABLE RECORDING MEDIUM - An electronic apparatus according to an embodiment comprises: at least one processor; and at least one memory storing instructions. The instructions are executed by the at least one processor to perform: identifying at least one scientific theoretical formula relating to one or more scientific characteristics of which data is measured, setting a coordinate system that includes a coordinate axis to which at least a part of the identified at least one scientific theoretical formula is assigned, and plotting the measured data of the one or more scientific characteristics on the set coordinate system to display a first graph on a display. | 2018-09-27 |
20180276181 | BLENDING EVALUATION DEVICE AND BLENDING DEVICE - A blending evaluation device includes: a communication interface that receives evaluations of a blended beverage in which a plurality of beverage raw materials are blended, each of the evaluations being made by a user who drank the blended beverage; a memory that stores the evaluations, each evaluation being associated with environmental information related to an environment in which the user drank the blended beverage; and a controller that performs statistical analysis of information on the evaluations, wherein the communication interface receives a condition that specifies the environmental information; the controller retrieves, from the memory, at least one evaluation associated with the environmental information specified by the condition, and performs statistical analysis of the retrieved at least one evaluation, and the communication interface transmits a result of the statistical analysis. | 2018-09-27 |
20180276182 | Responsive Grid Layouts for Graphic Design - Responsive grid layouts for graphic design are described. In one example, a system of a digital medium environment is configured to generate responsive grid layouts for graphic design. The system includes a layout module implemented at least partially in hardware of the computing device to generate a plurality of grid layouts each having at least one cell configured to be mapped to at least one design element of digital content. The system also includes a scoring module implemented at least partially in hardware of a computing device to assign scores to the plurality of grid layouts based on aesthetic criteria and an output module implemented at least partially in hardware of a computing device to output at least one grid layout of the plurality of grid layouts for recommendation to a user based on the scores. | 2018-09-27 |
20180276183 | DISPLAY CONTROL SYSTEM AND DISPLAY CONTROL METHOD - A display control system includes an image data generation device that generates a plurality of pieces of image data, a storage device that stores the plurality of pieces of image data and a plurality of pieces of position data of holding units, and a display data generation device that generates display data on the basis of the plurality of pieces of image data and position data. The display data is data for aligning and displaying in a fixed direction a plurality of pieces of sample information that includes at least either a plurality of images or a plurality of analysis results, and data that is a result of laying out first sample information and first position information in such a manner that a display device displays the first sample information and the first position information representing a position of a first holding unit corresponding to the first sample information. | 2018-09-27 |
20180276184 | AUTOMATICALLY GENERATING DOCUMENTS - Devices, systems, and methods for automatically creating a document. In one example, the system and method perform or include capturing, with a web-extension associated with a word-processing application, implicitly-tagged-content and an explicitly-tagged-content displayed on a web browser along with tags associated with the implicitly-tagged-content and the explicitly-tagged-content; receiving, with a speech-to-text interface, natural-language audio instruction associated with generating a document; generating, with a natural-language processor, a plain-text command associated with the natural-language audio instruction; retrieving personalized-content based on the plain-text command; and organizing, with a content-organizer, the personalized-content based on one or more criteria selected from a group consisting of page rank of a content displayed on the web browser, a source of the content, an authoring-style, and a document template. The document is generated using information received from the content-organizer. | 2018-09-27 |
20180276185 | SYSTEM, APPARATUS AND METHOD FOR FORMATTING A MANUSCRIPT AUTOMATICALLY - System, method and apparatuses of the present invention directed to a paradigm of manuscript generation and manipulation from a source textual document, involving a first format, into another document in a second format. A converter converts or transforms scenes, dialogue, milieus, movements, actions and other instructions input or stored in a first format into a second, different format, and vice versa. | 2018-09-27 |
20180276186 | COMPUTING DEVICE AND CORRESPONDING METHOD FOR GENERATING DATA REPRESENTING TEXT - An example method involves (i) accessing first data defining multiple portions of a content item, wherein at least a plurality of the portions represent text; (ii) selecting, from the plurality of portions representing text, a subset of the portions representing text, wherein the selecting is based on each portion of the selected subset having a particular characteristic; (iii) based on the text represented by the portions of the selected subset, generating second data that represents a concatenation of the text represented by the portions of the selected subset; and (iv) providing output based on the generated second data. | 2018-09-27 |
20180276187 | OPERATION-SCREEN GENERATION DEVICE AND NON-TRANSITORY COMPUTER READABLE MEDIUM - An operation-screen generation device includes a reading unit that reads operation item information indicating multiple operation items having a hierarchical structure and used to generate an operation screen and a generation unit that generates the operation screen. An operation component for an operation item in a highest layer in the operation item information is allocated to a first hierarchical component predetermined as being in a highest layer in layout information. If the number of subsequent layers for one or more subsequent operation items is equal to or smaller than a predetermined number of layers displayable for a second hierarchical component, one or more operation components for the one or more subsequent operation items are allocated to the second hierarchical component. If the number of subsequent layers is larger than the predetermined number of layers, the operation components are allocated to the second hierarchical component and a third hierarchical component. | 2018-09-27 |
20180276188 | Document Extension in Dictation-Based Document Generation Workflow - An automatic speech recognizer is used to produce a structured document representing the contents of human speech. A best practice is applied to the structured document to produce a conclusion, such as a conclusion that required information is missing from the structured document. Content is inserted into the structured document based on the conclusion, thereby producing a modified document. The inserted content may be obtained by prompting a human user for the content and receiving input representing the content from the human user. | 2018-09-27 |
20180276189 | Timeline Creation of Electronic Document Creation States - Timeline creation of electronic document creation states is described. In one or more implementations, document creation states are created responsive to performing editing operations on a document. Document creation state snapshots are then generated for respective document creation states responsive to the document creation states meeting at least one criterion. The at least one criterion may be based on an amount of change in the document, completion of an editing operation, specific alterations to the document, a user request to create a document creation state snapshot, and so on. The resulting document creation state snapshots along with visual representations of metadata associated with the respective document creation states are compiled into a single timeline in a chronological order of when the respective document creation states occurred. | 2018-09-27 |
20180276190 | INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING SYSTEM, AND NON-TRANSITORY COMPUTER READABLE MEDIUM - An information processing apparatus includes an emotion information acquisition unit that acquires emotion information of a sentence information writer who writes sentence information, and a recommendation information notification unit that makes a notification of recommendation information based on the emotion information acquired by the emotion information acquisition unit. | 2018-09-27 |
20180276191 | INFORMATION PROCESSING APPARATUS - An information processing apparatus includes a copying unit and an extracting unit. The copying unit is configured to copy a first sticky note pasted on a first mount onto a second mount as a second sticky note. The extracting unit is configured, when the second sticky note is reflected to another mount, to extract a third mount in addition to the first mount as candidates. The extracting unit extracts the third mount as the candidate according to a predetermined rule. | 2018-09-27 |
20180276192 | SYSTEM, METHOD AND COMPUTER PROGRAM PRODUCT FOR CREATING A SUMMARIZATION FROM RECORDED AUDIO OF MEETINGS - A meeting summarization method, system, and computer program product, include capturing notes of a user including a time stamp from the user associated with a meeting, synchronizing an agenda of the meeting and the notes of the user based on a correlation between a time stamp of a topic on the agenda and a time stamp of the notes of the user, and analyzing the synchronized topic and the notes to determine highlights of the meeting based on a co-occurrence of the time stamp of the notes of the user and the time stamp of the topic on the agenda. | 2018-09-27 |
20180276193 | AUTOMATED LAYOUT FORMATTING OF DIGITAL INK USING CONTEXT - An example system for formatting digital ink includes a processor configured to receive digital ink. The processor is to also detect a context in which the digital ink is received. Additionally, the processor is to detect a layout object in the digital ink. The processor is to further automatically format the layout object based on the detected context in response to detecting a break event. | 2018-09-27 |
20180276194 | AUTOMATED FORM LAYOUT BASED UPON USAGE PATTERNS - Historical form input field usage information of a group of input fields associated with a graphical user interface (GUI) form is used to automatically partition a subset of the group of input fields into a new form within a new tabbed portion of the displayed GUI form. The new form includes a set of selectable options that allow a user to select between reorganizing the subset of the input fields according to historical input field usage analysis of the user and reorganizing the subset of the plurality of input fields according to historical input field usage analysis of a group of form users within which the user is a member. The subset of the input fields within the new form is reorganized responsive to different user selections among the set of selectable options. | 2018-09-27 |
20180276195 | ERROR-CORRECTING WORD DISPLAYING METHOD AND APPARATUS, DEVICE AND STORAGE MEDIUM - The present disclosure provides an error-correcting word displaying method and apparatus, a device and a storage medium, wherein the method comprises: obtaining a user-input input code; obtaining a discreteness evaluation result of the input code; determining an error-correcting adjustment policy according to the discreteness evaluation result; displaying the error-correcting word corresponding to the input code according to the error-correcting adjustment policy. The solution of the present disclosure may be used to improve the accuracy of display results. | 2018-09-27 |
20180276196 | DOMAIN-SPECIFIC TERMINOLOGY EXTRACTION BY BOOSTING FREQUENCY METRICS - A terminology extraction method, system, and computer program product include extracting terminology specific to a domain from a corpus of domain-specific text, where no external general domain reference corpus is required. The method assumes that terms which share common noun token(s) in a domain corpus are likely to be very related, that terms which are very related in a domain are likely to be equally or similarly important even though there might be large differences among their term frequencies, and that an abbreviation and its corresponding expansion have equal importance as terms. | 2018-09-27 |
20180276197 | INTELLIGENT AUTOMATED ASSISTANT IN A HOME ENVIRONMENT - Systems and processes for operating an intelligent automated assistant are provided. In one example process, discourse input representing a user request is received. The process determines whether the discourse input relates to a device of an established location. In response to determining that the discourse input relates to a device of an established location, a data structure representing a set of devices of the established location is retrieved. The process determines, using the data structure, a user intent corresponding to the discourse input, the user intent associated with an action to be performed by a device of the set of devices, and a criterion to be satisfied prior to performing the action. The action and the device are stored in association with the criterion, where, in accordance with a determination that the criterion is satisfied, the action is performed by the device. | 2018-09-27 |
20180276198 | INTERACTIVE LOCATION SENSITIVE NETWORK RESPONSE - A method and system for improving location specific (L) functions is provided. The method includes generating and maintaining an online L-word dictionary. Location specific attributes, settings, and preferences associated with a current location of a mobile device and a user are retrieved. An input question is received and an NLP analysis with respect to the input question is executed to extract a required value phrase. An interim question based on an extracted required value phrase is formed and an answer to the input question is determined in natural language based on a solved interim question. The answer is narrated in natural language and includes an automated interactive response from a hardware device in real time. | 2018-09-27 |
20180276199 | ADVANCED CLAUSE GROUPINGS DETECTION - An electronic documents verification system (and method) detects related contracts, and analyzes contents in the related contracts including a primary contract and associated amendments from raw input data. One embodiment of a disclosed configuration includes a system (and method) for identifying clauses used in the related contracts. The system (and method) extracts features including key references or descriptions within each contract. Additionally, the system (and method) groups the related contracts, and establishes linkages of the related contracts based on the extracted features. Furthermore, the system (and method) analyzes contents in the related contracts based on advanced policy group including a plurality of policy groups. | 2018-09-27 |
20180276200 | METHOD AND APPARATUS FOR EXPRESSING TIME IN AN OUTPUT TEXT - Methods, apparatuses, and computer program products are described herein that are configured to express a time in an output text. In some example embodiments, a method is provided that comprises identifying a time period to be described linguistically in an output text. The method of this embodiment may also include identifying a communicative context for the output text. The method of this embodiment may also include determining one or more temporal reference frames that are applicable to the time period and a domain defined by the communicative context. The method of this embodiment may also include generating a phrase specification that linguistically describes the time period based on the descriptor that is defined by a temporal reference frame of the one or more temporal reference frames. In some examples, the descriptor specifies a time window that is inclusive of at least a portion of the time period to be described linguistically. | 2018-09-27 |
20180276201 | ELECTRONIC APPARATUS, CONTROLLING METHOD OF THEREOF AND NON-TRANSITORY COMPUTER READABLE RECORDING MEDIUM - An electronic apparatus includes an input unit comprising input circuitry configured to receive a natural language input, a communicator comprising communication circuitry configured to perform communication with a plurality of external chatting servers, and a processor configured to analyze a characteristic of the natural language and a characteristic of the user and to identify a chatting server corresponding to the natural language from among the plurality of chatting servers, and to control the communicator to transmit the natural language to the identified chatting server in order to receive a response with respect to the natural language. | 2018-09-27 |
20180276202 | METHOD AND SERVER FOR PROVIDING AUTOMATIC TRANSLATION IN ON-LINE CHAT SERVICE USING MULTIPLE LANGUAGES - An automatic translation providing server includes an identification unit to identify a plurality of languages set by a plurality of user terminals connected with an on-line chat service; a reception unit to receive an input message from at least one of the user terminals; a translation unit to translate the input message into each of the languages respectively set by the plurality of user terminals; and a providing unit to provide the input message and contents of messages translated into each of the languages respectively set by the plurality of user terminals to the on-line chat service. Automatic translation providing methods using the automatic translation providing server are also disclosed. | 2018-09-27 |
20180276203 | USER INTERFACE FOR REALTIME LANGUAGE TRANSLATION - A language translation application on a user device includes a user interface that provides relevant textual and graphical feedback mechanisms associated with various states of voice input and translated speech. | 2018-09-27 |
20180276204 | TEXT GENERATION FROM CORRELATED ALERTS - Methods, apparatuses, and computer program products are described herein that are configured to generate an operator text in response to an alarm that is either received from an alarm or alert system or that is self-generated based on an analysis of one or more data feeds. The method of an example embodiment may include determining whether an operator text is to be generated in response to a received alert condition by performing data analysis operations comprising: analyzing, using a processor, a primary data feed and at least one confirmatory data feed to identify one or more features; and determining based on the detection of a feature in the primary data feed or the at least one confirmatory data feed satisfies at least one predetermined constraint. The method may further include generating an output text that is displayable in a user interface that describes at least a diagnosis for the feature that satisfied that at least one predetermined constraint. | 2018-09-27 |
20180276205 | SYSTEMS AND METHODS FOR MOTIVATION-BASED COURSE SELECTION - An electronic method for course selection. The method includes identifying at least one user motivation associated with at least one user, identifying at least one course recommendation based on the at least one user motivation, and displaying the at least one course recommendation to the user on a display device. In some cases the method may include receiving an input from the user associated with the at least one course recommendation. The method may also include enrolling the user in a course based on the input received in association with the course recommendation. | 2018-09-27 |
20180276206 | SYSTEM AND METHOD FOR UPDATING A KNOWLEDGE REPOSITORY - The present disclosure relates to system(s) and method(s) for updating a knowledge repository. The system is configured to receive a new document. Further, the system is configured to identify a second set of historical documents from a knowledge repository based on comparison of a set of current tokens present in the new document and a set of historical tokens associated with each historical document from the knowledge repository. Furthermore, the system is configured to generates a similarity score corresponding to each historical document by comparing the current pattern of occurrence, associated with each current token, with a historical pattern of occurrence, associated with a historical token corresponding to the current token. Further, the system is configured to update the knowledge repository with the new document by comparing the similarity score corresponding to each historical document from the second set of historical documents with a pre-defined threshold value. | 2018-09-27 |
20180276207 | SYSTEM AND METHOD FOR RAPID ANNOTATION OF MEDIA ARTIFACTS WITH RELATIONSHIP-LEVEL SEMANTIC CONTENT - Embodiments can provide a computer implemented method, in a data processing system comprising a processor and a memory comprising instructions which are executed by the processor to cause the processor to implement a media artifact annotation system, the method comprising inputting one or more relationships; for each of the one or more relationships, extracting, through an entity argument extraction module, one or more entity arguments; constructing, through a media query construction module, a media query using the one or more entity arguments; submitting the media query to a media search corpus; receiving search results comprising one or more media artifacts from the media search corpus; passing, through an annotation module, the search results to an annotator; receiving, through a response input module, one or more responses regarding each of the one or more media artifacts from the annotator; if the response for the media artifact is confirmatory, applying an annotation to the media artifact; and if the response for the media artifact is rejection, applying no annotation to the media artifact. | 2018-09-27 |
20180276208 | Validating and Correlating Content - Online search retrieval is improved by automatic generation of key phrases. When a search engine crawls an electronic document, key words and phrases greatly help organize the electronic document to one or more topics. A quotient matrix defines a ratio of a key phrase to a total number of words in the electronic document. A correlation coefficient may also determine which key phrase correlates to the electronic document. A title key phrase may then be generated in response to the correlation coefficient having a positive value. When the search engine crawls the electronic document, the title key phrase may be provided as metadata. | 2018-09-27 |
20180276209 | RETRIEVAL INFORMATION GENERATION DEVICE, IMAGE PROCESSING DEVICE, AND NON-TRANSITORY COMPUTER READABLE MEDIUM - A retrieval information generation device includes a determination unit that determines retrieval document information for retrieving a phrase in an original document from an original document file which is created by reading the original document by an image reading device and is identified on the basis of identification information, an extraction unit that extracts retrieval image information for visually specifying the original document from the original document file, and a generation unit that associates the retrieval document information and the retrieval image information with the identification information of the original document file to generate a retrieval file. | 2018-09-27 |
20180276210 | DYNAMIC SUMMARY GENERATOR - Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for receiving a request for information about a term from a user; obtaining, at one or more processors, one or more characteristics of the user; obtaining, at the one or more processors, a template including a plurality of attributes associated with the term; generating, at the one or more processors and based on the one or more characteristics of the user, a response, the response including a respective description for each attribute of the plurality of attributes in the template; and providing for output, data representing the response. | 2018-09-27 |
20180276211 | ESTIMATING ARTICLE PUBLICATION DATES AND AUTHORS BASED ON SOCIAL MEDIA CONTEXT - Probable origination date may be derived by using a stream of data captured, for example, from the Internet and from other documentation sources such as historical information about a target object, its author, related environmental data, social media data, blogs, microblogs, posts, historical information, and/or other data sources. Techniques such as textual analysis, statistical analytics, and/or artificial intelligence may combine and correlate the information from data sources to extract clues that may indicate the original author and date of authorship. Based on the number of conflicting or validating references, and the relationships between them, a probability or confidence score in the accuracy of the analysis may be generated. | 2018-09-27 |
20180276212 | ESTIMATING ARTICLE PUBLICATION DATES AND AUTHORS BASED ON SOCIAL MEDIA CONTEXT - Probable origination date may be derived by using a stream of data captured, for example, from the Internet and from other documentation sources such as historical information about a target object, its author, related environmental data, social media data, blogs, microblogs, posts, historical information, and/or other data sources. Techniques such as textual analysis, statistical analytics, and/or artificial intelligence may combine and correlate the information from data sources to extract clues that may indicate the original author and date of authorship. Based on the number of conflicting or validating references, and the relationships between them, a probability or confidence score in the accuracy of the analysis may be generated. | 2018-09-27 |
20180276213 | METHODS AND SYSTEM FOR DATABASE REQUEST MANAGEMENT - A database request management system in electronic communication with a database may be configured to compare new requests for data stored in the database to a registry of queued requests to determine if each new request is a duplicate of a queued request, reject duplicate requests, and add non-duplicate requests to a request queue and to a request registry. The request management system may also be configured to continuously transmit the top request from the queue of requests to the database, receive a response to the top request from the database, and remove the top request from the queue and unregister the top request from the request registry after receiving the response. | 2018-09-27 |
20180276214 | SHARING CONTAINER IMAGES BETWEEN MULITPLE HOSTS THROUGH CONTAINER ORCHESTRATION - A computer-implemented method is provided for container sharing and scheduling in an environment having a plurality of nodes. The method includes deploying a container management service system that manages a list of layered images. The list specifies one or more container attributes for each layered image stored at the nodes. The method includes selecting, by a processor-based scheduler of the container management system based on the list of layered images, a given one of the nodes which (i) includes image layers residing in a container and (ii) communicates with one or more candidate nodes that include one or more missing image layers. The candidate nodes are determined from among the nodes based on one or more availability criterion. The method includes pulling the one, or more missing image layers horn the candidate nodes and copying the one or more missing image layers to the given one of the nodes. | 2018-09-27 |
20180276215 | SHARING CONTAINER IMAGES BETWEEN MULITPLE HOSTS THROUGH CONTAINER ORCHESTRATION - A computer-implemented method is provided for container sharing and scheduling in an environment having a plurality of nodes. The method includes deploying a container management service system that manages a list of layered images. The list specifies one or more container attributes for each layered image stored at the nodes. The method includes selecting, by a processor-based scheduler of the container management system based on the list of layered images, a given one of the nodes which (i) includes image layers residing in a container and (ii) communicates with one or more candidate nodes that include one or more missing image layers. The candidate nodes are determined from among the nodes based on one or more availability criterion. The method includes pulling the one or more missing image layers from the candidate nodes and copying the one or more missing image layers to the given one of the nodes. | 2018-09-27 |
20180276216 | Comparing Data Stores Using Hash Sums on Disparate Parallel Systems - Aspects described herein relate to methods and systems for comparing data stored in disparate parallel systems using hash sums. A database having a parallel system architecture may comprise a plurality of nodes each storing a plurality of records. A central node may initiate parallel calculation of a set of node hash sums for each individual node. Calculating a node hash sum for an individual node may comprise calculating, by the individual node, a set of hash values for each individual record of the plurality of records stored by the individual node and combining each hash value of the set of hash values to generate the node hash sum for the individual node. The central processor may combine each node hash sum to generate a database hash sum. The central processor may store the generated database hash sum and/or utilize it in comparisons with database hash sums for other databases. | 2018-09-27 |