41st week of 2015 patent applcation highlights part 55 |
Patent application number | Title | Published |
20150287829 | SEMICONDUCTOR DEVICE INCLUDING FIELD EFFECT TRANSISTOR - A semiconductor device includes a fin portion protruding from a substrate. The fin portion includes a base part, an intermediate part on the base part, and a channel part on the intermediate part. A width of the intermediate part is less than a width of the base part and greater than a width of the channel part. A gate electrode coves both sidewalls and a top surface of the channel part, and a device isolation pattern covers both sidewalls of the base part and both sidewalls of the intermediate part. | 2015-10-08 |
20150287830 | OXIDE SEMICONDUCTOR THIN FILM, PRODUCTION METHOD THEREOF, AND THIN FILM TRANSISTOR - An oxide crystalline thin film is used to provide an oxide semiconductor thin film that has comparatively high carrier mobility and is suitable as TFT channel layer material. Oxide semiconductor thin film is obtained by performing an annealing process on an amorphous oxide semiconductor thin film comprising an oxide including indium and titanium where the titanium content is 0.005 to 0.12 by a Ti/In atomic ratio at a heating temperature of 250° C. or greater and processing time of 1 minute to 120 minutes. The oxide semiconductor thin film is crystalline and comprises only the In | 2015-10-08 |
20150287831 | SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE INCLUDING SEMICONDUCTOR DEVICE - A semiconductor device includes an oxide semiconductor film, a source electrode, a drain electrode, a gate insulating film, a gate electrode, and an insulating film. The source electrode includes a region in contact with the oxide semiconductor film. The drain electrode includes a region in contact with the oxide semiconductor film. The gate insulating film is provided between the oxide semiconductor film and the gate electrode. The insulating film is provided over the gate electrode and over the gate insulating film. The insulating film includes a first portion and a second portion. The first portion includes a step portion. The second portion includes a non-step portion. The first portion includes a portion with a first thickness. The second portion includes a portion with a second thickness. The second thickness is larger than or equal to 1.0 time and smaller than or equal to 2.0 times the first thickness. | 2015-10-08 |
20150287832 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A semiconductor device including a semiconductor substrate, a first insulating layer formed over said semiconductor substrate, first grooves formed in said first insulating layer, a gate electrode and a first interconnect filled in said first grooves, respectively, a gate insulating film formed over said gate electrode, a semiconductor layer formed over said gate insulating, a second insulating layer formed over said semiconductor layer and said first insulating film, a via formed in said second insulating layer and connected to said semiconductor layer, a second groove formed in said second insulating layer, and a second interconnect filled in said second groove, formed over said via and connected to said via. | 2015-10-08 |
20150287833 | SEMICONDUCTOR DEVICE, DISPLAY DEVICE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND DISPLAY DEVICE - A semiconductor device ( | 2015-10-08 |
20150287834 | MOS Devices with Ultra-High Dielectric Constants and Methods of Forming the Same - An integrated circuit structure includes a semiconductor substrate, and a gate stack over the semiconductor substrate. The gate stack includes a high-k gate dielectric over the semiconductor substrate, and a magnetic compound over and in contact with the high-k gate dielectric. A source region and a drain region are on opposite sides of the gate stack. The gate stack, the source region, and the drain region are portions of a Metal-Oxide-Semiconductor (MOS) device. | 2015-10-08 |
20150287835 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - The present invention provides a transistor having electrically stable characteristics. In addition, the reliability of a semiconductor device including such a transistor is increased. The semiconductor device includes a gate electrode layer, a gate insulating film over the gate electrode layer, an oxide semiconductor stacked film overlapping with the gate electrode layer with the gate insulating film provided therebetween, and a pair of electrode layers in contact with the oxide semiconductor stacked film. In the semiconductor device, the oxide semiconductor stacked film includes at least indium and includes a first oxide semiconductor layer, a second oxide semiconductor layer, and a third oxide semiconductor layer which are sequentially stacked. Further, the first oxide semiconductor layer has an amorphous structure, the second oxide semiconductor layer and the third oxide semiconductor layer include a crystal part whose c-axis is substantially perpendicular to a top surface of the oxide semiconductor stacked film. | 2015-10-08 |
20150287836 | THIN FILM TRANSISTOR, THIN FILM TRANSISTOR PANEL, AND METHOD FOR MANUFACTURING THE SAME - A Thin Film Transistor (TFT) includes a substrate, a semiconductor layer disposed on the substrate a first source electrode and a first drain electrode spaced apart from each other on the semiconductor layer, a channel area disposed in the semiconductor layer between the first source electrode and the first drain electrode, an etching prevention layer disposed on the channel area, the first source electrode, and the first drain electrode and a second source electrode in contact with the first source electrode, and a second drain electrode in contact with the first drain electrode. | 2015-10-08 |
20150287837 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - An object is to provide a structure of a transistor which has a channel formation region formed using an oxide semiconductor and a positive threshold voltage value, which enables a so-called normally-on switching element. The transistor includes an oxide semiconductor stack in which at least a first oxide semiconductor layer and a second oxide semiconductor layer with different energy gaps are stacked and a region containing oxygen in excess of its stoichiometric composition ratio is provided. | 2015-10-08 |
20150287838 | FIN DIODE STRUCTURE - A fin diode structure includes a doped well formed in a substrate, a plurality of fins of first conductivity type and a plurality of fins of second conductivity type protruding from the doped well isolated from ins of first conductivity type by STIs, at least one doped region of first conductivity type in the substrate between the fins of first conductivity type, the STIs and the doped well and connecting with the fins of first conductivity type, and at least one doped region of second conductivity type in the substrate between the fins of second conductivity type, the STIs and the doped well and connecting with the fins of second conductivity type. The doping concentration of the fins of first conductivity type is greater than that of the doped region of first conductivity type whose doping concentration is greater than that of the doped well of first conductivity type. | 2015-10-08 |
20150287839 | SCHOTTKY BARRIER DIODE AND METHOD OF MANUFACTURING THE SAME - A Schottky barrier diode includes a first electrode, a group III nitride film, an insulating film having an opening, a Schottky contact metal film, a joint metal film, a conductive support substrate, and a second electrode that are arranged in order in a direction from a first main-surface side to a second main-surface side. A part of the Schottky contact metal film can extend on a part of the insulating film. The Schottky barrier diode can further include an embedded metal film disposed between the joint metal film and a recessed portion of the Schottky contact metal film. Accordingly, there are provided the Schottky barrier diode having a high breakdown voltage and allowing large current to flow therethrough, and a method of manufacturing the same. | 2015-10-08 |
20150287840 | SEMICONDUCTOR DEVICE - A semiconductor device includes first and second electrodes. First semiconductor regions of a first conductivity type are positioned between the first electrode and the second electrode and contact the first electrode. These semiconductor regions are arranged along a first direction. A second semiconductor region of the first conductivity type also contacts the first electrode and is disposed around the plurality of first semiconductor regions. The second semiconductor region has a dopant concentration that is higher than the first semiconductor regions. A semiconductor layer of a second conductivity type has portions that are between the first semiconductor regions and the second semiconductor region. These portions are in Schottky contact with the first electrode. | 2015-10-08 |
20150287841 | METHOD AND DEVICE FOR CONTROL OF AVALANCHE PHOTO-DIODE CHARACTERISTICS FOR HIGH SPEED AND HIGH GAIN APPLICATIONS - A device that may include A DC power supply coupled to a fixed current source; an avalanche photo-diode (APD); a DC voltage regulator that comprises a regulating transistor; wherein the DC voltage regulator is arranged to (a) maintain a regulated voltage at a fixed value, and (b) output the regulated voltage; and a temperature control module that is arranged to maintain a portion of the temperature control module at a fixed temperature; wherein the DC voltage regulator and the APD are electrically coupled in parallel to each other, so that a sum of currents that pass through the APD and the regulating transistor equals a fixed current supplied by the fixed current source; and wherein the portion of the temperature control module is thermally coupled to the DC voltage regulator and to the APD, and wherein APD and the regulating transistor are thermally coupled to each other. | 2015-10-08 |
20150287842 | PHOTOVOLTAIC SYSTEM INCLUDING LIGHT TRAPPING FILTERED OPTICAL MODULE - A photovoltaic system that converts incident light into electrical energy that includes a light trapping optical module having a light randomizing dielectric slab with a first surface and a second surface, a first cell adjacent to the first surface of the slab that has a bandgap of lower energy than the energy of absorption onset of the dielectric slab, at least one filter element in optical contact with the second surface of the dielectric slab, and a sub-cell array with a plurality of photovoltaic sub-cells, wherein at least one of the sub-cells has a first surface that is in optical contact with the at least one filter element. | 2015-10-08 |
20150287843 | SOLAR CELL WITH DIELECTRIC LAYER - A solar cell includes a back contact layer, an absorber layer above the back contact layer, a dielectric layer above the absorber layer, and a front contact layer above the dielectric layer. | 2015-10-08 |
20150287844 | SOLAR BATTERY MODULE AND SOLAR POWER GENERATION SYSTEM - A solar battery module that can decrease the reduction in output is provided. The solar battery module ( | 2015-10-08 |
20150287845 | PID-RESISTANT SOLAR CELL STRUCTURE AND FABRICATION METHOD THEREOF - A solar cell structure includes a substrate, a doped emitter layer on a front side of the substrate, and an anti-reflection layer covering the doped emitter layer. The anti-reflection layer is a multi-layer structure including at least one ion diffusion barrier such as amorphous silicon film or a silicon-rich silicon nitride film directly covering the doped emitter layer. | 2015-10-08 |
20150287846 | METHOD FOR DEPOSITING A CONDUCTIVE COATING ON A SURFACE - A method for depositing a conductive coating on a surface is provided, the method including treating the surface by depositing fullerene on the surface to produce a treated surface and depositing the conductive coating on the treated surface. The conductive coating generally includes magnesium. A product and an organic optoelectronic device produced according to the method are also provided. | 2015-10-08 |
20150287847 | PHOTODIODE DEVICE WITH REDUCIBLE SPACE CHARGE REGION - The photodiode device comprises a doped region ( | 2015-10-08 |
20150287848 | SOLAR CELL AND METHOD OF MANUFACTURING THEREFOR - The present invention relates to a structure of a solar cell for improving photoelectric conversion efficiency of the solar cell, and a manufacturing method therefor. One aspect of the solar cell according to the present invention relates to a solar cell having a light-absorbing layer formed between two electrodes arranged to face each other, wherein an electrical polarization layer comprising an electrical polarization material forming an inner electrical field is formed between the electrodes and the light-absorbing layer. | 2015-10-08 |
20150287849 | SOLAR CELL AND METHOD FOR MANUFACTURING THE SAME - A solar cell is discussed. A solar cell includes a semiconductor substrate, a conductive type region on one surface of the semiconductor substrate, and an electrode connected to the conductive type region. The electrode includes an electrode layer on the conductive type region and a printed electrode layer on the electrode layer. | 2015-10-08 |
20150287850 | Solar Cell and Method for Manufacturing - The present invention provides a solar cell with a conductive composition which comprises a conductive functional phase mixture. The conductive functional phase mixture is made of a metal and a metal oxide, wherein the metal oxide is as the filler and the metal is as the main body. A coating portion covers substantially at least a partial surface of the filler, wherein the coating portion includes at least silver or copper. | 2015-10-08 |
20150287851 | SOLAR CELL AND SOLAR CELL MODULE - A solar cell includes: a semiconductor substrate on which at least pn junctions are formed; a multiplicity of finger electrodes that are formed in a comb-like shape on at least one surface of the semiconductor substrate; and a plurality of bus bar electrodes that are arranged so as to be orthogonal to the lengthwise direction of the finger electrodes and are connected with the finger electrodes. This solar cell is configured so that the finger electrodes connected with one of the bus bar electrodes are separated from the finger electrodes connected with another bus bar electrode that is arranged so as to be parallel to this one of the bus bar electrodes, and ends in the lengthwise direction of adjacent two or more of the finger electrodes connected with each bus bar electrode are electrically connected with one another by auxiliary electrodes. | 2015-10-08 |
20150287852 | Crystal Control and Stability for High-Performance Perovskite Solar Cell | 2015-10-08 |
20150287853 | METHOD FOR PRODUCING SEMICONDUCTOR FILM, SOLAR CELL, AND CHALCOPYRITE COMPOUND - To provide an optical absorption layer of a solar cell having the most pertinent optical band gap without using a highly toxic gas in repairing a Z atomic defect which is produced in a film after forming a chalcopyrite compound XYZ | 2015-10-08 |
20150287854 | METHOD OF FABRICATING A(C)IGS BASED THIN FILM USING Se-Ag2Se CORE-SHELL NANOPARTICLES, A(C)IGS BASED THIN FILM FABRICATED BY THE SAME, AND TANDEM SOLAR CELLS INCLUDING THE A(C)IGS BASED THIN FILM - A method of fabricating an Ag—(Cu—)In—Ga—Se (A(C)IGS) based thin film using Se—Ag | 2015-10-08 |
20150287855 | ELECTRO-OPTICAL DEVICE - An electro-optical device can include a plurality of nanocrystals positioned between a first electrode and a second electrode. | 2015-10-08 |
20150287856 | REINFORCEMENT PV LAMINATE - A solar module ( | 2015-10-08 |
20150287857 | APPARATUS AND METHOD FOR THE AUTOMATIC ASSEMBLY OF PHOTOVOLTAIC PANELS - Apparatus and method for the automatic assembly of photovoltaic panels with back-contact architecture, the apparatus comprising a series of six stations that are configured in sequence in a carousel with recirculation of trays and a control device, which is adjacent to one or more of the stations, for controlling the correctness of the processes performed, the control device enabling the processing or the mere transit of the tray into the subsequent station by comparing the actual state with a predefined state. If one or more of the controls performed in the transfers between the six stations yields a negative outcome regarding the correctness of the operation performed previously, the control device enables the mere transit of the tray with its content to the subsequent stations until it reaches the first station without undergoing any tipping. | 2015-10-08 |
20150287858 | PHOTOVOLTAIC MODULE INTEGRATED MOUNTING AND ELECTRONICS SYSTEMS - A system for mounting solar modules to a structure in an array includes a solar module and a connector. The solar module has a photovoltaic laminate, a frame, and a plug. The frame circumscribes the photovoltaic laminate, and includes an enclosure member extending along an edge of the photovoltaic laminate. The enclosure member has a box section that extends inward along the longitudinal length thereof. The box section is open along one end. The plug extends into the open end of the box section of the enclosure member and has energy delivery sockets that are outwardly accessible through an opening in the enclosure member. The connector is electrically connected with the energy delivery sockets and mechanically connected with the enclosure member. | 2015-10-08 |
20150287859 | METHOD FOR MANUFACTURING A THIN-LAYER PHOTOVOLTAIC DEVICE, IN PARTICULAR FOR SOLAR GLAZING - A method for producing a thin-film photovoltaic device ( | 2015-10-08 |
20150287860 | SOLAR CELL ENCAPSULANT SILICONE COMPOSITION AND SOLAR CELL MODULE - A solar cell module is constructed from light-receiving surface and back surface panels, a solar cell matrix comprising a plurality of solar cells sandwiched between the panels, and a silicone encapsulant layer for encapsulating the solar cell matrix. A silicone encapsulant composition is to form the silicone encapsulant layer that has a storage elastic modulus of 1-300 MPa in a temperature range of −40° C. to 85° C. | 2015-10-08 |
20150287861 | GLASS PANEL - Provided is a glass panel having a glass plate with a solar battery element, which is capable of protecting a light-modulating sheet from the heat of sunlight to control a temperature increase in the light-modulating sheet. | 2015-10-08 |
20150287862 | CPVLIS - CONCENTRATION PHOTOVOLTAICS LAMINATED INTERCONNECTION SYSTEM COMPRISING A CPV RECEIVER PANEL, A METHOD FOR PREPARING THE CPV RECEIVER PANEL AND AN INSTALLATION COMPRISING THE SAME - The present invention relates to a concentration photovoltaics CPV receiver, and in particular, to a laminated receiver panel for a concentration photovoltaics (CPV) system that provides a long term high electric insulation degree, even under wet conditions, has good thermal conductivity, is easy and cheap to manufacture. Said laminated receiver panel comprises a layered structure in which the connection between the individual CPV receivers is sandwiched between two insulation layers. The present invention refers also to a method for manufacturing said laminated receiver panel, to a concentration photovoltaic system comprising said laminated receiver panel and to an installation for manufacturing said laminated CPV receiver panels. | 2015-10-08 |
20150287863 | TRANSPARENT SOLAR CELL - Provided is a transparent solar cell including: a substrate; a first transparent electrode disposed on the substrate; a light absorption layer disposed on the first transparent electrode; a multi chromic layer disposed on the light absorption layer; and a second transparent electrode disposed on the multi chromic layer, and in which light is incident into the substrate and at least some of the incident light is converted into an electrical current in the light absorption layer to be able to provide heat to the multi chromic layer. | 2015-10-08 |
20150287864 | Luminescent Solar Concentrator - A stacked luminescent solar concentrator includes two separate absorption/emission cells, each having a layer of luminophore-type material, wherein a top layer is a high band gap layer comprised of quantum dots in polymer, wherein the quantum dots are engineered so as to absorb a significant percentage of photons above bandgap. The bottom layer is a lower band gap layer comprised of quantum dots in polymer, wherein the quantum dots in the second layer are engineered so as to absorb photons not absorbed in the top layer, thus increasing total percentage of absorbed photons. Photovoltaic cells are located below the layers at the bottom of the cells or at the edges of the cells. The sides and lower surfaces of the cells may include reflective surfaces as discussed further herein. Reflection losses from the top surface thereof may be minimized using a broadband anti-reflective coating (AR) on the surface. | 2015-10-08 |
20150287865 | PARALLEL INTERCONNECTION OF NEIGHBORING SOLAR CELLS VIA A COMMON BACK PLANE - A solar cell assembly comprising a plurality of solar cells and a support, the support comprising a conductive layer. The conductive layer is divided into a first conductive portion and a second conductive portion. Each solar cell of the plurality of solar cells comprising a front surface, a rear surface, and a first contact in correspondence with the rear surface. Each one of the plurality of solar cells is placed on the first conductive portion with the first contact electrically connected to the first conductive portion so that the solar cells are connected in parallel through the first conductive portion. A second contact of each solar cell can be connected to the second conductive portion. The two conductive portions serve as bus bars of the solar cell assembly. | 2015-10-08 |
20150287866 | SOLAR RECEIVER - A solar receiver having a power conversion layer in the shape of a ring, the ring having a first axis of revolution, a photovoltaic active front surface and a back surface, a width and a diameter. The power conversion layer is made of PV cells positioned to form a ring, the plurality of PV cells being divided into several interleaved groups to form a plurality of electrical circuits, with each electrical circuit having cells distributed uniformly around the ring. | 2015-10-08 |
20150287867 | PHOTOVOLTAIC DEVICE AND METHOD FOR MANUFACTURING THE SAME - Provided is a photovoltaic device prepared with a semiconductor including a localized level or an intermediate band in a forbidden band and capable of improving the performance than before. The photovoltaic device includes a plurality of first layers made of a first semiconducting material and a plurality of second layers made of a second semiconducting material that is different from the first semiconducting material, wherein the second semiconducting material includes a localized level or intermediate band in a forbidden band, the first layers and the second layers are alternately laminated one by one, at least two of the second layers are each disposed between a pair of the first layers, and a thickness of each of the second layers is thinner than a thickness of four molecular layers of the first semiconducting material. | 2015-10-08 |
20150287868 | ULTRA THIN HIT SOLAR CELL AND FABRICATING METHOD OF THE SAME - Disclosed is an ultra-thin HIT solar cell, including: an n- or p-type crystalline silicon substrate; an amorphous silicon emitter layer having a doping type different from that of the silicon substrate; and an intrinsic amorphous silicon passivation layer formed between the crystalline silicon substrate and the amorphous silicon emitter layer, wherein the HIT solar cell further includes a transparent conductive oxide layer made of ZnO on an upper surface thereof, and the surface of the crystalline silicon substrate is not textured but only the surface of the transparent conductive oxide layer is textured, and thereby a very thin crystalline silicon substrate can be used, ultimately achieving an ultra-thin HIT solar cell having a very low total thickness while maintaining light trapping capacity. | 2015-10-08 |
20150287869 | PHOTODIODE - A photodiode that can provide a THz operation with a stable output. A photodiode having a pin-type semiconductor structure includes a semiconductor layer structure and n and p electrodes. The semiconductor layer structure is obtained by sequentially layering an n-type contact layer, a low concentration layer, and a p-type contact layer. The low concentration layer is obtained by layering an electron drift layer, a light absorption layer, and a hole drift layer while being abutted to the n-type contact layer. The n electrode and the p electrode are connected to the n-type contact layer and the p-type contact layer, respectively. During operation, the low concentration layer is depleted. | 2015-10-08 |
20150287870 | SINGLE-PHOTON NANO-INJECTION DETECTORS - Single-photon detectors, arrays of single-photon detectors, methods of using the single-photon detectors and methods of fabricating the single-photon detectors are provided. The single-photon detectors combine the efficiency of a large absorbing volume with the sensitivity of nanometer-scale carrier injectors, called “nanoinjectors”. The photon detectors are able to achieve single-photon counting with extremely high quantum efficiency, low dark count rates, and high bandwidths. | 2015-10-08 |
20150287871 | SOLUTION-PROCESSED ULTRAVIOLET LIGHT DETECTOR BASED ON P-N JUNCTIONS OF METAL OXIDES - An ultraviolet light detector has a pn-junction of wide-gap semiconductors layers, where a p-type semiconductor layer with a polycrystalline metal oxide contacts an n-type semiconductor layer of metal oxide nanoparticles, or the converse. The ultraviolet detector is prepared using solvent based deposition methods and where temperatures can be maintained below 300° C. | 2015-10-08 |
20150287872 | PARTICLE DETECTOR AND METHOD OF DETECTING PARTICLES - A particle detector having a support member. A front electrode layer is disposed over the support member. A semiconductor junction having at least an n-type layer and at least a p-type layer is disposed over the front electrode layer. A back electrode layer is disposed over the semiconductor junction. The back electrode layer has a thickness which is selected to permit particles having energies in the range from about 0.5 MeV to about 5 MeV to enter the semiconductor junction. | 2015-10-08 |
20150287873 | ELECTRO-OPTIC DEVICE HAVING NANOWIRES INTERCONNECTED INTO A NETWORK OF NANOWIRES - An electro-optic device includes a first electrode, an active layer formed over and electrically connected with the first electrode, a buffer layer formed over and electrically connected with the active layer, and a second electrode formed directly on the buffer layer. The second electrode includes a plurality of nanowires interconnected into a network of nanowires. The buffer layer provides a physical barrier between the active layer and the plurality of nanowires to prevent damage to the active layer while the second electrode is formed. | 2015-10-08 |
20150287874 | METAL TEMPLATE STRUCTURE - A metal template structure at least includes a frame, a supporting stainless wire cloth is disposed at an inner edge of the frame, a metal template is disposed on the supporting stainless wire cloth, and falling holes arranged in a printing shape are disposed on the metal template. The present invention is characterized in that: a feeding guide portion extends upwards from an upper periphery of each falling hole, an aperture of the feeding guide portion is greater than an aperture of the falling hole, and a periphery of the feeding guide portion and a periphery of the falling hole are connected in different forms such as a right angle surface, an inclined surface or a concave surface. By using a large aperture of the feeding guide portion and increasing the feeding guide portion, the thickness of the metal template is increased, so that more slurry can pass through the falling holes smoothly during printing, thereby achieving optimal falling effect. | 2015-10-08 |
20150287875 | INTERCONNECT PROCESSING ASSEMBLY FOR CONNECTING SOLAR CELLS - A solar cell interconnect processing assembly includes a stack of interconnects, a positioning head, and a control system. The positioning head picks up an interconnect from the stack of interconnects at a first location, moves the interconnect from the first location to a second location, heats the interconnect while moving the interconnect from the first location to the second location, and places the interconnect over two adjacent solar cells at the second location. The control system controls a temperature at which the interconnect is heated and controls movement of the positioning head. | 2015-10-08 |
20150287876 | LIGHT-EMITTING DEVICE - One embodiment of the present invention relates to a light-emitting device, a method for manufacturing the light-emitting device, a light-emitting device package, and a lighting system. The light-emitting device, according to the one embodiment, comprises: a first conductive semiconductor layer ( | 2015-10-08 |
20150287877 | SEMICONDUCTOR NANOCRYSTALS AND COMPOSITIONS AND DEVICES INCLUDING SAME - A semiconductor nanocrystal capable of emitting light with an improved photoluminescence quantum efficiency. The present invention further relates to compositions and devices including semiconductor nanocrystals capable of emitting light with an improved photoluminescence quantum efficiency. A semiconductor nanocrystal wherein the semiconductor nanocrystal is capable of emitting light with a photoluminescence quantum efficiency greater than about 50% upon excitation and including a maximum peak emission with a FWHM less than 20 nm is disclosed. Also disclosed are a device, a population of semiconductor nanocrystals, and a composition including a semiconductor nanocrystal wherein the semiconductor nanocrystal is capable of emitting light with a photoluminescence quantum efficiency greater than about 50% upon excitation and including a maximum peak emission with a FWHM less than 20 nm. A semiconductor nanocrystal that is capable of emitting light upon excitation with a photoluminescence quantum efficiency greater than about 90%. Also disclosed are a device, a population, and a composition including a semiconductor nanocrystal. | 2015-10-08 |
20150287878 | SEMICONDUCTOR FILM, METHOD OF PRODUCING SEMICONDUCTOR FILM, SOLAR CELL, LIGHT-EMITTING DIODE, THIN FILM TRANSISTOR, AND ELECTRONIC DEVICE - A semiconductor film, including: an assembly of semiconductor quantum dots containing a metal atom; a thiocyanate ion coordinated to the semiconductor quantum dots; and a metal ion. | 2015-10-08 |
20150287879 | Light Emitting Diode Device Having Super Lattice Structure and a Nano-Structure Layer - A light emitting diode device is provided, which comprises a silicon-based substrate, a buffer layer, a super lattice structure layer, a nano-structure layer, a first semiconductor layer, a light emitting layer, and a second semiconductor layer. The buffer layer is formed on the silicon-based substrate, the super lattice structure layer is formed on the buffer layer, the nano-structure layer is formed on the super lattice structure layer, a first semiconductor layer is formed on the nano-structure layer, and the light emitting layer is formed between the first semiconductor layer and the second semiconductor layer. The super lattice layer and the nano-structure can release the stress within the light emitting diode device, and reduce the epitaxy defect, so that the internal quantum effect and the external quantum effect can be increased. | 2015-10-08 |
20150287880 | METHOD FOR SEPARATING REGIONS OF A SEMICONDUCTOR LAYER - The invention relates to a method for separating regions of a semiconductor layer and for introducing an outcoupling structure into an upper side of the semiconductor layer, the outcoupling structure being provided to couple light out of the semiconductor layer. The upper side of the semiconductor layer is covered by a mask having first openings for introducing the outcoupling structure and at least a second opening, which is provided to introduce a separating trench into the semiconductor layer. With the aid of an etching method, the outcoupling structure is introduced into the upper side of the semiconductor layer in the region of the first openings and simultaneously a separating trench passing through the semiconductor layer is introduced into the semiconductor layer via the second opening, and a region of the semiconductor layer is separated. | 2015-10-08 |
20150287881 | Light Emitting Diode Device - A light emitting diode device comprises the transparent conductive layer is formed on the conductive substrate, the p-type semiconductor layer is formed on the transparent conductive layer, the active layer is formed on the p-type semiconductor layer, and the n-type semiconductor layer is formed on the active layer, the buffer layer is formed on the n-type semiconductor layer, and a metal electrode is formed on a rough and uneven surface of the buffer layer, in which the electrical property of the n-type semiconductor layer is opposites to that of the p-type semiconductor layer. The reflective effect within the light emitting diode device can be increased. In addition, by reducing the thickness of the undoped GaN layer, the absorption of ultraviolet light inside the components of the light emitting diode device can be reduced. | 2015-10-08 |
20150287882 | NITRIDE SEMICONDUCTOR LIGHT-EMITTING DIODE - In a nitride semiconductor light-emitting diode having a shape of an isosceles triangle in a top view, either Group Aa consisting of the following two mathematical formulae (Ia) and (IIa) or Group Ab consisting of the following two mathematical formulae (Ib) and (IIb) is satisfied: | 2015-10-08 |
20150287883 | Composite Substrate, Semiconductor Chip Having a Composite Substrate and Method for Producing Composite Substrates and Semiconductor Chips - A composite substrate has a carrier and a utility layer. The utility layer is attached to the carrier by means of a dielectric bonding layer and the carrier contains a radiation conversion material. Other embodiments relate to a semiconductor chip having such a composite substrate, a method for producing a composite substrate and a method for producing a semiconductor chip with a composite substrate. | 2015-10-08 |
20150287884 | Seed Crystal Substrates, Composite Substrates and Functional Devices - A seed crystal substrate | 2015-10-08 |
20150287885 | LIGHT EMITTING DEVICE AND LIGHT EMITTING DEVICE PACKAGE - Disclosed are a light emitting device and a light emitting device package. The light emitting device includes a light emitting structure including a first conductive semiconductor layer, an active layer on the first conductive semiconductor layer, and a second conductive semiconductor layer on the active layer, an adhesive layer contacting a top surface of the first conductive semiconductor layer, a first electrode contacting a top surface of the first conductive semiconductor and a top surface of the adhesive layer, and a second electrode contacting the second conductive semiconductor layer, wherein the adhesive layer contacting the first electrode is spaced apart from the second electrode. | 2015-10-08 |
20150287886 | LIGHT-EMITTING DEVICE - A light-emitting device includes: a light-emitting stack including a first surface and a second surface opposite to the first surface, wherein the light-emitting stack emits a light having a wavelength between 365 nm and 550 nm; and a first electrode formed on the first surface and comprising a first metal layer and a second metal layer alternating with the first metal layer, wherein the first electrode has a reflectivity larger than 95% for reflecting the light, and the second metal layer has a higher reflectivity index relative to the light than that of the first metal. | 2015-10-08 |
20150287887 | SEMICONDUCTOR LIGHT-EMITTING DEVICE AND METHOD OF FORMING ELECTRODE - A semiconductor light-emitting device having an electrode that can be manufactured by a simple method and is unlikely to deteriorate, and a method for forming the electrode are provided. The semiconductor light-emitting device according to the present invention has a semiconductor layered structure having a light-emitting layer that emits light by supplying electric power and an electrode formed on the semiconductor layered structure. The electrode has a reflection layer that reflects light exiting from the light-emitting layer, a barrier layer formed on the upper side and side surface of the reflection layer, and a pad layer formed only on the top surface of the barrier layer. | 2015-10-08 |
20150287888 | LIGHT-EMITTING DIODE AND APPLICATION THEREFOR - A light-emitting diode is provided to include: a transparent substrate having a first surface, a second surface, and a side surface; a first conductive semiconductor layer positioned on the first surface of the transparent substrate; a second conductive semiconductor layer positioned on the first conductive semiconductor layer; an active layer positioned between the first conductive semiconductor layer and the second conductive semiconductor layer; a first pad electrically connected to the first conductive semiconductor layer; and a second pad electrically connected to the second conductive semiconductor layer, wherein the transparent substrate is configured to discharge light generated by the active layer through the second surface of the transparent substrate, and the light-emitting diode has a beam angle of at least 140 degrees or more. Accordingly, a light-emitting diode suitable for a backlight unit or a surface lighting apparatus can be provided. | 2015-10-08 |
20150287889 | SURFACE MOUNTABLE SEMICONDUCTOR DEVICE - The present invention relates to a surface mountable semiconductor device comprising at least one semiconductor element mounted on or integrated in a device substrate ( | 2015-10-08 |
20150287890 | LIGHTING DEVICES, AN OPTICAL COMPONENT FOR A LIGHTING DEVICE, AND METHODS - A white-light emitting lighting device comprising one or more light emitting light sources (preferably solid state semiconductor light emitting diodes) that emit off-white light during operation, wherein the off-white light includes a spectral output including at least one spectral component in a first spectral region from about 360 nm to about 475 nm, at least one spectral component in a second spectral region from about 475 nm to about 575 nm, and at least one deficiency in at least one other spectral region, and an optical component that is positioned to receive at least a portion of the off-white light generated by the one or more light sources, the optical component comprising an optical material for converting at least a portion of the off-white light to one or more predetermined wavelengths, at least one of which has a wavelength in at least one deficient spectral region, such that light emitted by the lighting device comprises white light, wherein the optical material comprises quantum confined semiconductor nanoparticles. Also disclosed is an optical component, lighting fixture, a cover plate for a lighting fixture, and methods. | 2015-10-08 |
20150287891 | LED Packaging Structure Using Distant Fluorescent Powder Layer and Manufacturing Method Thereof - Disclosed is an LED packaging structure using a distant fluorescent powder layer and a manufacturing method thereof. A fluorescent powder layer ( | 2015-10-08 |
20150287892 | LIGHT EMITTING DEVICE - This disclosure discloses a light-emitting device. The light-emitting device comprises a substrate comprising a recess and an upper surface wherein the substrate is thermal conductive and transparent; a wavelength converting layer covering the recess and the upper surface of the substrate; and a light-emitting diode arranged in the recess and over the wavelength converting layer. | 2015-10-08 |
20150287893 | PACKAGE MATERIAL FOR PACKAGING PHOTOELECTRIC DEVICE AND PACKAGE - A package material for packaging a photoelectric device includes a first molding portion and a second molding portion. The first molding portion is disposed on the photoelectric device. The first molding portion includes a first molding compound and a plurality of nano-scale metal oxide particles, wherein the nano-scale metal oxide particles are doped in the first molding compound. The second molding portion is disposed on the first molding portion and away from the photoelectric device. The second molding portion includes a second molding compound and a plurality of submicron-scale metal oxide particles, wherein the submicron-scale metal oxide particles are doped in the second molding compound. A whole refractive index of the first molding portion is larger than a whole refractive index of the second molding portion. | 2015-10-08 |
20150287894 | ULTRAVIOLET LIGHT-EMITTING DEVICES AND METHODS - In various embodiments, an illumination device features an ultraviolet (UV) light-emitting device at least partially surrounded by an encapsulant. A barrier layer is disposed between the light-emitting device and the encapsulant and is configured to substantially prevent UV light emitted by the light-emitting device from entering the encapsulant. | 2015-10-08 |
20150287895 | SOLID STATE LIGHTING DEVICES HAVING IMPROVED COLOR UNIFORMITY AND ASSOCIATED METHODS - Solid state lighting (SSL) devices and methods of manufacturing SSL devices are disclosed herein. In one embodiment, an SSL device comprises a support having a surface and a solid state emitter (SSE) at the surface of the support. The SSE can emit a first light propagating along a plurality of first vectors. The SSL device can further include a converter material over at least a portion of the SSE. The converter material can emit a second light propagating along a plurality of second vectors. Additionally, the SSL device can include a lens over the SSE and the converter material. The lens can include a plurality of diffusion features that change the direction of the first light and the second light such that the first and second lights blend together as they exit the lens. The SSL device can emit a substantially uniform color of light. | 2015-10-08 |
20150287896 | LIGHT EMITTING APPARATUS AND METHOD FOR PRODUCING THE SAME - A light emitting apparatus includes at least one light emitting device; a light transparent member that receives incident light emitted from the light emitting device; and a covering member. The light transparent member is a light conversion member that has an externally exposed light emission surface and a side surface contiguous to the light emission surface. The covering member contains a light reflective material, and covers at least the side surface of said light transparent member. A content of said light reflective material is not less than 30 wt %. | 2015-10-08 |
20150287897 | Light Emitting Diode Packaging Structure - A packaging structure of a vertical LED chip includes at least a support system, a glue cup that connects to periphery of the support system, a LED chip with light absorption substrate over the support system and packaging glue distributed in periphery of the LED chip, wherein the packaging structure also comprises a baffle that surrounds the outer side wall of the light absorption substrate. Adding of a baffle structure in the support system of the packaging structure can effectively prevent light from being absorbed by the light absorption substrate and reflect such light out of the packaging structure, thus increasing probability of light emitting and improving light intensity of the vertical LED chip. | 2015-10-08 |
20150287898 | METHOD FOR MANUFACTURE OF WIRE BONDABLE AND SOLDERABLE SURFACES ON NOBLE METAL ELECTRODES - The present invention relates to a method for manufacture of wire bondable and solderable surfaces on noble metal electrodes. The noble metal electrodes are activated by depositing a seed layer of palladium or a palladium alloy layer by electroless plating at 60 to 90° C. Next, an intermediate layer is deposited onto the seed layer followed by deposition of the wire bondable and/or solderable surface finish layer(s) onto the intermediate layer. This method is particularly suitable in the production of optoelectronic devices such as light emitting diodes (LEDs). | 2015-10-08 |
20150287899 | LED-Lighted Window - A lighted window that includes an LED, an anode-side layer or trace of transparent conducting oxide (TCO) overlying a first side of the LED and electrically coupled to the anode of the LED, and a cathode-side layer or trace of TCO overlying a second side of the LED and electrically coupled to the cathode of the LED. There is an anode-side electrical connector that is electrically coupled to the anode-side layer or trace of TCO, electrically insulated from the cathode-side layer or trace of TCO, and extends outside of the anode-side layer or trace of TCO, and a cathode-side electrical connector that is electrically coupled to the cathode-side layer or trace of TCO, electrically insulated from the anode-side layer or trace of TCO, and extends outside of the cathode-side layer or trace of TCO. | 2015-10-08 |
20150287900 | LIGHT EMITTING DIODE ASSEMBLY AND METHOD FOR FABRICATING THE SAME - A method of manufacturing a light-emitting diode (LED) chip including forming an LED on a first substrate, the LED including an N-type and a P-type semiconductor layer, the LED being formed to expose surfaces of the N-type and P-type semiconductor layers, forming bumps respectively electrically connected to the N-type and P-type semiconductor layers, forming electrode pads corresponding to the bumps on a second substrate, aligning the LED chip and the second substrate so that the bumps respectively correspond to the electrode pads, and increasing a temperature of the bumps to a first temperature, applying a pressure to the first and second substrates, and increasing the temperature of the bumps to a second temperature for a first time period while maintaining the pressure, and maintaining the second temperature from the first time period to a second time period while maintaining the pressure, and then releasing the pressure and cooling the bumps. | 2015-10-08 |
20150287901 | FLEXIBLE LEAD FRAME FOR MULTI-LEG PACKAGE ASSEMBLY - Thermoelectric structures include a flexible substrate; a plurality of conductive shunts; and a plurality of thermoelectric legs that are in thermal and electrical communication with the thermoelectric legs via thermal and electrical paths. In some embodiments, the paths are through apertures in the flexible substrate, and the flexible substrate can be substantially out of the thermal and electrical paths. Some embodiments include a circuit board coupled to the flexible substrate, and a bend in the flexible substrate can be disposed between the plurality of conductive shunts and the circuit board. In some embodiments, a plurality of perforations are defined through the flexible substrate and can be configured to rupture responsive to a temperature condition that otherwise would damage one or more of the thermal and electrical paths, said rupture inhibiting such damage. Other embodiments, and methods, are provided. | 2015-10-08 |
20150287902 | MODULAR THERMOELECTRIC UNITS FOR HEAT RECOVERY SYSTEMS AND METHODS THEREOF - Apparatus and method for generating electricity. The apparatus includes one or more first components configured to extract heat from at least a first fluid flow at a first temperature to one or more devices configured to convert thermal energy to electric energy. The first fluid flow is in a first direction. Additionally, the apparatus includes one or more second components configured to transfer heat from the one or more devices to at least a second fluid flow at a second temperature. The second temperature is lower than the first temperature, and the second fluid flow is in a second direction. Each first part of the first fluid flow corresponds to a first shortest distance to the one or more devices, and the first shortest distance is less than half the square root of the total free flow area for a corresponding first cross-section of the first fluid flow. | 2015-10-08 |
20150287903 | PIEZOELECTRIC TRANSFORMER - The piezoelectric transformer according to an exemplary embodiment includes: at least one input unit; and a plurality of output units connected to the input unit, wherein the plurality of output units output different levels of voltage. | 2015-10-08 |
20150287904 | APPARATUS AND ASSOCIATED METHODS - An apparatus comprising:—a piezoelectric convertor layer; and—a proximal first piezoresistive layer being in electrical communication with, a first face of the piezoelectric convertor layer, the apparatus being configured such that when the piezoelectric convertor layer is deformed to generate charge, the proximal piezoresistive layer is configured to control the flow of charge from the piezoelectric convertor layer. | 2015-10-08 |
20150287905 | PIEZOELECTRIC MEMBER, ACOUSTIC WAVE APPARATUS, AND PIEZOELECTRIC MEMBER MANUFACTURING METHOD - A piezoelectric member that achieves a high sound speed includes a silicon-containing substrate and a piezoelectric layer. The piezoelectric layer is disposed on the silicon-containing substrate. At least a surface layer of the piezoelectric layer on a side opposite to the silicon-containing substrate is made of B | 2015-10-08 |
20150287906 | POLYMER BLENDS OF ELECTROSTRICTIVE TERPOLYMER WITH OTHER POLYMERS - Polymer blends having improved electromechanical responses and mechanical properties for use in electromechanical application are disclosed. In particular, polymer blend including at least one electrostrictive terpolymer, e.g., poly(vinylidene fluoride-trifluoroethylene-chlorofluoroethylene) (P(VDF-TrFE-CFE)) or a derivative thereof, and at least one fluoropolymer, e.g., PVDF or derivative thereof such as PVD-TrFE are disclosed. The polymer blends advantageously have a transverse strain, i.e., a strain perpendicular to the applied electric field direction, that is about 1.5% or higher (as measured at 100 MV/m) while also having an elastic modulus of no less than about 400 MPa (as measured at 30° C. and 1 Hz by dynamic mechanical analyzer). | 2015-10-08 |
20150287907 | MAGNETIC MEMORY DEVICES - Magnetic memory devices include a plurality of first magnetic patterns on a substrate so as to be spaced apart from each other, a first insulating pattern between the first magnetic patterns to define the first magnetic patterns, and a tunnel barrier layer covering the first magnetic patterns and the first insulating pattern. The first insulating pattern includes a first magnetic element, and the first magnetic element is the same as a second magnetic element constituting the first magnetic patterns. | 2015-10-08 |
20150287908 | MAGNETIC RANDOM ACCESS MEMORY WITH PERPENDICULAR ENHANCEMENT LAYER - The present invention is directed to an MTJ memory element including a magnetic free layer structure which comprises one or more magnetic free layers that have a same variable magnetization direction substantially perpendicular to layer planes thereof; an insulating tunnel junction layer formed adjacent to the magnetic free layer structure; a magnetic reference layer structure comprising a first magnetic reference layer formed adjacent to the insulating tunnel junction layer and a second magnetic reference layer separated therefrom by a perpendicular enhancement layer with the first and second magnetic reference layers having a first fixed magnetization direction substantially perpendicular to layer planes thereof; an anti-ferromagnetic coupling layer formed adjacent to the second magnetic reference layer opposite the perpendicular enhancement layer; and a magnetic fixed layer comprising first and second magnetic fixed sublayers with the second magnetic fixed sublayer formed adjacent to the anti-ferromagnetic coupling layer opposite the second magnetic reference layer. | 2015-10-08 |
20150287909 | CONFINED CELL STRUCTURES AND METHODS OF FORMING CONFINED CELL STRUCTURES - Techniques for reducing damage in memory cells are provided. Memory cell structures are typically formed using dry etch and/or planarization processes which damage certain regions of the memory cell structure. In one or more embodiments, certain regions of the cell structure may be sensitive to damage. For example, the free magnetic region in magnetic memory cell structures may be susceptible to demagnetization. Such regions may be substantially confined by barrier materials during the formation of the memory cell structure, such that the edges of such regions are protected from damaging processes. Furthermore, in some embodiments, a memory cell structure is formed and confined within a recess in dielectric material. | 2015-10-08 |
20150287910 | REPLACEMENT CONDUCTIVE HARD MASK FOR MULTI-STEP MAGNETIC TUNNEL JUNCTION (MTJ) ETCH - A multi-step etch technique for fabricating a magnetic tunnel junction (MTJ) apparatus includes forming a first conductive hard mask on a first electrode of the MTJ apparatus for etching the first electrode during a first etching step. The method also includes forming a second conductive hard mask on the first conductive hard mask for etching magnetic layers of the MTJ apparatus during a second etching step. A spacer layer is conformally deposited on sidewalls of the first conductive hard mask. The second conductive hard mask is deposited on the first conductive hard mask and aligned with the spacer layer on the sidewalls of the first conductive hard mask. | 2015-10-08 |
20150287911 | METHODS OF MANUFACTURING A MAGNETORESISTIVE RANDOM ACCESS MEMORY DEVICE - In a method of manufacturing a MRAM device, a lower electrode is formed on a substrate. A first magnetic layer, a tunnel barrier layer, and a second magnetic layer are sequentially formed on the lower electrode layer. An etching mask is formed on the second magnetic layer. An ion beam etching process in which a first ion beam and a second ion beam are simultaneously emitted onto the substrate is performed to form a MTJ structure including a first magnetic layer pattern, a tunnel layer pattern, and a second magnetic layer pattern from the first magnetic layer, the tunnel barrier layer, and the second magnetic layer, respectively, the MTJ structure has no by-products remaining after the ion beam etching process is performed. | 2015-10-08 |
20150287912 | MAGNETORESISTIVE RANDOM ACCESS MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME - In a method of manufacturing an MRAM device, a lower electrode and a preliminary first free layer pattern sequentially stacked are formed on a substrate. An upper portion of the preliminary first free layer pattern is removed to form a first free layer pattern. A second free layer and a tunnel barrier layer are sequentially formed on the first free layer pattern. The second free layer is partially oxidized to form a second free layer pattern. A fixed layer structure is formed on the tunnel barrier layer. | 2015-10-08 |
20150287913 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME - According to one embodiment, a nonvolatile semiconductor memory device includes fin-type stacked layer structures. Each of the structures includes semiconductor layers stacked in a perpendicular direction. Assist gate electrodes are disposed in an in-plane direction and divided on a surface in the perpendicular direction of the structures. | 2015-10-08 |
20150287914 | RESISTIVE RANDOM ACCESS MEMORY AND METHOD OF FABRICATING THE SAME - Provided is a resistive random access memory including a first electrode layer, a second electrode layer, and a variable resistance layer disposed between the first electrode layer and the second electrode layer, wherein the second electrode layer includes a first sublayer, a second sublayer, and a conductive metal oxynitride layer disposed between the first sublayer and the second sublayer. | 2015-10-08 |
20150287915 | RESISTIVE RANDOM ACCESS MEMORY AND METHOD OF FABRICATING THE SAME - A resistive random access memory includes a first electrode layer, a second electrode layer, and a stacked structure disposed between the first electrode layer and the second electrode layer. The stacked structure includes a conductive layer and a resistance variable layer. The material of the conductive layer includes HfO | 2015-10-08 |
20150287916 | SEMICONDUCTOR STRUCTURES INCLUDING MULTI-PORTION LINERS AND RELATED METHODS - A method of forming a semiconductor structure. The method comprises forming a protective portion of a liner on at least a portion of stack structures on a substrate. The protective portion comprises a material formulated to adhere to the stack structures. A conformal portion of the liner is formed on the protective portion of the liner or on the protective portion of the liner and exposed materials of the stack structures. At least one of the protective portion and the conformal portion does not comprise aluminum. Additional methods of forming a semiconductor structure are disclosed, as are semiconductor structures including the liners comprising the protective portion and the conformal portion. | 2015-10-08 |
20150287917 | HIGH YIELD RRAM CELL WITH OPTIMIZED FILM SCHEME - The present disclosure relates to a method of forming a resistive random access memory (RRAM) cell having a good yield, and an associated apparatus. In some embodiments, the method is performed by forming a bottom electrode over a lower metal interconnect layer, and forming a variable resistance dielectric data storage layer having a first thickness onto the bottom electrode. A capping layer is formed onto the dielectric data storage layer. The capping layer has a second thickness that is in a range of between approximately 2 to approximately 3 times thicker than the first thickness. A top electrode is formed over the capping layer, and an upper metal interconnect layer is formed over the top electrode. | 2015-10-08 |
20150287918 | RRAM CELL BOTTOM ELECTRODE FORMATION - The present disclosure relates to a method of forming a resistive random access memory (RRAM) cell having a reduced leakage current, and an associated apparatus. In some embodiments, the method is performed by forming a bottom electrode over a lower metal interconnect layer using an atomic layer deposition (ALD) process to form at least a top portion of the bottom electrode. A dielectric data storage layer is formed onto the top portion of the bottom electrode in-situ with forming the top portion of the bottom electrode. A top electrode is formed over the dielectric data storage layer, and an upper metal interconnect layer is formed over the top electrode. By forming the top portion of the bottom electrode using an ALD process that is in-situ with the formation of the overlying dielectric data storage layer, leakage current, leakage current distribution and device yield of the RRAM cell are improved. | 2015-10-08 |
20150287919 | METHOD FOR FORMING MEMORY DEVICE - A method includes forming a resistance-switching layer and a second electrode over a first electrode. The method includes applying a forming voltage to the resistance-switching layer such that the resistance of the resistance-switching layer is decreased. The method includes applying an initial reset voltage to the first electrode or the second electrode such that the resistance of the resistance-switching layer is increased. The method includes applying a first set voltage to the first electrode or the second electrode such that the resistance of the resistance-switching layer is decreased. The method includes applying a second reset voltage to first electrode or the second electrode such that the resistance of the resistance-switching layer is increased. The method includes applying a second set voltage to first electrode or the second electrode such that the resistance of the resistance-switching layer is decreased. The second set voltage is lower than the first set voltage. | 2015-10-08 |
20150287920 | ORGANIC ELECTROLUMINESCENT DEVICE - An organic electroluminescent device having a capping layer composed of material having a high refractive index that involves only small differences in refractive indices measured in the blue, green, and red wavelength regions, excelling in thin film stability and durability and having no absorption in the respective wavelength ranges of blue, green, and red is provided to improve device characteristics of the organic electroluminescent device, particularly to greatly improve the coupling-out efficiency. | 2015-10-08 |
20150287921 | AROMATIC AMINE DERIVATIVE, ORGANIC ELECTROLUMINESCENT ELEMENT AND ELECTRONIC DEVICE - An organic EL device that has a high efficiency and a long service life, an electronic apparatus containing the organic EL device, and a compound capable of providing the organic EL device. The compound is specifically represented by the following general formula (1): | 2015-10-08 |
20150287922 | EVAPORATION METHOD AND EVAPORATION DEVICE - The present invention discloses an evaporation method and an evaporation device. The evaporation method includes successively providing at least one mask above a base substrate and forming at least one evaporation sub-pattern on the base substrate by an evaporation process so that an evaporation pattern is formed on the base substrate, wherein the evaporation pattern is constituted by the at least one evaporation sub-pattern. As the evaporation pattern finally formed is constituted by the at least one evaporation sub-pattern, only a small number of opening regions are required to be formed on each of the masks used for forming the evaporation sub-patterns compared with the prior art, so that the widths of the shield regions between the adjacent opening regions may be set to be larger. | 2015-10-08 |
20150287923 | MULTILAYER HETEROSTRUCTURES FOR APPLICATION IN OLEDS AND PHOTOVOLTAIC DEVICES - This invention relates to a supported polymer heterostructure and methods of manufacture. The heterostructure is suitable for use in a range of applications which require semiconductor devices, including photovoltaic devices and light-emitting diodes. | 2015-10-08 |
20150287924 | ELECTRONIC DEVICE AND MANUFACTURING METHOD THEREOF - A manufacturing method of an electronic device includes: providing a substrate; forming a source and a drain on the substrate; forming a semiconductor layer on the substrate; forming a first light sensitive material layer on the semiconductor layer; removing a first portion of the first light sensitive material layer by a first exposure and development process and maintaining a second portion of the first light sensitive material layer to serve as a first gate insulation layer; patterning the semiconductor layer to form a channel layer below the first gate insulation layer; forming a second light sensitive material layer on the substrate; removing a third portion of the second light sensitive material layer by a second exposure and development process to expose at least a part of the first gate insulation layer; and forming a first gate on the first gate insulation layer. An electronic device is also provided. | 2015-10-08 |
20150287925 | METHOD OF MANUFACTURING A MULTILAYER SEMICONDUCTOR ELEMENT, AND A SEMICONDUCTOR ELEMENT MANUFACTURED AS SUCH - The present invention is directed to a method of manufacturing a multilayer semiconductor element. According to this method a first device layer is provided on a carrier by solution printing of a first material on the carrier. A second device layer is provided by solution printing of a second material solution on said first device layer; the second material solution comprising second device layer material dissolved in a solvent. Prior to solution printing of the second device layer, a barrier interlayer is added onto the first layer for being arranged in between said first and said second device layer. The barrier interlayer comprises an interlayer material insoluble to said solvent, and arranged for enabling electric interaction between the first and second device layer. The invention further provides a semiconductor element. | 2015-10-08 |
20150287926 | ORGANIC EL DISPLAY UNIT, METHOD OF MANUFACTURING THE SAME, INK, AND ELECTRONIC APPARATUS - An organic EL display unit includes a first organic EL device including a first light-emitting layer that emits first color light and a second organic EL device including a second light-emitting layer that emits second color light of a shorter wavelength than the first color light. The first light-emitting layer includes, as a host material, a polymer material that does not emit the first color light or does not mainly emit the first color light, and includes, as a dopant, a low-molecular-weight material or a polymer material that emits the first color light. | 2015-10-08 |
20150287927 | ELECTROLUMINESCENCE ELEMENT - Disclosed is an electroluminescence element, wherein at least a first electrode, a light-emitting layer, and a second electrode may be laminated on a substrate in said order. In said element, the light-emitting layer may contain quantum dots, and an intermediate layer formed from a polymer containing nitrogen atoms may be formed between the first electrode and the light-emitting layer. | 2015-10-08 |
20150287928 | ASYMMETRIC MONOANTHRACENE DERIVATIVE, MATERIAL FOR ORGANIC ELECTROLUMINESCENT DEVICE AND ORGANIC ELECTROLUMINESCENT DEVICE UTILIZING THE SAME - Provided are an asymmetric monoanthracene derivative having a specific structure, a material for an organic EL device comprising the above asymmetric monoanthracene derivative and an organic EL device in which an organic thin film layer comprising a single layer or plural layers including a luminescent layer is interposed between a cathode and an anode, wherein at least one of the above organic thin film layers contains the asymmetric monoanthracene derivative described above in the form of a single component or a mixed component. Provided are an organic electroluminescent (EL) device having a high luminous efficiency and a long life, an asymmetric monoanthracene derivative which materializes the same and a material for an organic EL device. | 2015-10-08 |