41st week of 2012 patent applcation highlights part 24 |
Patent application number | Title | Published |
20120257395 | METHOD AND APPARATUS FOR RETROFITTING AN OPEN BULB LIGHTING FIXTURE - An open bulb fixture is a lighting fixture presenting a light bulb exposed and unprotected to an area around the light bulb. A light cover is a transparent or translucent cover protecting a light bulb while permitting light from the light bulb to pass through the light cover to the area around the light bulb. A method for protecting an open bulb lighting fixture includes positioning a light cover to the open bulb fixture. | 2012-10-11 |
20120257396 | GLASS BULB COVER AND A SOFT CORE ASSEMBLY CONNECTING THEREWITH - A positioning device for a drill tool contains a base including a groove to insert and limit the drilling tool; a fixing assembly disposed on the base so that the base is fixed on a workpiece; a pad mounted on a bottom end of the base so that its bottom end abuts against the workpiece tightly and including a receiving chamber mounted therein to correspond to the groove of the base, thereby a cool fluid is fed into the receiving chamber, and the drilling tool inserted in the limiting range is driven to have the drilling process so that during the drilling process, the pad surrounds the drilling tool and the desired drilling position on the workpiece, the receiving chamber is full of cool fluid to cool the drilling tool quickly and to prevent the cool fluid and clips from splash, thus prolonging a service life of the drilling tool. | 2012-10-11 |
20120257397 | ORGANIC LIGHT EMITTING DIODE LIGHTING APPARATUS - An organic light emitting diode lighting apparatus is disclosed. The apparatus includes: a light emitting panel including an organic light emitting diode, a receiver receiving the light emitting panel, a cover coupled with the receiver to cover a front edge of the light emitting panel, at least one permanent magnet disposed on the receiver or the cover, and at least one of electromagnet disposed on the receiver or the cover member. | 2012-10-11 |
20120257398 | OPTICAL MODULE - An object is to suppress precipitation and adhesion of an organotin compound in an optical module which is incorporated into an optical pickup device and so on. The optical pickup | 2012-10-11 |
20120257399 | LIGHTING DEVICE - A lighting device that comprises a light source unit, with light sources positioned upon a circuit substrate; an LCD panel illuminated by the light emitted from the light sources; a casing, and a diffusion member installed upon the casing. The circuit substrate is mounted so as to block the lower end aperture of the hollow portion. The diffusion member is mounted so as to block an upper end aperture of the hollow portion, which constitutes the opposite end of the hollow portion from the lower end aperture thereof. Radiation units are formed upon the casing to radiate heat caused by the light sources outside the casing. | 2012-10-11 |
20120257400 | VEHICULAR HEADLAMP - Provided is a vehicular headlamp that includes a light source unit, a reflector, a heat sink, a fixation frame fixed inside an external case of a lamp, a movable frame supported on the fixation frame to be movable in a vertical direction, a lens unit including a projection lens and a lens holder and supported on the movable frame to be movable in a horizontal direction, a first aiming operating shaft that performs optical axis adjustment, and a second aiming operating shaft that performs the optical axis adjustment. In particular, the lens unit moves in the horizontal direction and the vertical direction with respect to the fixation frame while a distance from a focus of light reflected by the reflector to the projection lens is constant, and the light source unit is fixed to the lamp housing while the heat sink is positioned outside the external case. | 2012-10-11 |
20120257401 | INTERIOR LIGHTING FOR A VEHICLE, METHOD FOR PROVIDING THE INTERIOR LIGHTING IN THE VEHICLE AND VEHICLE WITH THE INTERIOR LIGHTING - An interior lighting for a vehicle includes, but is not limited to a coupling-out zone for illumination of the vehicle interior, which includes, but is not limited to a lighting device. The lighting device includes, but is not limited to a light source that is configured to produce light and an optical fiber, into which the light can be coupled in or is coupled in. The optical fiber is configured to couple out the light extensively in the at least one coupling-out zone, and includes, but is not limited to an auxiliary lighting for producing an auxiliary light which is also configured for the illumination of the vehicle interior. The auxiliary lighting emits the auxiliary light starting from a side of the at least one optical fiber facing away from the vehicle interior in a trans-illumination zone through the optical fiber into the interior. | 2012-10-11 |
20120257402 | ILLUMINATION DEVICE FOR VEHICLE - An illumination device for a vehicle includes a light source and an inside handle well. The inside handle well has a lower wall, an upper wall, and an opening. The light source is arranged under the lower wall. The lower wall has a light exit portion configured such that light emitted from the light source exits therethrough and travels to an inside of the inside handle well. The upper wall has a light reflecting portion configured to reflect light exiting through the light exit portion and traveling upward in the inside handle well toward the inside handle. The opening is formed on the inner side of the interior of the vehicle. | 2012-10-11 |
20120257403 | ILLUMINATION DEVICE FOR A MOTOR VEHICLE AND MOTOR VEHICLE - An illumination device includes, but is not limited to at least one light-conductor plate and at least one light source. The at least one light-conductor plate includes, but is not limited to a first main surface and a first lateral surface. In addition, the at least one light-conductor plate includes, but is not limited to light-decoupling elements at least in a part region of the volume of the at least one light-conductor plate. The at least one light-conductor plate is arranged in an outer region of the motor vehicle and forms a decorative shaped part of the motor vehicle. Light of the at least one light source can be coupled into the at least one light-conductor plate via the first lateral surface and can be at least partially decoupled from the at least one light-conductor plate with the light-decoupling elements via the first main surface. | 2012-10-11 |
20120257404 | VEHICLE EXTERIOR MIRROR SYSTEM - A lighted exterior mirror system for a vehicle includes an exterior mirror assembly and a signal light disposed in the exterior mirror assembly. The signal light includes at least one light emitting diode. The signal light is configured to emit a light pattern and the light pattern is defined at least between a forward leading edge and a rearward leading edge. The forward leading edge of the light pattern forms a forward angle that is in the range of about zero degrees to about 45 degrees relative to the side of a vehicle equipped with the lighted exterior mirror system, and the rearward leading edge of the light pattern forms a rearward angle that is in the range of about zero degrees to about 15 degrees relative to the side of the equipped vehicle. | 2012-10-11 |
20120257405 | BACKLIGHT MODULE AND LIGHT GUIDE PLATE FIXTURE THEREOF - The present invention discloses a backlight module and a light guide plate (LGP) fixture thereof, wherein the LGP fixture comprises a LGP, a heat dissipation base and a plurality of clamps. The heat dissipation base is planar and correspondingly disposed below the LGP. The heat dissipation base is installed with the clamps on sides of the LGP. Each of the clamps has a bottom portion, and a retaining plate and at least one upright plate are vertically formed from the bottom portion. The upright plate and the retaining plate are clamped on the heat dissipation base, and the clamps are used to position the LGP. | 2012-10-11 |
20120257406 | LIGHT SOURCE DEVICE AND DISPLAY - A light source device includes: a light guide plate having a first internal reflection face and a second internal reflection face, and having one or more side faces; one or more first light sources applying first illumination light into the light guide plate; and a second light source disposed to face a surface, of the light guide plate, corresponding to the second internal reflection face, the second light source externally applying second illumination light to the second internal reflection face. One or both of the first and second internal reflection faces each have scattering regions allowing the first illumination light from the first light source to be scattered and to exit from the first internal reflection face to outside the light guide plate, each of the scattering regions being provided with one or more pass-through regions each allowing the second illumination light from the second light source to pass therethrough. | 2012-10-11 |
20120257407 | DOOR SILL LIGHTING FOR A MOTOR VEHICLE - A door sill lighting for a motor vehicle is described. The door sill lighting comprises an outer sill trim having a plurality of seamlessly interconnected layers. A partial region of an outer layer is transparent and cooperates with at least one light source. The partial region of the outer layer comprises edge sides and an optical fiber layer. The optical fiber layer has distributed light-scattering nanoparticles in its volume. Light from the light source can be coupled into an edge side of the optical fiber layer. | 2012-10-11 |
20120257408 | LIGHT GUIDE MEMBER, LIGHT GUIDE UNIT, LIGHT GUIDE PACKAGE, ILLUMINATION DEVICE AND DISPLAY DEVICE - In the present invention, a light guide member is provided that can locally control the amount of planar backlight and that is suitable for a thin illumination device. In the light guide member ( | 2012-10-11 |
20120257409 | FRONT LIGHT MODULE AND DISPLAY DEVICE USING THE SAME - A front light module, including: a light source; a light guide plate, having a first refractive index and having a side face close to the light source; and a plurality of pillar structures, having a second refractive index and being placed under the light guide plate, and the second refractive index is larger than or equal to the first refractive index. | 2012-10-11 |
20120257410 | LIGHT DIFFUSING SHEET AND BACKLIGHT USING SAME - A light diffusing sheet can include a diffusion layer. The diffusion layer has a surface profile that satisfies certain conditions. | 2012-10-11 |
20120257411 | LIGHT DIFFUSING SHEET AND BACKLIGHT USING SAME - A light diffusing sheet can include a diffusion layer. The diffusion layer has a surface profile that satisfies certain conditions. | 2012-10-11 |
20120257412 | OPTICAL PLATE, DISPLAY APPARATUS HAVING THE SAME, AND METHOD OF MANUFACTURING THE OPTICAL PLATE - A display apparatus includes a light source, a display panel and an optical plate between the light source and the display panel. The optical plate includes a supporting sheet, a first, a second and a third optical layer. The first optical layer is disposed on a bottom surface of the supporting sheet and has a plurality of first protruding portions on a bottom surface of the first optical layer and has a first refractive index. The second optical layer is disposed on the bottom surface of the first optical layer and covers the first protruding portions. The second optical layer has a second refractive index larger than the first refractive index. The third optical layer is disposed on a top surface of the supporting sheet and has a plurality of second protruding portions on a top surface and has a third refractive index smaller than the second refractive index. | 2012-10-11 |
20120257413 | SPREAD ILLUMINATING APPARATUS - A side-light type spread illuminating apparatus includes a light guiding plate; a light source arranged along a light entering face of the light guiding plate; a double-sided prism sheet arranged at a light emitted face side of the light guiding plate; and an optical member arranged at a back face side facing the light emitted face of the light guiding plate. The optical member includes a light absorption member allowing prevention of reflection of light that has been introduced into the optical member. | 2012-10-11 |
20120257414 | Display Device - Disclosed is a display device. The display device includes a light source, a light guide part to receive a light emitted from the light source, a light conversion member between the light source and the light guide part, and a spacer between the light source and the light conversion member. | 2012-10-11 |
20120257415 | PLANAR WHITE ILLUMINATION APPARATUS - In one aspect, an illumination structure includes a substantially non-fiber waveguide, which itself includes a discrete in-coupling region for receiving light, a discrete propagation region for propagating light, and a discrete out-coupling region for emitting light. | 2012-10-11 |
20120257416 | DISPLAY SWITCH UNIT FOR A VEHICLE AND METHOD FOR PRODUCING THE DISPLAY SWITCH UNIT - A display switch unit is provided for a vehicle comprising at least one first and one second light guide plate with first and second light sources disposed at the edges. The light guide plates have switch symbols and proximity sensors having sensor structures. The first light guide plate and the second light guide plate are disposed on one another. Respectively one sensor structure is assigned two switch symbols in both light guide plates. The material of the switch symbols is a plastic with light-sensitive nanoparticles, which is arranged distributed in the light guide plates in such a manner that under edge-side irradiation the switch symbols are visible illuminated in color and three-dimensionally in the light guide plates. | 2012-10-11 |
20120257417 | DISPLAY APPARATUS - A display apparatus includes a display panel, a light guide plate, a frame and an optical film disposed between the display panel and the light guide plate. The display panel is defined to have a display area and a non-display area adjacent to the display area. The frame surrounds the light guide plate, the optical film and the display panel. The frame includes a sidewall and a support structure extending from an inner surface of the sidewall to above the light guide plate. The support structure includes a light shielding part, a first support part configured to support the optical film. The light shielding part is connected to the first support part. A light-pervious area is formed between the light shielding part and the optical film. The first support part is under cover of the non-display area. | 2012-10-11 |
20120257418 | PROJECTION NIGHT LIGHT - Embodiments of the invention are directed to a projection night light for illuminating a user-selected area of a room with an aesthetic or decorative pattern of light. In particular, there is provided a projection night light, which includes a body shell, and a spherical turning unit operatively coupled to the body shell. The spherical turning unit includes a cavity and a slide having a pattern thereon. The projection night light further includes a light source arranged in the cavity of the spherical turning unit. The light source is configured to pass light through the pattern on the slide forming a patterned light. The spherical turning unit is configured to project and direct the patterned light into a user-selected area of a room. | 2012-10-11 |
20120257419 | COIL BOBBIN, COIL COMPONENT AND SWITCHING POWER SOURCE APPARATUS - To improve insulating properties of a coil winding having three turns. In a coil bobbin, insulation between mutually adjacent winding members of a first coil winding are achieved by a projecting section. Furthermore, the first coil winding and the second coil winding are insulated from each other by the flange section. Moreover, the projecting sections and the projecting sections are respectively provided in positions at either end when the first coil winding and the second coil winding are viewed in a direction perpendicular to the direction of the axis line. Consequently, even with coil windings having three turns, insulation between the windings is achieved by means of this coil bobbin, and furthermore, insulation is also achieved in the region outside the coil windings as viewed in a direction perpendicular to the axis line direction, thereby making it possible to improve the insulating properties without increasing the number of parts. | 2012-10-11 |
20120257420 | COIL BOBBIN, COIL COMPONENT AND SWITCHING POWER SOURCE APPARATUS - In a coil bobbin, a cover section is provided as a spacer section which abuts against a heat radiating section that functions as a heat radiating terminal of the first coil winding, from a direction following the axis line of the tubular section. Here, when performing heat radiation from the coil winding, since the cover section which abuts against the heat radiating terminal when the coil winding is fixed to the heat radiating object functions as an insulating member, then the radiation of heat from the coil winding is raised without increasing the number of parts. | 2012-10-11 |
20120257421 | INTEGRATED MAGNETICS WITH ISOLATED DRIVE CIRCUIT - A switch-mode power converter includes a power isolation transformer and a drive transformer having their various windings collectively wound on a magnetic core having a center leg and outer legs. A primary winding and one or more secondary windings of the power transformer are wound on the center leg, and first and second windings of the drive transformer are wound on an outer leg. A primary control circuit controls one or more primary switches to supply the input voltage to the primary winding. A secondary control circuit controls secondary switches connected between the secondary windings and a load. Another control circuit controls operation the primary and secondary control circuits based at least in part on a feedback signal. The drive transformer windings are further configured to provide isolation between the primary control circuit and the synchronous rectifier control circuit. | 2012-10-11 |
20120257422 | DC/DC CONVERTER AND ELECTRIC GENERATING SYSTEM USING SOLAR CELL HAVING THE SAME - Disclosed herein is an electric generating system using a solar cell, including: a DC/DC converter that converts output voltage generated from a solar cell into DC voltage and has a converter switching device; a snubber device that has a snubber switch clamping voltage applied to the converter switching device; and a control device that detects the voltage applied to the converter switching device and controls an operation of the snubber switch according to a detected voltage level applied to the converter switching device, thereby increasing the efficiency of the electric generating system using a solar cell while reducing switching loss and conduction loss. | 2012-10-11 |
20120257423 | SYSTEMS AND METHODS FOR ADAPTIVE SWITCHING FREQUENCY CONTROL IN SWITCHING-MODE POWER CONVERSION SYSTEMS - Switching-mode power conversion system and method thereof. The system includes a primary winding configured to receive an input voltage and a secondary winding coupled to the primary winding. Additionally, the system includes a compensation component configured to receive the input voltage and generate at least a clock signal based on at least information associated with the input voltage, and a signal generator configured to receive at least the clock signal and generate at least a control signal based on at least information associated with the clock signal. Moreover, the system includes a gate driver configured to receive at least the control signal and generate a drive signal based on at least information associated with the control signal, and a first switch configured to receive the drive signal and affect a first current flowing through the primary winding. | 2012-10-11 |
20120257424 | Limiting Peak Electrical Power Drawn by Mining Excavators - The maximum electrical power drawn from an electrical power source by a mining excavator comprising electric motors is reduced by supplying supplementary electrical power from an electrical energy storage unit. The input electrical power drawn by the mining excavator is cyclic. An upper limit is set for the electrical power drawn from the electrical power source. When the input electrical power drawn by the mining excavator exceeds the upper limit, electrical power is supplied by the electrical energy storage unit, such as an ultracapacitor bank. The ultracapacitor bank may be charged by the electrical power source during off-peak intervals. Electrical power generated by electrical motors operating in a regeneration interval may also be recaptured and stored in the electrical energy storage unit. | 2012-10-11 |
20120257425 | POWER CONVERTER - A power supplying section is an operation power supply for a switching element for an inverter, and one end on a low potential side is connected to one end of the switching element on a DC power supply line side. A boot capacitor is connected to one end of the switching element on a DC power supply line side, where the other end is electrically connected to one end of the power supply section on the high potential side. A diode is provided in a path extending from one end of the power supply section on the high potential side to the DC power supply line via the boot capacitor. The diode makes only the current, which is flowing from the power supply section to the boot capacitor, flow. | 2012-10-11 |
20120257426 | AC Adapter With Automatic Built-In Power Switch - The AC adapter with automatic built-in power switch comprises of an AC power supply circuit, an AC control circuit, and a monitoring circuit. The monitoring circuit further comprises of a standby power supply, a microcontroller, a circuit for device detection, and a current monitor circuit. The AC power supply circuit is electrically connected to the alternating current source and converts the alternating current to direct current for charging the rechargeable battery of an electronic device. The AC control circuit acts as a switch to turn the AC power supply on and off. The monitor circuit detects whether an electronic device is connected to the adapter and also whether the charging process is completed. | 2012-10-11 |
20120257427 | ACTIVE RECTIFICATION OUTPUT CAPACITORS BALANCING ALGORITHM - An active rectification system includes an active rectifier that converts an alternating current (AC) input to a direct current (DC) output. The active rectifier includes a plurality of switching devices and at least a first output capacitor and a second output capacitor connected at the DC output of the active rectifier. A controller includes a DC output regulation portion and an output capacitor balancing portion, wherein the DC output regulation portion monitors the DC output and in response generates control signals for regulating the DC output to a desired value. The output capacitor balancing portion monitors first and second output capacitor voltages associated with the first and second output capacitors, respectively, and generates an accumulated adjustment value that modifies the control signals provided by the DC output regulation portion to balance the first and second output capacitor voltages. | 2012-10-11 |
20120257428 | Power Supply Circuit Device - A power supply circuit device comprises a relay, a main rectifier circuit, a standby rectifier circuit, a standby power supply circuit and a main power supply circuit. The main rectifier circuit rectifies an AC voltage from an external power supply, and inputs the rectified voltage to the main power supply circuit. The relay is inserted in the power supply path from the external power supply to the main power supply circuit, and is turned off in standby mode to turn off the voltage supply to the main power supply circuit, so that power consumption can be reduced. Since the voltage turned off by the relay is an AC voltage before being rectified by the main rectifier circuit, shock applied to the relay when turned off can be reduced, thereby reducing likelihood of failure and improving reliability. | 2012-10-11 |
20120257429 | TWO-STAGE SINGLE PHASE BI-DIRECTIONAL PWM POWER CONVERTER WITH DC LINK CAPACITOR REDUCTION - DC link capacitance in a bi-directional AC/DC power converter using a full-bridge or H-bridge switching circuit can be greatly reduced and the power density of the power converter correspondingly increased by inclusion of a bi-directional synchronous rectifier (SR) DC/DC converter as a second stage of the power converter and controlling the second stage with a control loop having a transfer function common to both buck and boost modes of operation of the bi-directional SR DC/DC converter and a resonant transfer function to increase gain at the ripple voltage frequency (twice the AC line frequency) to control the duty cycle of the switches of the bi-directional SR DC/DC stage and controlling the duty cycle of the switches of the full-bridge or H-bridge switching circuit using a control loop including a notch filter at the ripple voltage frequency. | 2012-10-11 |
20120257430 | BOOTSTRAP GATE DRIVE FOR FULL BRIDGE NEUTRAL POINT CLAMPED INVERTER - In a neutral-point-clamped power inverter, gate drive circuit comprises four drive blocks providing bipolar DC signals to control switch gates. The first and third drive blocks are bootstrapped to the second and fourth. Inverter's neutral bus is commonly connected to the positive and negative DC buses through clamping capacitors. An arm of four serially-stacked-switches bridges DC buses. The switch arm midpoint is an output of the inverter. A first clamping diode connects the neutral bus to the first switch emitter; a second clamping diode connects the neutral bus to the third switch emitter. In one embodiment, a second switch arm mirrors the first, providing a second output; a second gate drive circuit mirrors the first. A bias circuit provides two reference voltages for the gate drive circuits. Three isolated DC sources provide signals that, when used by the gate drive circuit, result in seven isolated bipolar DC signals. | 2012-10-11 |
20120257431 | POWER SUPPLY APPARATUS - A power supply apparatus includes an inverter having output terminals; a first transformer that transforms alternating-current output from the output terminals; a second transformer that is connected to the output terminals in parallel to the first transformer, arranged on an opposite side of the first transformer with respect to a straight line passing through a center of the output terminals and extending perpendicularly to a plane including the output terminals, and transforms alternating-current power output from the output terminals; first conductive lines that connect the output terminals to both ends of the first transformer; and second conductive lines that connect the output terminals to both ends of the second transformer. An area of a first loop formed by the inverter, the first conductive lines, and the first transformer is equal to an area of a second loop formed by the inverter, the second conductive lines, and the second transformer. | 2012-10-11 |
20120257432 | USB AC Adapter with Removable USB Vehicle Power Adapter - The USB AC adapter with removable USB vehicle power adapter comprises of a housing with a slot that holds a removable vehicle power adapter. The housing has an alternating current plug adapted to be insertable into an alternating current source. The housing further encloses a universal serial bus. Power conversion circuits are enclosed in the housing to convert the 110V alternating current to both 5V and 12V direct currents. The 5V direct current is directed through the universal serial bus in the housing. The 12V direct current is directed to the slot that holds the removable vehicle power adapter. The removable vehicle power adapter is adapted to be removable from the housing and insertable into a vehicle's cigarette lighter socket and converts the 12V from the vehicle's direct current power supply to 5V direct current output through a universal serial bus. | 2012-10-11 |
20120257433 | MEMORY SYSTEM WITH DATA LINE SWITCHING SCHEME - A storage system includes a three-dimensional memory array that has multiple layers of non-volatile storage elements grouped into blocks. Each block includes a subset of first selection circuits for selectively coupling a subset of array lines (e.g. bit lines) of a first type to respective local data lines. Each block includes a subset of second selection circuits for selectively coupling a subset of the respective local data lines to global data lines that are connected to control circuitry. To increase the performance of memory operations, the second selection circuits can change their selections independently of each other. | 2012-10-11 |
20120257434 | CONFIGURABLE BANDWIDTH MEMORY DEVICES AND METHODS - Memory devices and methods are described, such as those that include a stack of memory dies and an attached logic die. Method and devices described provide for configuring bandwidth for selected portions of a stack of memory dies. Additional devices, systems, and methods are disclosed. | 2012-10-11 |
20120257435 | NON-SALICIDE POLYSILICON FUSE - The embodiments of methods and structures disclosed herein provide mechanisms of forming and programming a non-salicided polysilicon fuse. The non-salicided polysilicon fuse and a programming transistor form a one-time programmable (OTP) memory cell, which can be programmed with a low programming voltage. | 2012-10-11 |
20120257436 | SEMICONDUCTOR INTERGRATED CIRCUIT AND OPERATING METHOD THEREOF - A semiconductor integrated circuit includes a variable resistive element, a current supply unit and a control signal generating unit. The resistance of the variable resistive element is changed depending on current flowing therethrough. The current supply unit controls the current in response to a control signal. The control signal generating unit generates the control signal by sensing the change in the resistance of the variable resistive element. | 2012-10-11 |
20120257437 | SEMICONDUCTOR DEVICE - A semiconductor device includes first and second interconnects, a variable resistance element that may assume a first resistance value or a second resistance value in response to the current flowing therein, and second transistors connected between the first and second interconnects in series with each other on both sides of the variable resistance element, and a power supply circuit unit that delivers the power supply to a control electrode of the first transistor. The power supply circuit unit supplies the power of a first power supply when the variable resistance element is to make transition to the first resistance value and the power supply circuit unit supplies the power of a second power supply when the variable resistance element is to make transition to the second resistance value, thereby allowing transitioning of the resistance values of the variable resistance element | 2012-10-11 |
20120257438 | CONTEMPORANEOUS MARGIN VERIFICATION AND MEMORY ACCESS FOR MEMORY CELLS IN CROSS POINT MEMORY ARRAYS - Circuitry for restoring data values in re-writable non-volatile memory is disclosed. An integrated circuit includes a memory access circuit and a sensing circuit configured to sense a data signal during a read operation to at least one two-terminal non-volatile cross-point memory array. Each memory array includes a plurality of two-terminal memory elements. A plurality of the memory arrays can be fabricated over the substrate and vertically stacked on one another. Further, the integrated circuit can include a margin manager circuit configured to manage a read margin for the two-terminal memory elements substantially during the read operation, thereby providing for contemporaneous read and margin determination operations. Stored data read from the two-terminal memory elements may have a value of the stored data restored (e.g., re-written to the same cell or another cell) if the value is not associated with a read margin (e.g., a hard programmed or hard erased state). | 2012-10-11 |
20120257439 | MEMORY DEVICE AND SEMICONDUCTOR DEVICE USING THE SAME - A memory device whose speed at the time of operation such as writing or reading is high and whose number of semiconductor elements per memory cell is small is provided. The memory device includes a control unit, an arithmetic unit, and a buffer memory device. The buffer memory device stores data sent from a main memory device and/or the arithmetic unit, in accordance with an instruction from the control unit. The buffer memory device includes a plurality of memory cells. The memory cells each include a transistor including a channel formation region including an oxide semiconductor, and a memory element to which charge with an amount in accordance with a value of the data is supplied through the transistor. Further, a data retention time of the memory cell corresponding to a valid bit is shorter than a data retention time of the memory cell corresponding to a data field. | 2012-10-11 |
20120257440 | MEMORY ELEMENT AND SIGNAL PROCESSING CIRCUIT - An object is to provide a memory device for which a complex manufacturing process is not necessary and whose power consumption can be suppressed, and a signal processing circuit including the memory device. In a memory element including a phase-inversion element such as an inverter or a clocked inverter, a capacitor which holds data and a switching element which controls storing and releasing of electric charge in the capacitor are provided. For the above switching element, a transistor including amorphous silicon, polysilicon, microcrystalline silicon, or a compound semiconductor such as an oxide semiconductor in a channel formation region is used. The channel length of the transistor is ten times or more as large as the minimum feature size or greater than or equal to 1 μm. The above memory element is used for a memory device such as a register or a cache memory in the signal processing circuit. | 2012-10-11 |
20120257441 | MEMORY BIT REDUNDANT VIAS - An integrated circuit containing a memory array with memory bits and a differential sense amplifier for reading the logic state of the memory bits. The integrated circuit also contains redundant vias which are in the via path that couples a bitline to Vss. Moreover, an integrated circuit containing a FLASH memory bit with redundant vias in the via path from the bitline to Vss. | 2012-10-11 |
20120257442 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device having a read word line, a write word line and a sub-word driver operable to select the read word line using a main word signal and an inverse read block signal. The sub-word line selects the write word line using the main word signal and an inverse write block signal. The sub-word driver has a first inverter circuit using the main word signal as an input and outputting the read word line. The sub-word driver has a first transistor having a drain, a source, and a gate connected to the read word line, a low potential power source, and the inverse write block signal, respectively, and a second transistor having a drain, a source, and a gate connected to a power source terminal of the first inverter circuit, a power source, and the inverse write block signal, respectively, and can select the write word line. | 2012-10-11 |
20120257443 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE WITH REDUCED LEAKAGE CURRENT - The gate tunnel leakage current is increased in the up-to-date process, so that it is necessary to reduce the gate tunnel leakage current in the LSI which is driven by a battery for use in a cellular phone and which needs to be in a standby mode at a low leakage current. In a semiconductor integrated circuit device, the ground source electrode lines of logic and memory circuits are kept at a ground potential in an active mode, and are kept at a voltage higher than the ground potential in an unselected standby mode. The gate tunnel leakage current can be reduced without destroying data. | 2012-10-11 |
20120257444 | WRITE DRIVER CIRCUIT FOR MRAM, MRAM AND LAYOUT STRUCTURE THEREOF - A write driver circuit for a magnetic random access memory includes a memory cell array including a plurality of magnetic memory cells in which a pair of magnetic memory cells adjacent to each other in a direction of a bit line share a source line, and each magnetic memory cell is connected between the bit line and the source line. The write driver circuit includes a switching unit connected between a terminal for supplying a positive recording voltage and a terminal for supplying a negative recording voltage to selectively supply current generated by the positive recording voltage or the negative recording voltage to the bit line according to a write enable signal and a data signal. | 2012-10-11 |
20120257445 | NONVOLATILE MEMORY APPARATUS HAVING MAGNETORESISTIVE MEMORY ELEMENTS AND METHOD FOR DRIVING THE SAME - A semiconductor memory apparatus includes a source line, a first bit line disposed over the source line, a second bit line disposed under the source line, a first memory cell between the source line and the first bit line, and a second memory cell between the source line and the second bit line. | 2012-10-11 |
20120257446 | UNIPOLAR SPIN-TRANSFER SWITCHING MEMORY UNIT - A memory unit includes a magnetic tunnel junction data cell electrically coupled to a bit line and a word line. The magnetic tunnel junction data cell is configured to switch between a high resistance state and a low resistance state by passing a unipolar voltage across the magnetic tunnel junction data cell. A diode is electrically coupled between the magnetic tunnel junction data cell and the word line or bit line. A voltage source provides the unipolar voltage across the magnetic tunnel junction data cell that writes the high resistance state and the low resistance state. | 2012-10-11 |
20120257447 | MAGNETIC TUNNEL JUNCTION WITH COMPENSATION ELEMENT - A magnetic tunnel junction having a compsensation element is disclosed. The magnetic tunnel junction includes a reference element, and a compensation element having an opposite magnetization moment to a magnetization moment of the reference element. A free magnetic layer is between the reference element and the compensation element, and an electrically insulating and non-magnetic tunneling barrier layer separates the free magnetic layer from the reference element. The free magnetic layer includes Co | 2012-10-11 |
20120257448 | Multi-Cell Per Memory-Bit Circuit and Method - A write circuit is adapted to provide a same logical bit to each of a multitude of memory cells for storage. Each of the multitude of memory cells stores either the bit or a complement of the bit in response to the write circuit. A read circuit is adapted to receive the bits stored in the multitude of memory cells and to generate an output value defined by the stored bits in accordance with a predefined rule. The predefined rule may be characterized by a statistical mode of the bits stored in the plurality of memory cells. Storage errors in a minority of the multitude of memory cells may be ignored at the cost of lower memory density. The predefined rule may be characterized by a first weight assigned to bits 1 and a second weight assigned to bits 0. | 2012-10-11 |
20120257449 | High Density Magnetic Random Access Memory - A magnetic memory device that comprises a substrate, a memory cell including a magnetic tunnel junction which comprises a free ferromagnetic layer having a reversible magnetization direction directed perpendicular to the substrate, a pinned ferromagnetic layer having a fixed magnetization direction directed perpendicular to the substrate, and an insulating tunnel barrier layer disposed between the pinned and free layers, a first electrical circuit for applying a first current to a first conductor electrically coupled to the free layer to produce a bias magnetic field along a hard axis of the free layer, a second electrical circuit for applying a second current to a second conductor electrically coupled to the pinned layer to cause a spin momentum transfer in the free layer, wherein magnitudes of the bias magnetic field and spin momentum transfer in combination exceed a threshold and thus reverse the magnetization direction of the free layer. | 2012-10-11 |
20120257450 | METHODS AND DEVICES FOR MEMORY READS WITH PRECHARGED DATA LINES - Methods and devices for memory reads involving precharging adjacent data lines to a particular voltage for a read operation. During the operation, a data line associated with a selected memory cell is selectively discharged from the particular voltage depending upon the data value of the selected memory cell while the adjacent data line is maintained at the particular voltage. Various embodiments include the array architecture to facilitate precharging the adjacent pair of data lines to a particular voltage and maintaining the unselected data line at the particular voltage during a sensing phase of a read operation | 2012-10-11 |
20120257451 | NON-VOLATILE MEMORY WITH BOTH SINGLE AND MULTIPLE LEVEL CELLS - Memory arrays and methods of operating such memory arrays are described as having a memory cell operated as a single level cell interposed between and coupled to a select gate and a memory cell operated as a multiple level memory cell. In some embodiments, a memory array is described as including a number of select gates coupled in series to a number of memory cells operated as single level memory cells and a number of memory cells operated as multiple level memory cells, where a first select gate is directly coupled to a first memory cell operated as a single level memory cell interposed between and coupled to the first select gate and a continuous number of memory cells operated as multiple level memory cells. | 2012-10-11 |
20120257452 | NONVOLATILE MEMORY DEVICE AND METHOD OF DRIVING THE SAME - A nonvolatile memory device includes a plurality of memory blocks, and a pass transistor array transmitting a plurality of drive signals to a selected memory block among the plurality of memory blocks in response to a block select signal. The pass transistor array includes high voltage transistors including one common drain and two sources formed in one active region and one of the plurality of drive signals transmitted to the common drain is transmitted to different memory blocks through the two sources. | 2012-10-11 |
20120257453 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - A nonvolatile semiconductor memory device according to one embodiment of the present invention includes: a memory cell array and a control circuit. The control circuit executes a first reading operation and a second reading operation. The first reading operation is an operation of reading a threshold voltage set in the selected memory cell by setting a voltage between a control gate electrode and source of the selected memory cell to a first value. The second reading operation is an operation of reading a threshold voltage set in the selected memory cell by setting a voltage between the control gate electrode and source of the selected memory cell to a second value lower than the first value. When executing the second reading operation, the control circuit keeps a voltage of the control gate electrode of the selected memory cell to 0 or a positive value. | 2012-10-11 |
20120257454 | FLASH STORAGE DEVICE WITH DATA INTEGRITY PROTECTION - A flash storage device includes a power hold circuit including a double layer capacitor. A power source supplies power to the flash storage device and charges the double layer capacitor. The double layer capacitor supplies power for maintaining integrity of data during a data transfer occurring in the flash storage device when the power supplied by the power source is disrupted. Additionally, the flash storage device can inhibit subsequent data transfers until the power supplied by the power source is restored. | 2012-10-11 |
20120257455 | NONVOLATILE MEMORY DEVICES AND METHODS OF OPERATING NONVOLATILE MEMORY DEVICES - Methods of operating nonvolatile memory devices including a plurality of cell strings each having at least one ground selection transistor, a plurality of memory cells, and at least one string selection transistor, the operating methods including receiving a command and an address, determining a voltage applying time in response to the input command and address, and applying a specific voltage to memory cells of cell strings corresponding to the input address during the determined voltage applying time. | 2012-10-11 |
20120257456 | SEMICONDUCTOR MEMORY DEVICE AND DATA WRITE METHOD THEREOF - A semiconductor memory device includes a control circuit. The control circuit executes control to perform a verify operation with respect to only a lowest threshold voltage level of a memory cell at a time of a data write operation, and to skip the verify operation with respect to the other threshold voltage levels. The control circuit determines whether a verify pass bit number of the lowest threshold voltage level, which is counted by a bit scan circuit, is a prescribed bit number or more, and the control circuit further executes control, if the verify pass bit number is the prescribed bit number or more, to perform the verify operation with respect to only the lowest threshold voltage level and a threshold voltage level that is higher than the lowest threshold voltage level, and to skip the verify operation with respect to the other threshold voltage levels. | 2012-10-11 |
20120257457 | METHOD AND APPARATUS FOR PRE-CHARGING DATA LINES IN A MEMORY CELL ARRAY - Memories, pre-charge circuits, and methods for pre-charging memory are described. One such method includes providing a voltage to a data line and adjusting the voltage provided to the data line based at least in part on a voltage difference between a target voltage and a voltage of the data line being pre-charged. An example pre-charge circuit includes a voltage generator configured to generate an output voltage having a magnitude based at least in part on a reference voltage and a feedback signal, first and second drivers, and a voltage detector. The voltage detector is configured to determine a voltage difference between the reference voltage and a sample voltage of a data line coupled to the second driver and generate the feedback signal based at least in part on the difference. | 2012-10-11 |
20120257458 | NON-VOLATILE SEMICONDUCTOR DEVICE, AND METHOD OF OPERATING THE SAME - A non-volatile semiconductor device and a method for operating the same are disclosed, where the non-volatile semiconductor device includes a gate dielectric layer, a n-type floating gate, a coupling gate, a first n-type source/drain, a second n-type source/drain, a first contact plug and a second contact plug. The gate dielectric layer is formed on a p-type semiconductor substrate. The n-type floating gate is formed on the gate dielectric layer. The first n-type source/drain and the second n-type source/drain are formed in the p-type semiconductor substrate. The first and second contact plugs are formed on the first and second n-type source/drains respectively. The coupling gate consists essentially of a capacitor dielectric layer and a third contact plug, where the capacitor dielectric layer is formed on the n-type floating gate, and the third contact plug is formed on the capacitor dielectric layer. | 2012-10-11 |
20120257459 | MEMORY BUFFER FOR BUFFER-ON-BOARD APPLICATIONS - The present disclosure involves an apparatus. The apparatus includes a decoder that receives an input command signal as its input and generates a first output command signal as its output. The apparatus includes a register component that receives the input command signal as its input and generates a second output command signal as its output. The apparatus further includes a multiplexer that receives a control signal as its control input and receives both the first output command signal and the second output command signal as its data input, the multiplexer being operable to route one of the first and second output command signals to its output in response to the control signal. | 2012-10-11 |
20120257460 | METHOD FOR INDICATING A NON-FLASH NONVOLATILE MULTIPLE-TYPE THREE-DIMENSIONAL MEMORY - Circuitry and a method for indicating a multiple-type memory is disclosed. The multiple-type memory includes memory blocks in communication with control logic blocks. The memory blocks and the control logic blocks are configured to emulate a plurality of memory types. The memory blocks can be configured into a plurality of vertically stacked memory planes. The vertically stacked memory planes may be used to increase data storage density and/or the number of memory types that can be emulated by the multiple-type memory. Each memory plane can emulate one or more memory types. The control logic blocks can be formed in a substrate (e.g., a silicon substrate including CMOS circuitry) and the memory blocks or the plurality of memory planes can be positioned over the substrate and in communication with the control logic blocks. The multiple-type memory may be non-volatile so that stored data is retained in the absence of power. | 2012-10-11 |
20120257461 | METHOD OF TESTING A SEMICONDUCTOR MEMORY DEVICE - A method of testing a semiconductor memory device includes writing first data to a memory cell array in the semiconductor memory device, loading second data from the memory cell array onto a plurality of data pads of the semiconductor memory device, rewriting the second data to the memory cell array, and outputting test result data through one or more test pads. The first data is received from an external device through the one or more test pads, which correspond to one or more of the plurality of data pads. The test result data is based on the rewritten data in the memory cell array. | 2012-10-11 |
20120257462 | REPAIR METHOD AND INTEGRATED CIRCUIT USING THE SAME - An integrated circuit includes: a memory controller configured to determine whether a memory cell included in a semiconductor memory device is defective or not and extract a fail address having positional information of the defective memory cell, in a test mode; and a fail address storage unit configured to store the fail address. | 2012-10-11 |
20120257463 | DRIVER CIRCUIT - A driver circuit includes pull-up and pull-down drivers driven by separate pre-drivers operating between different voltage rails. Data signals driving the pull-up driver and the pull-down driver are synchronized, and the pull-up driver and the pull-down driver are coupled together to produce an output signal having a voltage swing based on both the pull-up driver and the pull-down driver. | 2012-10-11 |
20120257464 | SEMICONDUCTOR MEMORY AND SYSTEM - A semiconductor memory includes a real memory cull; a sense amplifier configured to amplify data read from the real memory cell in response to activation of a sense amplifier enable signal; a replica circuit including a plurality of replica units connected in series, each of replica units including a plurality of dummy memory cells connected in parallel, wherein one of dummy memory cells of one of replica units is accessed in response to data which is read from one of dummy memory cells of one of replica units of a prior stage; and an operation control circuit configured to activate a dummy access signal to access one of dummy memory cells of one of replica units of a first stage in response to a read command, and to activate the sense amplifier enable signal in response to data read from one of replica units of a last stage. | 2012-10-11 |
20120257465 | Non-volatile Memory Device With Plural Reference Cells, And Method Of Setting The Reference Cells - A non-volatile memory device has an array of non-volatile memory cells, a first plurality of non-volatile memory reference cells, with each reference cell capable of being programmed to a reference level different from the other reference cells; and a second plurality of comparators. Each of the comparators is connectable to one of the first plurality of non-volatile memory reference cells and to one of a third plurality of memory cells from among the array of non-volatile memory cells. | 2012-10-11 |
20120257466 | DUTY CYCLE DISTORTION CORRECTION - Correction of duty cycle distortion of DQ and DQS signals between a memory controller and a memory is corrected by determining a duty cycle correction factor. The duty cycle distortion is corrected by applying the duty cycle correction factor to the plurality of differential DQS signals. The duty cycle distortion is corrected across a plurality of differential DQS signals between the memory controller and the bursting memory. | 2012-10-11 |
20120257467 | MEMORY REPAIR ANALYSIS APPARATUS, MEMORY REPAIR ANALYSIS METHOD, AND TEST APPARATUS - A memory repair analysis apparatus that performs a repair analysis on a memory under test, comprising a row-oriented fail number storage section that stores the number of fail cells in each row; a column-oriented fail number storage section that stores the number of fail cells in each column; a row-weighting storage section that, for each row, stores the total number of fail cells in each column containing a fail cell included in the row; a column-weighting storage section that, for each column, stores the total number of fail cells in each row containing a fail cell included in the column; and a determining section that determines which of spare row regions and spare column regions are to replace the fail cells. | 2012-10-11 |
20120257468 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device includes a transmission line configured to transmit a fuse enable signal for performance of a repair operation; a first repair enable signal generation unit configured to receive the fuse enable signal through the transmission line and generate a first repair enable signal for performing a repair operation for a first bank; and a second repair enable signal generation unit configured to receive the fuse enable signal through the transmission line and generate a second repair enable signal for performing a repair operation for a second bank. | 2012-10-11 |
20120257469 | Leakage and NBTI Reduction Technique for Memory - In one embodiment, an integrated circuit includes a logic circuit and a memory circuit that includes multiple bit lines and bit line precharge circuits. The memory circuit may include level shifters for control signals generated from logic circuit inputs, including one or more level shifters that generate precharge enable signals to control the bit line precharge circuits. The level shifters for the bit line precharge circuits may also be controlled, during periods of time that the memory circuit is idle, by a control signal (FloatBL herein). If the FloatBL signal is asserted, the bit line precharge circuits may be disabled. In some embodiments, the FloatBL signal may also disable bit line bit line hold circuits on the bit lines. In some embodiments, when the memory circuit is exiting an idle state, the bit line precharge circuits may be enabled in a staggered fashion. | 2012-10-11 |
20120257470 | MICROFLUIDIC MIXER - Provided is a microfluidic mixing system comprising a loop system for transferring one or more fluids, wherein the loop system comprises a plurality of sub loops, each sub loop formed from one or more common channels shared with at least one other sub loop and completed by an outer channel portion that is not shared by any other sub loop, and wherein the outer channel portion of each sub loop comprises one or more valves such that the sub loop is capable of isolation from all other sub loops and each common channel comprises one or more valves such that the common channel is capable of isolation from the remainder of the loop system, and wherein one or more sub loops in the system comprise valves that are configured to enable peristaltic mixing. | 2012-10-11 |
20120257471 | BEATER ASSEMBLY AND KITCHEN APPLIANCE WITH A BEATER ASSEMBLY - A beater assembly ( | 2012-10-11 |
20120257472 | MEASUREMENT APPARATUS, MOVEMENT CONTROL METHOD, AND PROGRAM - Generally, as the time for mechanical scanning of an acoustic wave receiver increases, the load on an examinee also increases. The present invention provides the calculation of a target speed at which an acoustic wave receiver is caused to move for the measurement of an acoustic wave, using data of an emission period of pulsed light and data of an interval between target measurement positions in a subject being examined. In addition, the acoustic wave receiver is caused to move so as to reach an initial target measurement position at the target speed at a time when initial pulsed light for measuring an acoustic wave is emitted. After the target speed has been reached, the acoustic wave receiver is caused to move at a uniform speed which is equal to the target speed. | 2012-10-11 |
20120257473 | METHOD FOR OPERATING AN ELECTROMECHANICAL TRANSDUCER SYSTEM AND ELECTROMECHANICAL TRANSDUCER SYSTEM - For operating an electromechanical transducer system with at least one piezoelectric transducer element, if necessary at least one identification element and an electronic control unit, on the one hand, the wanted signals of a certain utility operating range defined by the frequency band and time window thereof, assigned to at least one piezoelectric transducer element, as well as, on the other hand, inquiry signals and response signals for the functional testing of the transducer system are transmitted via a line system with only one electrical signal line. | 2012-10-11 |
20120257474 | Method for seismic surveying using wider lateral spacing between sources to improve efficiency - A method for towing a marine seismic acquisition array in a body of water includes towing a plurality of laterally spaced apart sensor streamers behind a survey vessel in the water. A lateral spacing between adjacent streamers is represented by L. At least two laterally spaced apart seismic energy sources are towed behind the survey vessel. A lateral spacing between the at least two sources is represented by kL, wherein k is a constant and wherein k is at most equal to the number of streamers. | 2012-10-11 |
20120257475 | Optical Fiber Based Downhole Seismic Sensor Systems and Methods - Various optical fiber-based seismic monitoring system embodiments include a light source that drives an optical fiber positioned within a borehole. At least one light sensor analyzes Rayleigh backscattered light to obtain an acoustic signal for each of multiple points along the borehole. One or more processors operate to determine microseismic event direction, distance, and/or intensity based at least in part on phase information of said acoustic signals. The acoustic signal cross-correlations, semblances, or phase-sensitive similarity measures can be determined as a function of scanning direction to accurately determine the relevant microseismic event information. The optical fiber may be positioned in the cemented annulus of a cased borehole having a shape that extends along more than one dimension (e.g., an L-shaped borehole). | 2012-10-11 |
20120257476 | SEISMIC IMAGE ENHANCEMENT - A method can include accessing seismic data; providing a wave function that defines, at least in part, a correlation window length; generating local autocorrelation functions for the seismic data using the correlation window length; performing cross-correlations between the wave function and each of the local autocorrelation functions to provide local cross-correlation coefficient values; determining second derivatives of the local cross-correlation coefficient values to provide local second derivative values; and rendering the local second derivative values to a display. Various other apparatuses, systems, methods, etc., are also disclosed. | 2012-10-11 |
20120257477 | AMPLITUDE CONTRAST SEISMIC ATTRIBUTE - A method for visualizing seismic data of a subterranean formation, including obtaining an estimated dip field of the subterranean formation, wherein the estimated dip field represents a measure of deviation of a stratigraphic layer from flat, extracting a matrix data item surrounding a voxel of the seismic data, wherein the matrix data item is extracted from the seismic data based on a value of the estimated dip field surrounding the voxel, generating modified seismic data by at least applying a matrix operator to the seismic data, wherein the matrix operator calculates a partial derivative of the seismic data using the matrix data item, and displaying the modified seismic data. | 2012-10-11 |
20120257478 | MEDICAL TRACKING CAP - The invention provides a container having a cap or lid including a tracking device for recording date, time, and elapsed time information, the container having opposite closed and open ends, and a cap able to be fixedly engaged with the open end of the container, the cap including a sensor for sensing closure of the container with the cap, and which initiates a digital display showing the time and day or opening and closing the container, and which tracks and displays the elapsed time since the container was last opened. | 2012-10-11 |
20120257479 | Electronic Timepiece and Control Method for an Electronic Timepiece - An electronic timepiece includes a reception unit that receives satellite signals transmitted from positioning information satellites; a time information generating unit that generates an internal time; an automatic reception processing unit that activates the reception unit when predefined conditions are met to perform automatic reception processing, and performs simple time correction processing including acquiring time information from satellite signals received from one of the satellites, and, based thereon, correcting the internal time; and a manual reception processing unit that activates the reception unit via operation of an external member to perform manual reception processing, and performs simple time or high precision correction processing to correct the internal time, the high precision time correction processing including acquiring time and satellite orbit information from satellite signals received from two or more of the satellites, calculating a position of the timepiece, and correcting the internal time using the time information and the position. | 2012-10-11 |
20120257480 | CHRONOGRAPH MECHANISM - The chronograph mechanism includes a control device and a chronograph gear train designed to be driven directly or indirectly by a barrel, this chronograph gear train including a second-counter mobile and a mobile with a first precision corresponding to a first fraction of a second. The chronograph mechanism also includes at least one indicator which displays the seconds and first fractions of a second of the duration measured. The chronograph gear train includes an additional mobile ( | 2012-10-11 |
20120257481 | TIMEPIECE - A timepiece includes a movement, a ring member, and an hour plate. Upward engagement convex portions of the ring member have contact parts placed near an outer peripheral surface of the ring member. The hour plate has a plurality of interposition portions and a plurality of convex portion accommodation grooves opened to the peripheral surface thereof. The interposition portions divide the convex portion accommodation grooves, come into close contact with the contact parts in the state of being elastically deformed, and interpose the engagement convex portions therebetween along a direction perpendicular to a radial direction of the ring member. The convex portion accommodation grooves are housed in the respective engagement convex portions, and the hour plate is attached to the ring member. | 2012-10-11 |
20120257482 | CASE FOR TIMEPIECE WITH MULTIPLE CONFIGURATIONS - A case for a timepiece, of the wristwatch type, comprises a middle, a back and attachment members for attachment to a bracelet. The back is attached to the middle to pivot between open and closed positions, to use the timepiece as a table clock when it is in the open position. A first attachment member allows the attachment of a chain to use the timepiece as a pocket watch, and a second attachment member comprises at least one recess arranged so that one bracelet end can be inserted therein, in the open position of the back, and locked by the back when it is closed. The invention also relates to the corresponding timepiece and to an assembly comprising such a timepiece associated with adapted bracelet and chain. Advantageously, the transition from any configuration of the timepiece to another configuration can be carried out without using a tool. | 2012-10-11 |
20120257483 | Magneto-Optical Switching Device And Method For Switching A Magnetizable Medium - The invention relates to a magneto-optical switching device for switching magnetization in a medium, comprising a magnetizable medium. According to the invention, a radiation system suited for imparting angular momentum to the magnetic spin system of said magnetizable medium, so as to selectively orient the magnetization of said medium. In addition, the invention relates to a method of switching a magnetizable medium, comprising providing a magnetizable medium; providing a radiation beam of a selectively chosen angular momentum; and targeting said radiation beam to said medium so as to transfer said angular momentum to a magnetic spin system of said magnetizable medium. Accordingly, spin states in magnetic materials can be manipulated using radiation of a suitable angular momentum. An effective magnetic field is generated for orienting the magnetization of the domains and can simultaneously be used to locally heat the material. | 2012-10-11 |
20120257484 | OPTICAL ELEMENTS AND INFORMATION STORAGE DEVICES INCLUDING THE SAME - An optical element and an information storage device including the same. The optical element may include an optical waveguide structure for transforming circularly polarized light into plasmon and transmitting the plasmon. The optical waveguide structure may emit a circularly polarized plasmonic field. The optical element may be used in an information storage device. For example, the information storage device may include a recording medium and a recording element for recording information on the recording medium, and the recording element may include the optical element. The information may be recorded on the recording medium by using the circularly polarized plasmonic field generated by the optical element. | 2012-10-11 |
20120257485 | METHOD OF, AND APPARATUS FOR, RECORDING ADDRESS INFORMATION TO DISC MEDIUM | 2012-10-11 |
20120257486 | REPRODUCING SYSTEM FOR MEDIUMS AND METHOD FOR IDENTIFYING DIGITAL DATA OF THE MEDIUMS AND REPRODUCING THE SAME - A method for identifying digital data and reproducing the same by executing a software program stored in a memory of a computer is disclosed. The method includes: reading a plurality of source mediums; identifying digital data of the plurality of source mediums; saving the digital data as a temporary file; receiving a request for selecting a target medium, wherein the target medium is used for storing the digital data of the plurality of source mediums; determining a quantity of the target medium to be used for writing according to the size of the digital data and the size of the target medium; and writing the digital data of the plurality of source mediums into the target medium. | 2012-10-11 |
20120257487 | OPTICAL DISC DRIVE - An optical disc drive according to the present invention includes: a laser light source | 2012-10-11 |
20120257488 | METHOD AND APPARATUS FOR READING FROM A NEAR-FIELD OPTICAL RECORDING MEDIUM, AND NEAR-FIELD LENS FOR THE APPARATUS - A method and an apparatus for reading from a near-field optical recording medium are described. The apparatus includes:
| 2012-10-11 |
20120257489 | RECORDING/REPRODUCING APPARATUS AND RECORDING/PRODUCING SYSTEM - A recording/reproducing apparatus includes an optical source and a near-field light generating unit. The near-field light generating unit includes two conductors facing to each other at a predetermined distance and generating near-field light between the two conductors by irradiation of light from the optical source. These two conductors are arranged so that a direction along which the two conductors face to each other is substantially in parallel with the longitudinal direction of a recording mark region. Here, the recording mark region is prepared from a predetermined recording material and having shape anisotropy when information is recorded on a recording medium on which the recording mark is independently formed. | 2012-10-11 |
20120257490 | Gratings For Waveguide Coupling - An apparatus includes a waveguide including a core layer and first and second cladding layers positioned on opposite sides of the core layer, a plurality of slots extending through the core layer and into the first and second cladding layers, a filler material in the slots, wherein the core has a first refractive index, the cladding layers have a second refractive index lower than the first refractive index, and the filler material has a third refractive index between the first and second refractive indices, and a light source positioned to direct light onto the slots. A data storage device that includes the apparatus is also provided. | 2012-10-11 |
20120257491 | Access Point Configuration Propagation - A method of access point configuration propagation includes receiving, at a controller, a connectivity request from a number of access points; with a master controller, creating a configuration for the access points; and sending configuration data based on the created configuration to a number of slave controllers. A master controller for propagating access point configurations within a wireless network system includes a processor that creates a configuration for each of a number of access points requesting connectivity within the wireless network system, and a data storage device that stores configuration data based on the created configuration in an access point configuration table. | 2012-10-11 |
20120257492 | DIGITAL RECEIVER AND CORRESPONDING DIGITAL TRANSMISSION SYSTEM SERVER - The present invention concerns a receiver and an error correction method at a receiver, comprising the steps of receiving data information from a broadcast network in a sequence of packets, detecting a first packet within the sequence of packets being a corrupted packet, identifying a packet identifier and a sequence number of the first packet, requesting, on a second network, to receive a transport packet identified with the sequence number and comprising the first packet and receiving the first packet embedded in the transport packet, from the second network. | 2012-10-11 |
20120257493 | COMMUNICATION APPARATUS, COMMUNICATION METHOD AND PROGRAM - A communication apparatus includes an error detection unit conducting error detection on N packet data units received in N transmission processes; a first transmission unit transmitting an affirmative response signal or a first retransmission request signal depending on a result of the error detection; a storage unit storing an affirmatively responding packet for forwarding to an upper layer; a second transmission unit, if affirmatively responding packets are not consecutive, determining whether a missing packet must be retransmitted and transmitting a second retransmission request signal; and a forwarding unit reordering the packet data units and forwarding the packets in the storage unit to the upper layer. | 2012-10-11 |
20120257494 | SIMULTANEOUS ACQUISITION OF A TD-SCDMA NETWORK IN CIRCUIT-SWITCHED FALLBACK FROM TDD-LTE SYSTEMS - In mobile user equipment (UE) configured to allow for operation on multiple wireless communication networks, such as on a TD-SCDMA network or on a TDD-LTE network, an improved method for handing over a circuit-switched call is offered. The proposed circuit-switched fallback procedure, employing an improved UE hardware architecture, allows for certain connection setup procedures to occur in parallel, such as the UE pre-acquiring the TD-SCDMA cell. The parallel operations thus speed up the circuit-switched fallback procedure and reduce existing delays in executing circuit-switched fallback from TDD-LTE to TD-SCDMA networks. | 2012-10-11 |