42nd week of 2015 patent applcation highlights part 44 |
Patent application number | Title | Published |
20150293742 | SCREEN SHARING SYSTEM, SCREEN SHARING METHOD, AND STORAGE MEDIUM - A screen sharing system includes information processing apparatuses that display the same content on their respective screens as a shared screen. Each of the information processing apparatuses includes an operation right switching unit configured to acquire an operation right, a transmission data generating unit configured to generate transmission data including operational information of an input operation, and a drawing unit configured to draw a display object on the screen. At a transmitting information processing apparatus with the operation right, the drawing unit draws the display object according to the operational information, and the transmission data generating unit generates the transmission data including the operational information and sends the transmission data to a receiving information processing apparatus without the operation right. At the receiving information processing apparatus, the drawing unit draws the display object according to the operational information in the transmission data received from the transmitting information processing apparatus. | 2015-10-15 |
20150293743 | WATERMARK LOADING DEVICE AND METHOD - A watermark loading device loads watermark to an original audio. The watermark loading device preprocesses the original audio to calculate a volume and a pitch of the original audio and saves the volume and the pitch as audio information of the original audio. The watermark loading device configures relevant parameters of watermark loading including a watermark loading intensity, a volume threshold and a pitch threshold used for choosing a target fragment of the original audio that is to be loaded watermark. The watermark loading device compares the audio information with the volume threshold and the pitch threshold to determine the target fragment and loads watermark for the target fragment according to the watermark loading intensity to get a watermarked audio. | 2015-10-15 |
20150293744 | REMOTE CONTROL APPARATUS, METHOD AND MULTIMEDIA SYSTEM FOR VOLUME CONTROL - Apparatuses, methods and systems are provided for controlling volume of a media system. A remote control is configured to control volume of a media unit and an external device simultaneously or consecutively. | 2015-10-15 |
20150293745 | TEXT-READING DEVICE AND TEXT-READING METHOD - A text-reading device includes: a visual line direction detection device for a driver; a memory that stores the visual line direction when the driver looks at a display device; a gaze determination device that determines that the driver gazes the display device when a state that the detected visual line direction coincides with the stored visual line direction continues for predetermined time or longer; a voice conversion device that outputs text information of the display device as a voice signal based on an instruction; and a reading control device that inputs the instruction when the driver gazes the display device while the display device displays the text information, and the vehicle starts to move. | 2015-10-15 |
20150293746 | METHOD AND SYSTEM FOR DYNAMICALLY GENERATING DIFFERENT USER ENVIRONMENTS WITH SECONDARY DEVICES WITH DISPLAYS OF VARIOUS FORM FACTORS - Exemplary embodiments of methods and systems that dynamically generate different user environments from a handheld device for secondary devices with displays of various form factors are described. In one embodiment, a method includes generating a user environment for the handheld device; auto-detecting a configuration of the secondary device over an interface; generating at least a part of a different second user environment based on the configuration of the secondary device; transmitting the second user environment over the interface; and displaying at least a part of the second user environment on the second display. | 2015-10-15 |
20150293747 | PROCESSING FIXED AND VARIABLE LENGTH NUMBERS - Embodiments of a processor are disclosed for performing arithmetic operations on variable-length and fixed-length machine independent numbers. The processor may include a floating point unit, and a logic circuit. The number unit may be configured to receive an operation, and first and second operands. Each of the first and second operands may include a sign byte, and multiple mantissa bytes, and may be processed in response to a determination that the operands are fixed-length numbers. The logic circuit may be further configured to perform the received operation on the processed first and second operands. | 2015-10-15 |
20150293748 | Random Number Generator and Method for Generating Random Numbers - A random number generator for generating random numbers using a solid-state memory is proposed. The random number generator includes a determination unit for determining management data stored in the solid-state memory and for managing the solid-state memory during operation. The random number generator also includes a computing unit for calculating a starting value on the basis of the determined management data. The random number generator also includes a generation unit for generating a random number on the basis of the calculated starting value. | 2015-10-15 |
20150293749 | SYSTEMS AND METHODS FOR CREATING APPLICATION INTERFACES FOR FORMING AND SOLVING PROBLEMS IN A MODELING SYSTEM - An apparatus for generating an application data structure includes a physical computing system comprising processor(s), input device(s), display(s), and memor(ies). The memory includes executable instructions that cause a processor to perform the acts of embedding a multiphysics model data structure for a physical system in an application data structure. Application features are determined to add to the application data structure. First data is added representing a form feature for the application features for the model of the physical system. Second data is added representing at an action feature for the application features. The second data is associated with at least one modeling operation to define a sequence of operations for modeling the physical system. The application data structure is updated including the added first and second data and the associating defining the sequence of operations. The updated application data structure is stored on the memory device(s). | 2015-10-15 |
20150293750 | Efficiently Representing Complex Score Models - Data is received that characterizes a score model. Thereafter, the score model is normalized by transforming it into a directed acyclic graph. The directed acyclic graph is then transformed into a structured rules language program. The structured rules language program is then transformed into a program using a concurrent, class-based, object-oriented computer programming language (e.g., JAVA, C, COBOL, etc.). Related apparatus, systems, techniques and articles are also described. | 2015-10-15 |
20150293751 | Adaptable and Extensible Runtime and System for Heterogeneous Computer Systems - A method for accelerating processing of program code in a heterogeneous system may be provided. It may include identifying at runtime a code region having an acceleration potential, creating a dependency graph of the program code, expanding the dependency graph based on a first set of predefined rules to generate variants of the code region, and determining segments within the variants based on a second set of predefined rules. The segments may be dedicated and assigned and compiled for use to/by a specific execution unit such that a cost function is minimized. | 2015-10-15 |
20150293752 | Unrestricted, Fully-Source-Preserving, Concurrent, Wait-Free, Synchronization-Free, Fully-Error-Handling Frontend With Inline Schedule Of Tasks And Constant-Space Buffers - A concurrent, wait-free compiler/compiler front-end for C/C++ and other programming languages, comprising parallel stages that carry out the steps of character translation, line translation, macro rewriting, lexing, parsing, and handling errors in input text and translating it to an object form, with features including (a) long lexenes, (b) display modifiers, (c) look ahead isolation, (d) line-by-line processing followed by tokenization, (e) complete error handlers, and/or (f) precise and inline context switches. | 2015-10-15 |
20150293753 | DEVICE AND METHOD FOR GENERATING APPLICATION PACKAGE - A method of a server and an electronic device are provided. The method includes receiving a package generated with an intermediate representation from a first electronic device; receiving build environment information on at least one third electronic device from a second electronic device; and generating an application package to be executed in the at least one third electronic device, based on the package or the build environment information. The electronic device includes a build unit configured to generate a Central Processing Unit (CPU-independent) binary and build information for CPUs involved in two or more third electronic devices; a package generation unit configured to generate a CPU-independent application package using the generated CPU-independent binary and the generated build information; and a package registration unit configured to transmit the generated CPU-independent application package to a server. | 2015-10-15 |
20150293754 | CONTROLLING EXECUTION OF BINARY CODE - An apparatus for controlling an execution of a binary code by multiple threads includes a detection unit configured to detect an occurrence of modification of a first part that is a part of a first binary code by a self-modifying code; a specifying unit configured to specify a second part that is a part corresponding to the first part in a second binary code acquired by converting the first binary code, in response to detection of the occurrence of modification of the first part by the self-modifying code; and a correction unit configured to correct the second part such that a specific thread that executes the second part of the second binary code among the multiple threads causes an exception. | 2015-10-15 |
20150293755 | SYSTEM AND AUTOMATED METHOD FOR CONFIGURING A PREDICTIVE MODEL AND DEPLOYING IT ON A TARGET PLATFORM - Method and system for configuring a model and deploying it on a target. The method may include using a processing unit, automatically generating a plugin based on a statistical model, the plugin including variables and issue definitions extracted from the model; and deploying the plugin on a target platform. | 2015-10-15 |
20150293756 | Software Deployment and Control Method and System - In one aspect, a method of monitoring a computer apparatus by means of a management system via a network is provided, the method comprising: establishing a connection between the computer apparatus and the management system via the network, the computer apparatus being located at a first location and the management system being located at a second location remote from the first location; installing a controller and creating on the computer apparatus at least one virtual machine, the or each virtual machine being monitored by the controller; monitoring one or more characteristics of the computer apparatus and/or the or each virtual machine and generating monitoring results based on the characteristics; and reporting the monitoring results to the management system via the network. A corresponding system may also be provided. In one embodiment, characteristics of the computer apparatus include the state of the at least one virtual machine or the state of the one or more programs running within the at least one virtual machine and monitoring results include state information indicative of the state. In a second aspect, a method and system of establishing a connection between a computer apparatus and a management system via a network, and a corresponding controller for connecting a virtual machine to a network. In a third aspect, a method of configuring a virtual machine is provided. In a fourth aspect, a method of controlling data flow between one or more peripheral devices and a virtual machine on a computing apparatus is provided. | 2015-10-15 |
20150293757 | Dynamic Web Application Notifications Including Task Bar Overlays - Various embodiments provide a mechanism to allow end users to install web applications and websites onto their desktop. In accordance with one or more embodiments, client-side code can be utilized to allow developers associated with a website to define boundaries associated with user interaction, and have those boundaries enforced by a run-time engine. In at least some embodiments, developers can provide, through JavaScript code and/or HTML markup, various configurations for the creation of a start menu shortcut, navigation, and so-called jumplist integration. | 2015-10-15 |
20150293758 | Generating and Using Constraints Associated with Software Related Products - A computer implemented method and apparatus is provided for generating and using constraints that are associated with software programs or other software entities intended for use in a specified data processing system or environment. One embodiment is directed to a method that includes the step of extracting metadata pertaining to the one or more software programs from at least one database. The extracted metadata is selectively processed to generate a set of constraints that affect the use of the one or more programs in a specified environment, wherein such processing includes transforming the extracted metadata to provide the set of constraints in a prespecified constraint language. The method further comprises detecting a proposed action of a user that is associated with the one or more software programs, and determining whether the proposed action violates any constraint in the set. | 2015-10-15 |
20150293759 | Method and System for Upgrading Patching Software - Provided are a method and system for upgrading patching software for a communication device in which software on a forwarding plane is separated from software on a control plane and management plane. The method comprises: a version management process triggers an end of at least one old version process to be upgraded, and keeps data and data states of an upstream process and of a downstream process of the old version process unchanged; when the at least one old version process to be upgraded is successfully ended, the version management process triggers a start of a new version process; and, the upstream process and the downstream process assist the new version process to restore data and data states. The system comprises: a version management component and a data restoration component. | 2015-10-15 |
20150293760 | SELECTIVE MIGRATION OF VIRTUALIZED APPLICATIONS AND CONFIGURATION SETTINGS THEREOF - User configurations of an installed application are migrated by isolating them from a base application state of the installed application to generate a virtual application package. At runtime, a base virtual application package and a user configurations virtual application package are provisioned from a central repository and executed by the user. The resulting virtualized execution environment merges the application resources contained in the packages such that the user configurations override the base application to make available all of the user configurations. This technique may be used to preserve user configurations during migration of applications, or to maintain user-specific configurations for a particular application across different sessions of a user's virtualized desktop. | 2015-10-15 |
20150293761 | CLASSIFICATION AND DISPLAY OF CODE EXECUTION PROFILE DATA - Methods for classifying functions as belonging to a particular software system is disclosed. Various embodiments are also described that use and display the result of the function classification in various ways, regardless of whether the information was generated by any particular of the described methods. One example graph combines function membership data, time interval frame data, and call stack profile data in the form of an Icicle Graph. The Icicle Graph is then distorted into a Sunburst Graph, resulting in an overall Software System Sunburst Icicle Graph. | 2015-10-15 |
20150293762 | Smart Source Code Evaluation and Suggestion System - A method for s identifying program files within one or more programs that will likely require update to implement a proposed programming task is disclosed. A processor identifies a previous programming task that matches the proposed programming task. The processor also identifies a set of program files that were updated to implement the previous programming task. The processor then displays the set of program files or existing versions of the set of program files as program files that will likely require update for the proposed programming task. | 2015-10-15 |
20150293763 | DYNAMIC AND INTELLIGENT MULTI-TRIGGERED ITEM REVALIDATION BASED ON PROJECTED RETURN ON INVESTMENT - Provided are techniques for item revalidation based on projected Return On Investment (ROI). In response to one or more triggers, an amount of time that it would take to update an item and a return on investment of updating the item are estimated based on historical data for similar updates that have been made to at least one of the item and another item, and it is determined whether to update the item based on the estimated amount of time and the estimated return on investment. | 2015-10-15 |
20150293764 | METHOD AND SYSTEM TO COMPOSE AND EXECUTE BUSINESS RULES - The present disclosure relates to a computer-implemented method. The computer-implemented method includes composing, with a processor, a plurality of business rules, maintaining, with the processor, a rules repository to store the plurality of business rules, executing, with the processor, the plurality of business rules at runtime, and dynamically refreshing, with the processor, one or more packages and one or more classes by utilizing an OSGi framework. The plurality of business rules run on at least one of a communication device, a cloud platform and a data centre. The plurality of business rules implements a plurality of business rules functions. The rules repository is updated dynamically with a change in the plurality of business rules. The executing is performed after dynamically compiling the plurality of business rules in java to java classes having a byte code. The OSGi framework dynamically refreshes changed rules from a java byte code. | 2015-10-15 |
20150293765 | Vehicle Configuration Driven Loading of Software Parts - A system and method of loading software parts on a vehicle. Information identifying a desired software configuration for active software parts on the vehicle is received by a processor unit. The processor unit identifies a current software configuration of the active software parts on the vehicle. The processor unit determines a dataload plan for loading the software parts on the vehicle based on a difference between the desired software configuration and the current software configuration. The dataload plan identifies an order for loading the software parts on the vehicle. The dataload plan is used for loading the software parts on the vehicle to make the software parts active on the vehicle. | 2015-10-15 |
20150293766 | PROCESSOR AND METHOD - A processor includes a plurality of processing units prepared for processing an instruction to be implemented at a plurality of stages and corresponding to the respective stages, and controller controls the plurality of processing units such that a processing unit for a preceding stage consecutively performs processing of a plurality of instructions, and then a processing unit for a subsequent stage consecutively performs processing of the plurality of instructions for which processing by the processing unit for the preceding stage has ended. | 2015-10-15 |
20150293767 | ROTATING REGISTER FILE WITH BIT EXPANSION SUPPORT - A method and system for implementing rotating register files with bit expansion support may enable a plurality of register pointers, each with a respective increment value, to be implemented in a register file of a processor. The register pointers may correspond to different regions of the register file. Each region of the register file may have a different size. | 2015-10-15 |
20150293768 | COMPILING METHOD AND COMPILING APPARATUS - A compiling apparatus detects a plurality of branch instructions, each of which specifies execution of branch processing on the basis of a result of a comparison operation between integers and indicates the same jump destination, in a first code. The compiling apparatus converts the plurality of branch instructions into an instruction group having fewer branch instructions than the plurality of branch instructions by using logical and arithmetic instructions. The compiling apparatus generates a second code using the converted instruction group when the number of cycles of processing based on the converted instruction group is smaller than that based on the plurality of branch instructions. | 2015-10-15 |
20150293769 | APPLICATION IMPLEMENTATION METHOD AND APPARATUS - Application implementation methods and apparatus are described, which are used to implement a function of a target application without installation of the target function. An example method may include acquiring an installation package of the target application; generating a proxy interface for managing the target application; and dynamically loading, by the proxy interface, the installation package by using an operating parameter of a terminal, and starting an operation interface of the target application. | 2015-10-15 |
20150293770 | PERIPHERAL DEVICE, METHOD OF CONTROLLING PERIPHERAL DEVICE, FIRMWARE DOWNLOAD SYSTEM AND PROGRAM - A peripheral may include an identification information storage unit in which identification information of a download file can be stored; a program storage unit in which at least program data is stored and is overwritable; and a controller which controls overwriting of the program data. The download file may include at least the identification information or both the identification information and overwrite permission data. When said overwrite permission data is included, the controller may overwrite the program data with program data sent from the host device and return a response indicating a normal completion of data overwrite. When overwrite permission is not included in the download file, the controller may return a response of a normal completion of said data overwrite without overwriting said program data. The identification information of the download file may be stored in the identification information storage unit. | 2015-10-15 |
20150293771 | SPECIFYING USER DEFINED OR TRANSLATOR DEFINITIONS TO USE TO INTERPRET MNEMONICS IN A COMPUTER PROGRAM - Provided are a method, system, and article of manufacture for specifying user defined or translator definitions to use to interpret mnemonics in a computer program. A mnemonic is processed in the computer program having a user defined definition and a translator definition. The mnemonic is interpreted according to the user defined definition in response to previously processing a mnemonic command specifying the mnemonic and the user defined definition. The mnemonic is interpreted according to the translator definition in response to previously processing a mnemonic command specifying the mnemonic and the translator definition. | 2015-10-15 |
20150293772 | VIRTUAL SWITCH AND VIRTUAL SWITCH PORT MANAGEMENT FOR VM AVAILABILITY - Techniques for virtual switch and virtual switch port management for VM availability in a cluster are described. In one example embodiment, a determination is made as to whether a virtual switch port on a first virtual switch associated with a first VM network is available for powering on the VM on a first host computing system. Based on the outcome of the determination either further determination is then made as to whether a virtual switch port on a second virtual switch associated with the first VM network is available to power on the VM on a second host computing system or migration of the VM in a power-off state is initiated to the second host computing system and powered-on on the second host computing system via the virtual switch port on the second virtual switch associated with the first VM network associated. | 2015-10-15 |
20150293773 | VIRTUAL MACHINES - A method for use in a computer network comprises a proxy separately establishing a connection with a virtual machine VM running on a first server and establishing a connection with a client to enable the client to access the VM on the first server. Upon the proxy detecting a disconnection with the VM on the first server, it obtains information of a current position of the VM from a management platform, and, once the proxy obtains the information, if the information indicates that the VM is running on a second server, the proxy establishes a connection with the second server based on the obtained information so as to enable the client to access the VM on the second server. | 2015-10-15 |
20150293774 | DATA PROCESSING SYSTEMS - A data processing system includes one or more processors that each execute one or more operating systems that include one or more applications; an accelerator that provides a shared resource for a plurality of the applications; a storage area accessible by the processors and the accelerator; and one or more input/output interfaces for control of, or the submission of tasks to, the accelerator. To initialise one of the input/output interfaces, one of the one or more processors is capable of sending a first signal to the accelerator; the accelerator is capable of writing one or more selected pieces of information representative of one or more capabilities of the accelerator to the storage area and sending a second signal to the processor; the processor is capable of reading the one or more selected pieces of information from the storage area; and the accelerator is capable of configuring the input/output interface. | 2015-10-15 |
20150293775 | DATA PROCESSING SYSTEMS - A data processing system comprises one or more processors that each execute one or more operating systems. Each operating system includes one or more applications. The system also comprises an accelerator that provides a shared resource for a plurality of the applications, an input/output module comprising one or more input/output interfaces for the submission of tasks to the accelerator, a hypervisor that manages the allocation of the input/output interfaces to the one or more operating systems and a storage area accessible by the hypervisor and the accelerator. The accelerator is capable of writing one or more selected pieces of information representative of one or more scheduling statistics of the accelerator periodically to the storage area without having received a request for the one or more selected pieces of information from the hypervisor. | 2015-10-15 |
20150293776 | DATA PROCESSING SYSTEMS - A data processing system includes one or more processors that each execute one or more operating systems. Each operating system includes one or more applications. An accelerator provides a shared resource for a plurality of the applications and has one or more input/output interfaces for the submission of tasks to the accelerator from an application. A hypervisor manages the allocation of the input/output interfaces to the one or more operating systems and a hypervisor interface enables communication between the hypervisor and the accelerator. The system is capable of being configured such that an operating system that has been allocated an input/output interface is capable of communicating with the accelerator via the input/output interface independently of the hypervisor. A memory management unit is capable of providing an isolated region of a memory for use by the operating system whilst the operating system retains its allocated input/output interface. | 2015-10-15 |
20150293777 | PROCESSOR EXTENSIONS FOR EXECUTION OF SECURE EMBEDDED CONTAINERS - Methods and apparatus relating to processor extensions for execution of secure embedded containers are described. In an embodiment, a scalable solution for manageability function is provided, e.g., for UMPC environments or otherwise where utilizing a dedicated processor or microcontroller for manageability is inappropriate or impractical. For example, in an embodiment, an OS (Operating System) or VMM (Virtual Machine Manager) Independent (generally referred to herein as “OI”) architecture involves creating one or more containers on a processor by dynamically partitioning resources (such as processor cycles, memory, devices) between the HOST OS/VMM and the OI container. Other embodiments are also described and claimed. | 2015-10-15 |
20150293778 | VIRTUAL DISPERSIVE NETWORKING SYSTEMS AND METHODS - A method for network communications from a first device to a second device includes communicating data from the first device to the second device by spawning a first virtual machine for a first network connection that virtualizes network capabilities of the electronic device, and using the virtualized network capabilities of the first virtual machine, transmitting a plurality of packets for communication to a first network address and port combination associated with the second device. The method further includes repeatedly changing to a respective another network address and port combination by repeatedly spawning a respective another virtual machine for a respective another network connection that virtualizes network capabilities of the electronic device, and using the virtualized network capabilities of the spawned respective another virtual machine, transmitting a plurality of packets for communication to the respective another network address and port combination associated with the second device. | 2015-10-15 |
20150293779 | CONTROLLER SYSTEM WITH PEER-TO-PEER REDUNDANCY, AND METHOD TO OPERATE THE SYSTEM - Exemplary controllers in a system are associated with technical entities and are configured to selectively execute tasks in a primary mode when the controllers interact with the associated technical entities with respect to the tasks, and to execute tasks in a secondary mode when the controllers do not interact with the associated technical entities with respect to the task. The system distributes task instructions of a first task to a first controller that is configured to execute the first task in the primary mode, and to distribute the task instructions of the first task to a second controller that is configured to execute the first task in the secondary mode. The system distributes task instructions of a second task to the second controller that is configured to execute the second task in the primary mode. | 2015-10-15 |
20150293780 | Method and System for Reconfigurable Virtual Single Processor Programming Model - A non-transitory computer-readable storage medium storing a set of instructions that are executable by a processor. The set of instructions, when executed by one or more processors of a multi-processor computing system, causes the one or more processors to perform operations including initiating a first processor of the multi-processor computing system with an operating system image of an operating system, the operating system image including a predetermined object map, initiating a second processor of the multi-processor computing system with the operating system image, placing a plurality of system objects with corresponding processors according to the predetermined object map, receiving a triggering event causing a change to the predetermined object map and relocating one of the system objects to a different one of the processors based on the change to the predetermined object map. | 2015-10-15 |
20150293781 | INFORMATION PROCESSING TERMINAL - An information processing terminal including an application execution portion, a sub-application execution portion and a hidden screen display portion is provided. The application execution portion executes an application. The sub-application execution portion executes a sub-application in response to an execution request from the application execution portion. The sub-application is configured to provide a specified function for the application executed by the application execution portion. The hidden screen display portion, instead of displaying an execution screen indicating execution of the sub-application, displays a hidden screen hiding the execution of the sub-application while the sub-application execution portion is executing the sub-application. | 2015-10-15 |
20150293782 | STORAGE MEDIUM STORING COMPUTER PROGRAM, INFORMATION PROCESSING SYSTEM, AND INFORMATION PROCESSING METHOD - A computer program, an information processing system, and an information processing method are capable of properly managing the connection state of communication connection with an external device. When an operating system shifts an application to a background state, the operating system provides the application with a background shift notification. In the case where communication connection, targeted for management, between the application and an external accessory system is in an active state, the application having received the background shift notification cuts off, via the operating system, the communication connection established between the application and the accessory system, and switches the state of the communication connection, targeted for management, to an inactive state. | 2015-10-15 |
20150293783 | SCHEDULING IDENTITY MANAGER RECONCILIATION TO EXECUTE AT AN OPTIMAL TIME - Provided are techniques for the scheduling of an identity Manager reconciliation at an optimal time. The techniques include partitioning a security identity management handling task into a First sub-task and a second sub-task; assigning to the first sub-task a first priority, based upon a first projected number of accounts affected by the first sub-task, a first attribute criteria, a first expected completion time, and a corresponding first scheduler index value, based upon the first priority; and assigning to the second sub-task a second priority, based upon a second projected number of accounts affected by the second sub-task, a second attribute criteria, a second expected completion time, and a second scheduler index value, based upon the second priority; and scheduling the first sub-task prior to the second sub-task in accordance with a prioritization algorithm in which a first weighted combination of the first priority and first expected completion time is greater than a second weighted combination of the second priority and the second expected completion time. | 2015-10-15 |
20150293784 | Model Driven Optimization of Annotator Execution in Question Answering System - Mechanisms are provided for scheduling execution of pre-execution operations of an annotator of a question and answer (QA) system pipeline. A model is used to represent a system of annotators of the QA system pipeline, where the model represents each annotator as a node having one or more performance parameters indicating a performance of an execution of an annotator corresponding to the node. For each annotator in a set of annotators of the system of annotators, an effective response time for the annotator is calculated based on the performance parameters. A pre-execution start interval for a first annotator based on an effective response time of a second annotator is calculated where execution of the first annotator is sequentially after execution of the second annotator. Execution of pre-execution operations associated with the first annotator is scheduled based on the calculated pre-execution start interval for the first annotator. | 2015-10-15 |
20150293785 | PROCESSING ACCELERATOR WITH QUEUE THREADS AND METHODS THEREFOR - Techniques related to a processing accelerator with queue threads are described herein. | 2015-10-15 |
20150293786 | METHOD FOR PROCESSING CR ALGORITHM BY ACTIVELY UTILIZING SHARED MEMORY OF MULTI-PROCESSOR, AND PROCESSOR USING THE SAME - A method for processing a CR algorithm by actively utilizing a shared memory of a multi-processor, and a processor using the same are provided. A processor includes: a first multi-processor configured to process a first group of elements of a matrix in accordance with an algorithm; a second multi-processor configured to process a second group of the elements of the matrix in accordance with the algorithm; and a third multi-processor configured to process a third group which comprises some of the elements of the first group, some of the elements of the second group, and some of the elements which are not comprised in the first group and the second group, in accordance with the algorithm. Accordingly, a TDM having many elements can be calculated fast. | 2015-10-15 |
20150293787 | Method For Scheduling With Deadline Constraints, In Particular In Linux, Carried Out In User Space - A method for scheduling tasks with deadline constraints, based on a model of independent periodic tasks and carried out in the user space by means of API POSIX is provided. | 2015-10-15 |
20150293788 | Scheduling of Global Voltage/Frequency Scaling Switches Among Asynchronous Dataflow Dependent Processors - Task execution among a plurality of processors that are configured to operate concurrently at a same global Voltage/Frequency (VF) level is controlled by using a global power manager to control VF switching from one VF level to another VF level, the same current VF level governing VF settings of each processor. Each of the processors controls whether it will wait for a VF switch from a current VF level to a next VF level prior to enabling execution of a next scheduled task for the one of the processors, with the decision being based on whether a current VF level is higher than the next scheduled VF level. The global power manager performs VF level switching at least based on a timing schedule, and in some but not all embodiments, also on whether all processors indicate that they are waiting for a VF level switch. | 2015-10-15 |
20150293789 | SYSTEM AND METHOD FOR PROVIDING OBJECT TRIGGERS - The present invention provides for systems and methods of dynamically controlling a cluster or grid environment. The method comprises attaching a trigger to an object and firing the trigger based on a trigger attribute. The cluster environment is modified by actions initiated when the trigger is fired. Each trigger has trigger attributes that govern when it is fired and actions it will take. The use of triggers enables a cluster environment to dynamically be modified with arbitrary actions to accommodate needs of arbitrary objects. Example objects include a compute node, compute resources, a cluster, groups of users, user credentials, jobs, resources managers, peer services and the like. | 2015-10-15 |
20150293790 | METHOD AND SYSTEM FOR DRIVING VIRTUAL MACHINE - Provided herein a method for driving a virtual machine, the method including providing a plurality of virtual machines and a virtual machine monitor configured to manage the plurality of virtual machines; generating, by the plurality of virtual machines, memory management information, that is information on memory being used by the plurality of virtual machines; and determining, by the virtual machine monitor, whether or not a virtual machine is a victim virtual machine from which memory needs to be retrieved or whether or not the virtual machine is a beneficiary virtual machine where memory needs to be allocated, based on the memory management information. | 2015-10-15 |
20150293791 | DATA PROCESSING WORK ALLOCATION - A method, system, and/or computer program product allocates computer processing work. One or more processors identify: an input data that is stored in a first computer for processing by a computer program; a virtual machine, stored in a second computer, that is capable of executing the computer program; a first set of constraint rules against moving the input data from the first computer; and a second set of constraint rules against moving the virtual machine from the second computer. The one or more processors assign a weight to each constraint rule, and sum the weight of all constraint rules that are applicable. In response to the first total constraint rule weight exceeding the second total constraint rule weight, movement of the input data from the first computer to the second computer is prohibited and the virtual machine is moved from the second computer to the first computer. | 2015-10-15 |
20150293792 | PICOENGINE MULTI-PROCESSOR WITH TASK ASSIGNMENT - A general purpose PicoEngine Multi-Processor (PEMP) includes a hierarchically organized pool of small specialized picoengine processors and associated memories. A stream of data input values is received onto the PEMP. Each input data value is characterized, and from the characterization a task is determined. Picoengines are selected in a sequence. When the next picoengine in the sequence is available, it is then given the input data value along with an associated task assignment. The picoengine then performs the task. An output picoengine selector selects picoengines in the same sequence. If the next picoengine indicates that it has completed its assigned task, then the output value from the selected picoengine is output from the PEMP. By changing the sequence used, more or less of the processing power and memory resources of the pool is brought to bear on the incoming data stream. The PEMP automatically disables unused picoengines and memories. | 2015-10-15 |
20150293793 | METHOD AND APPARATUS FOR PROVIDING A PREEMPTIVE TASK SCHEDULING SCHEME IN A REAL TIME OPERATING SYSTEM - Method and apparatuses are provided for providing preemptive task scheduling for a Real Time Operating System (RTOS). A two-level priority is assigned to each task that is created. The two-level priority includes a kernel priority and a user-defined priority. A priority bitmap corresponding to the kernel priority is created. A priority bit in the priority bitmap is enabled. The priority bit indicates a status of a respective task | 2015-10-15 |
20150293794 | PROCESSING METHOD FOR A MULTICORE PROCESSOR AND MULTICORE PROCESSOR - The present invention relates to a multicore processor | 2015-10-15 |
20150293795 | METHOD OF SOA PERFORMANCE TUNING - Systems and methods of SOA performance tuning are provided. In accordance with an embodiment, one such method can comprise monitoring a plurality of processing stages, calculating a processing speed for each of the processing stages, and tuning a slowest processing stage of the plurality of processing stages. | 2015-10-15 |
20150293796 | PROGRAMMABLE LOGIC CONTROLLER AND EVENT-DRIVEN PROGRAMMING METHOD THEREOF - The present invention provides an event-driven programming method of programmable logic controller (PLC), including: registering at least one event to be detected; storing at least one event handler segment corresponding to the at least one event to be detected respectively; detecting the occurrence of the at least one event to be detected; adding the detected event into an event queue; extracting events from the event queue; and executing the event handler segment corresponding to the extracted event. | 2015-10-15 |
20150293797 | METHODS AND SYSTEMS FOR KEY VALUE OBSERVING - Embodiments described herein relate to methods and systems for key value observing. One example embodiment accessing changes to properties of a virtual object during an event cycle. A first number of notifications for changes are also accessed during the event cycle, and changes to the properties are observed using a second number of key-value observing (KVO) instantiations. Properties are updated in a viewing level observable to a user, based on the second number of key-value observing instantiations and the various changes. | 2015-10-15 |
20150293798 | SELECTING OUTPUT DESTINATIONS FOR KERNEL MESSAGES - Methods, apparatus and computer program products implement embodiments of the present invention to identify, in a given kernel source code file for the operating system kernel, a given PRINTK function call having a corresponding message text, the given kernel source code file having a kernel source code file name, calculate a configuration checksum, to assign, add, and store the respective destination and a key comprising the configuration checksum, to load, receive, and identify the name of a given source code file, and to determine, based on the identified name and the text string, a computed destination for the system message by calculating, using the identified name and the text string, a message checksum, and identifying, in the configuration table, an entry having a key equal to the message checksum, and wherein the determined destination comprises the respective destination in the identified entry. in the identified entry. | 2015-10-15 |
20150293799 | REMOTE MONITORING SUPPORT APPARATUS - A remote monitoring support apparatus is connected to a control board; performs communication between a management server computer and the control board that controls operation of an elevator; receives a fault detection instruction that instructs transmission of information related to a state of the elevator and that is transmitted from the management server computer; outputs to the control board, an execution instruction for a fault detection operation according to the received fault detection instruction; obtains at least one among a signal output from the control board to an external destination in response to the output execution instruction for the fault detection operation, and a signal that is for alarm activation and output from the control board to notify the external destination of an abnormality that occurred at the elevator; generates notification information that is based on the obtained signal; and transmits the generated notification information to the management server computer. | 2015-10-15 |
20150293800 | ROBUST HARDWARE FAULT MANAGEMENT SYSTEM, METHOD AND FRAMEWORK FOR ENTERPRISE DEVICES - A robust hardware fault management system, method and framework for providing robust hardware fault management for enterprise devices are disclosed. In one example, hardware devices and associated hardware modules in each of the enterprise devices requiring the robust hardware fault management are identified. Further, error structures associated with each hardware module are determined and unique identifiers are assigned to the determined error structures. Furthermore, the error structures are modeled in a centralized repository. In addition, rules are associated with each modeled error structure for detecting hardware failures. Moreover, the rules of each modeled error structure are stored in the centralized repository using associated rule identifiers. | 2015-10-15 |
20150293801 | APPARATUS, SYSTEM AND METHOD FOR APPLICATION LOG DATA PROCESSING - The present disclosure relates to a log data processing apparatus and a method for controlling the same. A log data processing apparatus according to an embodiment includes a communication unit configured to receive information on log data corresponding to an application from a device for generating the log data, a control unit configured to generate a log message on a basis of the log data information, and a storage unit configured to store the log message and generation history information of the log message generated, wherein the log data information includes a log message parameter, message code information, and identifier information of the application. | 2015-10-15 |
20150293802 | PREDICTING ANOMALIES AND INCIDENTS IN A COMPUTER APPLICATION - A method for predicting anomalies in a computer application includes during runtime of the computer application, detecting traffic metrics and incident tickets associated with the computer application, the incident ticket indicating an incident might occur in the computer application; calculating a threshold based on absolute values of second order differences associated with the traffic metrics, wherein the threshold is such that when the absolute value of the second order difference associated with the traffic metrics exceeds the threshold, a recall rate R | 2015-10-15 |
20150293803 | Methods and Articles of Manufacture for Hosting a Safety Critical Application on an Uncontrolled Data Processing Device - Methods and articles of manufacture for hosting a safety critical application on an uncontrolled data processing device are provided. Various combinations of installation, functional, host integrity, coexistence, interoperability, power management, and environment checks are performed at various times to determine if the safety critical application operates properly on the device. The operation of the SCA on the UDPD may be controlled accordingly. | 2015-10-15 |
20150293804 | Methods and Articles of Manufacture for Hosting a Safety Critical Application on an Uncontrolled Data Processing Device - Methods and articles of manufacture for hosting a safety critical application on an uncontrolled data processing device are provided. Various combinations of installation, functional, host integrity, coexistence, interoperability, power management, and environment checks are performed at various times to determine if the safety critical application operates properly on the device. The operation of the SCA on the UDPD may be controlled accordingly. | 2015-10-15 |
20150293805 | Methods and Articles of Manufacture for Hosting a Safety Critical Application on an Uncontrolled Data Processing Device - Methods and articles of manufacture for hosting a safety critical application on an uncontrolled data processing device are provided. Various combinations of installation, functional, host integrity, coexistence, interoperability, power management, and environment checks are performed at various times to determine if the safety critical application operates properly on the device. The operation of the SCA on the UDPD may be controlled accordingly. | 2015-10-15 |
20150293806 | Direct Connect Algorithm - A system includes a safety relevant component that generates a data packet in response to receiving a request to perform a task and that communicates the data packet. The system further includes a first fail-safe chassis (FSC) that continuously generates a first and second chassis health signals, that determines whether the data packet is valid, and that selectively determines whether to de-assert the first and second chassis health signals based on the determination. The system also includes a second FSC that continuously generates a third a fourth chassis health signals, that determines whether a data packet is valid, and that selectively determines whether to de-assert the third and fourth chassis health signals based on the determination. The system includes a direct connect algorithm state machine that determines whether to instruct the one of the first and second FSCs to operate in a predetermined mode based on the chassis health signals. | 2015-10-15 |
20150293807 | DATA PROCESSING DEVICE, METHOD OF EXECUTION ERROR DETECTION AND INTEGRATED CIRCUIT - A data processing device provided with an error detection unit includes a processor arranged to support execution of an operation including a first sequence of instructions and execution of a second sequence of instructions implementing the operation, the first and second sequences of instructions generating, when in use, a first result and a second result, respectively. Configurable circuitry is also provided and arranged to support a repository to receive the first result and the second result following generation thereof. The configurable circuitry is configured as a function comparator unit arranged to compare the first and second results for consistency and to control further execution of the first implementation and the second implementation in response to a result of the comparison. | 2015-10-15 |
20150293808 | SOFT READ HANDLING OF READ NOISE - Aspects of the disclosure pertain to methods and systems that are configured to handle excessive read noise in soft read systems. In an implementation, a method includes determining a number of unexpected patterns of a soft read of a memory cell after a soft decoding failure. The method also includes determining whether the number of unexpected patterns is greater than a threshold number of unexpected patterns. When it is determined that the number of unexpected patterns is greater than the threshold number of unexpected patterns, the method at least one of: performing at least one more soft read of the memory cell with a larger read voltage spacing than an initial read that produced the soft decoding failure; and discarding a result of one or more soft reads of the memory cell and utilizing a remainder of results of respective other soft reads of the memory. | 2015-10-15 |
20150293809 | DATA STORING METHOD, MEMORY CONTROL CIRCUIT UNIT AND MEMORY STORAGE APPARATUS - A data storing method, a memory control circuit unit, and a memory storage apparatus are provided. The method includes recording a bit error count of every predetermined area of every physical erasing unit and determining whether the bit error count of one of the predetermined areas of the physical programming unit of the physical erasing unit is more than a threshold bit error count. If the bit error count of one of the predetermined areas of the physical programming unit of the physical erasing unit is more than the threshold bit error count, the method also includes storing data under a second programming mode after an erasing operation is performed on the physical easing unit. Accordingly, defective physical erasing units may be effectively employed to prolong the lifespan of the memory storage apparatus. | 2015-10-15 |
20150293810 | CONTENT ADDRESSABLE MEMORY WITH ERROR DETECTION - A content addressable memory (CAM) includes a first entry which includes one or more bits, a second entry which includes one or more bits, first comparison circuitry configured to compare each bit of a comparand to a corresponding bit of the one or more bits of the first entry and to provide a hit/miss indicator in response thereto, and second comparison circuitry configured to compare each bit of the one or more bits of the first entry to a corresponding bit of the one or more bits of the second entry and to provide a fault indicator in response thereto. | 2015-10-15 |
20150293811 | DECODING METHOD, MEMORY STORAGE DEVICE AND MEMORY CONTROLLING CIRCUIT UNIT - A decoding method, a memory storage device and a memory controlling circuit are provided. The decoding method includes: sending a read command sequence configured to read the memory cells, so as to obtain a plurality of first verification bits; executing a first decoding procedure according to the first verification bits, and determining whether a first valid codeword is generated; if the first valid codeword is not generated, sending another read command sequence configured to obtain a plurality of second verification bits; calculating a total number of the memory cells conforming to a specific condition according to the second verification bits; obtaining a channel reliability message according to the total number; and executing a second decoding procedure according to the channel reliability message. Accordingly, a correcting ability of decoding may be improved. | 2015-10-15 |
20150293812 | ERROR-CORRECTION CODING FOR HOT-SWAPPING SEMICONDUCTOR DEVICES - A memory read operation is directed at a group of semiconductor devices from which a first semiconductor device has been removed. An error in data for the memory read operation is detected based on error-correction coding (ECC). The error is caused at least in part by the first semiconductor device having been removed. ECC is used to determine corrected data for the memory read operation. | 2015-10-15 |
20150293813 | DECODING METHOD, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNIT - A decoding method, a memory storage device and a memory control circuit unit are provided, the decoding method includes: reading a plurality of memory cells according to hard decision voltage to obtain hard bit; performing a parity check procedure for the hard bit to obtain a plurality of syndromes; determining whether the hard bit has error according to the syndromes; if the hard bit has the error, updating the hard bit according to channel information of the hard bit and syndrome weight information corresponding to the hard bit. | 2015-10-15 |
20150293814 | METHOD FOR PROGRAMMING DATA, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNIT - A method for programming data, a memory storage device and a memory control circuit unit are provided. The method includes: receiving a writing command which instructs to write data to a logical address belonging to a logical programming unit; if a physical erasing unit of a physical programming unit which the logical programming unit is mapped to is a first type physical erasing unit, programming the data and a parity code corresponding to the data into the physical programming unit according to a first code rate; and if the physical erasing unit is a second type physical erasing unit, programming the data and the parity code corresponding to the data into the physical programming unit according to a second code rate. The first code rate is higher than the second code rate. Therefore, the lifespan of the physical erasing unit having a higher bit error rate may be extended. | 2015-10-15 |
20150293815 | PREDICTING STORAGE CAPACITY AND PERFORMANCE REQUIREMENTS OF A BACKUP SOLUTION - Techniques are described for predicting the storage capacity and performance requirements for deploying and maintaining a backup solution within an enterprise. In particular, a backup system is described which uses an initial pilot phase, during which the system can gather information about the files and data on each end user's device (i.e., client device) that will be backed up and provide a more realistic estimate and resource planning for the backup solution deployment. This initial pilot phase can be performed before any content is actually backed up from the client devices. | 2015-10-15 |
20150293816 | DATA PROCESSING METHOD AND APPARATUS - The present invention provides a data processing method and apparatus. The method is applied to a non-relational database, and includes: receiving a first query request sent by a client, where the first query request contains a queried object and a data acquiring mode; and scanning data in the queried object, and adding data obtained through scanning to the result set. | 2015-10-15 |
20150293817 | Secure Relational File System With Version Control, Deduplication, And Error Correction - A computer implemented method and a secure relational file system (SRFS) for storing and managing data for backup and restore are provided. The SRFS receives data, generates first metadata including file-to-sector mapping information, splits the data into fixed sized data chunks (FSDCs), generates second metadata including logical boundaries used for splitting, creates fixed sized data blocks by prepending the second metadata to the FSDCs, splits each FSDC into variable sized data chunks (VSDCs), generates third metadata including unique identifiers (UIDs) for the VSDCs, creates variable sized data blocks (VSDBs) by prepending the third metadata and the second metadata to each VSDC, identifies unique variable sized data chunks (UVSDCs) of the VSDBs using the UIDs, stores the UVSDCs in chunk files, and stores the first metadata, the second metadata extracted from the VSDBs, and storage locations of the UVSDCs with the third metadata of the UVSDCs and duplicate VSDCs in databases. | 2015-10-15 |
20150293818 | METHOD OF PROTECTED RECOVERY OF DATA, COMPUTER PROGRAM PRODUCT AND COMPUTER SYSTEM - A method of protected recovery of data stored in a backup computer system on a source computer system, wherein an access controller is provided that queries access information of a user group to access a recovery process, but prohibits access of the user group to the data stored in the backup computer system and prohibits general access of the user group to the source computer system per se, subject to write access if necessary to rewrite data onto the source computer system. The recovery process can be instigated by a user of the user group if the queried access information matches stored access information of the user group, wherein the instigated recovery process comprises a rewriting of selected data from the backup computer system into the source computer system. | 2015-10-15 |
20150293819 | METHOD AND SYSTEM FOR PROVIDING HIGH AVAILABILITY TO DISTRIBUTED COMPUTER APPLICATIONS - Method, system, apparatus and/or computer program for achieving transparent integration of high-availability services for distributed application programs. Loss-less migration of sub-programs from their respective primary nodes to backup nodes is performed transparently to a client which is connected to the primary node. Migration is performed by high-availability services which are configured for injecting registration codes, registering distributed applications, detecting execution failures, executing from backup nodes in response to failure, and other services. High-availability application services can be utilized by distributed applications having any desired number of sub-programs without the need of modifying or recompiling the application program and without the need of a custom loader. In one example embodiment, a transport driver is responsible for receiving messages, halting and flushing of messages, and for issuing messages directing sub-programs to continue after checkpointing. | 2015-10-15 |
20150293820 | DISTRIBUTED PERSISTENT MEMORY USING ASYNCHRONOUS STREAMING OF LOG RECORDS - Technologies for distributed durable data replication include a computing device having persistent memory that stores a memory state and an update log. The computing device isolates a host partition from a closure partition. The computing device may sequester one or more processor cores for use by the closure partition. The host partition writes transaction records to the update log prior to writing state changes to persistent memory. A replication service asynchronously transmits log records to a remote computing device, which establishes a replica update log in persistent memory. If the host partition fails, the closure partition transmits remaining log records from the update log to the remote computing device. The update log may be quickly replayed when recovering the computing device from failure. The remote computing device may also replay the replica update log to update a remote copy of the state data. Other embodiments are described and claimed. | 2015-10-15 |
20150293821 | HEALING CLOUD SERVICES DURING UPGRADES - Embodiments described herein are directed to migrating affected services away from a faulted cloud node and to handling faults during an upgrade. In one scenario, a computer system determines that virtual machines running on a first cloud node are in a faulted state. The computer system determines which cloud resources on the first cloud node were allocated to the faulted virtual machine, allocates the determined cloud resources of the first cloud node to a second, different cloud node and re-instantiates the faulted virtual machine on the second, different cloud node using the allocated cloud resources. | 2015-10-15 |
20150293822 | SYSTEMS AND METHODS FOR RECOVERING FROM UNCORRECTED DRAM BIT ERRORS - Systems, methods, and computer programs are disclosed for recovering from dynamic random access memory (DRAM) defects. One method comprises determining that an uncorrected bit error has occurred for a physical codeword address associated with a dynamic random access memory (DRAM) device coupled to a system on chip (SoC). A kernel page associated with a DRAM page comprising the physical codeword address is identified as a bad page. Recovery from the uncorrected bit error is provided by rebooting a system comprising the SoC and the DRAM device. In response to the rebooting, the identified kernel page is excluded from being allocated for DRAM operation. | 2015-10-15 |
20150293823 | High Availability Method and System for Improving the Utility of Physical Servers in Cloud Computing Resource Pool - A high availability method and system for improving utilization of physical servers in a cloud computing resource pool, wherein the method includes: when the physical servers in the cloud computing resource pool fail, judging whether idle memory on the normally-running physical servers can support running of virtual machines on all the failed physical servers; when the idle memory on the normally-running physical servers can support the running of the virtual machines on all the failed physical servers, restarting the virtual machines on all the failed physical servers on the normally-running physical servers. The embodiments of the present document improve the utilization of memory resource of physical servers. | 2015-10-15 |
20150293824 | PROCESSING A TARGET MEMORY - A method is suggested for processing a target memory, the method comprising the steps of (i) checking the target memory subsequent to an erase operation directed to the target memory; and (ii) replacing the target memory with a spare memory in case a defect is detected. | 2015-10-15 |
20150293825 | TEST DEVICE AND OPERATING METHOD THEREOF - A test device includes a circuit modelling portion suitable for generating one or more model circuits by modelling a test-object circuit with a one-to-one or a one-to-multi relationship between the test-object circuit and the model circuits, and a test operation portion suitable for synthesizing the model circuits and performing a test operation on the model circuits. | 2015-10-15 |
20150293826 | METHOD AND SYSTEM FOR HARDWARE IMPLEMENTATION OF UNIFORM RANDOM SHUFFLING - Methods and systems for hardware implementation of uniform random shuffling are disclosed. According to one aspect, a system for hardware implementation of uniform random shuffling includes multiple pseudo-random bit sequence (PRBS) generators, where each PRBS generator provides a pseudo-random sequence of numbers S and the next value in its pseudo-random sequence in response to receiving an output request. The system also includes selection logic for creating a sequence of output values O by repetitively selecting one of the plurality of modules according to a random selection function and sending an output request to the selected module, wherein the sequence of values O created from the output of the randomly selected modules comprises a uniform, randomly shuffled sequence. The probability that a PRBS generator will be selected is weighted based on the number N of pseudo-random values that have not yet been output out of L possible values in the sequence. | 2015-10-15 |
20150293827 | APPARATUS FOR ERROR SIMULATION AND METHOD THEREOF - The present invention relates to an apparatus for computing an error rate comprising: a first circuit interface being connected to a first sub-circuit receiving data and computing output data through a predetermined computation process; a second circuit interface and being connected to a first test circuit receiving the same data, which is inputted to the first sub-circuit, and computing output data through the predetermined computation process; an error injecting part injecting an error to the first test circuit; an error detecting part comparing output data of the first sub-circuit to output data of the first test circuit; and an error rate computing part computing input node error probability of the first sub-circuit by statistic processing of the compared result. The apparatus and method for computing error rate of the present invention is able to shorten the time required to obtain error probability, compared to the direct simulation of the full circuit. | 2015-10-15 |
20150293828 | TESTING APPARATUS, TESTING SYSTEM AND TESTING METHOD THEREOF - A testing apparatus, a testing system and a testing method thereof are provided. The testing apparatus is used to test at least one electronic apparatus. The testing apparatus includes a testing data transceiver and a processor. The testing data transceiver is coupled to functional circuits of the at least one electronic apparatus through connection interfaces and transports several testing data correspondingly to the functional circuits for testing the functional circuits to obtain several corresponding data. The processor receives the corresponding data and determines a product group of the at least one electronic apparatus according to the corresponding data. | 2015-10-15 |
20150293829 | METHOD AND APPARATUS FOR MONITORING GENERAL PURPOSE INPUT OUTPUT, GPIO, SIGNALS - An apparatus and method for monitoring general purpose input output, GPIO, signals at GPIO pins of a GPIO port of a system on chip, SoC. The apparatus comprises a first checksum generation unit adapted to generate a first checksum on the basis of GPIO bits stored in GPIO registers of the SoC, being connected via corresponding input output, IO, pad circuits to provide analog GPIO signals at the GPIO pins. A second checksum generation unit is adapted to generate a second checksum on the basis of the analog GPIO signals at the GPIO pins representing the GPIO bits. Checker logic is adapted to compare the first checksum generated by the first checksum generation unit with a second checksum generated by the second checksum generation unit. | 2015-10-15 |
20150293830 | DISPLAYING STORAGE PERFORMANCE INFORMATION - Virtual machine data records are obtained from a virtual system manager that manages one or more virtual machines. Storage data records are obtained from a storage controller. The virtual machine data records include one or more particular virtual machine data records relating to a particular virtual machine and identify a particular volume that is configured for use by the particular virtual machine. The storage data records including one or more particular storage data records that specify performance information associated with the particular volume. Based on information in the particular virtual machine data records and information in the particular storage data records, it is determined that the particular storage data records are related to the particular volume used by the particular virtual machine. Graphical user interface(s) displaying virtual machine information relating to the particular virtual machine in association with volume performance information relating to the particular volume are displayed. | 2015-10-15 |
20150293831 | PARAMETERIZED STATES IN SYMBOLIC EXECUTION FOR SOFTWARE TESTING - Methods and systems for symbolic execution of software under test include the use of parametric states to losslessly represent a group of concrete execution states. Mathematical abstractions may represent differences between execution states and may define a parametric constraint for a parametric state. The parametric states may be usable for symbolic execution to reduce an amount of memory resources consumed and/or reduce a computational load during symbolic execution. Using parametric states, a larger state space and more program behaviors may be testable using symbolic execution. | 2015-10-15 |
20150293832 | SYSTEM AND METHOD FOR LINKING DEBUGGING MESSAGE - The present invention relates to a system and method for linking a debugging message, and the system for linking a debugging message includes: a web development terminal for creating, if information which needs to be confirmed while developing a web program is input, a debugging message, outputting the debugging message on a debug window displayed in a predetermined area of a screen, and transmitting, if a magic number is input from a user through the debug window, a debugging message registration request signal including web development terminal identification information, the magic number and the debugging message to a service providing device; the service providing device for storing, if the debugging message registration request signal is received from the web development terminal, the debugging message. | 2015-10-15 |
20150293833 | SYSTEM AND METHOD FOR REVERSIBILITY CATEGORIES AND CHARACTERISTICS OF COMPUTER APPLICATION FUNCTIONS - Disclosed embodiments provide a system, machine-readable medium, and a method that may test computer application functions. A system provides for testing a computer application function by analyzing a testing characteristic of the computer application function information. Based on the analysis of the testing characteristic, the computer application function may be activated for testing in any one of a plurality of test environments. The test environment is selected according to the testing characteristic that indicates the effects that the testing of the selected computer application has on the test environment. This allows users to select a test environment based on the effects that it has on a test system. | 2015-10-15 |
20150293834 | Methods, Apparatus, and Computer Readable Media for Providing a Governance Framework for Declarative Rule Based Programming - A governance framework may be used to for developing software that may use a business process management platform (BPM), such as BPM software by Pega Systems. The governance framework may help to prevent software bugs. For example, the governance framework may prevent developers from checking in code that may have violations, bugs, and/or errors. The governance framework may ensure that code adhere to guardrails, for example, by monitoring developer activity and identifying potential issues. The governance framework may reduce defect rates for a software program that may be developed. For example, the governance framework may improve the quality of a software product while decreasing development time by catching potential defects. The governance framework may ensure that a development team creates software efficiently, for example, by providing a velocity report for the development team. The velocity report may show the performance of the development team. | 2015-10-15 |
20150293835 | SYSTEM ON CHIP AND VERIFICATION METHOD THEREOF - A verification method of a system on chip includes receiving a test generator and an exception handler; generating, by the test generator, a test program including an exception-causing instruction based on a test template; executing a first instruction at a first operating state as the test program is executed; stopping the execution of the test program and performing a fixed instruction sequence included in the exception handler when the exception-causing instruction is executed during the execution of the test program; and resuming the test program from a second instruction at a second operating state set after the fixed instruction sequence is performed, the second instruction corresponding to an address adjacent to an address of the exception-causing instruction. | 2015-10-15 |
20150293836 | CREATING SOFTWARE PERFORMANCE TESTING ENVIRONMENT BASED ON VIRTUAL MACHINE - A method for creating a software performance testing environment based on a virtual machine, wherein the method comprises: in response to obtaining a hard disk read/write request triggered by a virtual CPU of the virtual machine, notifying a virtual CPU scheduler to record a CPU time quota t1 already consumed by the virtual CPU in a current CPU schedule period; in response to detecting completion of hard disk read/write processing corresponding to the hard disk read/write request, predicting a hard disk read/write latency t corresponding to the hard disk read/write request in a target environment; notifying the virtual CPU scheduler to determine a CPU time quota already consumed by the virtual CPU in the current CPU schedule period based on the recorded CPU time quota t1 and the hard disk read/write latency t; and adjusting a system clock of the virtual machine based on the determined CPU time quota already consumed by the virtual CPU in the current CPU schedule period. The method may obtain, in the created software performance testing environment, a software performance testing result consistent with the result obtained under a highly configured server in the target environment. | 2015-10-15 |
20150293837 | RISK-BASED TEST COVERAGE AND PRIORITIZATION - A processor receives a rule containing a first set of code statements. The processor compares the first set of code statements of the rule to a second set of code statements of a plurality of code statements of source code. The processor responds to a match of the first set of code statements of the rule and the second set of code statements of the plurality of code statements of the source code, by applying a weight modifier to the rule, which adds a weighted value to the rule, and the processor, in response to a second matching of the first set of code statements of the rule to the second set of code statements of the plurality of code statements of the source code, applies the weight modifier to the rule, which includes a weighted value, and the weight modifier adjusts the weighted value of the rule. | 2015-10-15 |
20150293838 | ELECTRONIC DEVICE THAT COMPLETES EXECUTION OF TASK IMMEDIATELY, METHOD FOR MANAGING MEMORY, AND RECORDING MEDIUM - An electronic device includes a memory, a first-region allocating unit, and a second-region allocating unit. The first-region allocating unit allocates first regions in a region of the memory. The first regions are for execution of tasks. The second-region allocating unit allocates second regions in the first regions. The second region is to be actually used for execution of a task. If the first-region allocating unit has previously allocated a first region for a task identical in type to a new task as an execution target, the first-region allocating unit cancels allocation of a first region for the new task. When the allocation of a first region for the new task is cancelled, the second-region allocating unit allocates, in the first region for the task identical in type to the new task, a second region for the new task. | 2015-10-15 |
20150293839 | DATA EXCHANGE SYSTEM - A data exchange system including: a microprocessor; a non-volatile memory; a first communication channel linking the microprocessor to the non-volatile memory; a first supply channel configured to supply electrical energy to the microprocessor and to the non-volatile memory; a control device; a second communication channel through which an external device can exchange data with the non-volatile memory; a second supply channel configured to supply the control device and the non-volatile memory. | 2015-10-15 |
20150293840 | MEMORY CONTROLLER AND ASSOCIATED METHOD - A memory controller is arranged for controlling the process of writing a page data to a memory, wherein the page data possesses a logical address. The memory controller includes a page buffer, a data pattern detector and a logical-physical address mapping table. The page buffer is used for buffering the page data. The data pattern detector is coupled to the page buffer, and used to detect whether the page data is a predetermined pattern, to generate a data pattern flag, and determine whether to write the page data to a physical address of the memory according to the data pattern flag. The logical-physical address mapping table is coupled to the data pattern detector, and is arranged for storing the data pattern flag and the logical address of the page data, and selectively generating and storing the physical address. | 2015-10-15 |
20150293841 | EFFICIENT RECLAMATION OF PRE-ALLOCATED DIRECT MEMORY ACCESS (DMA) MEMORY - For efficient reclamation of pre-allocated direct memory access (DMA) memory in a computing environment, hot-add random access memory (RAM) is emulated for a general purpose use by reclamation of pre-allocated DMA memory reserved at boot time for responding to an emergency by notifying a non-kernel use device user that the non-kernel use device has a smaller window, stopping and remapping to the smaller window, and notifying a kernel that new memory has been added, wherein the new memory is a region left after the remap. | 2015-10-15 |