42nd week of 2008 patent applcation highlights part 19 |
Patent application number | Title | Published |
20080252342 | Charge pump for PLL/DLL - A charge pump for use in a Phase Locked Loop/Delay Locked Loop minimizes static phase error through the use of an operational amplifier. The operational amplifier also mitigates the effects of low power supply voltage. | 2008-10-16 |
20080252343 | DLL CIRCUIT - A DLL circuit has an input circuit configured to generate a synchronization reference signal on the basis of an input signal, a first delay unit configured to delay the synchronization reference signal, a timing offset circuit configured to adjust a synchronization position of the synchronization reference signal delayed by the first delay unit to generate a signal to be synchronized, a phase comparison circuit configured to compare phase of the synchronization reference signal with that of the signal to be synchronized, a first control circuit configured to select an output signal of the first delay unit on the basis of a comparison result of the phase comparison circuit, a second delay unit configured to delay the synchronization reference signal or the signal to be synchronized and a second control circuit configured to select an output signal of the second delay unit in the case where the comparison result of the phase comparison circuit is within a predetermined range. The phase comparison circuit compares the phase of the signal, which is either the synchronization reference signal or the signal to be synchronized, delayed by the second delay unit with the phase of the other signal. | 2008-10-16 |
20080252344 | TIMING VERNIER USING A DELAY LOCKED LOOP - A method for synchronizing a plurality of programmable timing verniers with a reference pulse signal, each of the verniers being programmable to one of a plurality of timing steps within a delay range determined by a control signal applied to a bias input. A first and second control vernier is selected from the plurality of verniers, the first control vernier is programmed to a first delay, and the second control vernier is programmed to a second delay. The first and second control verniers are triggered together to generate respective first and second delay signals. A difference pulse signal is generated with a duty cycle corresponding to a difference between the generated first delay signal and second delay signal. The duty cycle of the pulse signal is compared to a duty cycle of the reference pulse signal to generate a difference signal pulse. The difference signal pulse is coupled to the bias input of the verniers to adjust the delay range, such that the duty cycle of the difference signal approaches the duty cycle of the reference pulse signal. In one embodiment there is provided a circuit for implementing the method. | 2008-10-16 |
20080252345 | SYSTEM AND METHOD FOR GENERATING A RESET SIGNAL - Systems and methods are provided to generate a reset signal, such as to facilitate synchronization. In one embodiment, a system to generate a reset signal includes an offset generator that provides an offset clock signal having a frequency offset relative to a frequency of an input clock signal. A reset generator generates the reset signal in response to detecting a periodic phase shift between the offset clock signal and the input clock signal. | 2008-10-16 |
20080252346 | CIRCUIT HAVING A CLOCK SIGNAL SYNCHRONIZING DEVICE WITH CAPABILITY TO FILTER CLOCK-JITTER - A circuit having a clock signal synchronizing device with capability to filter clock-jitters is disclosed. One embodiment provides a delayed locked loop with capability to filter clock-jitter. Further, the invention relates to a clock signal synchronizing method with capability to filter clock-jitter. | 2008-10-16 |
20080252347 | DEVICE FOR DETECTING A TIMING OF AN EDGE - A device and method for detecting timing of an edge of a signal with respect to a timing of a predefined edge of a periodic signal is provided, wherein the edge defines a state change between a first state and a second state of the signal, and wherein the device can include: a phase-shift element to shift the phase of the signal relative to the phase of the periodic signal by a phase shift value at which the state change can be sensed at a point in time determined by the timing of the predefined edge; and a detection element to detect the timing of the edge relative to the timing of the predefined edge on the basis of the phase shift value. The phase-shift element can be an adjustable delay element for delaying the signal by an adjustable delay value as a phase shift value. | 2008-10-16 |
20080252348 | Apparatus and method for high speed signals on a printed circuit board - In some embodiments, an apparatus includes a printed circuit board substrate, a copper signal line disposed on the printed circuit board substrate, and a nonlinear transmission structure coupled to the copper signal line, wherein the nonlinear transmission structure is configured to sharpen a wavefront of a high speed signal pulse on the copper signal line. In some embodiments, the nonlinear transmission structure may include a voltage dependent dielectric layer on the printed circuit board substrate. In some embodiments, the voltage dependent dielectric layer may include a plurality of varactors positioned at a receiving end of the signal line. | 2008-10-16 |
20080252349 | DUTY CYCLE CORRECTING CIRCUIT - A duty cycle correcting circuit includes a duty ratio control signal generating block that detects a duty ratio of input clock signals and generates a duty ratio control signal comprising a plurality of bits, a power supply block that supplies a voltage to output nodes, and a signal processing block that controls voltage levels of the output nodes to correspond to voltage levels of the input clock signals in response to the plurality of bits of duty ratio control signals. | 2008-10-16 |
20080252350 | CIRCUIT AND METHOD FOR CORRECTING DUTY CYCLE - A circuit for correcting a duty cycle includes a duty ratio digital conversion block configured to output duty ratio information of an input clock signal as plural-bit digital signals, a duty ratio information analyzing block configured to analyze the duty ratio information of the input clock signal, generate edge control signals, and select any one of a plurality of delayed clock signals, and a duty ratio control block configured to control duty ratios of a selected delayed clock signal and the input clock signal in response to the edge control signals. | 2008-10-16 |
20080252351 | Generating a Pulse Signal with a Modulated Duty Cycle - Generating an output pulse signal (Y), which has an output signal period (T | 2008-10-16 |
20080252352 | System and Method for Using a DLL for Signal Timing Control in an eDRAM - The present invention discloses an embedded dynamic random access memory (eDRAM) comprising a clock signal, at least one delay-locked loop (DLL) circuit coupled to the clock signal and configured to generate a plurality of control signals each having a predetermined delay from the clock signal, and at least one DRAM array coupled to the plurality of control signals, wherein the DRAM array operates in a plurality of steps controlled by the plurality of control signals. | 2008-10-16 |
20080252353 | VOLTAGE MEASURING APPARATUS FOR SEMICONDUCTOR INTEGRATED CIRCUIT AND VOLTAGE MEASURING SYSTEM HAVING THE SAME - A voltage measuring apparatus for a semiconductor integrated circuit includes a first delay unit configured to delay a reference clock in a first region, a second delay unit configured to delay the reference clock in a second region and an analysis unit configured to analyze a difference in voltage level between the regions based on the phases of associated with the delayed clock signals generated by the first and second delay units. | 2008-10-16 |
20080252354 | OUTPUT CIRCUIT - An output circuit includes an output block and a predrive block for driving the output block based on an input signal. The predrive block has a clamp unit connected between the gate terminal of a first output transistor and the gate terminal of a second output transistor to limit the potential of the gate terminal of the first output transistor to a value of not more than a first potential and limit the potential of the gate terminal of the second output transistor to a value of not less than a second potential. | 2008-10-16 |
20080252355 | Super-Symmetric Multiplier - A circuit includes a multi-tanh cell having a common-emitter node to receive a bias current, and an extra transistor coupled to the common-emitter node to dynamically divert a portion of the bias current from the multi-tanh cell. The circuit may be arranged as a multiplier with an input network arranged to apply two or more input signals to the multi-tanh cell. A second multi-tanh cell with an extra transistor may be arranged in a feedback loop where the outputs of the first and second multi-tanh cells are coupled together at an integrating node. A buffer drives the final output and feedback cell to cancel nonlinearities in the multiplier cells. | 2008-10-16 |
20080252356 | SEMICONDUCTOR DEVICE - A semiconductor device is provided which has a driving circuit operable to drive a circuit that has a delay, the semiconductor device including: an auxiliary driving circuit operable to accelerate drive of the driving circuit, which receives a drive signal of the driving circuit as an input signal. | 2008-10-16 |
20080252357 | DEVICE SELECT SYSTEM FOR MULTI-DEVICE ELECTRONIC SYSTEM - A device select system according to one embodiment includes an array of first electrical contacts adapted for coupling to a cable; an array of second electrical contacts adapted for coupling to an array of transducers, there being more second electrical contacts than first electrical contacts each of the first electrical contacts being associated with at least two of the second electrical contacts; and a select mechanism for selectively placing each of the first electrical contacts in electrical communication with one of the second electrical contacts associated therewith. | 2008-10-16 |
20080252358 | Circuit and method for reducing charge injection and clock feed-through in switched capacitor circuits - A low charge injection, low clock feed-through switch ( | 2008-10-16 |
20080252359 | SWITCH CONTROL CIRCUIT FOR EXTERNAL HARD DISK - A switch control circuit includes a N-channel MOSFET, a first bleeder unit, a P-channel MOSFET and a second bleeder unit. The N-channel MOSFET has a first input terminal, a first output terminal and a first control terminal. The first output terminal is connected to ground. The first bleeder unit has a voltage-dividing function to the voltage from an input and output interface of a computer. The first bleeder unit is connected with the first control terminal and the first output terminal of the N-channel MOSFET. The P-channel MOSFET has a second input terminal, a second output terminal and a second control terminal. The second output terminal is connected to the working voltage terminal of the external hard disk. The second bleeder unit is connected between the external power supply and the first input terminal of the N-channel MOSFET. The P-channel MOSFET is connected with the first bleeder unit. | 2008-10-16 |
20080252360 | Temperature detector circuit and oscillation frequency compensation device using the same - A temperature detector circuit using a MOS transistor capable of reducing manufacture variation of a mobility and realizing stable output characteristics which are not affected by temperature dependency may be offered. In one example, the temperature detector circuit includes a pair of depression type transistors to output a voltage which is proportional to temperature from a connecting point of a sauce of a first transistor and a drain of a second transistor. The transistors are the same conducted type of current and are formed in different channel size, which are connected between power supplies in series, and have a configuration in which first transistor's gate and sauce are connected each other and a first transistor's drain is connected with a second power supply and second transistor's gate and drain are connected each other and a second transistor's sauce is connected with a first power supply. | 2008-10-16 |
20080252361 | ELECTRICAL FUSES WITH REDUNDANCY - The present disclosure provides an electrical fuse cell with redundancy features and the method for operating the same. The fuse cell includes a first set of electrical fuses having at least one electrical fuse contained therein, and a second set of electrical fuses having at least one electrical fuse for providing redundancy to at least one fuse of the first set, wherein if one of the first set of electrical fuses is defective, at least one of the second set of the electrical fuses can be programmed to provide a redundancy function of the defective fuse. | 2008-10-16 |
20080252362 | NEGATIVE VOLTAGE CONVERTER - A negative voltage converter includes six transistors. A first end and a control end of a first transistor are coupled to a signal input. A first end of a second transistor is coupled to the signal input, and a control end of which is coupled to a first clock and the first transistor. A first end of a third transistor is coupled to the signal input, a control end of the third transistor is coupled with a second clock and the second transistor. A first end of a fourth transistor is coupled to the second end of the third transistor, a control end of which is coupled with the first clock and the third transistor. A first end of a fifth transistor is coupled to the second end of the third transistor, and a control end of which is coupled with the second clock and the fourth transistor A first end of a sixth transistor is coupled to the second end of the third transistor, and a control end of which is coupled with the first clock and the fifth transistor. | 2008-10-16 |
20080252363 | Semiconductor Device and Electronic Appliance Using the Same - A semiconductor device with less power consumption and an electronic appliance using the same. The semiconductor device of the invention is supplied with a first potential from a high potential power source and a second potential from a low potential power source. Upon input of a first signal to an input node, an output node outputs a second signal. With the semiconductor device of the invention, a potential difference of the second signal can be controlled to be smaller than a potential difference between the first potential and the second potential, thereby power consumption required for charging/discharging wires can be reduced. | 2008-10-16 |
20080252364 | Reference Voltage Generator for Analog-To-Digital Converter Circuit - To mitigate kickback noise effect, the present invention provides a reference voltage generator for an analog-to-digital converter circuit. The reference voltage generator includes a bias generator, a bias converter and an output unit. The bias generator is used for generating a first bias voltage in accordance with a reference voltage. The bias converter is coupled to the bias generator and is used for converting the first bias voltage to a second bias voltage. The output unit is coupled to the bias converter and used for generating a first voltage to a load circuit in accordance with the second bias voltage. | 2008-10-16 |
20080252365 | APPARATUS AND METHOD FOR TUNING CENTER FREQUENCY OF A FILTER - A method for tuning a filter is provided. The method includes: enabling a VCO circuit, wherein at least a portion of the VCO circuit is selected from the filter; generating an oscillation signal by the VCO circuit according to a driving signal; comparing the oscillation signal with a reference signal and generating a comparison result; and adjusting the driving signal according to the comparison result. | 2008-10-16 |
20080252366 | Active Lc Band Pass Filter - An active LC band pass filter | 2008-10-16 |
20080252367 | Demodulator with Multiple Operating Modes for Amplitude Shift Keyed Signals - A demodulator for demodulating an amplified shift keyed (ASK) signal includes an envelope detector generating an envelope signal, a low-pass filter generating a filtered envelope signal, a switch coupled to disengage the low-pass filter in response to a first control signal, a comparator with hysteresis comparing the envelope signal and the filtered envelope signal. In operation, the switch is open or close in response to the first control signal to cause the demodulator to operate in one of multiple operation modes. In one operation mode, the demodulator uses a small capacitor to form a low-pass filter having a cut-off frequency equal to or greater than the bit-rate of the ASK signal and the demodulator receives an ASK signal having any coding pattern, including ASK signals having unequal number of 1's and 0's. | 2008-10-16 |
20080252368 | CIRCUIT AND METHOD FOR PROCESSING AN INPUT SIGNAL - Circuit for processing an input signal based on at least one reference signal, comprising a phase locked loop demodulator configured to receive a speed control signal and said input signal and further configured to follow a frequency and/or a phase of said input signal at a speed, wherein said speed depends on said speed control signal; and a reference signal detector configured to determine said at least one reference signal and to set said speed by outputting said speed control signal to said phase locked loop demodulator, wherein, if said reference signal detector detects said at least one reference signal, said reference signal detector decreases said speed. | 2008-10-16 |
20080252369 | Operational amplifier, line driver, and liquid crystal display device - An operational amplifier capable of offset cancel in a shorter period, as well as a line driver capable of shortening one horizontal period and a liquid crystal display device are provided. In the operational amplifier of the invention, a time necessary for feed back control can be shortened than usual by a constitution that an output voltage VO in one horizontal period H | 2008-10-16 |
20080252370 | Digital Audio Amplifier and Digital Audio Amplifying Method Therefor - A digital audio signal amplifier and a digital audio signal amplifying method therefor are provided. More particularly, a digital audio signal amplifier in which both safety and power efficiency are achieved by integrating a switching mode power supply and a digital audio amplifier into one, and a digital audio signal amplifying method appropriate to the amplifier are provided. The digital audio amplifier includes: a pulse modulation unit generating a pulse modulated audio signal by pulse-modulating an input audio signal; a switching unit switching a DC voltage based on the pulse modulated audio signal; an insulation transformer transforming the output of the switching unit and outputting the result of the transforming; and a low-pass filter obtaining an audio signal corresponding to the input audio signal by low-pass filtering the output of the insulation transformer, and outputting the output audio signal. By integrating a switching mode power supply and a digital audio amplifier into one, the digital audio amplifier satisfies the insulation requirement and at the same time increases power efficiency. | 2008-10-16 |
20080252371 | FEEDFORWARD AMPLIFIER - There is disclosed a feedforward amplifier for compensating for distortion produced in an amplifier. The feedforward amplifier controls the phase in a vector adjuster effectively. The feedforward amplifier has a first variable phase shifter PH | 2008-10-16 |
20080252372 | Power-MOSFETs with Improved Efficiency for Multi-channel Class-D Audio Amplifiers and Packaging Thereof - A stereo class-D audio system includes a first die including four monolithically integrated NMOS high-side devices and a second a second die including four monolithically integrated PMOS low-side devices. The audio system also includes a set of electrical contacts for connecting the high and low-side devices to components within the a stereo class-D audio system, the set of electrical contacts including at least one supply contact for connecting the drains of the high-side devices to a supply voltage (V | 2008-10-16 |
20080252373 | Low Flicker Noise Operational Amplifier - A low flicker noise operational amplifier comprises two circuit branches of the same topology and a plurality of current source pairs. For each current source pair, the two current sources are commutatively steered into the two circuit branches via two sets of differential pair in a manner controlled by a pair of complementary logical signal. | 2008-10-16 |
20080252374 | Amplifier and system utilizing the same - An amplifier structure is disclosed. The amplifier comprises a voltage source, a first amplifying unit and a second amplifying unit. The first amplifying unit is coupled to the voltage source to amplify a first input signal and a second input signal to generate a first amplified signal according to a bias current and a reference current. The second amplifying unit is coupled to the voltage source and the first amplifying unit to amplify the first input signal and the second input signal to generate a second amplified signal according to the bias current and the reference current, wherein the amplifier generates an output signal according to the first amplified signal and the second amplified signal. | 2008-10-16 |
20080252375 | Voltage-clamping device and operational amplifier and design method thereof - A voltage-clamping device used in an operational amplifier is provided. The operational amplifier comprises a first transistor. The cross-voltage between the gate and the source of the first transistor is near to a specific voltage and the cross-voltage between the drain and the source of the first transistor is not equal to zero, so as to generate a big substrate current. The voltage-clamping device comprises a second transistor whose source and gate are respectively coupled to the drain of the first transistor and used for receiving a bias signal, so that the second transistor is biased in saturation region, and the voltage at the source of the second transistor is made equal to the difference between the bias signal and the threshold voltage of the second transistor. Thus, the cross-voltage between the drain and the source of the first transistor is reduced and the substrate current is reduced accordingly. | 2008-10-16 |
20080252376 | METAL-OXIDE-SEMICONDUCTOR CIRCUIT DESIGNS AND METHODS FOR OPERATING SAME - Complimentary Metal-Oxide-Semiconductor (CMOS) circuits made with core transistors are capable of reliable operation from an IO power supply with voltage that exceeds the reliability limit of the transistors. In embodiments, biasing of an operational amplifier is changed in part to a fixed voltage corresponding to the reliability limit. In embodiments, switched capacitor networks are made with one or more amplifiers and switches including core transistors, but without exposing the core transistors to voltages in excess of their reliability limit. In embodiments, operational transconductance amplifiers (OTAs) include core transistors and operate from IO power supplies. Level shifters for shifting the levels of a power down signal may be used to avoid excessive voltage stress of the OTAs' core transistors during turn-off. Non-level shifting means may be used to clamp output voltages and selected internal voltages of the OTAs, also avoiding excessive voltage stress of the core transistors during turn-off. | 2008-10-16 |
20080252377 | Low noise amplifier having improved linearity - Embodiments of the present general inventive concept include a low noise amplifier and method with an improved linearity while reducing a noise disadvantage (e.g., increase). One embodiment of a low noise amplifier can include a first transistor to receive an input signal at a control terminal thereof, a second transistor having a first terminal coupled to a second terminal of the first transistor, an envelope detector to output a control signal corresponding to a characteristic of the input signal and an envelope amplifier to amplify the control signal to be applied to a control terminal of the second transistor. | 2008-10-16 |
20080252378 | Gain Adjustment for Programmable Gain Amplifiers - A programmable gain amplifier (PGA) circuit includes a gain adjust circuit and a gain select circuit that are both coupled to an output of an amplifier. The gain select circuit completes feedback to the amplifier while the gain adjust circuit is arranged to boost or cut the gain of the gain selection circuit. The gain adjust circuit can be arranged as a trim adjustment to the overall gain of the PGA circuit, where a different trim adjustment can be mapped to each gain setting such as from a look-up table. In other example implementations, the PGA circuit can periodically switch between multiple gain settings using a modulation scheme such that the overall gain is blended between the various gain settings according to a duty cycle, pulse-width, or delta-sigma modulation, with a time averaging effect on the overall gain of the PGA circuit. | 2008-10-16 |
20080252379 | High slew rate amplifier, analog-to digital converter using same, CMOS imager using the analog-to-digital converter and related methods - An amplifier, which may be used in a pipelined analog-to-digital converter, includes a first amplifier stage driving a second amplifier stage. At least one compensation capacitor is coupled to provide negative feedback through the capacitor from the second amplifier stage to the first amplifier stage. The slew rate of the amplifier is enhanced by substantially reducing the negative feedback coupled through the capacitor during a period following the transition of a signal applied to an input terminal of the amplifier. If the first stage of the amplifier has complementary signal nodes, the negative feedback coupled through the capacitor may be reduced, for example, by closing a switch coupled between first and second complementary nodes of the first amplifier stage. | 2008-10-16 |
20080252380 | Power Supply System - A power supply system comprises a parallel arrangement of a linear amplifier (LA) and a DC-DC converter (CO). An output of the linear amplifier (LA) is directly coupled to a load (LO) for supplying a first current (II) to the load (LO). The DC-DC converter (CO) has a converter output coupled to the load (LO) for supplying a second current ( | 2008-10-16 |
20080252381 | Transformer Circuit - A BALUN circuit ( | 2008-10-16 |
20080252382 | CLASS-F POWER AMPLIFIER CIRCUIT - An FET outputs a signal including a component of angular frequency ωo of input signal and harmonic components, a first two-terminal reactance circuit interconnects an output terminal and a ground terminal of the FET, a fundamental matching circuit is connected to an output terminal end of the FET, a second two-terminal reactance circuit is connected between an input terminal of the matching circuit and the output terminal, the FET has a parallel circuit of an output resistor and an output capacitor, the first two-terminal reactance circuit is open for a dc, shorted for angular frequencies 2ωo, 4ωo, . . . 2nωo, and parallel resonant with the output capacitor for angular frequencies 3ωo, 5ωo, . . . , (2n+1)ωo, and the second two-terminal reactance circuit is shorted for a dc, and open for angular frequencies 3ωo, 5ωo, . . . , (2n+1)ωo. | 2008-10-16 |
20080252383 | Phase locked loop and method for compensating temperature thereof - Embodiments of a phase lock loop and a method for compensating a temperature thereof can output an initial tuning digital value for a voltage controlled oscillator configured to output a desired phase lock loop frequency compensated according to a temperature change. Embodiments of a phase lock loop and a method for compensating a temperature thereof can simultaneously perform a digital coarse tuning and an analog fine tuning to compensate for a temperature in a limited time. | 2008-10-16 |
20080252384 | COST EFFECTIVE LOW NOISE SINGLE LOOP SYNTHESIZER - A low cost, low phase noise microwave synthesizer includes a DDS modulation circuit and a phase-locked loop. The DDS modulation circuit modulates the output of a DDS to a high frequency. The phase-locked loop downconverts the DDS output and locks the downconverted signal to a relatively low frequency, fixed reference. | 2008-10-16 |
20080252385 | Highly Sensitive Force/Mass Detection Method and Device Using Phase Synchronization Circuit - There are provided a highly sensitive force/mass detection method and device using a phase-locked loop, in which a phase noise of the mechanical element can be reduced using the phase-locked loop, by synchronizing a vibration signal of a mechanical element to an oscillation signal from a local oscillator which has a low phase noise and a high purity property. In the highly sensitive force/mass detection device using the phase-locked loop, an oscillation circuit of a mechanical vibrator | 2008-10-16 |
20080252386 | Quadrature-phase voltage controlled oscillator - A voltage controlled oscillator (VCO) is provided. The VCO may include a first ring oscillation circuit that may have a plurality of delay cells and may output first differential oscillation signals, and a second ring oscillation circuit that may have a plurality of delay cells and may output second differential oscillation signals. The delay cells of the first ring oscillation circuit may be respectively cross-coupled to the corresponding delay cells of the second ring oscillation circuit. Each of the delay cells may include a differential amplification circuit that may output a first differential signal based on a first control signal, and a negative resistance circuit that may be connected in parallel to a pair of output terminals of the differential amplification circuit, may receive a second differential signal, may adjust the phase of the first differential signal based on a second control signal, and may then output the first differential signal. | 2008-10-16 |
20080252387 | OSCILLATOR - There is provided an oscillator having first and second oscillating units ( | 2008-10-16 |
20080252388 | Oscillator and charge pump circuit using the same - The present invention provides a current-limited oscillator capable of performing stable operation even when it is driven with a low power-supply voltage, and a charge pump circuit using the oscillator. A current-limited oscillator has a delay section that includes a plurality of series-connected inverters to delay an output pulse on the basis of a current limiting level indication signal, and the oscillator further includes at least one first transistor that limits a first current between the inverters and a high potential power supply and at least one second transistor that limits a second current between the inverters and a low potential power supply, wherein at least one of the plurality of inverters is configured as a first inverter that is connected with the first transistor and is not connected with the second transistor, and at least another of the plurality of inverters is configured as a second inverter that is not connected with the first transistor and is connected with the second transistor. | 2008-10-16 |
20080252389 | SINE WAVE OSCILLATOR HAVING A SELF-STARTUP CIRCUIT - Disclosed herein is a sine wave oscillator. The sine wave oscillator includes an operational amplification unit, a first resistor, a first capacitor, a second capacitor, a second resistor, a third resistor, a fourth resistor, and a startup circuit. The first ends of the first resistor and the first capacitor are connected to the plus input terminal of the operational amplification unit. The first end of the second capacitor is connected to the plus input terminal. The first end of the second resistor is connected to the second end of the second capacitor and its second end is connected to the output terminal of the operational amplification unit. The first end of the third resistor is connected to the minus input terminal of the operational amplification unit. The fourth resistor is connected between the minus input terminal and the output terminal. The first end of the startup circuit is connected to the minus input terminal. | 2008-10-16 |
20080252390 | CRYSTAL OSCILLATOR CIRCUIT - A crystal oscillator circuit includes a capacitive load stage (C | 2008-10-16 |
20080252391 | Multi-phase interleaved oscillator - An oscillator for synchronizing and controlling a multi-phase, interleaved power supply system that has a plurality of power sources. The oscillator includes a first oscillator, having a pulse generator and a timing capacitor, and a second oscillator, having a pulse generator and timing capacitor, that are electrically coupled to one or more first power supplies and one or more second power supplies, respectively. The pulse generator of the first oscillator is electrically coupled to the second timing capacitor and the pulse generator of the second oscillator is electrically coupled to the first timing capacitor. Each of the pulse generators is structured and arranged to provide a synchronizing pulse to the other oscillator's timing capacitor when the voltage on its own timing capacitor is midway between a pre-determined maximum voltage threshold and a pre-determined minimum voltage threshold. | 2008-10-16 |
20080252392 | DISCRETE DITHERED FREQUENCY PULSE WIDTH MODULATION - A system is described for generating a discrete noise-shaped variable switching frequency signal that may be used to define a digital pulse width modulation (“PWM”) period. The system may define a switching frequency waveform that may be used to generate a current switching frequency signal as a function of a system clock. The system may quantize the current switching frequency signal to generate a discrete switching frequency signal that is realizable with the system clock. The system may detect quantization noise and input the noise into the current switching frequency signal to eliminate or reduce discrete tones at the switching frequencies of a PWM signal spectrum. | 2008-10-16 |
20080252393 | Balun circuit suitable for integration with chip antenna - A balun including a single-ended port, a differential port and first and second sets of coupled transmission line sections. Each set has three coupled transmission line sections. The signal carrying terminal of the single-ended port is connected to an inner end of a third coupled transmission line sections in one of the sets, and the terminals of the differential port are connected to a respective outer end of a respective first transmission line. The balun is fabricated in a multi-layer insulating substrate with the single-ended port located on an upper surface of the substrate and the differential port located on a lower surface of the substrate. The balun is suitable for connection to a chip antenna mounted on a common carrier substrate. | 2008-10-16 |
20080252394 | SURFACE ACOUSTIC WAVE DEVICE AND DUPLEXER - A surface acoustic wave device includes a supporting substrate, a LiTaO3 piezoelectric substrate joined on the supporting substrate, which has a normal line direction on a main surface thereof in a direction rotated 43° to 53° from a Y axis to a Z axis direction about an X axis, and an electrode pattern formed on the piezoelectric substrate. | 2008-10-16 |
20080252395 | Compact Coils for High Performance Filters - A coil structure for a filter device includes a first metallization deposited over a substrate and oriented in a first coil. The first coil extends horizontally across the substrate while maintaining a substantially flat vertical profile. A second metallization is deposited over the substrate and oriented in a second coil. The second coil is magnetically coupled to the first coil. A portion of the second coil is oriented interiorly of the first coil. A third metallization is deposited over the substrate and oriented in a third coil. The third coil is magnetically coupled to the first and second coils. A portion of the third coil is oriented interiorly of the second coil. | 2008-10-16 |
20080252396 | Electroacoustic Component - A component working with guided bulk acoustic waves includes a first substrate, a second substrate, and a layer system between the first and second substrates. The layer system includes a metal layer and a dielectric layer. A ratio of the acoustic impedance of the metal layer to the acoustic impedance of the dielectric layer is greater than or equal to 4.5. | 2008-10-16 |
20080252397 | BAW Resonator Filter Bandwidth and Out-of-Band Frequency Rejection - Embodiments of the present invention provide systems, devices and methods for improving both the bandwidth of a BAW resonator bandpass filter and the suppression of out-of-band frequencies above the passband. In various embodiments of the invention, blocker inductors are located in series between the filter input and the filter output to realize both bandwidth enhancement and improved out-of-band frequency rejection. For example, a first blocker inductor may be located at the input and a second blocker inductor may be located at the output of a BAW resonator bandpass filter. | 2008-10-16 |
20080252398 | BULK ACOUSTIC WAVE (BAW) FILTER HAVING REDUCED SECOND HARMONIC GENERATION AND METHOD OF REDUCING SECOND HARMONIC GENERATION IN A BAW FILTER - In a filter having a half-ladder structure comprising an alternating series of series branches and shunt branches, including a signal input and a signal output related to a common ground. at least one series branch or one parallel branch of the filter is configured as a BAW device comprising a first BAW resonator and a second BAW resonator connected either antiparallel or antiseries. The second harmonic emission generated by the first BAW resonator substantially cancels the second harmonic emission of the second BAW resonator and the second harmonic emission of at least one other series branch or one other parallel branch of the filter. By this method, the filter's second harmonic emissions are reduced. | 2008-10-16 |
20080252399 | PASSBAND RESONATOR FILTER WITH PREDISTORTED QUALITY FACTOR Q - A filter for processing an RF signal includes an input port and an output port and a plurality of resonators. The resonators are arranged in a sequentially-coupled arrangement between the input and output ports to affect an RF signal therebetween. Each resonator includes a cavity and resonant element. The resonant elements of at least two resonators are made of two different types of materials to effect higher and lower Q factors for the resonators. The resonators are arranged to provide at least one resonator having a lower Q factor proximate one of the input and output ports while the higher Q factor resonator is provided proximate the inside of the sequentially-coupled arrangement. | 2008-10-16 |
20080252400 | FILTER AND RADIO COMMUNICATION DEVICE USING THE SAME - A filter includes a resonant unit which has a plurality of resonators respectively formed of each microstrip line and connected in cascade with one another, and a coupling unit which has at least one inter-resonator coupling of the resonant unit in an area within a range of ±45° (⅛-wavelength) in an electrical length from a voltage maximum point at a intermediate of the microstrip line. | 2008-10-16 |
20080252401 | Evanescent Mode Resonator Including Tunable Capacitive Post - An evanescent mode resonator including a cavity formed in a substrate of semiconductor material. The resonator includes a capacitive post positioned within the cavity, and a tuning element positioned within the wall of the cavity proximate to the capacitive post, where a gap between the flexible element and the post sets the tuning of the resonator. | 2008-10-16 |
20080252402 | Split-coil magnet arrangement with improved mechanical construction - A magnet arrangement with a magnet coil system (M) with two coil systems (C, D) that are each arranged in a container (B | 2008-10-16 |
20080252403 | Actuator - The invention relates to an actuator comprising a leaf spring attached to a carrier in at least one point of attachment, means for providing a magnetic field and means for guiding the magnetic field so as to provide a magnetic flux loop. A movable part of the leaf spring is movable relative to the means for providing the magnetic field. The actuator further comprises a drive core attached to the movable part of the leaf spring, which is incorporated in the flux loop, for imparting the relative movement to the movable part. The drive core is so positioned that the magnetic properties of the flux loop are changed under the influence of said relative movement for gearing the magnetic force on the drive core and the spring force of the leaf spring to each other. | 2008-10-16 |
20080252404 | Superconducting Systems - This invention relates to methods and apparatus for magnetizing a superconductor, in particular to flux pumps, and to new types magnetized superconductor. A method of changing the magnetisation of a superconductor, the method comprising automatically controlling a magnetic field to generate a wave of changing magnetic flux travelling over a surface of said superconductor. | 2008-10-16 |
20080252405 | Magnet Arrangement for a Magnetic Levitation Vehicle - A magnet arrangement for a magnetic levitation vehicle is described. The magnet arrangement comprises a plurality of magnet poles ( | 2008-10-16 |
20080252406 | COIL COMPONENT - A coil component comprises: a core having a winding core portion, and a first flange and a second flange arranged at both ends of the winding core portion; a winding arranged in a region flanked by the first and second flanges, and wound so as to be in contact with the winding core portion; and a cover portion arranged in a region flanked by the first and second flanges, so as to cover the winding. The cover portion has a first cover portion comprising a resin cured product containing a magnetic material; and a second cover portion comprising a non-magnetic material. The second cover portion is interposed at least between the first flange and the first cover portion. | 2008-10-16 |
20080252407 | Multi-Layer Inductive Element for Integrated Circuit - According to one example embodiment, an inductive element is used for power-conversion applications. The inductive element includes a substrate ( | 2008-10-16 |
20080252408 | Coil Form for Forming an Inductive Element - The coil form according to the invention for forming an inductive element includes a hollow cylindrical mantle portion, two flange portions and a slit. The flange portions and the mantle portion form a winding chamber for winding therein a wire that forms a first winding or a part of a first winding of the inductive element. The coil form, which is completely made of copper, forms a second coil or a winding of a second coil of the inductive element. Due to the increased contact surface between the first and the second coil the heat dissipation capabilities and the magnetic coupling between the coils are increased. This in turn results in an increased power density of the inductive element. | 2008-10-16 |
20080252409 | Power transmission transformer for noncontact power transfer device - The present invention provides a power transmission transformer of which workability in implementing and reliability of connection are considered in a noncontact power transfer device using individual self-oscillation circuits. The power transmission transformer for a noncontact power transfer device including a transmitting coil L | 2008-10-16 |
20080252410 | RESISTOR STRUCTURE AND FABRICATING METHOD THEREOF - A resistor structure includes a substrate, a well of a predetermined conductive type positioned in the substrate, a gate structure positioned on the substrate, a first doping region of the predetermined conductive type positioned at a first side of the gate structure, a second doping region of the predetermined conductive type positioned at a second side of the gate structure. The predetermined conductive type can be P type or N type. A fabricating process of the resistor can be integrated into a conventional MOS transistor fabricating process. Moreover, the resistor has better heat dissipation than conventional resistors. | 2008-10-16 |
20080252411 | DISTRIBUTED SYSTEM FOR MANAGING MULTIPLE ITEMS - Disclosed are distributed systems and methods for managing multiple items. An exemplary system includes a user interface that allows a user to specify a date and time of day. The exemplary system also includes a plurality of portable devices, which may be attached to objects, such as bracelets or documents. Each portable device includes a wireless receiver configured to receive a signal corresponding to a date and time of day specified at the user interface. When the specified time arrives, the portable device emits a sound to alert someone. | 2008-10-16 |
20080252412 | Method for Performing Driver Identity Verification - Method for assuring that the operator of a vehicle is an authorized driver, the method including utilizing an onboard, multi-mode driver identification system to ascertain whether an operator is an authorized driver. A first driver identification procedure is performed on a present operator of the vehicle and determining whether the present operator is an authorized or unauthorized driver of the vehicle. A second driver identification procedure is performed on the present operator of the vehicle and determining whether the present operator is an authorized or unauthorized driver of the vehicle, wherein the first and second driver identification procedures are performed with a time interval therebetween, the time interval being dependent upon the nature of the work being performed by the operator. A remedial measure is exercised to avert potentially negative impact when the present operator of the vehicle is determined to be an unauthorized driver based upon at least one of the performed identification procedures. | 2008-10-16 |
20080252413 | Information communication system, facility apparatus, user apparatus, and methods for controlling facility apparatus and user apparatus - An information communication system is capable of allowing a service provider at a facility to appropriately attend a user visiting the facility in accordance with an intention of the user. The information communication system includes a user apparatus carried by the user and a facility apparatus installed at a facility the user may visit. The user apparatus enters the user intention concerning the facility service provider and transmits intention information indicating the entered user intention to the facility apparatus capable of short range wireless communication. The user apparatus transmits appearance information indicating the user's captured face picture to the facility apparatus. When receiving the intention information from the user apparatus, the facility apparatus allows a display section to display the user intention indicated by the intention information along with the user's captured face picture indicated by the appearance information received from the user apparatus. | 2008-10-16 |
20080252414 | BIOMETRIC ACCESS CONTROL SYSTEM INCORPORATING A TOUCHSCREEN ACCESSIBLE AND KIOSK BASED ID STATION OPERATING IN COMBINATION WITH MULTIPLE CRITICAL ASSET RETAINING RACKS AND LOCERS FOR PERMITTING SELECTIVE BIOMETRIC INPUT AND PROCESSOR DRIVEN/WIRELESS RELEASE AUTHORIZATION, MAINTENANCE AND INVENTORY CONTROL OF ANY PLURALITY OF CRITICAL ASSETS AND INCLUDING AN ASSOCIATED COMPUTER WRITEABLE MEDIUM OPERATING WITH THE ID STATION FOR ENABLING ASSET RELEASE, REENTRY AND ASSOCIATED INVENTORY CONTROL - A biometric access control system for tracking critical assets and including an ID station incorporating a biometric input reader, an RFID antenna and reader and a wired or wireless (Bluetooth) communication device. A remotely positioned structure includes either or both of a rack or a locker for holding a plurality of the critical assets in individually locked fashion. A processor control built into the ID station operatively actuates each of a plurality of individual locking mechanisms incorporated into the rack structure or locker, in response to successive biometric and weapon selection inputs communicating with the processor, and for determining at least one of user identification and weapon release authorization prior to the processor actuating the locking mechanism to release the weapon. An associated computer writeable medium operates with the processor and establishes a series of subroutines for establishing user identification, weapons rating, selective weapon release/reentry and associated maintenance and record keeping log reports. | 2008-10-16 |
20080252415 | RESTRICTED RANGE LOCKBOX, ACCESS DEVICE AND METHODS - A lockbox includes a housing, a key storage area and a lockbox circuit. The key storage area is shaped to receive a stored key and is attached to or positioned within the housing. The key storage area is secured with a lock mechanism to prevent unauthorized access to the stored key. The lockbox circuit comprises a transceiver operable by a magnetically induced current generated by a closely positioned radio access device that can send and receive signals. The circuit is configured to unlock the key storage area upon determining that an access request is authorized to providing access to the stored key. Methods of operation are also disclosed. | 2008-10-16 |
20080252416 | Electronic Device - The present invention relates to an electronic device ( | 2008-10-16 |
20080252417 | SYSTEM, METHOD, APPARATUS, AND COMPUTER PROGRAM PRODUCT FOR MONITORING THE TRANFER OF CARGO TO AND FROM A TRANSPORTER - Systems, methods, apparatus, and computer program products are provided for monitoring the transfer of cargo, such as a shipping container, to and from a transporter, such as a truck. Identification codes are provided on the cargo and the transporter to aid in the identification of the cargo and the transporter. One or more identification code receiving devices, such as a camera, may be associated with a cargo moving apparatus, such as a crane, and configured to automatically capture the transporter identification code and the cargo identification code as the cargo is being transferred to or from the transporter. The transporter identification code and the cargo identification code can be associated with each other along with other information about the transfer in order to monitor the transfer. In this regard, identification information may be communicated to a shipping terminal's operating system to provide real-time information about one or more transfers occurring within a shipping terminal. | 2008-10-16 |
20080252418 | TRANSPONDER DEVICE AND METHOD FOR PROVIDING A SUPPLY VOLTAGE - Transponder circuit arrangement having antenna connections for application of a voltage signal, a load-reduction modulation device, which is coupled to the antenna connections and is designed to modulate the applied, unmodulated voltage signal, which is at a first level, and a voltage conversion device, which is coupled to the load-reduction modulation device and is designed to provide a supply voltage, the magnitude of whose level is greater than the first level. | 2008-10-16 |
20080252419 | Wireless access control system and method - A wireless access control system comprises a docking station configured to wirelessly identify a computing device, the docking station configured to, based on the identification of the computing device, selectively control access to at least one resource available through the docking station by the computing device. | 2008-10-16 |
20080252420 | Rfid System, Gate Arrangement with Rfid System and Method of Detecting Transponders - With an RFID system for communicating between reading units (R | 2008-10-16 |
20080252421 | Architecture For Rfid Tag Reader/Writer - An RFID transceiver ( | 2008-10-16 |
20080252422 | Method of remote powering and detecting multiple UWB passive tags in an RFID system - A new Radio Frequency Identification (RFID), tracking, powering apparatus/system and method using coded Ultra-wideband (UWB) signaling is introduced. The proposed hardware and techniques disclosed herein utilize a plurality of passive UWB transponders in a field of an RFID-radar system. The radar system itself enables multiple passive tags to be remotely powered (activated) at about the same time frame via predetermined frequency UWB pulsed formats. Once such tags are in an activated state, an UWB radar transmits specific “interrogating codes” to put predetermined tags in an awakened status. Such predetermined tags can then communicate by a unique “response code” so as to be detected by an UWB system using radar methods. | 2008-10-16 |
20080252423 | Antenna Design and Interrogator System - A series of parallel spaced conductors through which currents are sequentially switched. A spatial relationship of the sequentially switched currents is chosen such that, at different times, tangential and normal magnetic fields are produced at the same location. The conductors are preferably arranged in a planar fashion and the tangential and normal magnetic fields are produced above the planar surface. A single layer of parallel spaced conductors provides substantially two dimensional operations. Adding a second parallel layer of orthogonally oriented parallel spaced conductors provides substantially three dimensional operations where currents are sequentially switched in both layers. | 2008-10-16 |
20080252424 | Stochastic Communication Protocol Method and System For Radio Frequency Identification (Rfid) Tags Based on Coalition Formation, Such as For Tag-To-Tag Communication - Data carriers (such as RFID tags) are formed into clusters of data carriers. Each cluster has at least one bridge data carrier that can communicate with a bridge data carrier of another cluster, thereby allowing data carriers in each cluster to communicate directly or indirectly with each other using a stochastic communication protocol method. Direct tag-to-tag communication capability is provided between data carriers in each cluster and/or between clusters. The data carriers can backscatter and modulate a carrier wave from a source, thereby using the backscattered and modulated carrier wave to convey data to each other. | 2008-10-16 |
20080252425 | Rfid Tag, Method For Manufacturing Rfid Tag and Method For Arranging Rfid Tag - An RFID tag is characterized in that it includes: a dielectric substrate; a ground conductor portion disposed on one main surface of this dielectric substrate; a patch conductor portion disposed on another main surface of the above-mentioned dielectric substrate and forming a slot; electrical connecting portions internally extending from opposing sides of the above-mentioned slot, respectively; and an IC chip placed in the above-mentioned slot and connected to the above-mentioned electrical connecting portions. | 2008-10-16 |
20080252426 | Intelligent Rfid System For Low Powered Reader-Tag Communication and Method Thereof - The present invention relates, in general, to a Radio Frequency Identification (RFID) system for reading or recording RFID tag information using radio frequencies and, more particularly, to an intelligent RFID system for low-powered reader-tag communication, which includes an RF shower system ( | 2008-10-16 |
20080252427 | Using Tags to Modify Program Behavior - A first electronic device ( | 2008-10-16 |
20080252428 | Association of Refrigerated Shipping Containers with Dispatch Orders - A database dispatches data to a wireless device on the particular source that powers a container during any segment of its journey. | 2008-10-16 |
20080252429 | Vehicular power line communication system - Plural communication areas are provided, and plural electronic control units for mutually making communication in each of the communication areas are provided. A vehicular power line communication system includes a power line coupling the respective communication areas to one another, branch power lines coupling the respective electronic control units in each of the communication areas to one another, and a battery for supplying electric power to the electronic control units through the power line and the branch power lines. The power line is formed of a +B line turning to a positive polarity and a ground line turning to a negative polarity, which are cabled to be spaced from each other in a part of the power line. The branch power lines superpose communication data thereon, thereby making data communication. | 2008-10-16 |
20080252430 | POWERLINE PULSE POSITION MODULATED TRANSMITTER APPARATUS AND METHOD - A transmitting controller is connected to a powerline and on command places a reference signal and a series of signal pulses in the powerline at a series of signal timing positions related to zero voltage crossing points so that the signals pulses are substantially in the powerline temporal quiet zone near zero crossing. The signal pulses are produced from a pair of capacitors and switches which are each sequentially charged a first polarity from the powerline and is discharged in the powerline at the opposite polarity so that the powerline voltage at the time of the pulse is additive to the pulse voltage. The receiving controller is connected to the powerline and has a filter circuit therein which filters away the powerline AC signal and noise to leave the reference and signal pulses. The signal pulses are compared to the position of starting reference pulses to determine in which signal timing position the pulses have occurred. Digital data is communicated over the powerline in accordance with the position placement of the data pulses related to the reference pulse positions. The timing quiet zone for transmission and signals is preferably about 500 to about 1000 microseconds away from zero voltage crossing. | 2008-10-16 |
20080252431 | System and method for asset tracking - A system and method for asset tracking utilizing a wireless device. An asset such as a vehicle can be equipped with a 3-axis geomagnetic sensor and an accelerometer in association with a remote control hardware component capable of responding to SMS (Short Message Service) command transmitted from the wireless device. As soon as the theft of the asset is detected, a “Theft in progress” SMS data can be transmitted from the wireless device to the remote device attached to the asset. The device then queries the geomagnetic sensor and the accelerometer at a pre-defined rate and transmits the X-Y-Z coordinates and acceleration values to the cell phone/computer via SMS at regular intervals. The device can also log the route of vehicle in a non-volatile memory which can be queried utilizing a “Request History” command. | 2008-10-16 |
20080252432 | REMOTE CONTROL WITH ENERGY HARVESTING - A remote control includes energy harvesting that provides power in addition to a battery. The energy harvesting and the battery may be switchably used to power transmit operations, receive operation, and/or display operations. The remote control may be used as part of an automotive vehicle remote keyless entry system in which vehicle status is displayed by the remote control. | 2008-10-16 |
20080252433 | Vehicle Driving Aid and Method and Improved Related Device - A vehicle driving aid method includes and defining an occupation grid corresponding to discretization into N cells of a field of kinematic parameters of a detected object; acquiring at each time k an observation z | 2008-10-16 |
20080252434 | Wheel status monitoring system - The present invention relates to a tire pressure monitoring system for a vehicle using temperature sensors mounted on axles in close proximity to each wheel to detect an increase in temperature generated by a compromised tire and conducted to the axle. The temperature information for each wheel is sent wired or wirelessly to a processor where the magnitude of the temperature is compared with the temperature of an uncompromised wheel. A significant increase in the temperature difference causes an alarm signal to be sent to a monitoring panel along with information that indicates to the driver which wheel is compromised. | 2008-10-16 |
20080252435 | Tire Identification System, Tire Pressure Monitoring System Using The Same and Method For Tire Identification - A tire identification system for use in a vehicle, a tire pressure monitoring system using the same and a method for tire identification are disclosed. The vehicle comprises a plurality of tires and a receiver. Each of the tires comprises a tire identification code. The receiver is used to receive signals. The tire identification system comprises a plurality of memory cards and a remote control device, wherein each of the memory cards comprises a memory card identification code that corresponds to each tire identification code, respectively. Moreover, each of the memory cards can be detachably connected to the remote control device in response to each of the tires. The remote control device comprises a signal transmitter to send a signal with each of the memory card identification codes to the vehicle. | 2008-10-16 |
20080252436 | Self-diagnostic angular speed sensor for vehicle - An angular speed sensor for a vehicle includes an angular speed sensor unit mounted in the vehicle, a microcomputer in which an offset correction value storing section and a diagnosis section are incorporated. The offset correction value storing section stores an offset correction value, which is an angular speed that is most frequently detected by the angular speed sensor. The diagnosis section corrects a current angular speed by the offset correction value. | 2008-10-16 |
20080252437 | BATTERY RUN DOWN INDICATOR - An automotive vehicle battery monitor includes an electrical connection configured to electrically couple to an electrical system of the vehicle. An output provides a visual indication related to a condition of the battery. A mount mounts the output at a location at which the output is visible from outside of the vehicle. | 2008-10-16 |
20080252438 | Warning System and Method of Providing a Warning - A warning system has a power position detection device, a gear shift position detection device, an alighting detection device, and a power position warning device. The device is operable to provide the power position warning indication when the power position detection device, the gear shift position detection device and the alighting detection device detect that there are preparations for alighting, that the gear shift position is in a P (Park) range and that the power position is in a position other than showing IGNITION OFF. In another aspect, the invention provides a gear shift position warning device. The power position warning device outputs a power position warning indication when the gear shift position detection device detects that the gear shift position has moved to the P range during output of the gear shift position warning indication. | 2008-10-16 |
20080252439 | ONBOARD DISPLAY DEVICE, ONBOARD DISPLAY SYSTEM AND VEHICLE - An onboard display device in accordance with the present invention includes a display section ( | 2008-10-16 |
20080252440 | Distributed Monitoring Method - A distributed monitoring method, which can be used in a security system, a fire prevention system, transformer stations, base stations for mobile communication and places for internal management of many kinds of facilities, uses a controller and at least two field devices, and the communication between the controller and the field devices is by way of a fieldbus. A signal frame transmitted therein includes a field device address segment, a field device sub-address segment, a read/write flag segment, a data exchange segment between the controller and a field device and a reporting request by a field device to the controller. If none of the field devices detects any abnormal event, the controller performs inspection of all the field devices in turn; when one of the field devices finds an abnormal event, this field device sends a reporting request to the controller. It is possible to reduce the system's power consumption by setting a different power status for the field devices. | 2008-10-16 |
20080252441 | Method and apparatus for performing a real-time root-cause analysis by analyzing degrading telemetry signals - One embodiment of the present invention provides a system that performs a real-time root-cause-analysis for a degradation event associated with a component under test. During operation, the system monitors a telemetry signal collected from the component, and while doing so, attempts to detect an anomaly in the telemetry signal. If an anomaly is detected in the telemetry signal, the system performs a failure analysis on the telemetry signal in real-time while the telemetry signal is degrading. Next, the system identifies a failure mechanism for the component based on the failure analysis. | 2008-10-16 |