42nd week of 2012 patent applcation highlights part 39 |
Patent application number | Title | Published |
20120264190 | Decellularized and Delipidized Extracellular Matrix and Methods of Use - Compositions comprising decellularized and delipidized extracellular matrix derived from adipose or loose connective tissue, and therapeutic uses thereof. Methods for treating, repairing or regenerating defective, diseased, or damaged adipose or loose connective tissues or organs in a subject, preferably a human, and/or for tissue engineering, filing soft tissue defects, and cosmetic and reconstructive surgery, using a decellularized and delipidized adipose or loose connective tissue extracellular matrix of the invention are provided. Methods of preparing tissue culture surfaces and culturing cells with adsorbed decellularized and delipidized adipose or loose connective tissue extracellular matrix are also provided. | 2012-10-18 |
20120264191 | PROTEIN AND DNA SEQUENCE ENCODING A COLD ADAPTED-SUBTILISIN-LIKE ACTIVITY - Nucleic acid and corresponding amino acid sequences of a cold adapted subtilisin-like activity protein, insolated from antarctic marine origin, preferably from an Antarctic bacteria ( | 2012-10-18 |
20120264192 | ADENOVIRUS LIBRARY AND METHODS - Described herein is a method that generally includes infecting a host cell with a rescue adenovirus, wherein the rescue adenovirus genome comprises a loxP site and encodes at least one marker, and wherein the host cell comprises a library of polynucleotides that complement the adenovirus genome marker and encode a detectable polypeptide; incubating the infected host cell under conditions effective to permit recombination between the adenovirus genome and one or more of the library polynucleotides and the production of recombinant adenovirus particles comprising at least on detectable polypeptide; and detecting the at least one detectable polypeptide. Also described are adenovirus libraries constructed using such a method. | 2012-10-18 |
20120264193 | METHOD FOR PRODUCING MEDIUM AND MEDIUM PRODUCED THEREBY - [Problem to be Solved] | 2012-10-18 |
20120264194 | Methods of and Systems for Dewatering Algae and Recycling Water Therefrom - A method of dewatering algae and recycling water therefrom is presented. A method of dewatering a wet algal cell culture includes removing liquid from an algal cell culture to obtain a wet algal biomass having a lower liquid content than the algal cell culture. At least a portion of the liquid removed from the algal cell culture is recycled for use in a different algal cell culture. The method includes adding a water miscible solvent set to the wet algal biomass and waiting an amount of time to permit algal cells of the algal biomass to gather and isolating at least a portion of the gathered algal cells from at least a portion of the solvent set and liquid of the wet algal biomass so that a dewatered algal biomass is generated. The dewatered algal biomass can be used to generated algal products such as biofuels and nutraceuticals. | 2012-10-18 |
20120264195 | High bio-productivity chlamydomonas strain DG8-108 - A novel strain of the unicellular green algae | 2012-10-18 |
20120264196 | Thixotropic gel for vadose zone remediation - A thixotropic gel suitable for use in subsurface bioremediation is provided along with a process of using the gel. The thixotropic gel provides a non-migrating injectable substrate that can provide below ground barrier properties. In addition, the gel components provide for a favorable environment in which certain contaminants are preferentially sequestered in the gel and subsequently remediated by either indigenous or introduced microorganisms. | 2012-10-18 |
20120264197 | H2S Removal from Contaminated Gases - A process for removing hydrogen sulfide from a raw natural gas stream such as biogas from landfills or controlled anaerobic digestion comprises passing the natural gas stream though a separation unit such as a PSA unit to form a product stream comprising a high concentration of methane and a low pressure tail gas containing hydrogen sulfide, passing the tail gas through a biofilter which includes bacteria that degrades the hydrogen sulfide to sulfur and sulfate compounds which are washed from the biofilter. The tail gas stream subsequent to treatment in the biofilter can be flared to the atmosphere without significant SOx emissions. | 2012-10-18 |
20120264198 | In-Situ Reclaimable Anaerobic Composter - An in-situ dry anaerobic composter containing 40% to 75% by weight solids and located in a section of ground including a pit having side walls and a bottom, an essentially impervious liner located in the pit such that the liner abuts the pit side walls and bottom to form a lined pit, a compostable material located in the lined pit and a gas management system for extracting a gaseous anaerobic decomposition product from the compostable material as well as methods for operating the anaerobic composter. | 2012-10-18 |
20120264199 | PREPARATION METHOD OF THE COMPOUNDS FOR ABSORBING HEAVY METALS - The present invention is related to a preparation method of the compounds for absorbing heavy metals. First of all, prepare natural vegetable or fruit and extract a B-M sulfur peptide from the said natural vegetable or fruit. Second, place the natural vegetable or fruit into fermentation and extract the mixed nutrient extraction. And then mix the B-M sulfur peptide and the mixed nutrient extraction as the final extraction. Mix the final extraction into drinks. The final extraction will slowly release B-M sulfur peptide when entering the body; through its combination of heavy metals and re-absorption by the body, useful materials are retained in the human body while long-term accumulated toxic metals are discharged to repair the body's metabolism. | 2012-10-18 |
20120264200 | SYSTEMS AND METHODS FOR ISOLATING AND USING CLINICALLY SAFE ADIPOSE DERIVED REGENERATIVE CELLS - Systems and methods are described that are used to separate cells from a wide variety of tissues. In particular, automated systems and methods are described that separate regenerative cells, e.g., stem and/or progenitor cells, from adipose tissue. The systems and methods described herein provide rapid and reliable methods of separating and concentrating regenerative cells suitable for re-infusion into a subject. | 2012-10-18 |
20120264201 | CULTURE APPARATUS - A culture apparatus comprising: an inner box configured to form a culture chamber; an outer box configured to cover the inner box; a fan configured to circulate gas inside the culture chamber through an air passage provided in the inner box within the culture chamber; a first through hole configured to penetrate a wall configuring a part of the air passage in the inner box; a second through hole configured to penetrate the wall and disposed at a position at which a flow velocity of the gas circulated through the air passage by the fan is lower than a flow velocity of the gas around the first through hole; a connecting pipe configured to connect the first through hole and the second through hole outside of the inner box; and a sensor configured to detect a concentration of the gas flowing in the culture chamber. | 2012-10-18 |
20120264202 | SYSTEM FOR PERFORMING POLYMERASE CHAIN REACTION NUCLEIC ACID AMPLIFICATION - A printed circuit structure containing a fluidic chamber configured to receive an aqueous solution containing a sample to be analyzed and fluorophore for polymerase chain reaction analysis. The printed circuit structure also contains a heating element that provides for temperature cycling of the fluidic chamber to support polymerase chain reaction analysis. | 2012-10-18 |
20120264203 | HEAT FLOW POLYMERASE CHAIN REACTION SYSTEMS AND METHODS - Methods and systems for polymerase chain reactions (PCR) that are capable of detecting amplified DNA during or after the PCR process. The methods and systems may utilize DSC or DTA analysis techniques. | 2012-10-18 |
20120264204 | Method and apparatus using optical techniques to measure analyte levels - A device is provided for use with a tissue penetrating system and/or a metering device for measuring analyte levels. The device comprises a cartridge and a plurality of analyte detecting members mounted on the cartridge. The cartridge may have a radial disc shape. The cartridge may also be sized to fit within the metering device. The analyte detecting members may be optical system using fluorescence lifetime to determine analyte levels. In one embodiment, the device may also include a fluid spreader positioned over at least a portion of the analyte detecting member to urge fluid toward one of the detecting members. A plurality of analyte detecting members may be used. Each analyte detecting member may be a low volume device. | 2012-10-18 |
20120264205 | MICROBIAL DECOMPOSITION TREATMENT DEVICE AND ORGANIC SUBSTANCE TREATMENT UNIT - A organic substance treatment device is proposed which includes a cylindrical treatment tank ( | 2012-10-18 |
20120264206 | Device for the Carrying Out of Chemical or Biological Reactions - The invention relates to a device for performing biological reactions in a nucleic acid sample. The device can comprise a reaction vessel receiving element that includes a plurality of reaction vessel holders and a gastight jacket or equalization plate containing a fluid changeable between liquid and gaseous states. The gastight jacket or equalization plate can be configured to provide temperature equalisation among the reaction vessel holders. The reaction vessel receiving element can also include at least one Peltier element, a cooling element, and a controller configured to cycle the device through a predetermined time-temperature profile via heating and cooling. | 2012-10-18 |
20120264207 | POLYMERIC MEMBERS AND METHODS FOR MARKING POLYMERIC MEMBERS - Generally, polymeric members and laser marking methods for producing visible marks on polymeric members, such as on thin and/or curved surfaces. The laser marking methods can include methods of laser marking straws with the step of matching laser source properties to the properties of straws being marked or with the step of laser marking straws having photochromic dyes. | 2012-10-18 |
20120264208 | MATERIALS AND METHODS FOR ENHANCED IRON UPTAKE IN CELL CULTURE - A serum-free, synthetic tissue culture media is described which is completely defined chemically. The media do not require any supplementation with serum to support growth of cells. The media and methods described herein can also be used for growing all types of mammalian cell lines in culture without addition of transferrin protein. The media include a basal medium and an activator of iron uptake. The media also include a defined cell culture media that includes an iron-containing compound, which is capable of supporting the growth of mammalian cells in culture, increasing the level of expression of recombinant protein in cultured cells, and/or increasing virus production in cultured cells. | 2012-10-18 |
20120264209 | METHODS AND DEVICES FOR DIFFERENTIATING PLURIPOTENT STEM CELLS INTO CELLS OF THE PANCREATIC LINEAGE - Methods and devices for culturing human pluripotent stem cells to produce cells of the pancreatic lineage are disclosed. The methods include steps of culturing the stem cells under conditions that induce the expression of mesendoderm/primitive streak and definitive endoderm markers in a chemically defined medium including an effective amount of i) fibroblast growth factor, ii) Activin A, and iii) bone morphogenetic protein. The methods further include the steps of culturing cells under conditions favoring the formation of at least one of intact embryoid bodies and pancreatic progenitor PDX1 | 2012-10-18 |
20120264210 | Method for Expanding and/or Preserving Cells by Means of Gas Enrichment of the Culture Medium - A method for expanding and/or preserving cells inside a culture vessel containing a culture medium provides for the renewal of the culture medium by a culture medium stream, at least a portion of which comes from a culture medium volume contained in a gas-enrichment vessel of the culture medium, the enrichment-vessel further containing a gas volume which is separated from the culture medium volume by a free interface, the gas volume being renewed by a gas stream that is introduced into the enrichment vessel directly into the gas volume, the flow of the stream being arranged so as to enable a gas exchange between the culture medium volume and the gas volume at the interface thereof. | 2012-10-18 |
20120264211 | CRYOPRESERVATION OF ARTICULAR CARTILAGE - The invention relates generally to methods and compositions for the cryopreservation and/or vitrification of tissue including articular cartilage and the preparation of said tissue for clinical or research use, including but not limited to joint replacement and the treatment and prevention of osteoarthritis. | 2012-10-18 |
20120264212 | COMPOUNDS AND METHODS FOR INHIBITING THE METASTASIS OF CANCER CELLS - The present invention relates to compounds and methods for inhibiting cancer metastasis. In an embodiment, the compound of the present invention contains the sulfatide binding region of the terminal phosphotyrosine binding domain (N-PTB) of Disabled-2 (Dab2). | 2012-10-18 |
20120264213 | Device and method for delivering mechanically released cells from liposcuction aspirates - A lipoaspirate collection device to aid in the collection and processing of human tissue and fluid obtained during liposuction for use in point-of-care cell therapy. The collection device includes a collection body and a collection cap. The collection cap may have a fluid port, a lipoaspirate port, a vacuum port, and a relief valve. Within the central cavity of the collection device, a cone shaped may be positioned such that the apex of the cone is positioned underneath the lipoaspirate inlet through which the lipoaspirate fluid and tissue are introduced. | 2012-10-18 |
20120264214 | BIOCOMPATIBLE POLYMERIZABLE ACRYLATE PRODUCTS AND METHODS - Sugar-acrylic monomers are synthesized to have a carbohydrate moiety linked to an acrylate group. The sugar-acrylic monomers may be polymerized to form polymers, adhesives, hydrogels, and the like. The sugar-acrylic monomers and polymers may be used in tissue engineering, adhesives and sealers, wound healing, and the like. | 2012-10-18 |
20120264215 | PLACENTA-DERIVED CELL-CONDITIONED CULTURE MEDIA AND ANIMAL-FREE, FEEDER-FREE METHOD FOR CULTURING STEM CELLS USING THE SAME - Disclosed are placenta-derived cell-conditioned culture media for stem cells. An animal-free, feeder-free method using the media is also provided for culturing stem cells. The media can prevent the stem cells from being contaminated with xenogeneic proteins or cells, and maintain human embryonic stem cells in an undifferentiated state for a long period of time in vitro with an economic benefit. | 2012-10-18 |
20120264216 | MEDIA, KITS, SYSTEMS AND METHODS FOR THE MICROPROPAGATION OF BAMBOO - Disclosed herein are media, kits, systems and methods for achieving micropropagation of bamboo on a commercially-relevant scale. | 2012-10-18 |
20120264217 | RESPIRATORY SYNCYTIAL VIRUS EXPRESSION VECTORS - In certain embodiments, the disclosure relates to vectors containing bacterial nucleic acid sequences and a paramyxovirus gene. Typically, the expression vector comprises a bacterial artificial chromosome (BAC), and a nucleic acid sequence comprising a respiratory syncytial virus (RSV) gene in operable combination with a regulatory element and optionally a reporter gene. | 2012-10-18 |
20120264218 | INDUCTION OF PLURIPOTENT CELLS - The slow kinetics and low efficiency of reprogramming methods to generate human induced pluripotent stem cells (iPSCs) impose major limitations on their utility in biomedical applications. Here we describe a chemical approach that dramatically improves (>200 fold) the efficiency of iPSC generation from human fibroblasts, within seven days of treatment. This will provide a basis for developing safer, more efficient, non-viral methods for reprogramming human somatic cells. | 2012-10-18 |
20120264219 | LEAK DETECTION DEVICE - A leak detection device ( | 2012-10-18 |
20120264220 | Apparatus for Monitoring Corrosion and Method Thereof - An apparatus and method for monitoring and determining corrosion rates in an airflow wherein the corrosion rate is dynamically corrected for non-corrosive environmental effects. | 2012-10-18 |
20120264221 | METHOD FOR QUALIFYING A NON-PARTICULATE ADSORBENT BY MEANS OF A SECONDARY REACTION - The present invention relates to a method for the validation of a non-particulate adsorbent by secondary reaction and a kit for the validation of a non-particulate adsorbent by secondary reaction. | 2012-10-18 |
20120264222 | Method and Device for Detection of Nitroamines - An ultrasensitive method for detecting non-aromatic non-planar nitroamine analytes in a sample is provided. | 2012-10-18 |
20120264223 | METHODS FOR DETECTING SULFHYDRYL-CONTAINING COMPOUNDS IN A BIOLOGICAL TEST SAMPLE - The invention relates to methods for detecting the presence of a compound of formula I in a biological test sample: | 2012-10-18 |
20120264224 | SYSTEM AND METHOD FOR A MICROFLUIDIC CALORIMETER - Systems and methods are disclosed herein for a microfluidic calorimeter apparatus. A microfluidic calorimeter system includes a calorimetry apparatus and a processor in connection with the apparatus. The apparatus includes a microfluidic laminar flow channel connected to two inlets for flowing fluid into the laminar flow channel. Below the laminar flow channel is a plurality of microscale temperature sensors at known positions in the channel. The processor is in connection with the discrete temperature sensors and determines a calorimetry measurement based on local temperatures derived from data output by the microscale temperature sensors and the respective positions of the sensors in the channel. | 2012-10-18 |
20120264225 | METHOD OF QUANTITATIVE ANALYSIS OF HEXAVALENT CHROMIUM IN CHROMATE COATING AND METHOD FOR CONTROLLING HAZARDOUS ELEMENT IN ENCAPSULATING RESIN OF RESIN ENCAPSULATION SEMICONDUCTOR DEVICE - A method for controlling a hazardous element in an encapsulating resin of a resin encapsulation semiconductor device includes subjecting the device to qualitative analysis with a fluorescent X-ray analyzer to judge whether the hazardous element is contained in the encapsulating resin, aligning a plurality of devices with each of upper and lower surfaces of the devices brought into a plane, setting the surfaces of the devices to cover a full X-ray irradiation plane and subjecting the devices to quantitative analysis with the fluorescent X-ray analyzer to obtain an analytical value of the hazardous element in the encapsulating resin for upper and lower surfaces of the devices, and judging whether the analytical value of the hazardous element which is less influenced by a coexistent element of the analytical values for the upper and lower surfaces of the devices exceeds a threshold value. | 2012-10-18 |
20120264226 | OPTICAL LENS SYSTEM AND METHOD FOR MICROFLUIDIC DEVICES - An apparatus for imaging one or more selected fluorescence indications from a microfluidic device. The apparatus includes an imaging path coupled to least one chamber in at least one microfluidic device. The imaging path provides for transmission of one or more fluorescent emission signals derived from one or more samples in the at least one chamber of the at least one microfluidic device. The chamber has a chamber size, the chamber size being characterized by an actual spatial dimension normal to the imaging path. The apparatus also includes an optical lens system coupled to the imaging path. The optical lens system is adapted to transmit the one or more fluorescent signals associated with the chamber. | 2012-10-18 |
20120264227 | ANALYTE EXTRACTION AND ANALYSIS - Apparatus and methods are disclosed for the collection and analysis of analytes from samples. In one embodiment an extraction chamber is provided that includes a sample holder and an extraction lid that allows for simultaneous multifiber solid phase microextraction of analytes from a sample held in the sample holder. Methods of collection and analysis include using simultaneous multifiber solid phase microextraction of analytes from a sample. | 2012-10-18 |
20120264228 | METHOD AND APPARATUS FOR FRAGMENTING DNA SEQUENCES - A method of fragmenting a DNA sequence having a starting size of at least 10000 base pair into fragments having a mean size smaller than or equal to 1300 bp, wherein the DNA sequence is put in a solution, the solution comprising the DNA sequence is put in a container and the container is placed in a liquid bath which is subjected to the action of ultrasound waves such that the ultrasound waves travel through the liquid bath to excite the container and the solution so as to shear the DNA sequence, and wherein the ultrasound waves have a frequency falling in the range between 28 kHz and 80 kHz. | 2012-10-18 |
20120264229 | COLLECTION DEVICE WITH DOUBLE OUTPUTS AND METHOD OF USING THE SAME - A collection device with double outputs and a method of using the same are provided. The collection device comprises an accommodating chamber comprising an upper chamber opening, a lower chamber opening and a chamber body therebetween; an inlet member comprising an upper inlet opening, a lower inlet opening and an inlet passage therebetween, said lower inlet opening being connected and communicated with said upper chamber opening; an outlet member comprising an outlet body, a protrusion depending from a lower surface of said outlet body, a first output positioned at a lower end of said protrusion and a second output provided at said lower surface of said outlet body, said lower chamber opening of said accommodating chamber being connected and communicated with said outlet member; a collecting section comprising a handle detachably engageable with said inlet member and a collecting stick attached to the handle, a lower portion of said collecting stick entering into said accommodating chamber through said inlet passage upon engagement of said handle with said inlet member, and a sealing assembly for sealing said first output and said second output. | 2012-10-18 |
20120264230 | HOME OR POINT-OF-CARE ALLERGY TESTING - An allergy testing method based on a highly sensitive testing of a small blood sample is provided. The method includes collecting a blood sample from a subject, the blood sample being limited to a volume taken from a skin-prick; and, testing serum from the blood sample without dilution for an allergic response of the subject to one or more allergens, the testing having a high detection sensitivity ranging from about 10 | 2012-10-18 |
20120264231 | ASSAY FOR ORAI CALCIUM CHANNEL REGULATORS - The methods and systems described herein are based, in part, on the discovery that STIM modulates calcium release from store-operated channels through a direct interaction with the ORAI channel. Based on this discovery, methods and systems are described herein for identifying an agent that modulates calcium flux through the ORAI channel and/or regulates intracellular calcium via the ORAI channel. The methods and systems can also be used to detect an interaction between STIM and a functional ORAI channel. | 2012-10-18 |
20120264232 | ANTIGEN DETECTION SYSTEM AND METHODS OF USE - A system and method for testing for the presence of antigens in food stuffs permits a user to test food products for the presence of antigens for a given food allergy that the user may have. The system comprises two main components, a base station and a test well. The user places a sample of food into the test well. A macerator homogenizes the food in the test well. Antibodies to a particular antigen are bound to an antigen detector in the test well. The base station includes a cartridge dock which powers the macerator and the antigen detector. Antigen-antibody binding provides a change detectable by the detector, which signals the base station of the presence of a threshold degree of antigen-antibody binding and alerts the user of the presence of the antigen, such as by a visual or audible indicator. | 2012-10-18 |
20120264233 | METHOD OF ANALYSIS WITH IMPROVED MIXING - The invention is a method for characterizing an interaction in a liquid environment, between at least one species in solution and a target immobilized on a surface of a flow cell. The method comprises the following steps: (a) activating the surface of the flow cell and immobilizing the target thereon; (b) providing, in a flow of liquid, at least one of the species; (c) passing the flow of liquid comprising at least one of the species through the surface of the flow cell which contains the immobilized target; and (d) detecting a result of an interaction between the at least one species and the target using surface plasmon resonance (SPR) technique. The improvement of the method comprises in at least one of steps (a) or (b), inline mixing at least two liquid solutions to generate a mixed solution before it is passed through the surface of the flow cell. | 2012-10-18 |
20120264234 | MAGNETIC RANDOM ACCESS MEMORY (MRAM) WITH ENHANCED MAGNETIC STIFFNESS AND METHOD OF MAKING SAME - A spin toque transfer magnetic random access memory (STTMRAM) element and a method of manufacturing the same is disclosed having a free sub-layer structure with enhanced internal stiffness. A first free sub-layer is deposited, the first free sub-layer being made partially of boron (B). Annealing is performed of the STTMRAM element at a first temperature after depositing the first free sub-layer to reduce the B content at an interface between the first free sub-layer and the barrier layer. Cooling down of the STTMRAM element to a second temperature that is lower than the first temperature is performed and a third free sub-layer is directly deposited on top of the second free layer, with the third free sub-layer being made partially of boron (B), wherein the amount of B in the third sub-free layer is less than the amount of B in the second free sub-layer. | 2012-10-18 |
20120264235 | METHOD OF MANUFACTURING ORGANIC ELECTROLUMINESCENCE DEVICE AND METHOD OF SETTING LASER FOCAL POSITION - A method of manufacturing an organic electroluminescence device includes: preparing an organic EL device in which an anode, an organic layer including a luminescent layer, and a cathode formed of a transparent material are stacked in order and which has a shorted defective portion; irradiating the organic EL device with a laser beam from a direction of the cathode; measuring an intensity of radiated light from the organic EL device after the laser beam is absorbed through multiphoton absorption; changing a focal position of the laser beam in a stacking direction for performing the irradiating and measuring, and subsequently determining the focal position of the laser beam in the stacking direction such that the intensity of the radiated light is minimal; and irradiating the determined focal position with the laser beam, so as to solve a defect caused by the shorted defective portion. | 2012-10-18 |
20120264236 | FLUORESCENT POWDER APPLYING DEVICE AND METHOD CAPABLE OF DETECTING INSTANTLY COLOR TEMPERATURE OF WHITE LIGHT IN A MANUFACTURING PROCESS - A fluorescence powder spraying device capable of detecting instantly color temperature of white light in a manufacturing process, comprising: a spraying region, provided with a movable nozzle and an LED component-to-be-sprayed; a measuring region, provided with a light source and a light detector; and a monitor plate, which can be moved in said spraying region and said measuring region. Said monitor plate undergoes at least a fluorescence powder spraying process with said LED components-to-be-sprayed in said spraying region, to form at least a fluorescence powder layer, and in said measuring region, use said light source to agitate said fluorescence powder layer on said monitor plate, and use said light detector to measure color temperature of white light, to detect speedily color temperature of said fluorescence powder layer, hereby raising. yield of LED component reaching the target color temperature. | 2012-10-18 |
20120264237 | METHODS FOR DESIGNING, FABRICATING, AND PREDICTING SHAPE FORMATIONS IN A MATERIAL - A method for designing, fabricating, and predicting a desired structure in and/or on a host material through defining etch masks and etching the host material is provided. The desired structure can be micro- or nanoscale structures, such as suspended nanowires and corresponding supporting pillars, and can be defined one layer at a time. Arbitrary desired structures can also be defined and obtained through etching. Further, given the desired structure, a starting structure can be predicted where etching of the starting structure yields the desired structure. | 2012-10-18 |
20120264238 | PROGRAM CONTROLLED DICING OF A SUBSTRATE USING A PULSED LASER BEAM - A substrate is diced using a program-controlled pulsed laser beam apparatus having an associated memory for storing a laser cutting strategy file. The file contains selected combinations of pulse rate Δt, pulse energy density E and pulse spatial overlap to machine a single layer or different types of material in different layers of the substrate while restricting damage to the layers and maximising machining rate to produce die having predetermined die strength and yield. The file also contains data relating to the number of scans necessary using a selected combination to cut through a corresponding layer. The substrate is diced using the selected combinations. Gas handling equipment for inert or active gas may be provided for preventing or inducing chemical reactions at the substrate prior to, during or after dicing. | 2012-10-18 |
20120264239 | LIGHT-TUNING METHOD - A light-tuning method is provided. In the method, a filter material is first selected for filtering out unwanted light of a specific wavelength to obtain a transmittance spectrum. The transmittance spectrum is multiplied by an eye sensitivity function to obtain a filtered spectrum. The filtered spectrum has a wavelength range between 450 nm and 650 nm. According to a full width at half maximum (FWHM) wavelength range of the filtered eye sensitivity function, a phosphor is selected and a light-emitting spectrum of the phosphor is determined so that between the light-emitting spectrum of the phosphor and the filtered eye sensitivity function is an optimal matching degree. | 2012-10-18 |
20120264240 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - Of three chips ( | 2012-10-18 |
20120264241 | TEST STRUCTURE AND METHODOLOGY FOR THREE-DIMENSIONAL SEMICONDUCTOR STRUCTURES - A plurality of peripheral test structure substrate (PTSS) through vias is formed within a peripheral test structure substrate. A peripheral test structure layer and at least one functional layer are formed on one side of the plurality of the PTSS through vias. The other side of the plurality of the PTSS through vias is exposed throughout fabrication of the peripheral test structure layer and the at least one functional layer to provide access points for testing functionality of the various layers throughout the manufacturing sequence. C4 bonding may be performed after manufacture of all of the at least one functional layer is completed. A 3D assembly carrier or a C4 carrier substrate is not required since the peripheral test structure substrate has sufficient mechanical strength to support the peripheral test structure layer and the at least one functional layer. | 2012-10-18 |
20120264242 | IN-PLANE SWITCHING MODE LIQUID CRYSTAL DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME - The present invention relates to an in-plane switching mode LCD, in which data electrodes and common electrodes in a unit pixel have the same light transmitting area to reduce the luminance difference according to positive or negative polarity of an applied DC voltage. The in-plane switching mode LCD comprises a first substrate; a plurality of data lines on the first substrate; data electrodes and common electrodes alternately formed in an unit pixel area, the data electrodes having a first transmittance area and the common electrodes having a second transmittance area, wherein the first transmittance area equals the second transmittance area; and a shielding layer formed under outer most ones of the common electrodes, and wherein at least one of the data electrodes has a first width, and at least one of the common electrodes has a second width, the second width being greater than the first width. | 2012-10-18 |
20120264243 | FLEXIBLE LIQUID CRYSTAL DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME - A flexible liquid crystal display panel and method for manufacturing the same are provided. The flexible liquid crystal display panel includes a rigid substrate, a flexible substrate and a liquid crystal layer disposed therebetween. | 2012-10-18 |
20120264244 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - An object is to manufacture a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which an oxide semiconductor film is used for a semiconductor layer including a channel formation region, heat treatment (for dehydration or dehydrogenation) is performed to improve the purity of the oxide semiconductor film and reduce impurities including moisture or the like. After that, slow cooling is performed under an oxygen atmosphere. Besides impurities including moisture or the like exiting in the oxide semiconductor film, heat treatment causes reduction of impurities including moisture or the like exiting in a gate insulating layer and those in interfaces between the oxide semiconductor film and films which are provided over and below the oxide semiconductor and in contact therewith. | 2012-10-18 |
20120264245 | SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF - For forming a gate electrode, a conductive film with low resistance including Al or a material containing Al as its main component and a conductive film with low contact resistance for preventing diffusion of Al into a semiconductor layer are laminated, and the gate electrode is fabricated by using an apparatus which is capable of performing etching treatment at high speed. | 2012-10-18 |
20120264246 | Method of Selective Photo-Enhanced Wet Oxidation for Nitride Layer Regrowth on Substrates - Various embodiments of the present disclosure pertain to selective photo-enhanced wet oxidation for nitride layer regrowth on substrates. In one aspect, a method may comprise: forming a first III-nitride layer with a first low bandgap energy on a first surface of a substrate; forming a second III-nitride layer with a first high bandgap energy on the first III-nitride layer; transforming portions of the first III-nitride layer into a plurality of III-oxide stripes by photo-enhanced wet oxidation; forming a plurality of III-nitride nanowires with a second low bandgap energy on the second III-nitride layer between the III-oxide stripes; and selectively transforming at least some of the III-nitride nanowires into III-oxide nanowires by selective photo-enhanced oxidation. | 2012-10-18 |
20120264247 | Method of Separating Nitride Films from the Growth Substrates by Selective Photo-Enhanced Wet Oxidation - Various embodiments of the present disclosure pertain to separating nitride films from growth substrates by selective photo-enhanced wet oxidation. In one aspect, a method may transform a portion of a III-nitride structure that bonds with a first substrate structure into a III-oxide layer by selective photo-enhanced wet oxidation. The method may further separate the first substrate structure from the III-nitride structure. | 2012-10-18 |
20120264248 | III-NITRIDE LIGHT EMITTING DEVICE WITH CURVATURE CONTROL LAYER - A semiconductor structure comprises a III-nitride light emitting layer disposed between an n-type region and a p-type region. The semiconductor structure further comprises a curvature control layer grown on a first layer. The curvature control layer is disposed between the n-type region and the first layer. The curvature control layer has a theoretical a-lattice constant less than the theoretical a-lattice constant of GaN. The first layer is a substantially single crystal layer. | 2012-10-18 |
20120264249 | METHOD FOR ETCHED CAVITY DEVICES - MEMS devices ( | 2012-10-18 |
20120264250 | METHOD OF FORMING MEMBRANES WITH MODIFIED STRESS CHARACTERISTICS - A method of modifying stress characteristics of a membrane in one embodiment includes providing a membrane layer, determining a desired stress modification, and forming at least one trough in the membrane layer based upon the determined desired stress modification. | 2012-10-18 |
20120264251 | SEPARATION TYPE UNIT PIXEL OF 3-DIMENSIONAL IMAGE SENSOR AND MANUFACTURING METHOD THEREOF - A separation type unit pixel of an image sensor, which can control light that incidents onto a photodiode at various angles, and be suitable for a zoom function in a compact camera module by securing an incident angle margin, and a manufacturing method thereof are provided. The unit pixel of an image sensor includes: a first wafer including a photodiode containing impurities having an impurity type opposite to that of a semiconductor material and a pad for transmitting photoelectric charge of the photodiode to outside; a second wafer including a pixel array region in which transistors except the photodiode are arranged regularly, a peripheral circuit region having an image sensor structure except the pixel array, and a pad for connecting pixels with one another; and a connecting means connecting the pad of the first wafer and the pad of the second wafer. | 2012-10-18 |
20120264252 | SOLAR CELL AND METHOD OF MANUFACTURING THE SAME - A solar cell and a method of manufacturing the same are disclosed. The solar cell includes a substrate of a first conductive type having at least one via hole; an emitter layer only on at least a portion of the via hole and at least one selected from a group consisting of an incident surface and side surfaces of the substrate, the emitter layer having a second conductive type opposite the first conductive type; at least one first electrode on the incident surface, the first electrode being electrically connected to the emitter layer; a second electrode connected to an opposite surface to the incident surface; and at least one first electrode current collector on the opposite surface, the at least one first electrode current collector being insulated from the second electrode and being electrically connected to the at least one first electrode through the via hole. | 2012-10-18 |
20120264253 | METHOD OF FABRICATING SOLAR CELL - A method of fabricating a solar cell is provided. A first type substrate having a first surface and a second surface is provided. A first doping process is performed on the first surface of the first type substrate by using a first dopant, so as to form a first type lightly doped layer. A second doping process is performed on a portion of the first type lightly doped layer by using a second dopant, so as to form a second type heavily doped region. A molecular weight of the second dopant is larger than a molecular weight of the first dopant, and a temperature of the first doping process is higher than a temperature of the second doping process. A first electrode is formed on the second type heavily doped region. A second electrode is formed on the second surface of the first type substrate. | 2012-10-18 |
20120264254 | METHOD OF CADMIUM MOLECULAR BEAM BASED ANNEALS FOR MANUFACTURE OF HGCDTE PHOTODIODE ARRAYS - In the preferred embodiment of the present invention, narrow bandgap II-VI compound semiconductor Hg | 2012-10-18 |
20120264255 | PRODUCTION OF THIN FILMS HAVING PHOTOVOLTAIC PROPERTIES AND CONTAINING A I-III-VI2-TYPE ALLOY, COMPRISING SUCCESSIVE ELECTRODEPOSITS AND THERMAL POST-TREATMENT - The invention relates to the production of a thin film having photovoltaic properties, containing a I-III-VI | 2012-10-18 |
20120264256 | METHOD AND SYSTEM FOR TEMPLATE ASSISTED WAFER BONDING - A method of fabricating a composite semiconductor structure includes providing a substrate including a plurality of devices and providing a compound semiconductor substrate including a plurality of photonic devices. The method also includes dicing the compound semiconductor substrate to provide a plurality of photonic dies. Each die includes one or more of the plurality of photonics devices. The method further includes providing an assembly substrate, mounting the plurality of photonic dies on predetermined portions of the assembly substrate, aligning the substrate and the assembly substrate, joining the substrate and the assembly substrate to form a composite substrate structure, and removing at least a portion of the assembly substrate from the composite substrate structure. | 2012-10-18 |
20120264257 | MOLD ARRAY PROCESS METHOD TO PREVENT EXPOSURE OF SUBSTRATE PERIPHERIES - Disclosed is a mold array process (MAP) method to prevent exposure of peripheries of substrate units where the major characteristic is to implement two kinds of encapsulating materials in the MAP method in mass production. A first encapsulating material for encapsulating chips is formed on a substrate strip by molding to continuously encapsulate the substrate units and the scribe lines between adjacent substrate units. Prior to forming a second encapsulating material, a plurality of cut grooves are formed along the scribing lines by pre-cutting processes to penetrate through the substrate strip but without penetrating through the first encapsulating material and have such a width that a plurality of peripheries of the substrate units are exposed outside the scribing lines. Then, the second encapsulating material is filled into the cut grooves. Accordingly, the peripheries of the substrate units are still encapsulated with the remains of the second encapsulating material after singulation processes where the substrate units are singulated into individual semiconductor packages to prevent exposure of the peripheries of the substrate units. | 2012-10-18 |
20120264258 | METHOD OF ASSEMBLING SEMICONDUCTOR DEVICE INCLUDING INSULATING SUBSTRATE AND HEAT SINK - Semiconductor dies are mounted on a heat sink array frame structure. The heat sink array frame structure and the semiconductor dies are assembled together with an insulating substrate that has a corresponding array of apertures on an adhesive tape. The semiconductor dies are connected electrically with electrical contacts on the insulating substrate. The semiconductor dies, heat sinks and electrical connections to the contacts are encapsulated with a mold compound and then the encapsulated array is de-taped and singulated. | 2012-10-18 |
20120264259 | Method for Forming a Semiconductor Device and a Semiconductor Device - A method for forming a semiconductor device is provided. The method includes providing a semiconductor substrate having a main horizontal surface, an opposite surface and a completely embedded dielectric region. A deep vertical trench is etched from the main horizontal surface into the semiconductor substrate using the dielectric region as an etch stop. A vertical transistor structure is formed in the semiconductor substrate. A first metallization in ohmic contact with the transistor structure is formed on the main horizontal surface. The semiconductor substrate is thinned at the opposite surface at least close to the dielectric region. Further, a semiconductor device is provided. | 2012-10-18 |
20120264260 | TFT ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME - A TFT array substrate includes a substrate, at least one gate line and gate electrode, a gate insulating layer, and at least one channel component, source electrode, drain electrode and data line. The gate line and gate electrode are disposed on the substrate, wherein both of the gate line and gate electrode have first and second conductive layers, the first conductive layer is formed on the substrate, the first conductive layer contains molybdenum nitride , the second conductive layer is formed on the first conductive layer, and the second conductive layer contains copper. The gate insulating layer is disposed on the gate line, gate electrode and the substrate. The channel component is disposed on the gate insulating layer. The source electrode and drain electrode are disposed on the channel component, and data line is disposed on the gate insulating layer. | 2012-10-18 |
20120264261 | METHOD FOR MANUFACTURING AN NMOS WITH IMPROVED CARRIER MOBILITY - Tensile stress is applied to the channel region of an N-type metal oxide semiconductor (NMOS) transistor by directly forming a material having a tensile stress, for example, tungsten, in the contact holes on the source region and drain region of the NMOS. Then, the dummy gate layer in the gate stack of the NMOS transistor is removed, so as to further reduce the counter force of the gate stack on the channel region, thereby increasing the tensile stress in the channel region, enhancing the drift mobility of the carrier, and improving the performance of the transistor. The present invention avoids using a separate stress layer to create tensile stress in the channel region of an NMOS transistor, which advantageously simplifies the transistor manufacturing process and improves sizes and performance of the transistor. | 2012-10-18 |
20120264262 | Method for forming semiconductor structure - The invention relates to a method for forming a semiconductor structure, comprising: providing a semiconductor substrate which comprises a dummy gate formed thereon, a spacer surrounding the dummy gate, source and drain regions formed on two sides of the dummy gate, respectively, and a channel region formed in the semiconductor substrate and below the dummy gate; removing the dummy gate to form a gate opening; forming a stressed material layer in the gate opening; performing an annealing to the semiconductor substrate, the stressed material layer having tensile stress characteristics during the annealing; removing the stressed material layer in the gate opening; and forming a gate in the gate opening. By the above steps, the stress memorization technique can be applied to the pMOSFET. | 2012-10-18 |
20120264263 | Structure and Fabrication of Like-polarity Field-effect Transistors Having Different Configurations of Source/Drain Extensions, Halo Pockets, and Gate Dielectric Thicknesses - A group of high-performance like-polarity insulated-gate field-effect transistors ( | 2012-10-18 |
20120264264 | METHOD OF FABRICATING NON-VOLATILE MEMORY DEVICE - A method of fabricating a non-volatile memory device is provided. A substrate including a first region and a second region is provided. Then, an uneven surface is formed on the substrate in the second region. Thereafter, a doped layer is formed in the substrate in the second region, and the doped layer is served as a control gate. Afterward, a dielectric layer is formed on the substrate in the first region and on the uneven surface of the substrate in the second region. Next, a floating gate is formed on the dielectric layer, and the floating gate is extended from the first region to the second region. Source and drain regions are formed in the substrate at opposite sides of the floating gate in the first region. | 2012-10-18 |
20120264265 | SEMICONDUCTOR DEVICE AND PRODUCTION METHOD THEREFOR - It is an object to allow an inverter to be made up using a single island-shaped semiconductor, so as to provide a semiconductor device comprising a highly-integrated SGT-based CMOS inverter circuit. The object is achieved by a semiconductor device which comprises an island-shaped semiconductor layer, a first gate dielectric film surrounding a periphery of the island-shaped semiconductor layer, a gate electrode surrounding a periphery of the first gate dielectric film, a second gate dielectric film surrounding a periphery of the gate electrode, a tubular semiconductor layer surrounding a periphery of the second gate dielectric film, a first first-conductive-type high-concentration semiconductor layer disposed on top of the island-shaped semiconductor layer, a second first-conductive-type high-concentration semiconductor layer disposed underneath the island-shaped semiconductor layer, a first second-conductive-type high-concentration semiconductor layer disposed on top of the tubular semiconductor layer, and a second second-conductive-type high-concentration semiconductor layer disposed underneath the tubular semiconductor layer. | 2012-10-18 |
20120264266 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A semiconductor device includes a step-type recess pattern formed in a substrate, a gate electrode buried in the recess pattern and having a gap disposed between the gate electrode and upper sidewalls of the recess pattern, an insulation layer filling the gap, and a source and drain region formed in a portion of the substrate at two sides of the recess pattern. The semiconductor device is able to secure a required data retention time by suppressing the increase of leakage current caused by the reduction of a design rule. | 2012-10-18 |
20120264267 | METHOD FOR FABRICATING MOS TRANSISTOR - A method of fabricating a MOS transistor includes the steps of: providing a substrate; forming a gate structure on the substrate; forming a first spacer on the sidewall of the gate structure and forming at least a recess within the substrate next to the first spacer; performing an oxygen-containing process to form an oxygen-containing layer on the surface of the recess; performing a cleaning process to remove the oxygen-containing layer; performing an epitaxial process to form an epitaxial layer in the recess; and removing the first spacer. | 2012-10-18 |
20120264268 | METHODS OF FORMING ELECTRICAL ISOLATION REGIONS BETWEEN GATE ELECTRODES - Methods of forming nonvolatile memory devices include forming first and second floating gate electrodes of first and second nonvolatile memory cells, respectively, at side-by-side locations on a substrate. The substrate is selectively etched to define a trench therein extending between the first and second floating gate electrodes. The trench is at least partially filled with a first electrical insulation pattern. An inorganic polysilazane-type spin-on-glass (SOG) layer is conformally deposited on the first and second floating gate electrodes and on the first electrical insulation pattern and then partially removed. | 2012-10-18 |
20120264269 | Bipolar Junction Transistors and Methods of Fabrication Thereof - A method of forming a semiconductor device is provided. The method includes forming a first fin above a substrate, forming a first emitter region in a first portion of the first fin, forming a first collector region in a second portion of the first fin, and forming a first base region in a third portion of the first fin. The third portion of the first fin is disposed underneath a first gate electrode. The method further includes forming a second fin adjacent to the first fin and above the substrate. The second fin is composed of a semiconductor material. The method also includes forming a first base contact over the second fin. The first base contact is coupled to the first base region through the second fin, the substrate, and the first fin. | 2012-10-18 |
20120264270 | METHODS FOR FORMING HIGH GAIN TUNABLE BIPOLAR TRANSISTORS - Embodiments for forming improved bipolar transistors are provided, manufacturable by a CMOS IC process. The improved transistor comprises an emitter having first and second portions of different depths, a base underlying the emitter having a central portion of a first base width underlying the first portion of the emitter, a peripheral portion having a second base width larger than the first base width partly underlying the second portion of the emitter, and a transition zone of a third base width and lateral extent lying laterally between the first and second portions of the base, and a collector underlying the base. The gain of the transistor is larger than a conventional bipolar transistor made using the same CMOS process. By adjusting the lateral extent of the transition zone, the properties of the improved transistor can be tailored to suit different applications without modifying the underlying CMOS IC process. | 2012-10-18 |
20120264271 | METHOD OF FORMING A CAPACITOR AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE USING THE SAME - A capacitor is fabricated by forming a mold layer of a silicon based material that is not an oxide of silicon, e.g., polysilicon or doped polysilicon, on a substrate, forming an opening through the mold layer, forming a barrier layer pattern along the sides of the opening, subsequently forming a lower electrode in the opening, then removing the mold layer and the barrier layer pattern, and finally sequentially forming dielectric layer and an upper electrode on the lower electrode. | 2012-10-18 |
20120264272 | Methods Of Forming A Nonvolatile Memory Cell And Methods Of Forming An Array Of Nonvolatile Memory Cells Array Of Nonvolatile Memory Cells - A method of forming a nonvolatile memory cell includes forming a first electrode and a second electrode of the memory cell. Sacrificial material is provided between the first second electrodes. The sacrificial material is exchanged with programmable material. The sacrificial material may additionally be exchanged with select device material. | 2012-10-18 |
20120264273 | SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME - Semiconductor devices and methods of fabricating a semiconductor device are provided. The method includes forming a conductive region in a substrate and forming a dielectric layer on the substrate including the conductive region. The dielectric layer has an opening that exposes the conductive region. A buffer semiconductor pattern having a single crystalline state is formed on the exposed conductive region. A filling semiconductor pattern is formed in the opening using an epitaxial process that employs the single crystalline buffer semiconductor pattern as a seed layer. Related devices are also provided. | 2012-10-18 |
20120264274 | TRANSISTOR OF SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - Provided is a transistor of a semiconductor device and a method for fabricating the same. A transistor of a semiconductor device may include: a semiconductor substrate having an active region defined by an isolation layer; a recess trench formed in the active region and disposed to cross the semiconductor substrate in one direction; and a gate line formed in a straight line pattern, overlapping the recess trench and disposed to cross the recess trench at approximately right angles. | 2012-10-18 |
20120264275 | FIELD EFFECT TRANSISTOR WITH AIR GAP DIELECTRIC - A field effect transistor (FET) that includes a drain formed in a first plane, a source formed in the first plane, a channel formed in the first plane and between the drain and the source and a gate formed in the first plane. The gate is separated from at least a portion of the body by an air gap. The air gap is also in the first plane. | 2012-10-18 |
20120264276 | METHOD OF PROCESSING A WAFER BY USING AND REUSING PHOTOLITHOGRAPHIC MASKS - A method of processing a wafer includes establishing a fine of symmetry defining left and right die areas on a front side of the wafer and left and right die areas on a back side. A first mask is used to form a first interconnection layer on the left and right die areas comprising a first portion on the left die area and second portion different than the first portion on the right die area. A second mask is used to form a second interconnection layer on the left and right die areas comprising a third portion on the left die area and fourth portion different than the third portion on the right die area. The first mask is reused to form a third interconnection layer on the left and right die areas on a back side, and the second mask to form a fourth interconnection layer on the left and right die areas on a back side. | 2012-10-18 |
20120264277 | METHOD FOR FORMING A SEMICONDUCTOR DEVICE HAVING NANOCRYSTAL - A method is provided for forming a semiconductor device having nanocrystals. The method includes: providing a substrate; forming a first insulating layer over a surface of the substrate; forming a first plurality of nanocrystals on the first insulating layer; forming a second insulating layer over the first plurality of nanocrystals; implanting a first material into the second insulating layer; and annealing the first material to form a second plurality of nanocrystals in the second insulating layer. The method may be used to provide a charge storage layer for a non-volatile memory having a greater nanocrystal density. | 2012-10-18 |
20120264278 | EPITAXIAL LIFT OFF STACK HAVING A NON-UNIFORM HANDLE AND METHODS THEREOF - Embodiments of the invention generally relate to epitaxial lift off (ELO) thin films and devices and methods used to form such films and devices. In one embodiment, a method for forming a thin film material during an epitaxial lift off process is provided which includes forming an epitaxial material over a sacrificial layer on a substrate, adhering a non-uniform support handle onto the epitaxial material, and removing the sacrificial layer during an etching process. The etching process further includes peeling the epitaxial material from the substrate while forming an etch crevice therebetween and bending the support handle to form compression in the epitaxial material during the etching process. In one example, the non-uniform support handle contains a wax film having a varying thickness. | 2012-10-18 |
20120264279 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating a semiconductor device, wherein the method comprises steps as follows: a semiconductor structure comprising a substrate, a dummy gate structure having a dielectric layer disposed over the substrate and a silicon layer disposed over the dielectric layer, and an etching stop layer (ESL) and an inter-layer dielectric (ILD) layer both of which are sequentially disposed over the substrate and the dummy gate structure is first provided. Then, a chemical mechanical polishing (CMP) is performed to planrizing the ILD layer and expose the ESL. Subsequently, an in-situ etching process is conducted to remove portions of the ESL and the silicon layer to form an opening in the dummy gate structure. Next, metal material is filled into the opening. | 2012-10-18 |
20120264280 | Methods of Fabricating Semiconductor Devices Having Buried Word Line Interconnects - A semiconductor device includes a semiconductor substrate having a cell region and a peripheral circuit region defined therein. A buried word line is disposed in the substrate in the cell region and has a top surface lower than top surfaces of cell active regions in the cell region. A gate line is disposed on the substrate in the peripheral circuit region. A word line interconnect is disposed in the substrate in the peripheral circuit region, the word line interconnect including a first portion contacting the buried word line and having a top surface lower than a top surfaces of the cell active regions and a second portion that is overlapped by and in contact with the gate line. | 2012-10-18 |
20120264281 | METHOD OF FABRICATING A PLURALITY OF GATE STRUCTURES - The invention relates to integrated circuit fabrication, and more particularly to a semiconductor device with a plurality of gate structures. An exemplary method of fabricating the plurality of gate structures comprises providing a silicon substrate; depositing a dummy oxide layer over the substrate; depositing a dummy gate electrode layer over the dummy oxide layer; patterning the layers to define a plurality of dummy gates; forming nitrogen-containing sidewall spacers on the plurality of dummy gates; forming an interlayer dielectric layer between the nitrogen-containing sidewall spacers; selectively depositing a hard mask layer on the interlayer dielectric layer by an atomic layer deposition (ALD) process; removing the dummy gate electrode layer; removing the dummy oxide layer; depositing a gate dielectric; and depositing a gate electrode. | 2012-10-18 |
20120264282 | METHOD FOR FORMING A SEMICONDUCTOR DEVICE HAVING NANOCRYSTALS - A method is provided for forming a semiconductor device having nanocrystals. The method includes: forming a first insulating layer over a surface of a substrate; forming a first plurality of nanocrystals on the first insulating layer; implanting a first material into the first insulating layer; and annealing the first material to form a second plurality of nanocrystals in the first insulating layer. The method may be used to provide a charge storage layer for a non-volatile memory having a greater nanocrystal density. | 2012-10-18 |
20120264283 | METHODS OF FABRICATING FIELD EFFECT TRANSISTORS INCLUDING TITANIUM NITRIDE GATES OVER PARTIALLY NITRIDED OXIDE AND DEVICES SO FABRICATED - A gate of an integrated circuit field effect transistor is fabricated by fabricating a gate insulating layer on an integrated circuit substrate, fabricating a metal nitride layer on the gate insulating layer, annealing the metal nitride layer in a nitridizing ambient and fabricating a cap on the metal nitride layer that has been annealed. Thereafter, the cap on the metal nitride layer may be etched to expose sidewalls thereof and another anneal in a nitridizing ambient may take place. Related integrated circuit field effect transistors are also described. | 2012-10-18 |
20120264284 | MANUFACTURING METHOD FOR METAL GATE STRUCTURE - A manufacturing method for a metal gate structure includes providing a substrate having a gate trench formed thereon, forming a work function metal layer in the gate trench, and performing an annealing process to the work function metal layer. The annealing process is performed at a temperature between 400° C. and 500° C., and in a bout 20 seconds to about 180 seconds. | 2012-10-18 |
20120264285 | RECESSED WORKFUNCTION METAL IN CMOS TRANSISTOR GATES - A transistor gate comprises a substrate having a pair of spacers disposed on a surface, a high-k dielectric conformally deposited on the substrate between the spacers, a recessed workfunction metal conformally deposited on the high-k dielectric and along a portion of the spacer sidewalls, a second workfunction metal conformally deposited on the recessed workfunction metal, and an electrode metal deposited on the second workfunction metal. The transistor gate may be formed by conformally depositing the high-k dielectric into a trench between the spacers on the substrate, conformally depositing a workfunction metal atop the high-k dielectric, depositing a sacrificial mask atop the workfunction metal, etching a portion of the sacrificial mask to expose a portion of the workfunction metal, and etching the exposed portion of the workfunction metal to form the recessed workfunction metal. The second workfunction metal and the electrode metal may be deposited atop the recessed workfunction metal. | 2012-10-18 |
20120264286 | METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES - In a method of manufacturing a semiconductor device, the method comprises: forming a dummy gate pattern on a substrate; and forming first spacers at side surfaces of the dummy gate pattern to expose upper portions of the side surfaces of the dummy gate pattern. Sacrificial film patterns are formed on regions of the upper portions of the side surfaces of the dummy gate pattern which are exposed by the first spacers. Second spacers are formed on the first spacers and the sacrificial film patterns. An interlayer insulating film is formed to cover the substrate, the second spacers and the dummy gate pattern. A top surface of the dummy gate pattern is exposed by planarizing the interlayer insulating film, and a trench is formed by removing the dummy gate pattern and the sacrificial film patterns. | 2012-10-18 |
20120264287 | METHOD FOR FORMING AN INTERCONNECT STRUCTURE - A method for forming an interconnect structure includes providing a semiconductor substrate having a barrier layer, a low dielectric constant (Low K) inter-dielectric layer and a cap dielectric layer sequentially formed thereon; etching the cap dielectric layer and the Low K inter-dielectric layer sequentially until the barrier layer is exposed and a groove is formed; removing the cap dielectric layer until the Low K inter-dielectric layer is exposed; and doping a carbon element into the Low K inter-dielectric layer. The advantages of the method includes a decrease of the dielectric constant of the Low K inter-dielectric layer, thus, reduces the resistive-capacitive (RC) delay of interconnect layers of a semiconductor device and improve its operating speed and performance. | 2012-10-18 |
20120264288 | METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE - A generation of a void in a recessed section is inhibited. A method for manufacturing a semiconductor device includes: an operation of forming recessed sections in an insulating film, which is formed on a semiconductor substrate; an operation of forming a seed film in the recessed section; an operation of forming a cover metal film in the recessed section; an operation of selectively removing the cover metal film to expose the seed film over the bottom section of the recessed section; and an operation to carrying out a growth of a plated film to fill the recessed section by utilizing the seed film exposed in the bottom section of the recessed section as a seed. | 2012-10-18 |
20120264289 | INTEGRATED CIRCUIT INTERCONNECT STRUCTURE - An integrated circuit (IC) interconnect structure that includes a first via positioned in a dielectric and coupled to a high current device at one end, and a buffer metal segment positioned in a dielectric and coupled to the first via at an opposite end thereof. The buffer metal segment includes a plurality of electrically insulating inter-dielectric (ILD) pads forming an ILD cheesing pattern thereon, to direct current. The IC interconnect structure further includes a second via positioned in a dielectric formed over the buffer metal segment and coupled to the buffer metal segment at one end and a metal power line formed in a dielectric and coupled to the second via at an opposite end thereof. The use of the ILD pads on the buffer metal segment enables a more even distribution of current along the metal power line. | 2012-10-18 |