42nd week of 2010 patent applcation highlights part 19 |
Patent application number | Title | Published |
20100264904 | APPARATUS AND SYSTEM FOR A QUASI LONGITUDINAL MODE ELECTRO OPTIC SENSOR FOR HIGH POWER MICROWAVE TESTING - An apparatus, for measuring an applied electrical field and for reducing perturbation to the electrical field being measured, includes a laser integrated into an electro optic crystal sensor head prior to the output fiber. A probe beam is passed along the crystal direction of low birefringence of nearly circular optical indicatrix, rather than one of high EO modulation. The EO crystal is placed between two crossed polarizers and oriented such that a small tilt angle is subtended between its optic axis and the path of the probe beam. Improved optical coupling is achieved by using a large core multimode fiber at the output, to reduce optical insertion losses. A collimating lens emits the intensity modulated laser beam back to a photodetector, where the intensity modulated laser beam is converted to an electrical signal representing both field strength and phase of the electrical field applied to the sensor head. | 2010-10-21 |
20100264905 | ARRANGEMENT FOR THE POTENTIAL-FREE MEASUREMENT OF CURRENTS - The invention relates to an arrangement for the potential-free measurement of current flowing in two primary conductors ( | 2010-10-21 |
20100264906 | Apparatus and Methods Thereof for Power Consumption Measurement at Circuit Breaker Points - Apparatus and methods are provided for the measurement of power consumption at points of interest, such as circuit breakers, machines, and the like. Accordingly, means are provided for measurement of power consumption for each electrical sub-network that is controlled by a circuit breaker. Each apparatus is enabled to communicate its respective data, in an environment of a plurality of such apparatuses, to a management unit which is enabled to provide finer granularity power consumption profiles. Challenges of measuring relatively low supply currents, wireless operation in an environment of a large number of apparatuses, and self-powering are addressed. | 2010-10-21 |
20100264907 | TEST HEAD POSITIONING SYSTEM AND METHOD - An apparatus for supporting a load includes pneumatic units and couplers coupled to opposite sides of the load. The couplers move the load parallel to a first axis responsive to actuation of the pneumatic units. At least one of the couplers rotate the load about a second axis orthogonal to the first axis. The load is compliant along the first axis and about the second axis At least one of the pneumatic units provides compliance along the first axis and about the second axis. | 2010-10-21 |
20100264908 | SHAFT SPEED SENSOR WITH ANALOG OUTPUT - A 2-wire, loop-powered shaft rotational speed sensor device that outputs a 4-20 mA current in response to the shaft rotational speed. The device is comprised of a sensor that senses an output from a sensor disk and outputs a series of voltage pulses whose frequency varies with the shaft rotational speed. A microcontroller measures this pulse frequency and generates a digital code representative of that frequency. A digital-to-analog converter generates an analog waveform in response to the digital code. A loop-powered, voltage-to-current circuit generates the output current in response to the analog waveform. | 2010-10-21 |
20100264909 | Circuits and Methods for Providing a Magnetic Field Sensor with an Adaptable Threshold - A magnetic field has a threshold that adapts in relation to a magnitude of a magnetic field signal representative of a movement of an object. A corresponding method adapts a threshold in relation to a magnitude of a magnetic field signal representative of a movement of an object. | 2010-10-21 |
20100264910 | Use of Topological Charge Measurements To Change Between Different Qubit Encodings - A method for changing qubit encoding for implementation of a quantum computational gate is disclosed. Such a method may include providing first and second qubits encoded in a plurality of non-abelian anyons according to a first encoding scheme. The first encoding scheme may not be suitable for implementing a certain topologically protected quantum computational gate, such as an entangling gate, for example. Successive topological charge measurements may be performed on at least a subset of the anyons until the qubits are encoded according to a second encoding scheme. The second encoding scheme may be different from the first encoding scheme, and may be suitable for implementing the gate. | 2010-10-21 |
20100264911 | SYSTEM FOR TESTING ELECTROMAGNETIC CHARACTERISTICS OF AN ELECTROMAGNETIC STEEL SHEET IN RESPONSE TO A NON-SINUSODIAL WAVE CONTROL SIGNAL - A system for testing electromagnetic characteristics of an electromagnetic steel sheet includes: a driving unit operable based on a non-sinusoidal wave control signal from a control unit and a floating voltage to output a control output; a power output unit operable based on the control output from the driving unit to output a voltage output at an output side coupled across a first winding wound around the electromagnetic steel sheet such that an exciting current flowing through the first winding is generated in response to the voltage output, thereby resulting in an induced voltage across a second winding wound around the electromagnetic steel sheet; and a measuring unit outputting to the control unit an output corresponding to the exciting current and the induced voltage measured thereby such that the control unit obtains the electromagnetic characteristics of the electromagnetic steel sheet based on the output. | 2010-10-21 |
20100264912 | ROTATION ANGLE SENSOR - A rotation angle sensor includes a rotation shaft, a yoke which is made from a magnetic permeable material and includes a first disk portion, a second disk portion and a connection portion magnetically connecting the first disk portion and the second disk portion, the first disk portion and the second disk portion being provided on the rotation shaft in an axial direction of the rotation shaft separately, a first permanent magnet and a second permanent magnet, each having a disk shape which has a uniform plate thickness in a circumferential direction thereof, and which are provided on a first face of the first disk portion and a second face of the second disk portion respectively, the first face being opposed to the second face, a magnetic field detection section which is provided between the first permanent magnet and the second permanent magnet, and generates an output signal in response to an intensity of a magnetic field formed by the first permanent magnet and the second permanent magnet during a rotation of the rotation shaft. The first permanent magnet and the second permanent magnet are inclined with respect to a direction perpendicular to the axial direction of the rotation shaft so that a distance of a line passing through the magnetic field detection section and connecting the first disk portion and the second disc portion in the axis direction of the rotation shaft is gradually changed in accordance to the rotation of the shaft. | 2010-10-21 |
20100264913 | MAGNETIC FIELD SENSOR - A magnetic field sensor which has a simple configuration and is capable of detecting a magnetic field with high sensitivity, including a vessel containing a dispersion in which magnetic particles are dispersed, a light source which irradiates the vessel with light, and light intensity measurement means arranged on an opposite side of the vessel from the light source for measuring the intensity of transmitted light having passed through the vessel, as needed. | 2010-10-21 |
20100264914 | SYSTEM AND METHOD FOR ESTIMATING FORMATION CHARACTERISTICS IN A WELL - A technique utilizes the acquisition of data via nuclear magnetic resonance at multiple depths of investigation in a well region. The acquired data is processed to estimate variable fluid mixture densities at different radial depths. The variable fluid mixture densities and a radial response from a density tool, for example, can be used to calculate an effective fluid mixture density and used to interpret density logs. Other logs such as neutron log, induction resistivity log, and dielectric permittivity log can be combined with NMR. For these tools a corresponding effective formation property can be calculated and used to determine other formation characteristics, such as total porosity, total density, dielectric permittivity, electric resistivity, and formation characteristics derivable from these. | 2010-10-21 |
20100264915 | FORMATION TESTING AND EVALUATION USING LOCALIZED INJECTION - Evaluating a formation by lowering a downhole tool in a wellbore penetrating the formation, injecting a fluid into the formation at an injection zone via the downhole tool, and using a formation evaluation sensor to perform a measurement at each of a plurality of locations in the wellbore each proximate the injection zone. At least two of the plurality of measurements are compared, and a formation property is determined based on the comparison. | 2010-10-21 |
20100264916 | APPARATUS AND METHOD FOR REAL TIME AND REAL FLOW-RATE MEASUREMENT OF MULTI-PHASE FLUIDS - A method for measuring flow rate of at least one fluid in a multi-phase fluid comprises: providing a magnetic resonance module through which the fluid phases flow and at least one pre-polarization module of variable effective length upstream of the magnetic resonance module; and conducting a measurement by: i) setting the pre-polarization module to have a first effective length, ii) applying a RF pulse sequence to the fluid in the magnetic resonance module, iii) determining the intensity of a pre-determined number of spin echoes produced by the RF pulse sequence, iv) determining a line approximating the attenuation of the intensity during the RF sequence, v) determining slope and y-intercept of the line, vi) determining the ratio of the slope and intercept, vii) applying a calibration between the slope:intercept ratio and multi-phase flow rate so as to determine the flow velocity of the fluid in the multi-phase fluid. | 2010-10-21 |
20100264917 | DETECTION OF MAGNETIC RESONANCE SIGNALS USING A MAGNETORESISTIVE SENSOR - A method and apparatus are described wherein a micro sample of a fluidic material may be assayed without sample contamination using NMR techniques, in combination with magnetoresistive sensors. The fluidic material to be assayed is first subject to pre-polarization, in one embodiment, by passage through a magnetic field. The magnetization of the fluidic material is then subject to an encoding process, in one embodiment an rf-induced inversion by passage through an adiabatic fast-passage module. Thereafter, the changes in magnetization are detected by a pair of solid-state magnetoresistive sensors arranged in gradiometer mode. Miniaturization is afforded by the close spacing of the various modules. | 2010-10-21 |
20100264918 | IRON-FREE VARIABLE TORQUE MOTOR COMPATIBLE WITH MAGNETIC RESONANCE IMAGING IN INTEGRATED SPECT AND MR IMAGING - An apparatus and method for performing dual modality SPECT/MRI imaging on an object in combination with a whole-body MRI system includes a collimated nuclear radiation detector for receiving radiation from the object, and a radiofrequency MRI coil enveloping the object and interfaced with the collimated nuclear radiation detector. The MRI coil and collimated detector are arranged and configured for disposition within the whole-body MRI system. | 2010-10-21 |
20100264919 | NMR-Detecting Cell, NMR-Measuring Method, and NMR-Measuring Apparatus - An object of the present invention is to provide an effective method for measuring by NMR in real time, an NMR-detecting cell for measurement of NMR, and an NMR-measuring apparatus. | 2010-10-21 |
20100264920 | SPIN LOCKED BALANCED STEADY-STATE FREE PRECESSION (SLSSFP) - A spin locked balanced steady-state free precession (slSSFP) pulse sequence combines a balanced gradient echo acquisition with an off-resonance spin lock pulse for fast MRI. The transient and steady-state magnetization trajectory is solved numerically using the Bloch equations and is shown to be similar to balanced steady-state free precession (bSSFP) for a range of T2/T1 and flip angles, although the slSSFP steady-state could be maintained with considerably lower RF power. In both simulations and brain scans performed at 7 T, slSSFP is shown to exhibit similar contrast and SNR efficiency to bSSFP, but with significantly lower power. | 2010-10-21 |
20100264921 | SQUID DETECTED NUCLEAR MAGNETIC RESONANCE AND IMAGING AT ULTRA-WEAK FIELDS - The invention provides a high resolution proton nuclear magnetic reonance and imaging (NMR/MRI) in microtesla magnetic fields by using high critical temperature (high-T | 2010-10-21 |
20100264922 | System for Multi Nucleus Cardiac MR Imaging and Spectroscopy - A system for respiratory motion compensated MR imaging or spectroscopy, comprises an MR imaging system. The MR imaging system performs a single imaging scan including, acquiring a first imaging data set representing a spatially localized first imaging region located on a patient diaphragm, using a first RF excitation pulse sequence and by transmitting a nuclei excitation first resonant frequency and receiving data substantially at the first resonant frequency. The MR imaging system derives data representing diaphragm position over a respiratory cycle using the first imaging data set, in the single imaging scan. The MR imaging system in response to determining the diaphragm position is within a predetermined window, acquires a second anatomical imaging data set representing a spatially localized second imaging region using a second RF excitation pulse sequence and by transmitting a nuclei excitation second resonant frequency different to the first resonant frequency and receiving data substantially at the second resonant frequency in the single imaging scan. | 2010-10-21 |
20100264923 | System for Improved MR Image Reconstruction - A system for parallel image processing in MR imaging uses multiple MR imaging RF coils to individually receive MR imaging data representing a slice of patient anatomy. An MR imaging system uses the multiple RF coils to acquire corresponding multiple image data sets of the slice. A coil selection processor determines a prioritized ranking of the multiple RF coils by ranking individual coils of the multiple RF coils based on correlation with remaining coils of the multiple RF coils. The correlation being determined by determining degree of correlation of image data sets acquired by respective coils of the multiple RF coils. The coil selection processor selects a subset of the multiple RF coils using the ranking. An image generator generates a composite MR image using image data sets provided by the selected subset of the multiple RF coils excluding image data sets provide by remaining coils of the multiple RF coils. | 2010-10-21 |
20100264924 | MAGNETIC RESONANCE METHOD AND APPARATUS WITH DISPLAY OF DATA ACQUISITION PROGRESS FOR A SUBJECT CONTINUOUSLY MOVING THROUGH THE APPARATUS - In a method and magnetic resonance apparatus to display progress of the acquisition of measurement data of an examination region of an examination subject during continuous travel of the examination region through a magnetic resonance apparatus, a current projection image is calculated on the basis of current measurement data acquired from central k-space during the continuous travel of the examination region, and the currently calculated projection image is displayed. By the calculation of the projection images on the basis of measurement data from central k-space, this calculation can ensue particularly quickly and with little effort. A particularly fast display of the projection images is therefore possible. A projection image can be calculated particularly quickly and simply from measurement data along a central k-space line—i.e. a k-space line that runs through the center of k-space—using a one-dimensional Fourier transformation along this central k-space line. | 2010-10-21 |
20100264925 | MAGNETIC RESONANCE METHOD AND APPARATUS FOR ACQUIRING MEASUREMENT DATA FROM A SUBJECT CONTINUOUSLY MOVING THROUGH THE APPARATUS - In a method and apparatus for the acquisition of measurement data of an examination region of an examination subject (in particular a patient) during continuous travel of the examination region through a magnetic resonance apparatus for the generation of an image data set, the continuous travel is interrupted and resumed at least once. The examination region is moved back by a predeterminable distance counter to the travel direction of the continuous travel before interrupting the continuous travel. Moving the examination region back makes it possible to interrupt and resume an acquisition of measurement data given (otherwise) continuous travel of the examination region, without loss of measurement data. The time during the interruption can be used advantageously for preparation of an acquisition of measurement data in the portion of the examination region of the patient that is to be examined after the interruption of the continuous travel. In particular, during the interruption a patient can be prepared to hold his or her breath for an acquisition of additional measurement data that follows the interruption. The continuous travel can be interrupted arbitrarily often. | 2010-10-21 |
20100264926 | SYSTEM AND METHOD FOR PHASE RELAXED RF PULSE DESIGN - Techniques for designing RF pulses may be configured to produce improved magnitude profiles of the resulting magnetization by relaxing the phase constraint and optimizing the phase profiles. In one embodiment, a spinor-based, optimal control, optimal phase technique may be used to design arbitrary-tip-angle (e.g., large and small tip angle) RF pulses (both parallel transmission and single channel). In another embodiment, small tip angle RF pulses (both parallel transmission and single channel) may be designed using a small-tip-angle (STA) pulse design without phase constraint that is formulated as a parameter optimization problem. | 2010-10-21 |
20100264927 | HIGH-PERFORMANCE NANOMATERIAL COIL ARRAYS FOR MAGNETIC RESONANCE IMAGING - Magnetic Resonance Imaging with imaging coils at least partially formed from carbon-based nanomaterials possessing high Signal-to-Noise-Ratio (SNR) are disclosed. The imaging or Radio Frequency receiving coils are constructed with a locally ballistic electrical conductor such as carbon in the form of a macroscopic configuration of carbon nanotubes or variations thereof whose resistance does not increase significantly with length over appropriate local length scales. Due to their enhanced SNR properties, the nanomaterial imaging coils and arrays including the nanomaterial imaging coils can result in significant improvements in imaging with MRI systems. The nanomaterial imaging coils include metal conductors deposited on ends of the coils. | 2010-10-21 |
20100264928 | TEST ASSEMBLY FOR A CIRCUIT BREAKER - A test assembly for a circuit breaker with a single pole module having first and second conduction paths electrically isolated from each other via an interior wall of the module and a circuit board. The test assembly includes an axle at an upper portion of the interior wall and having a first end and a second end extending along opposite sides of the interior wall, a test actuation member configured to be actuated, and a spring in operable communication with the test actuation member and in signal communication with the circuit board. The spring contacts the test actuation member and the first end of the axle when the test actuation member is actuated, the axle conducts an electrical signal to the spring, and the spring provides a test signal to the circuit board initiating a test operation of the circuit breaker. | 2010-10-21 |
20100264929 | LIFETIME ESTIMATING METHOD AND DETERIORATION SUPPRESSING METHOD FOR RECHARGEABLE LITHIUM BATTERY, LIFETIME ESTIMATING APPARATUS, DETERIORATION SUPPRESSOR, AND BATTERY PACK AND CHARGER USING THE SAME - In a lifetime estimating method for a rechargeable lithium battery, the open circuit voltages of the rechargeable lithium battery after discharging for at least two different charge/discharge cycle numbers are detected while charge/discharge cycles go on. Next, at least the two of the voltage values are plotted for respective cycle numbers, and a circular arc passing the plotted points is drawn. Furthermore, the lifetime of the rechargeable lithium battery is estimated based on a size of the circular arc. The progression of deterioration can be suppressed by controlling the charge and discharge of the rechargeable lithium battery based on the lifetime estimation. | 2010-10-21 |
20100264930 | FUEL CELL SYSTEM - There is provided an impedance measuring system which can accurately measure the impedance of a fuel cell. A motor rotation number detection unit successively detects the rotation number of a motor controlled by an inverter and outputs the detection result to a superposition signal generation unit The superposition signal generation unit sets the frequency of an impedance measuring signal to a non-resonant frequency so that the control signal of the motor not resonate with the impedance measuring signal. Thus, by setting the frequency of the impedance measuring signal to the non-resonant frequency, the resonance with the motor is suppressed, which can improve impedance measurement accuracy. | 2010-10-21 |
20100264931 | AMBULATORY INFUSION DEVICE WITH SENSOR TESTING UNIT - An ambulatory infusion device for infusion of a liquid drug into a patient's body over an extended period of time and methods thereof are disclosed. The device includes a sensor assembly, which produces a sensor assembly output based on an infusion characteristic of the ambulatory infusion device and based on a supply voltage/current, and a supply unit which is coupled to a sensor of the sensor assembly and generates the supply voltage/current. A sensor testing unit detects a failure of the sensor assembly, wherein the sensor testing unit is coupled to the sensor assembly and the supply unit, and the sensor testing unit carries out a sensor testing sequence. The sensor testing sequence includes controlling the supply unit so as to produce a variation of the supply voltage/current, and determining whether the variation of the supply voltage/current produces a corresponding variation of the sensor assembly output. | 2010-10-21 |
20100264932 | TESTING OF AN INTEGRATED CIRCUIT THAT CONTAINS SECRET INFORMATION - An integrated circuit ( | 2010-10-21 |
20100264933 | SYSTEM AND METHOD FOR TESTING SIZE OF VIAS - A system and method for testing size of vias reads a component group from a storage system and reads a via size of each via in the component group. If the via size of a via accords with a standard size corresponding to the component group, the via is determined as a qualified via. If the via size of a via does not accord with the standard size, the via is determined as an unqualified via. The unqualified via is highlighted on a printed circuit board (PCB) design map displayed on a display. | 2010-10-21 |
20100264934 | PROCESSING DEVICE FOR PIEZOELECTRIC ACTUATOR AND PROCESSING METHOD FOR PIEZOELECTRIC ACTUATOR - A processing device is provided with a circuit connected to a first conductive portion and a second conductive portion. An AC voltage source produces an AC waveform voltage obtained by adding a bias voltage to an AC voltage for capacitance measurement. The AC waveform voltage is applied between the first conductive portion and the second conductive portion through the measurement probes. The moment the AC waveform voltage is applied to the circuit with a switch closed, an inrush current flows through the circuit based on a potential difference of the bias voltage. This inrush current causes dielectric breakdown in the conductive resin, thereby securing the continuity of the conductive resin. With the continuity of the conductive resin secured, a capacitance of the piezoelectric body is measured by the AC waveform voltage, and it is determined whether or not the piezoelectric body is normal. | 2010-10-21 |
20100264935 | Electrically Conductive Kelvin Contacts For Microcircuit Tester - Terminals of a device under test are connected to corresponding contact pads or leads by a series of electrically conductive contacts. Each terminal testing connects with both a “force” contact and a “sense” contact. In one embodiment, the sense contact partially or completely laterally surrounds the force contact, so that it need not have its own resiliency. The sense contact has a forked end with prongs that extend to opposite sides of the force contact. Alternatively, the sense contact surrounds the force contact and slides laterally to match a lateral translation component of a lateral cross-section of the force contact during longitudinal compression of the force contact. Alternatively, the sense contact includes rods that have ends on opposite sides of the force contact, and extend parallel. | 2010-10-21 |
20100264936 | Connector Fitting Test Tool - A compact and easy to use female connector testing tool includes an outer housing containing a movable plunger. A male connection end is attached to one end of the movable plunger. A predetermined resistive force is provided between the outer housing and the plunger to provide adequate resistance against movement between them. As the tool is pulled away from the female connector, in which the male connection end is inserted, the plunger moves with respect to the outer housing. An indicator indicates if the female connector has passed (and is good) or has failed. The indicator may be used to provide measurements of the pullout or push-in force required to remove or insert the male connector from the female connector. The indicator may include a pass/fail indicator, a graded scale, an electronic display or audible display. A mechanical pullout mechanism may be used to provide a fast test of the holding resistance of the female connector. | 2010-10-21 |
20100264937 | LIQUID CONCENTRATION SENSING DEVICE - A capacitance sensing section senses a capacitance between first and second electrodes. A temperature sensing section senses fuel temperature. A microcomputer functions as a concentration sensing section and senses a concentration of ethanol contained in fuel based on the capacitance sensed by the capacitance sensing section and the temperature sensed by the temperature sensing section. The microcomputer functions as an abnormality detecting section and performs abnormality determination to determine that an abnormality has occurred in the capacitance sensing section when the capacitance sensed by the capacitance sensing section does not change and the temperature sensed by the temperature sensing section changes. Since a dielectric constant has such a temperature characteristic that the dielectric constant changes with the temperature, the abnormality detecting section can detect occurrence of the abnormality in the capacitance sensing section. | 2010-10-21 |
20100264938 | Method and Device for Position Detection - A method and the device for position detection are disclosed. The device comprises a plurality of conductive strips intersecting each other to form a plurality of intersecting regions. A pair of depressed strips intersecting on any intersecting region contact each other to form a depressed intersecting region. When a high voltage and a low voltage are separately provided to the first ends of each pair of overlapping strips, the voltages at the second ends of each pair of overlapping strips are detected so as to determine each depressed intersecting regions. | 2010-10-21 |
20100264939 | Inductive sensor module and inductive proximity sensor - Inductive sensor module comprising a coil arrangement and a carrier, on which electronic components are arranged, wherein the coil arrangement is arranged on a first side of the carrier and the electronic components are arranged on a second side of the carrier directed away from the first side. | 2010-10-21 |
20100264940 | CAPACITANCE TOUCH SENSING DEVICE AND DOOR LOCKING DEVICE - A capacitance touch sensing device that detects the touch of a user against a surface of a door handle on the outside of a vehicle includes an upper sensor electrode provided in an upper portion of the door handle, a lower sensor electrode provided in a lower portion of the door handle, an upper detecting portion that detects when the user has touched an upper surface of the door handle based on output from the upper sensor electrode, and a lower detecting portion that detects when the user has touched a lower surface of the door handle based on output from the lower sensor electrode. The detection sensitivity of one of the upper detecting portion or the lower detecting portion is lower than the detection sensitivity of the other. | 2010-10-21 |
20100264941 | Method and Device for the Operation of an Mox Gas Sensor - A method for operating an MOX gas sensor is provided for measuring a gas concentration present in the environment. The MOX sensor is heated by an electric current source, and an electric output quantity of the sensor representing a gas concentration being detected and analyzed is generated. The MOX sensor is discontinuously heated at discrete measuring times by the electric current source, and a measured value representing the gas concentration is generated from the electric output quantity of the sensor detected during the discrete measuring times. A device for operating the MOX gas sensor is additionally is provided. | 2010-10-21 |
20100264942 | Control Liquid Identifying Method and Analysis Device - Disclosed is a method of distinguishing between a specimen and a control solution in a system for analyzing a specific component within the specimen using an analysis tool. The distinguishing method includes a first step (S | 2010-10-21 |
20100264943 | Resistance variation detection circuit, semiconductor device and resistance variation detection method - A circuit for detecting variation of a resistance value of a resistor with respect to a reference value includes a first resistor; a second resistor; a first current source circuit for supplying current to the first resistor; a second current source circuit for supplying current to the second resistor; a voltage comparator circuit for comparing a voltage across the first resistor and a voltage across the second resistor; and a control circuit for digitally adjusting the supply current of at least one of the first or second current source circuit. A ratio of resistance values of the first and second resistors can be obtained from an adjustment value from the control circuit and result of comparison from the voltage comparator circuit. | 2010-10-21 |
20100264944 | Branch current monitoring system - A power monitoring system that reduces the need for transient voltage suppressors while using current transformers on an associated support operating using a current mode. | 2010-10-21 |
20100264945 | SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor integrated circuit includes a sense amplifier for sensing input data and a sense amplifier controller for blocking a signal path between the sense amplifier and a memory cell when a test mode signal is activated. | 2010-10-21 |
20100264946 | TEST AND MEASUREMENT INSTRUMENT AND METHOD OF CONFIGURING USING A SENSED IMPEDANCE - A test and measurement instrument including a port including a plurality of connections; an impedance sense circuit configured to sense an impedance coupled to a connection of the plurality of connections; and a controller configured to setup the test and measurement instrument in response to a sensed impedance from the impedance sense circuit. | 2010-10-21 |
20100264947 | CLOSED-GRID BUS ARCHITECTURE FOR WAFER INTERCONNECT STRUCTURE - An interconnect structure employs a closed-grid bus to link an integrated circuit tester channel to an array of input/output (I/O) pads on a semiconductor wafer so that the tester channel can concurrently communicate with all of the I/O pads. The interconnect structure includes a circuit board implementing an array of bus nodes, each corresponding to a separate one of the I/O pads. The circuit board includes at least two layers. Traces mounted on a first layer form a set of first daisy-chain buses, each linking all bus nodes of a separate row of the bus node array. Traces mounted on a second circuit board layer form a set of second daisy-chain buses, each linking all bus nodes of a separate column of the bus node array. Vias and other circuit board interconnect ends of the first and second daisy-chain buses so that they form the closed-grid bus. Each bus node is connected though a separate isolation resistor to a separate contact pad mounted on a surface of the circuit board. A set of spring contacts or probes link each contact pad to a separate one of the I/O pads on the wafer. | 2010-10-21 |
20100264948 | DIFFERENTIAL SIGNAL PROBING SYSTEM - A probe measurement system comprises a probe with a linear array of probe tips enabling a single probe to be used when probing a test structure with a differential signal | 2010-10-21 |
20100264949 | FLEXURE BAND AND USE THEREOF IN A PROBE CARD ASSEMBLY - A flexure band can comprise structures configured to have elastic properties. Such a band can be stretched but will return generally to its original shape after forces that stretched the band are removed. The flexure band can hold one or more temperature control devices against a peripheral edge of a stiffening frame in a probe card assembly, or the flexure band can itself be a temperature control device. The band can be made of a metal that can be selected to impart one or more of the following properties: low thermal conductivity, high specific heat, generates little to no appreciable contamination, and/or usable over a wide range of temperatures. A material can be added to the band as a full or partial coating that enhances or adds one or more of the above-mentioned possible properties of the metal band. | 2010-10-21 |
20100264950 | Electronic device including electronic part and wiring substrate - An electronic device includes an electronic part and a wiring substrate. The electronic part includes a rewiring substrate, a semiconductor chip, and solder bumps arranged in a matrix form. The wiring substrate includes a wire and lands arranged in a matrix form corresponding to the solder bumps. Each of the lands is coupled with corresponding one of the solder bumps so as to form connection portions. The connection portions include nonfunctional connection portions that do not provide an electric connection between the semiconductor chip and the wire. The lands forming the nonfunctional connection portions include a power source land and a ground land arranged next to each other in a row direction or a column direction. The lands that are arranged next to the lands forming the nonfunctional connection portions in the row direction or the column direction are set to signal lands. | 2010-10-21 |
20100264951 | INTERCONNECTION CARD FOR INSPECTION, MANUFACTURE METHOD FOR INTERCONNECTION CARD, AND INSPECTION METHOD USING INTERCONNECTION CARD - Recesses are formed on one surface of a substrate. A conductive film covers an inner surface of each of the recesses. This conductive film contacts a bump of a semiconductor device to be inspected and is electrically connected to the bump. It is therefore possible to prevent damages of the bump to be caused by contact of a probe pin. | 2010-10-21 |
20100264952 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - A semiconductor integrated circuit device includes: an inter-equipment authentication section formed on a chip and configured to perform inter-equipment authentication between the inter-equipment authentication section itself and source equipment; a control section formed on the chip and configured to control the inter-equipment authentication, the control section operating when a system clock from an oscillation section is supplied, and being capable of giving instructions to stop the oscillation of the oscillation section; and an oscillation stop canceling section configured to output an oscillation stop canceling signal to restart the oscillation of the oscillation section, based upon whether or not 5 volts of DDC from the source equipment is supplied to an input terminal. The start of the operation of a microcontroller unit on a system on chip is cable of being controlled by the 5 volts of DDC, which are power supply voltage supplied from the source equipment via DDCs. | 2010-10-21 |
20100264953 | Soft Error Hard Electronic Circuit and Layout - This invention comprises a layout method to effectively protect electronic circuits against soft errors (non-destructive errors) and circuit cells, which are protected against soft errors. The invention applies a layout method to sequential and combinational logic to generate specific circuit cells with netlists and layouts which are hardened against single event generated soft-errors. It also devices methods of how two or more such cells should be laid out and placed relative to each other, in order to have the best global soft-error protection. | 2010-10-21 |
20100264954 | RECEIVE CIRCUIT FOR CONNECTORS WITH VARIABLE COMPLEX IMPEDANCE - Embodiments of a circuit for use with an inter-chip connection that has a variable complex impedance (which can be conductive, capacitive or both), a system that includes the circuit, and a communication technique are described. This inter-chip connection may be formed between a microspring or an anisotropic film and a metal connector on or proximate to a surface of a chip. Moreover, the circuit may mitigate signal distortion associated with the variable complex impedance. For example, the circuit may include an internal impedance that is electrically coupled in series with the metal connector, and that has an impedance which dominates the variable complex impedance over a range of operating frequencies. Separately or additionally, the circuit may be adapted to correct for the signal distortion. | 2010-10-21 |
20100264955 | METAL PROGRAMMABLE LOGIC AND MULTIPLE FUNCTION PIN INTERFACE - Some of the embodiments of the present invention provide an integrated circuit device including a first metal interconnect, an end of which is coupled to a core of the integrated circuit device, a second metal interconnect, an end of which is coupled to a first input/output (I/O) pin, and a third metal interconnect configured to be coupled to the first metal interconnect and to the second metal interconnect. Other embodiments are also described and claimed. | 2010-10-21 |
20100264956 | Inverter, method of manufacturing the same, and logic circuit including the inverter - Provided are an inverter, a method of manufacturing the inverter, and a logic circuit including the inverter. The inverter may include a first transistor and a second transistor having different channel layer structures. A channel layer of the first transistor may include a lower layer and an upper layer, and a channel layer of the second transistor may be the same as one of the lower layer and the upper layer. At least one of the lower layer and the upper layer may be an oxide layer. The inverter may be an enhancement/depletion (E/D) mode inverter or a complementary inverter. | 2010-10-21 |
20100264957 | OUTPUT CIRCUIT - An output circuit includes: an NMOS transistor of an output buffer, a transistor ON drive circuit configured to turn on the transistor; a switchable current source configured to turn off the transistor; and a drive control circuit configured to control the transistor ON drive circuit and the switchable current source. The electric charge at the gate terminal of the NMOS transistor of the output buffer is pulled out with the current of the switchable current source at a fixed current value even when the gate voltage of the transistor varies in a range of variations of the threshold voltage Vth of the transistor. | 2010-10-21 |
20100264958 | OUTPUT CIRCUIT AND MULTI-OUTPUT CIRCUIT - An output circuit includes a high-side transistor, a low-side transistor, a gate protection circuit, a level shift circuit, and a pre-driver circuit. The level shift circuit interrupts a current path from an output terminal to the level shift circuit after a predetermined time has passed since the high-side transistor was switched OFF. | 2010-10-21 |
20100264959 | FREQUENCY CONVERSION APPARATUS AND FREQUENCY CONVERSION METHOD - To provide a frequency conversion device which uses a magneto-resistive device and thereby can correspond to a Si-based MMIC and a GaAs-based MMIC. A frequency conversion apparatus according to the present invention includes: a frequency conversion device made of a magneto-resistive device including a magnetic free layer, an intermediate layer, and a magnetic pinned layer; a magnetic field applying mechanism for applying a magnetic field to the frequency conversion device; a local oscillator for applying a local oscillation signal to the frequency conversion device; and an input terminal electrically connected to the frequency conversion device, and used to input an external input signal. | 2010-10-21 |
20100264960 | CIRCUIT FOR CHANGING FREQUENCY OF A SIGNAL AND FREQUENCY CHANGE METHOD THEREOF - A signal frequency change circuit is presented. The signal frequency change circuit includes a delay line, a detector, a controller, a multiplexer, and an output unit. The delay line delays a clock signal by a first delay time corresponding to a delay control signal to generate a delay signal and delays the clock signal by a second delay time shorter than a first delay time to generate a pre-frequency change clock signal. The detector generates a phase locked completion signal. The controller sequentially shifts the delay control signal and a multiplexing control signal. The multiplexer selects and outputs one of the pre-frequency change clock signals. The output unit generates a frequency change clock signal. | 2010-10-21 |
20100264961 | Oscillation frequency control circuit - Provided is an oscillation frequency control circuit for correcting its frequency, keeping the oscillation frequency stable when self-oscillating, and oscillating with a control voltage generated by making a fixed voltage given from outside variable. In the oscillation frequency control circuit, a CPU selects/outputs the control voltage preferentially according to a command of a control voltage selection. If the command is not given and the level of an outside reference signal detected by a detecting circuit is within an adequate range, it turns a select switch on. If the command is not given and the level of the outside reference signal is out of the adequate range, it turns the select switch off and outputs information about pulse generation stored in a memory to a PWM circuit. | 2010-10-21 |
20100264962 | VCO DRIVING CIRCUIT AND FREQUENCY SYNTHESIZER - A VCO driving circuit and a frequency synthesizer wherein the impedance viewed from a VCO control terminal is reduced to prevent the VCO phase noise characteristic from degrading. A VCO driving circuit and a frequency synthesizer having the VCO driving circuit, which comprises a coarse adjustment DAC that receives a digital data, which has a coarse adjustment frequency, to output an analog signal; a fine adjustment DAC that receives a digital data, which has a fine adjustment frequency, to output an analog signal; a low response speed LPF | 2010-10-21 |
20100264963 | Clock data recovery circuit and multiplied-frequency clock generation circuit - Disclosed herein is a clock data recovery circuit including: a first phase detector; a loop filter; a charge pump; a voltage-controlled oscillator; a second phase detector; a phase correction information generation section; and a phase correction information addition section. | 2010-10-21 |
20100264964 | Pll circuit - There is provided a PLL circuit including a first loop filter and a second loop filter, which includes a current signal generation circuit that includes a first output driver that generates a first current signal to be output to the first loop filter and a second output driver that generates a second current signal to be output to the second loop filter, and a control circuit that selects which of the first output driver and the second output driver is to be activated. | 2010-10-21 |
20100264965 | Fractional-N frequency synthesizer having reduced fractional switching noise - A fractional-N frequency synthesizer having reduced fractional switching noise and spurious signals is provided. The synthesizer includes a voltage controlled oscillator for providing an output signal. A fractional-N divider is responsive to the voltage controlled oscillator for providing a divided output signal having fractional switching noise. A band pass filter is responsive to the fractional-N divider for reducing the fractional switching noise and non-linearities that result in spurious signals. A phase detector is responsive to a reference signal and the band pass filter for providing a control signal representative of the phase difference between the reference signal and the signal from the band pass filter. A loop filter is responsive to the phase detector for filtering the control signal to control the voltage controlled oscillator, the output of the loop filter having reduced fractional switching noise and spurious signals. | 2010-10-21 |
20100264966 | SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD OF CONTROLLING THE SAME - A semiconductor integrated circuit includes an update control unit configured to generate an update control signal in response to a first command and a second command; and a DLL (Delay Locked Loop) circuit configured to generate an output clock by controlling a phase of an external clock in response to the update control signal. | 2010-10-21 |
20100264967 | CLOCK AND DATA RECOVERY CIRCUITS - A clock and data recovery (CDR) circuit is provided. The CDR circuit receives a data signal and generates a clock signal. The CDR circuit comprises an oscillator, a phase detector, and a first voltage-to-current (V-to-I) converter. The oscillator generates the clock signal according to an oscillation voltage. The phase detector receives the data signal. The phase detector comprises a mixer for detecting a phase difference between the data clock and the clock signal and generating a phase detection signal which represents the phase difference. The first V-to-I converter receives the phase detection signal and generates a first current signal according to a voltage level of the phase detection signal to vary the oscillation voltage. | 2010-10-21 |
20100264968 | DELAY LOCKED LOOP AND METHOD OF DRIVING DELAY LOCKED LOOP - Provided are a delay locked loop (DLL) having a pulse width detection circuit and a method of driving the DLL. The DLL includes a pulse width detection circuit and a delay circuit. The pulse width detection circuit receives a reference clock signal, detects a pulse width of the reference clock signal, and outputs the detection result as a pulse width detection result signal. The delay circuit receives and delays the reference clock signal, and outputs the delayed reference clock signal as an output clock signal. The delay circuit receives the pulse width detection result signal from the pulse width detection circuit, and controls a time delay in the reference clock signal in response to the pulse width detection result signal. | 2010-10-21 |
20100264969 | PHASE INTERPOLATOR WITH ADAPTIVE DELAY ADJUSTMENT - The phase interpolator includes two adjustable delays | 2010-10-21 |
20100264970 | EDGE RATE CONTROL FOR I2C BUS APPLICATIONS - Consistent with an example embodiment, an edge-rate control circuit arrangement ( | 2010-10-21 |
20100264971 | Square Waveform Shaping Device - A data signal generation device comprising a microprocessor and a digital potential divider, in which the microprocessor is adapted to generate a square wave output signal, and in which the digital potential divider is adapted to receive said square wave output signal, and to ramp up and down an output signal voltage and/or current according to state transitions in said square wave output signal. | 2010-10-21 |
20100264972 | FAST FLIP-FLOP STRUCTURE WITH REDUCED SET-UP TIME - A flip-flop structure with reduced set-up time is provided. The flip-flop includes the first master latch receiving a function data through the first switch controlled by a clock signal, the second master latch receiving a scan data through the second switch controlled by the clock signal, and a slave latch connected to the first master latch through the third switch controlled by the clock signal. The second master latch is coupled to the first master latch through the fourth switch controlled by the scan enable signal so that the scan enable signal controls whether the function data or the scan data becomes an output from the first master latch to the slave latch, and the slave latch is used to latch and transmit the output from the first master latch. | 2010-10-21 |
20100264973 | ECONOMY PRECISION PULSE GENERATOR - A system includes an input device, an output device, a mechanical chassis, a printed circuit board, and a semiconductor device. The semiconductor device includes a mechanical package, and a semiconductor die. The semiconductor die includes a semiconductor layer, a plurality of metal layers, a clock distribution network that distributes a clock signal within the die, and an economy precision pulse generating circuit. The economy precision pulse generating circuit includes a pre-charge circuit, a gate-to-the-partial-jam-latch-keeper circuit, a partial-jam-latch-keeper circuit, and a pull-down-against-the-up-keeper circuit. A source clock signal is derived from the clock signal. The source clock signal is provided to a first input of a logical AND circuit, the pre-charge circuit, and the gate-to-the-partial-jam-latch-keeper circuit. A common storage node is connected to a second input of the logical AND circuit. The logical AND circuit outputs an output pulse. The output pulse is fed back to the pull-down-against-the-up-keeper circuit. | 2010-10-21 |
20100264974 | Input-output device protection - A cascoded input-output device is provided configured to receive at an input node a lower voltage input signal and to generate at an output node a higher voltage output signal. The input-output device is split into two voltage domains to enable output signals in a larger range to be generated, whilst the components of the input-output device individually operate in a smaller range. By applying a selected bias voltage to a protected node of the cascoded input-output device, first changing that selected bias voltage in response to a transition of the input signal and then switching that selected bias voltage back when the output signal reaches a predetermined level, that node is protected, either avoiding stress-inducing voltage swings or providing a switching speed increasing charge boost. | 2010-10-21 |
20100264975 | Level Shifter with Rise/Fall Delay Matching - In one embodiment, a level shifter circuit is provided that may include approximately matched rising edge and falling edge delays through the level shifter. The level shifter may also have a low delay and low power consumption. The level shifter circuit may include a pair of low voltage input inverters coupled to a pulldown transistor, where a node between the low voltage input inverters is coupled through another pulldown stack to a pullup transistor. Including an output inverter, both rising transitions and falling transitions may include about 4 gate delays in one embodiment. The level shifter may include keeper transistors to turn off the pullup transistor after the pullup is performed, and the pulldown transistor may be turned off as the pullup transistor is turned on. The pullup and pulldown transistors may not drive against each other during operation, which may reduce power consumption in the circuit. | 2010-10-21 |
20100264976 | Circuitry for processing signals from a higher voltage domain using devices designed to operate in a lower voltage domain - An apparatus is disclosed for receiving input signals in a first higher voltage domain and for generating and outputting signals in a second lower voltage domain, said apparatus comprising: an input pad for receiving said input signals in said first higher voltage domain; output circuitry comprising a plurality of devices arranged between a high voltage source of said second lower voltage domain and a low voltage source, said plurality of devices being arranged in a first set and a second set, said first set being arranged between said high voltage source and said output and said second set being arranged between said output and said low voltage source, said output circuitry being configured to switch to output a first predetermined value in response to a rising input signal exceeding an upper threshold value and to switch to output a second predetermined value in response to a falling input signal falling below a lower threshold value; a first input path for sending said received input signals to a first input of said first set; a second input path for sending said received input signals to a second input of said second set; wherein said second input path comprises a switch delay device for reducing a voltage of said received input signal such that on a rising input signal, said input signal has reached a higher value when said output circuitry switches in response to said input signal than it would have reached had said input signal voltage not been reduced; and a controllable connecting path between said first and second inputs for connecting said first and second inputs together in response to detection of said first predetermined value at said output and for not connecting said first and second inputs together in response to detection of said second predetermined value at said output. | 2010-10-21 |
20100264977 | Cascoded level shifter protection - A cascoded level shifter for receiving an input signal in a low voltage range and for generating an output signal in a high voltage range is disclosed. The cascoded level shifter is subdivided into a first voltage section and a second voltage section, the first voltage section having a lower voltage supply than the second voltage section, and a combined voltage across the first voltage section and the second voltage section corresponding to the high voltage range, the cascoded level shifter comprising: an input node configured to receive an input signal; a cascoded device disposed in one of the first voltage section and the second voltage section, the cascoded device comprising a driver switch connected in series with a cascode switch at a midpoint node, the cascode switch switching in dependence on a reference voltage of a reference node and the input signal; and reference voltage perturbation circuitry, configured to cause a transient perturbation to the reference voltage in response to a transition of the input signal to cause the cascode switch to switch. | 2010-10-21 |
20100264978 | SIGNAL CONVERSION SYSTEM FOR SENDING OR RECEIVING A RADIOFREQUENCY SIGNAL - System for converting a radiofrequency signal S | 2010-10-21 |
20100264979 | MIXER CIRCUIT - In a mixer circuit, addition of analog signals by capacitive coupling is used and square-law characteristics of the drain current of a MOS transistor operating in a saturated region are used. With this configuration, the voltage and power of the mixer circuit can be reduced. | 2010-10-21 |
20100264980 | TEMPERATURE-COMPENSATED VOLTAGE COMPARATOR - A temperature-compensated voltage comparator ( | 2010-10-21 |
20100264981 | CHARGE PUMP WITH SELF-TIMING AND METHOD - With conventional charge pumps, significant noise is present due at least in part to large changes in the supply current. To combat this problem, a charge pump is provided that includes a number of stages. These stages are coupled to receive periodic alternating voltages having a phase shift with respect to each other so that the changes in the supply current are reduced, which reduces noise. | 2010-10-21 |
20100264982 | ELECTRONIC CIRCUIT AND METHOD OF MASKING CURRENT REQUIREMENTS OF AN ELECTRONIC CIRCUIT - A method of masking a current requirement of an electronic circuit ( | 2010-10-21 |
20100264983 | Systems and Methods for Power Dissipation Control in a Semiconductor Device - Various embodiments of the present invention provide systems and methods for governing power dissipation in a semiconductor device. For example, various embodiments of the present invention provide semiconductor devices that include a first function circuit, a second function circuit, and a power state change control circuit. The power state change control circuit is operable to determine a combination of power states of the first function circuit and the second function circuit that provides an overall power dissipation within a power dissipation level. | 2010-10-21 |
20100264984 | System and Method for Over-Voltage Protection of a Power Amplifier - A system and method for over-voltage protection of a power amplifier is provided. A power amplifier is typically employed in a transmitter to amplify signals prior to transmission via a load; the load may include an antenna or a cable. As a result of an impedance mismatch between the power amplifier and its load, excess power from the power amplifier output fails to reach the load and must be dissipated by one or more transistors in the power amplifier. In severe impedance mismatch conditions, this dissipated power may damage or destroy the transistor(s). An automatic gain control (AGC) is provided for detecting a gain difference between the power amplifier and a replica power amplifier. A gain difference may signal an over-voltage situation. The AGC may be configured to adjust the gain of the power amplifier if a gain difference exists to prevent device damage. | 2010-10-21 |
20100264985 | CLOSE-LOOP CLASS-D AUDIO AMPLIFIER AND CONTROL METHOD THEREOF - The present invention discloses a Class-D power amplifier and control method thereof. In one embodiment, the amplifier feeds back the signal at the output node to the inverting input of the comparator, and provides a high frequency triangular wave signal to the non-inverting input of the comparator. In addition, the non-inverting input of the comparator may be coupled to an offset voltage, while the inverting input of the comparator may be coupled to a fixed-frequency rectangular wave signal, a feedback signal which is derived from the output stage and an input signal. In use, the switching frequency may be at least substantially fixed, so as to reduce the influence on the system caused by electromagnetic interruption (EMI). Further, the control circuit is simple, and some devices can be integrated. | 2010-10-21 |
20100264986 | Class AB Amplifier Systems - The present invention comprises class AB amplifier systems exhibiting low quiescent power, low-voltage operation, high gain, high bandwidth, low noise and low offset, and requiring a small die area. The amplifier systems use a differential first stage and a second stage of two pair of nested current mirrors interconnected in a particular way. Using a low quiescent current, the present invention reduces power consumption almost to a theoretical minimum. Also the circuit will operate at an input of only 1.8V with a threshold voltage of 1V. Various embodiments are disclosed. | 2010-10-21 |
20100264987 | AMPLIFIER WITH BIAS STABILIZER - An amplifier with bias stabilizer includes first to forth transistors, an amplifier unit and a resistor. The first transistor and the second transistor are connected in series between first and second power supplies and generate a first current. The third transistor is connected in a current mirror configuration to the second transistor and generates a second current corresponding to the first current. The amplifier unit generates an output signal based on an input signal and includes a fourth transistor, the fourth transistor generating a control voltage according to the second current so as to control the first transistor. The resistor is connected in series to at least one of the first to fourth transistors. | 2010-10-21 |
20100264988 | Low noise cascode amplifier - The present invention relates to a low noise cascode amplifier comprising a first transistor, a second transistor, a third transistor, a first inductor, and a second inductor. Furthermore, the first transistor can connect with the second transistor via the first inductor, and the second transistor can connect with the third transistor via the second inductor; thereby, a cascode device can be formed. The inductor and the parasitic capacitances can resonate at high frequency, so that the noise figure of the cascode amplifier can be reduced. | 2010-10-21 |
20100264989 | Variable Gain Amplifier - A variable gain amplifier (VGA) disclosed herein includes an input current connector, an output current connector, a gain adjustment connector, scaled current mirrors copying the input current, means for steering the copied currents either to the current output or to another appropriate location based on the signal present at the gain adjustment connector. | 2010-10-21 |
20100264990 | AMPLIFYING CIRCUIT, AC SIGNAL AMPLIFYING CIRCUIT AND INPUT BIAS ADJUSTING METHOD - An amplifying circuit includes: an amplifying unit which amplifies an input signal and applies the amplified signal to a designated load; a current detection unit which detects a load current that flows into the designated load upon application of the amplified signal; an estimating unit which calculates, based on the voltage level of the input signal, an estimated value of the load current to be supplied to the load; and an adjusting unit which adjusts an input bias, to be applied to the amplifying unit, in such a manner so as to reduce a difference value representing a difference between the estimated value and the load current detected by the current detection unit. | 2010-10-21 |
20100264991 | SWITCHED CAPACITOR VOLTAGE CONVERTER FOR A POWER AMPLIFIER - A voltage converter includes a plurality of capacitors and corresponding first switch elements, the capacitors coupled in series and arranged to each charge to a voltage level during a first clock period, the voltage level determined by a supply voltage level, the number of capacitors and a value of each capacitor; and a plurality of second switch elements configured to cause the plurality of capacitors to be connected in parallel and to discharge into an output capacitor during a second clock period, the output capacitor charged to a discrete voltage output level so that the output capacitor provides the discrete voltage output level, wherein the discrete voltage output level is less than the supply voltage level and wherein the discrete voltage output level is used to develop a bias signal that is supplied to a power amplifier element. | 2010-10-21 |
20100264992 | AMPLIFYING CIRCUIT AND AMPLIFYING METHOD - An amplifying circuit includes: a waveform modifying unit which changes the signal value in the second section in such a manner so as to reduce the difference between the signal strength of a DC component of the input signal and the limit value that limits the variation range of the signal value in the first section; a DC component removing unit which removes the DC component of the input signal after the input signal has been modified by the waveform modifying unit; and an amplifying unit which amplifies the input signal whose DC component has been removed. | 2010-10-21 |
20100264993 | PLL WITH LOOP BANDWIDTH CALIBRATION CIRCUIT - A phase locked loop (PLL) with a loop bandwidth calibration circuit is provided. The mixed-mode PLL comprises an analog phase correction path, a digital frequency correction path, a calibration current source, and a loop bandwidth calibration circuit. The analog phase correction path comprises a linear phase correction unit (LPCU). The digital frequency correction path comprises a digital integral path circuit. The calibration current source is coupled to the LPCU. The loop bandwidth calibration circuit is coupled to a frequency divider and coupled between the input and output of the PLL. The loop bandwidth calibration circuit operates after the calibration current source injects a calibration current into the LPCU. | 2010-10-21 |
20100264994 | TURNABLE LC OCILLATOR WITH COMMON MODE VOLTAGE ADJUSTMENT - An LC oscillator is provided that achieves improved phase noise performance. A variable frequency oscillator includes a variable supply source (I), an oscillator tank circuit (T), a variable capacitance circuit (VC | 2010-10-21 |
20100264995 | RF Circuits Including Transistors Having Strained Material Layers - Circuits for processing radio frequency (“RF”) and microwave signals are fabricated using field effect transistors (“FETs”) that have one or more strained channel layers disposed on one or more planarized substrate layers. FETs having such a configuration exhibit improved values for, for example, transconductance and noise figure. RF circuits such as, for example, voltage controlled oscillators (“VCOs”), low noise amplifiers (“LNAs”), and phase locked loops (“PLLs”) built using these FETs also exhibit enhanced performance. | 2010-10-21 |
20100264996 | Nth-Order Arbitrary-Phase-Shift Sinusoidal Oscillator Structure and Analytical Synthesis Method of Making the same - Nth-order voltage- and current-mode arbitrary phase shift oscillator structures are synthesized using n operational trans-conductance amplifiers (OTAs) or second-generation current controlled conveyors (CCCIIs) and n grounded capacitors. Linking up the I/O characteristics of the OTA and the CCCII and the reactance of grounded capacitor, the step of synthesis is first based on the algebraic analysis to oscillatory characteristic equations, resulting in a quadrature oscillator structure. Secondly, instead of the quadrature characteristic, to control each output signal with one another by a desired phase difference > or <90°, selectively superposing any of two fundamental OTA/CCCII-C sub-circuitries benefits the transformation of quadrature to arbitrary-phase-shift characteristic for the sinusoidal oscillator structure. Furthermore, several compensation schemes are presented for reducing the output parameter deviation due to the non-ideal effects. | 2010-10-21 |
20100264997 | MICROMECHANICAL COMPONENT AND METHOD FOR OSCILLATION EXCITATION OF AN OSCILLATION ELEMENT OF A MICROMECHANICAL COMPONENT - A micromechanical component and a method for providing the oscillation excitation of an oscillation element of a micromechanical component, the micromechanical component having a frame, which is connected to a carrier substrate by an outer suspension element, in which the frame being tiltable about a first axis and oscillatory about a second axis that is positioned perpendicular to the first axis, and in which the micromechanical component having an oscillation element that is connected to the frame by an inner suspension element, and is tiltable about the second axis, the outer suspension element being provided to be dimensioned in such a way that a first oscillation of the frame about the second axis and a second oscillation of the oscillation element about the second axis have a maximum coupling. | 2010-10-21 |
20100264998 | APPARATUS AND METHOD FOR CHARGE TRANSFER - The invention relates to an apparatus and a method for charge transfer, wherein a charge transfer apparatus ( | 2010-10-21 |
20100264999 | OSCILLATION CIRCUIT, DRIVING CIRCUIT THEREOF, AND DRIVING METHOD THEREOF - An oscillation circuit, a driving circuit thereof, and a driving method thereof are provided. The driving circuit generates a second enable signal according to an output signal of an oscillator and a first enable signal. The second enable signal is transmitted to the oscillator. When a wave number of the output signal is smaller than a predetermined value during a predetermined period, the driving circuit adjusts a voltage level of the second enable signal. A voltage level of the first enable signal is equal to an enable voltage level. Through variations in voltage levels of the second enable signal, the oscillator is triggered to oscillate. | 2010-10-21 |
20100265000 | TEMPERATURE COMPENSATED CRYSTAL OSCILLATOR - A temperature compensated crystal oscillator is mounted to a board. A quartz resonator includes a quartz chip that generates an oscillation frequency. A resistive element is formed on the quartz chip. A temperature sensor is located closer to the board than the quartz resonator. The compensation part compensates for a change in the oscillation frequency generated by the quartz resonator based on a value of a current flowing in the resistive element and an output of the temperature sensor. | 2010-10-21 |
20100265001 | DIGITAL PLL CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT - A digital PLL circuit includes: an oscillation circuit, wherein an oscillation frequency is controlled by changing the number of capacitance elements to be connected in parallel to an inductance element; and a phase comparator part configured to perform a digital phase comparison of a reference clock and a delayed clock thereof, with an oscillation circuit output; and based on the comparison result, to control the number of the capacitance elements so as to bring the phase of the oscillation circuit output closer to the reference clock phase, wherein the capacitance element includes: a coarse adjustment capacitor configured to have a predetermined capacitance; and fine adjustment capacitors configured to have a capacitance of 1/n of that of the coarse adjustment capacitor, wherein a predetermined number of the fine adjustment capacitors function as one coarse adjustment capacitor at the time of coarse adjustment. | 2010-10-21 |
20100265002 | METHOD OF MODULATING A COMMON SIGNAL OF LIQUID CRYSTAL DISPLAY - A driving circuit of LCD includes a common signal generator and a modulation circuit. The modulation circuit can generate a first frequency, a second frequency, and a third frequency. The common signal generator generates a swing common signal according to the first frequency, and modulates the frequency of the common signal in the frequency range between the second frequency and the third frequency. | 2010-10-21 |
20100265003 | IMPEDANCE MATCHING METHOD - An impedance matching method which is used to save electrical energy by virtue of the fact that the method switches between modes for controlling impedance matching and modes for regulation of the impedance matching depending on the situation. An algorithm which, on the basis of control signals from an external circuit environment, controls or regulates the impedance of a variable-impedance circuit element is implemented in a logic circuit LC. | 2010-10-21 |