43rd week of 2009 patent applcation highlights part 14 |
Patent application number | Title | Published |
20090261422 | CELL STRUCTURE OF SEMICONDUCTOR DEVICE - A cell structure of a semiconductor device includes an active region, having a concave portion, and an inactive region that defines the active region. A gate pattern in the active region is arranged perpendicular to the active region. A landing pad on the active region and the inactive region contacts the active region. A bit line pattern on the inactive region intersects the gate pattern perpendicularly, the bit line pattern being electrically connected to the landing pad and having a first protrusion corresponding to the concave portion of the active region. | 2009-10-22 |
20090261423 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME - A semiconductor device includes a fin field effect transistor configured to include at least a first fin and a second fin. Threshold voltage of the first fin and threshold voltage of the second fin are different from each other in the fin field effect transistor. | 2009-10-22 |
20090261424 | METHOD FOR FABRICATING A DUAL WORKFUNCTION SEMICONDUCTOR DEVICE AND THE DEVICE MADE THEREOF - A dual workfunction semiconductor device and a device made thereof is disclosed. In one aspect, the device includes a first gate stack in a first region and a second gate stack in a second region. The first gate stack has a first effective workfunction, and the second gate stack has a second effective workfunction different from the first effective workfunction. The first gate stack includes a first gate dielectric capping layer, a gate dielectric host layer, a first metal gate electrode layer, a barrier metal gate electrode, a second gate dielectric capping layer, and a second metal gate electrode. The second gate stack includes a gate dielectric host layer, a first metal gate electrode, a second gate dielectric capping layer, and a second metal gate electrode. | 2009-10-22 |
20090261425 | FINFETs SINGLE-SIDED IMPLANT FORMATION - A method patterns pairs of semiconducting fins on an insulator layer and then patterns a linear gate conductor structure over and perpendicular to the fins. Next, the method patterns a mask on the insulator layer adjacent the fins such that sidewalls of the mask are parallel to the fins and are spaced from the fins a predetermined distance. The method performs an angled impurity implant into regions of the fins not protected by the gate conductor structure and the mask. This process forms impurity concentrations within the fins that are asymmetric and that mirror one another in adjacent pairs of fins. | 2009-10-22 |
20090261426 | LATERAL DIFFUSION FIELD EFFECT TRANSISTOR WITH DRAIN REGION SELF-ALIGNED TO GATE ELECTRODE - A disposable structure displaced from an edge of a gate electrode and a drain region aligned to the disposable structure is formed. Thus, the drain region is self-aligned to the edge of the gate electrode. The disposable structure may be a disposable spacer, or alternately, the disposable structure may be formed simultaneously with, and comprise the same material as, a gate electrode. After formation of the drain regions, the disposable structure is removed. The self-alignment of the drain region to the edge of the gate electrode provides a substantially constant drift distance that is independent of any overlay variation of lithographic processes. | 2009-10-22 |
20090261427 | MOS P-N JUNCTION DIODE DEVICE AND METHOD FOR MANUFACTURING THE SAME - A MOS P-N junction diode device includes a substrate having a first conductivity type, a field oxide structure defining a trench structure, a gate structure formed in the trench structure and a doped region having a second conductivity type adjacent to the gate structure in the substrate. The method for manufacturing such diode device includes several ion-implanting steps. After the gate structure is formed by isotropic etching using a patterned photo-resist layer as a mask, an ion-implanting step is performed using the patterned photo-resist layer as a mask to form a deeper doped sub-region. Then, another ion-implanting step is performed using the gate structure as a mask to form a shallower doped sub-region between the gate structure and the deeper doped sub-region. The formed MOS P-N junction diode device has low forward voltage drop, low reverse leakage current, fast reverse recovery time and high reverse voltage tolerance. | 2009-10-22 |
20090261428 | MOS P-N JUNCTION SCHOTTKY DIODE DEVICE AND METHOD FOR MANUFACTURING THE SAME - A MOS P-N junction Schottky diode device includes a substrate having a first conductivity type, a field oxide structure defining a trench structure, a gate structure formed in the trench structure and a doped region having a second conductivity type adjacent to the gate structure in the substrate. An ohmic contact and a Schottky contact are formed at different sides of the gate structure. The method for manufacturing such diode device includes several ion-implanting steps to form several doped sub-regions with different implantation depths to constitute the doped regions. The formed MOS P-N junction Schottky diode device has low forward voltage drop, low reverse leakage current, fast reverse recovery time and high reverse voltage tolerance. | 2009-10-22 |
20090261429 | TRANSISTOR AND METHOD FOR MANUFACTURING THEREOF - A transistor includes a gate insulating layer over a semiconductor substrate; a first insulating layer on both sides of the gate insulating layer; first spacers over the first insulating layer and being spaced apart from each other; and a gate conductive plug between the first spacers. A method for manufacturing a transistor includes sequentially depositing a first insulating layer and a second insulating layer over a semiconductor substrate; etching the second insulating layer; implanting impurity ions; depositing and etching a layer of spacer material to form first spacers; removing a first portion of the first insulating layer between the first spacers; depositing a gate insulating layer the place of the first portion of the first insulating layer; forming a gate conductive plug on the gate insulating layer; forming second spacers on sidewalls of the gate conductive plug; and forming a silicide on an upper surface of the gate conductive plug. | 2009-10-22 |
20090261430 | Physical quantity sensor and method for manufacturing the same - A physical quantity sensor includes: a sensor substrate including a first support substrate, a first insulation film and a first semiconductor layer, which are stacked in this order; a cap substrate including a second support substrate disposed on the first semiconductor layer, and has a P conductive type; and multiple electrodes, which are separated from each other. The first support substrate, the first insulation film and the first semiconductor layer have the P conductive type. The physical quantity is detected based on a capacitance between the plurality of electrodes, and the electrodes are disposed in the first semiconductor layer. | 2009-10-22 |
20090261431 | PRE-RELEASED STRUCTURE DEVICE - A pre-released structure device comprising:
| 2009-10-22 |
20090261432 | Interconnection system on a plane adjacent to a solid-state device structure - An interconnection system is provided for a solid-state device. The solid-state that includes, a first layer, multiple devices and a first face. A second layer is bonded to the first face at a bonded face of the second layer that faces the first face. Electrically conductive bonds are between the first and second faces. Conductive paths are on the bonded face of the second layer and connect two or more of the conductive bonds. | 2009-10-22 |
20090261433 | One-Mask MTJ Integration for STT MRAM - A method for integrating a magnetic tunnel junction (MTJ) device into an integrated circuit includes providing in a semiconductor back-end-of-line (BEOL) process flow a substrate having a first interlevel dielectric layer and at least a first metal interconnect. Over the first interlevel dielectric layer and the first metal interconnect, magnetic tunnel junction material layers are deposited. From the material layers a magnetic tunnel junction stack, coupled to the first metal interconnect, is defined using a single mask process. The magnetic tunnel junction stack is integrated into the integrated circuit. | 2009-10-22 |
20090261434 | STT MRAM Magnetic Tunnel Junction Architecture and Integration - A magnetic tunnel junction (MTJ) device for a magnetic random access memory (MRAM) in a semiconductor back-end-of-line (BEOL) process flow includes a first metal interconnect for communicating with at least one control device and a first electrode for coupling to the first metal interconnect through a via formed in a dielectric passivation barrier using a first mask. The device also includes an MTJ stack for storing data coupled to the first electrode, a portion of the MTJ stack having lateral dimensions based upon a second mask. The portion defined by the second mask is over the contact via. A second electrode is coupled to the MTJ stack and also has a same lateral dimension as defined by the second mask. The first electrode and a portion of the MTJ stack are defined by a third mask. A second metal interconnect is coupled to the second electrode and at least one other control device. | 2009-10-22 |
20090261435 | MAGNETIC MEMORY ELEMENT AND MAGNETIC MEMORY DEVICE - A magnetic memory element having a layer structure containing a fixing layer (pinned layer: PL) having a magnetization direction fixed unidirectionally, a nonmagnetic dielectric layer (TN | 2009-10-22 |
20090261436 | NEGATIVE-RESISTANCE DEVICE WITH THE USE OF MAGNETO-RESISTIVE EFFECT - A magneto-resistive device has a magnetic free layer ( | 2009-10-22 |
20090261437 | Two Mask MTJ Integration For STT MRAM - A method for forming a magnetic tunnel junction (MTJ) for magnetic random access memory (MRAM) using two masks includes depositing over an interlevel dielectric layer containing an exposed first interconnect metallization, a first electrode, a fixed magnetization layer, a tunneling barrier layer, a free magnetization layer and a second electrode. An MTJ structure including the tunnel barrier layer, free layer and second electrode is defined above the first interconnect metallization by a first mask. A first passivation layer encapsulates the MTJ structure, leaving the second electrode exposed. A third electrode is deposited in contact with the second electrode. A second mask is used to pattern a larger structure including the third electrode, the first passivation layer, the fixed magnetization layer and the first electrode. A second dielectric passivation layer covers the etched plurality of layers, the first interlevel dielectric layer and the first interconnect metallization. | 2009-10-22 |
20090261438 | VISIBLE-RANGE SEMICONDUCTOR NANOWIRE-BASED PHOTOSENSOR AND METHOD FOR MANUFACTURING THE SAME - A semiconductor nanowire-based photosensor includes a substrate, at least a top surface of the substrate being formed of an insulator, two electrodes spaced at a predetermined interval apart from each other on the substrate, metal catalyst layers disposed respectively on the two electrodes, and visible-range semiconductor nanowires grown from the metal catalyst layers on the two electrodes. The semiconductor nanowires grown from one of the metal catalyst layers are in contact with the semiconductor nanowires grown from the other metal catalyst layer, while the semiconductor nanowires grown respectively from the metal catalyst layers on the two electrodes are floated between the two electrodes over the substrate. | 2009-10-22 |
20090261439 | MICROLENS ARRAY AND IMAGE SENSING DEVICE USING THE SAME - A microlens array is provided, including a base layer with a plurality of first microlenses formed over a first region thereof, wherein the first microlenses are formed with a first height. A plurality of second microlenses are formed over a second region of the base layer, wherein the second region surrounds the first region and the second microlenses are formed with a second height lower than the first height. A plurality of third microlenses are formed over a third region of the base layer, wherein the third region surrounds the second and three regions, and the microlenses are formed with a third height lower than the first and second heights. | 2009-10-22 |
20090261440 | MICROLENS UNIT AND IMAGE SENSOR - In a microlens unit (MSU), at least part of the edges of microlenses (MS) (convex lenses MS[BG]) supported on elevations (BG) overlap with trenches (DH) in a direction (VV) perpendicular to the surface of a flattening film ( | 2009-10-22 |
20090261441 | OPTICAL SEMICONDUCTOR DEVICE - An optical semiconductor device includes a light-receiving element on a semiconductor substrate of a first conductivity type, the light-receiving element including a light-receiving portion for converting incident light to an electrical current signal and performing a current amplification. The light-receiving portion includes: a semiconductor layer formed on the semiconductor substrate and having an impurity concentration substantially equal to or less than that of the semiconductor substrate; a first semiconductor region of a second conductivity type formed on the semiconductor layer and having an impurity concentration higher than that of the semiconductor layer; and a second semiconductor region of the first conductivity type selectively formed between the semiconductor substrate and the semiconductor layer and having an impurity concentration higher than those of the semiconductor substrate and the semiconductor layer. | 2009-10-22 |
20090261442 | NONEQUILIBRIUM PHOTODETECTORS WITH SINGLE CARRIER SPECIES BARRIERS - A photosensitive diode has an active region defining a majority carrier of a first conductivity type and a minority carrier of a second conductivity type. An extraction region is disposed on a first side of the active region and extracts minority carriers from the active region. It also has majority carriers within the extraction region flowing toward the active region in a condition of reverse bias. An exclusion region is disposed on a second side of the active region and has minority carriers within the exclusion region flowing toward the active region. It receives majority carriers from the active region. At least one of the extraction and exclusion region provides a barrier for substantially reducing flow of one of the majority carriers or the minority carriers, whichever is flowing toward the active region, while permitting flow of the other minority carriers or majority carriers flowing out of the active region. The barrier substantially reduces flow of the carriers without relying on diffusion length of the one carriers in order to reduce the flow. | 2009-10-22 |
20090261443 | SHARED-PIXEL-TYPE IMAGE SENSOR AND METHOD OF FABRICATING THE SAME - A shared-pixel-type image sensor including a shared floating diffusion region formed in a semiconductor substrate; first and second adjacent photoelectric conversion regions sharing the floating diffusion region; two transmission elements that alternately transfer electric charges accumulated in the first and second photoelectric conversion regions to the shared floating diffusion region, respectively; a drive element for outputting the electric charges of the shared floating diffusion region; a first contact formed on the floating diffusion region; a second contact formed on the drive element; and a local wire that connects the first and second contacts to electrically connect the floating diffusion region and the drive element, wherein the local wire is formed at a level lower than respective top surfaces of the first and second contacts. | 2009-10-22 |
20090261444 | SEMICONDUCTOR DEVICE - A wiring electrically connected to a terminal to which a high power supply potential is applied and a wiring electrically connected to a terminal to which a low power supply potential is applied are formed adjacent to each other and are formed so as to surround the integrated circuit. Thus, wiring resistance can be added between the terminals and the integrated circuit and capacitance can be added between the two wirings. Even if overvoltage is applied to the terminals due to ESD or the like, the energy of the overvoltage is consumed by the wiring resistance and the added capacitor, so that damage of the integrated circuit can be suppressed. | 2009-10-22 |
20090261445 | INFRARED DETECTOR AND INFRARED SOLID-STATE IMAGING DEVICE - An infrared detector and an infrared solid state imaging device of low noise in which a mechanical distortion of an infrared sensor portion can be decreased are provided. | 2009-10-22 |
20090261446 | SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURE - In various embodiments, semiconductor structures and methods to manufacture these structures are disclosed. In one embodiment, a method includes forming a portion of the unidirectional transistor and a portion of a bidirectional transistor in or over a semiconductor material simultaneously. Other embodiments are described and claimed. | 2009-10-22 |
20090261447 | SEMICONDUCTOR INTEGRATED CIRCUIT - Signal lines ( | 2009-10-22 |
20090261448 | METHOD OF FORMING SHALLOW TRENCH ISOLATION STRUCTURES FOR INTEGRATED CIRCUITS - A method of forming shallow trench isolation (STI) structures using a multi-step etch process is disclosed. The first etch step is performed by selectively etching the substrate at a substantially higher etching rate than the mask layer to form preliminary openings having steep taper angles. The second etch step is performed by non-selectively etching the substrate to deepen the preliminary openings to form STI gaps with substantially flat bottoms. | 2009-10-22 |
20090261449 | METHOD FOR MANUFACTURING SOI SUBSTRATE AND SEMICONDUCTOR DEVICE - An object is to provide an SOI substrate with excellent characteristics even in the case where a single crystal semiconductor substrate having crystal defects is used. Another object is to provide a semiconductor device using such an SOI substrate. A single crystal semiconductor layer is formed by an epitaxial growth method over a surface of a single crystal semiconductor substrate. The single crystal semiconductor layer is subjected to first thermal oxidation treatment to form a first oxide film. A surface of the first oxide film is irradiated with ions, whereby the ions are introduced to the single crystal semiconductor layer. The single crystal semiconductor layer and a base substrate are bonded with the first oxide film interposed therebetween. The single crystal semiconductor layer is divided at a region where the ions are introduced by performing thermal treatment, so that the single crystal semiconductor layer is partly left over the base substrate. The single crystal semiconductor layer left over the base substrate is irradiated with laser light. The single crystal semiconductor layer left over the base substrate is subjected to second thermal oxidation treatment to form a second oxide film. Then, the second oxide film is removed. | 2009-10-22 |
20090261450 | Electrical Fuse Structure and Method - An electrical fuse and a process of programming the same are presented. An electrical fuse comprises a lower level silicide layer on a non-doped or lightly-doped polysilicon layer, an upper level conductive layer, and a tungsten contact coupled between the lower level silicide layer and the upper level conductive layer. The tungsten contact and a neck portion of the silicide layer are the programmable portion of the electrical fuse. High post-programming resistance is achieved by a first programming phase that depletes silicide in the silicide layer, followed by a second programming phase that depletes tungsten in the tungsten contact. | 2009-10-22 |
20090261451 | CIRCUIT PROTECTION DEVICE INCLUDING RESISTOR AND FUSE ELEMENT - An integral circuit protection device includes a substrate disposed between first and second terminals. The substrate is composed of a resistive material. A first conductive layer is disposed on a first surface of the substrate and in electrical contact with the first terminal. A second conductive layer is disposed on a second surface of the substrate. A first electrically insulating layer is disposed on the second conductive layer and substantially covers the second conductive layer. The first electrically insulating layer includes an aperture. A fuse element is disposed on the first electrically insulating layer and is in electrical contact with the second conductive layer through the aperture and in electrical contact with the second terminal. The fuse element is in electrical series with the resistive material. A second electrically insulating layer is disposed over the fuse element. | 2009-10-22 |
20090261452 | SEMICONDUCTOR DEVICE INCLUDING AN INDUCTOR ELEMENT - An inductor element is formed in a spiral shape so as to have a plurality of windings which cross each other three-dimensionally at least in one intersection on a substrate. Each of the plurality of windings is formed by a first wiring formed on the substrate with a first insulating film interposed therebetween and a second wiring formed on the first wiring with a second insulating film interposed therebetween. The first wiring and the second wiring are electrically connected to each other in a region other than the intersection of the plurality of windings through an opening formed in the second insulating film. A lower wire segment in the intersection is formed only by the first wiring by separating the second wiring in the intersection. An upper wire segment in the intersection is formed only by the second wiring by separating the first wiring in the intersection. | 2009-10-22 |
20090261453 | AIR GAP IN INTEGRATED CIRCUIT INDUCTOR FABRICATION - A semiconductor device, such as an inductor, is formed with an air gap. A first level has an intra-metal dielectric layer including one or more inductor loops, one or more vias, and one or more copper bulkhead structures. An inter-level dielectric layer is formed over the first level. An extraction via is formed through the intra-metal dielectric layer and inter-level dielectric layer. An air gap is formed between inductor loops by removing portions of the intra-metal dielectric layer coupled to the extraction via using a supercritical fluid process, and forming a non-conformal layer to seal the extraction via. The air gap may be filled with an inert gas, like argon or nitrogen. | 2009-10-22 |
20090261454 | CAPACITOR IN SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A capacitor includes a bottom electrode, a dielectric layer and a top electrode over a substrate. A Ru | 2009-10-22 |
20090261455 | METHOD FOR THE PRODUCTION OF A COMPONENT STRUCTURE - A method for the production of a component structure. On embodiment provides a semiconductor body having a first side. A first trench and a second trench are produced, which extend into the semiconductor body proceeding from the first side and are arranged at a distance from one another in a lateral direction of the semiconductor body. A first material layer in the first trench is produced. A third trench proceeding from the second trench is produced, extending as far as the first material layer in the first lateral direction. | 2009-10-22 |
20090261456 | EPITAXIALLY COATED SILICON WAFER AND METHOD FOR PRODUCING EPITAXIALLY COATED SILICON WAFERS - A multiplicity of silicon wafers polished at least on their front sides are provided and successively coated individually in an epitaxy reactor by a procedure whereby one of the wafers is placed on a susceptor in the epitaxy reactor, is pretreated under a hydrogen atmosphere at a first hydrogen flow rate, and with addition of an etching medium to the hydrogen atmosphere at a reduced hydrogen flow rate in a second step, is subsequently coated epitaxially on its polished front side, and removed from the reactor. An etching treatment of the susceptor follows a specific number of epitaxial coatings. Silicon wafers produced thereby have a global flatness value GBIR of 0.07-0.3 μm relative to an edge exclusion of 2 mm. | 2009-10-22 |
20090261457 | DIE STACKING WITH AN ANNULAR VIA HAVING A RECESSED SOCKET - A die stack including a die having an annular via with a recessed conductive socket and methods of forming the die stack provide a structure for use in a variety of electronic systems. In an embodiment, a die stack includes a conductive pillar on the top of a die inserted into the recessed conductive socket of another die. | 2009-10-22 |
20090261458 | THROUGH-ELECTRODE, CIRCUIT BOARD HAVING A THROUGH-ELECTRODE, SEMICONDUCTOR PACKAGE HAVING A THROUGH-ELECTRODE, AND STACKED SEMICONDUCTOR PACKAGE HAVING THE SEMICONDUCTOR CHIP OR PACKAGE HAVING A THROUGH-ELECTRODE - A stacked semiconductor package includes a first semiconductor package having a first semiconductor chip having a first pad and a through-hole passing through a the portion corresponding to the pad; a second semiconductor package disposed over the first semiconductor package, and including a second semiconductor chip having a second pad disposed at a portion corresponding to the first pad and blocking the through-hole; and a through-electrode disposed within the through-hole, and having a pillar shaped core supported by the second pad, a through-electrode unit disposed over a surface of the core and electrically connected with the second pad, a first metal layer interposed between the core and the through electrode unit, and a second metal layer interposed between an inner surface of the first semiconductor chip formed by the through-hole and the through-electrode unit. | 2009-10-22 |
20090261459 | SEMICONDUCTOR DEVICE HAVING A FLOATING BODY WITH INCREASED SIZE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device with a silicon on insulator substrate having a stacked structure including a silicon substrate, a filled oxide layer, and a silicon layer is provided with a fin pattern formed in the direction of the channel width in a gate forming region of the silicon layer. The fin pattern has a width that is wider at the lower end portion of the fin pattern than the width of the upper end portion. A gate is formed to cover the fin pattern, and junction regions are formed within the silicon layer at both sides of the gate. | 2009-10-22 |
20090261460 | Wafer Level Integration Package - A semiconductor package has a first conductive layer formed on a top surface of a substrate. A conductive via is formed between the first conductive layer and a bottom surface of the substrate. A semiconductor component is mounted to the substrate and electrically connected to the first electrical contact pad. The semiconductor component can be a flip chip semiconductor device, wire bond semiconductor device, or passive component. An encapsulant is deposited over the semiconductor component. The encapsulant extends into a channel formed on a side of the substrate from the top surface to the bottom surface of the substrate. An interconnect structure is formed over the bottom surface of the substrate. A heat spreader structure can be disposed over the semiconductor component. An EMI shield can be disposed over the semiconductor component. A plurality of semiconductor components can be stacked in a package-in-package arrangement. | 2009-10-22 |
20090261461 | SEMICONDUCTOR PACKAGE WITH LEAD INTRUSIONS - Semiconductor packages comprising a plurality of lead fingers containing a lead intrusion at the edge of the lead fingers are described. The semiconductor packages comprise an integrated circuit chip that is connected to a die pad and is electrically connected to multiple lead fingers. One or more of the lead fingers may have a lead intrusion disposed on the external exposed lower surface of the lead finger. The lead intrusion may have a height that is about ⅕ to about ½ the height of a lead finger, a width that is about ⅕ to about 1/2 the width of a lead finger, and a depth that is about ¼ to about ¾ the length of the externally exposed lower surface of a lead finger. The lead intrusion increases the area on the lead finger that contacts a bond material, such as solder, and therefore increase the strength of the joint between the semiconductor package and an external surface to which the lead finger is connected (i.e., a PCB). The lead intrusion allows out gassing during reflow of the bond material which may reduce voiding. The lead intrusion can also increase bond joint reliability by providing longer crack propagation length. | 2009-10-22 |
20090261462 | SEMICONDUCTOR PACKAGE WITH STACKED DIE ASSEMBLY - This application relates to semiconductor packages comprising stacked die assemblies. In some cases, the stacked dies comprise a first die containing gate driver IC that is stacked on a first surface of a second IC die. A second surface of the second IC die can be bumped for connection to one or more bump attach pads. The first die can be wire bonded to one or more bond attach pads. In some instances, the semiconductor packages include a leadframe clip that connects with the drain on the first die. In such instances, the gate driver IC of the first die can be stacked on a first surface of the leadframe clip and a second surface of the leadframe clip can be stacked on the first surface of the second IC die. The semiconductor packages can be molded and/or configured into a ball grid array (“BGA”) or a land grid array (“LGA”) configuration. Other embodiments are described. | 2009-10-22 |
20090261463 | Chip mounting device and chip package array - A chip mounting device includes at least one chip mounting unit and at least one side rail configured beside the chip mounting unit. The chip mounting unit includes a die pad and a plurality of conductive contacts. The side rail includes at least one identifying element. A chip package array with the above-mentioned chip mounting device is also disclosed. The chip mounting device and chip package array includes the identifying element configured on the side rail to improve the identification of semi-finished packaged chips during chip package process to be read automatically by machines instead of operators, and further decrease the loss caused by misjudgments of operators. | 2009-10-22 |
20090261464 | Getter Formed By Laser-Treatment and Methods of Making Same - The present disclosure relates to methods of treating a silicon substrate with an ultra-fast laser to create a getter material for example in a substantially enclosed MEMS package. In an embodiment, the laser treating comprises irradiating the silicon surface with a plurality of laser pulses adding gettering microstructure to the treated surface. Semiconductor based packaged devices, e.g. MEMS, are given as examples hereof. | 2009-10-22 |
20090261465 | SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD - A semiconductor device includes a substrate having a substrate wiring, a semiconductor chip provided on the substrate, a first electrical conductor electrically connecting the semiconductor chip and the substrate wiring, and an electrically conductive pad provided on the substrate. The semiconductor device further includes a wiring member electrically connected to the electrically conductive pad and serving as a wiring path different from the substrate wiring. | 2009-10-22 |
20090261466 | Semiconductor Device and Method of Forming Vertical Interconnect Structure Using Stud Bumps - A semiconductor device is made by forming a conductive layer over a temporary carrier. The conductive layer includes a wettable pad. A stud bump is formed over the wettable pad. The stud bump can be a stud bump or stacked bumps. A semiconductor die is mounted to the carrier. An encapsulant is deposited over the semiconductor die and around the stud bump. A first interconnect structure is formed over a first surface of the encapsulant. The first interconnect structure includes a first IPD and is electrically connected to the stud bump. The carrier is removed. A second interconnect structure is formed over a second surface of encapsulant opposite the first interconnect structure. The second interconnect structure includes a second IPD. The first or second IPD includes a capacitor, resistor, or inductor. The semiconductor devices are stackable and electrically connected through the stud bump. | 2009-10-22 |
20090261467 | Semiconductor device - A semiconductor device including a semiconductor chip having a plurality of electrodes on one surface thereof in a thickness direction, a resin layer overlapping the one chip surface to provide a rectangular mounting surface, a plurality of metal posts in the resin layer, where the metal posts are electrically connected to the electrodes, and solder terminals respectively connected to the metal posts. The resin layer has a groove formed therein at the mounting surface so as to surround an area on which the metal posts are provided. The semiconductor device is mounted on the mounting substrate with an underfill material filled in a space between the mounting surface and the mounting substrate. | 2009-10-22 |
20090261468 | SEMICONDUCTOR MODULE - A semiconductor module. One embodiment provides at least two semiconductor chips placed on a carrier. The at least two semiconductor chips are then covered with a molding material to form a molded body. The molded body is thinned until the at least two semiconductor chips are exposed. Then, the carrier is removed from the at least two semiconductor chips. The at least two semiconductor chips are singulated. | 2009-10-22 |
20090261469 | SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME - Manufacturing a semiconductor package includes preparing a semiconductor chip having a top surface with bumps electrically connected to bonding pads, a bottom surface opposite to the top surface and side surfaces joining the top surface to the bottom surface. The bottom surface of the semiconductor chip is attached to a base substrate. A heat pressure process is performed to form a wiring support member on the base substrate to cover the top surface and the side surfaces of the semiconductor chip while exposing each of the bumps. Wirings are formed to be electrically connected to the bumps on the wiring support member. The base substrate is removed from the semiconductor chip and the wiring support member. | 2009-10-22 |
20090261470 | CHIP PACKAGE - A chip package comprising a carrier, a chip, a plurality of first conductive elements, an encapsulation, and a conductive film is provided. The carrier has a carrying surface and a back surface opposite to the carrying surface. Furthermore, the carrier has a plurality of common contacts in the periphery of the carrying surface. The chip is disposed on the carrying surface and electrically connected to the carrier. In addition, the first conductive elements are disposed on the common contacts respectively. The encapsulation is disposed on the carrying surface and encapsulating the chip. Moreover, the conductive film is disposed over the encapsulation and the first conductive elements, so as to electrically connect with the common contacts via the first conductive elements. A process for fabricating the chip package is further provided. The chip package is capable of preventing the EMI problem and thus provides superior electrical performance. | 2009-10-22 |
20090261471 | RF POWER TRANSISTOR PACKAGE - An RF power transistor package with a rectangular ceramic base can house one or more dies affixed to an upper surface of the ceramic base. Source leads attached to the ceramic base extend from at least opposite sides of the rectangular base beneath a periphery of a non-conductive cover overlying the ceramic base. The cover includes recesses arranged to receive the one or more die, the ceramic base, gate and drain leads and a portion of the source leads. The cover further includes bolt holes arranged to clamp the ceramic base and source leads to a heat sink. Bosses at corners of the cover outward of the bolt holes exert a downward bowing force along the periphery of the cover between the bolt holes. | 2009-10-22 |
20090261472 | Power Semiconductor Module with Pressure Element and Method for Fabricating a Power Semiconductor Module with a Pressure Element - The invention relates to a power semiconductor module comprising at least one power semiconductor chip, and comprising a pressure apparatus which exerts a pressure on the top side of the power semiconductor chip when the power semiconductor module is fixed to a heat sink. In addition, a bonding wire which is arranged distant from the pressure element, is bonded to the top side. The invention also relates to methods for fabricating a power semiconductor module, and for fabricating a power semiconductor arrangement comprising a power semiconductor module and a heat sink. | 2009-10-22 |
20090261473 | Low fabrication cost, fine pitch and high reliability solder bump - A barrier layer is deposited over a layer of passivation including in an opening to a contact pad created in the layer of passivation. A column of three layers of metal is formed overlying the barrier layer and aligned with the contact pad and having a diameter that is about equal to the surface of the contact pad. The three metal layers of the column comprise, in succession when proceeding from the layer that is in contact with the barrier layer, a layer of pillar metal, a layer of under bump metal and a layer of solder metal. The layer of pillar metal is reduced in diameter, the barrier layer is selectively removed from the surface of the layer of passivation after which reflowing of the solder metal completes the solder bump of the invention. | 2009-10-22 |
20090261474 | WAFER LEVEL PACKAGE HAVING A STRESS RELIEF SPACER AND MANUFACTURING METHOD THEREOF - In a semiconductor device package having a stress relief spacer, and a manufacturing method thereof, metal interconnect fingers extend from the body of a chip provide for chip interconnection. The metal fingers are isolated from the body of the chip by a stress-relief spacer. In one example, such isolation takes the form of an air gap. In another example, such isolation takes the form of an elastomer material. In either case, mismatch in coefficient of thermal expansion between the metal interconnect fingers and the body of the chip is avoided, alleviating the problems associated with cracking and delamination, and leading to improved device yield and device reliability. | 2009-10-22 |
20090261475 | METHOD FOR FABRICATING A METAL INTERCONNECTION USING A DUAL DAMASCENE PROCESS AND RESULTING SEMICONDUCTOR DEVICE - A semiconductor device includes an interlayer insulating layer including a plurality of trenches connecting to a number of via holes formed on a semiconductor substrate including lower interconnections, wherein widths of the trenches are greater than widths of the via holes, and metal interconnections formed by burying metal thin films in the via holes and the trenches. Depths of the trenches are adjusted differently from each other depending on required resistances of the metal interconnections. | 2009-10-22 |
20090261476 | Semiconductor device and manufacturing method thereof - A semiconductor device and a manufacturing method thereof are disclosed. The method includes the steps of providing a carrier board having conductive circuits disposed thereon and a plurality of chips with active surfaces having solder pads disposed thereon, wherein conductive bumps are disposed on the solder pads; mounting chips on the carrier board; filling the spacing between the chips with a dielectric layer and forming openings in the dielectric layer at periphery of each chip to expose the conductive circuits; forming a metal layer in the openings of the dielectric layer and at periphery of the active surface of the chips for electrically connecting the conductive bumps and the conductive circuits; and cutting along the dielectric layer between the chips and removing the carrier board to separate each chip and exposing the conductive circuits from the non-active surface. | 2009-10-22 |
20090261477 | Semiconductor device and method of manufacturing the same - A method of manufacturing a semiconductor device including a trench and a contact hole filled with a copper line, a diffusion barrier layer formed in inner walls of the trench and the contact hole, and a seed-copper layer formed on and/or over the diffusion barrier layer. The surface roughness of the seed-copper layer can be reduced by performing a plasma process thereon. | 2009-10-22 |
20090261478 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - The present invention constitutes a semiconductor device wherein a Ni-containing metal silicide layer is formed on a semiconductor substrate and its uppermost surface is nitrided. According to this structure, a dangling bond of silicon existing in the metal silicide layer and nitrogen are bonded by nitridation of the uppermost surface of the metal silicide layer. Therefore, diffusion of oxygen into the metal silicide layer can be suppressed. As a result, electrical insulation due to oxidation of the metal silicide layer can be reduced and the contact resistance can be stabilized. | 2009-10-22 |
20090261479 | METHODS FOR PITCH REDUCTION - An integrated circuit described herein includes a substrate and a plurality of lines overlying the substrate. The lines define a plurality of first trenches and a plurality of second trenches. The plurality of first trenches extend into the substrate a distance different than that of the plurality of second trenches. Adjacent pairs of lines are separated by a first trench in the plurality of first trenches, and each pair of lines comprises a first line and a second line defining a corresponding second trench in the plurality of second trenches. | 2009-10-22 |
20090261480 | INTEGRATED CIRCUIT AND METHOD OF FABRICATING THE SAME - An article including a substrate having a blind hole formed therein, wherein the blind hole is defined by a floor and a sidewall and a solder connection is provided. The solder connection may couple a first contact pad to a second contact pad. The first contact pad may cover a first field of the floor of the blind hole, and may also promote wetting of a solder material of the solder connection. Wetting may be impeded on a second field of the floor of the blind hole. The second contact pad may be arranged above a surface of a further substrate, wherein the surface of the further substrate may be oriented perpendicularly to the floor of the blind hole in the substrate. | 2009-10-22 |
20090261481 | WAFER LEVEL PACKAGE AND METHOD OF FABRICATING THE SAME - Provided are a wafer level package in which a communication line can be readily formed between an internal device and the outside of the package, and a method of fabricating the wafer level package. The wafer level package includes a first substrate having a cavity in which a first internal device is disposed, an Input/Output (I/O) pad formed on the first substrate and electrically connected with the first internal device, a second substrate disposed over the first substrate and from which a part corresponding to the I/O pad is removed, and a solder bonding the first and second substrates. According to the wafer level package and the method of fabricating the same, upper and lower substrates are sawed to different cutting widths, or a hole is formed in the upper substrate, such that a communication line of an internal device can be readily formed without a via process which penetrates a substrate. Therefore, in comparison with a conventional wafer level package fabricated using the via process, it is possible to simplify a fabrication process and reduce production cost. | 2009-10-22 |
20090261482 | SEMICONDUCTOR PACKAGE AND METHOD OF MAKING SAME - A semiconductor package ( | 2009-10-22 |
20090261483 | ADHESIVE COMPOSITION, ADHESIVE COMPOSITION FOR CIRCUIT CONNECTION, CONNECTED BODY SEMICONDUCTOR DEVICE - An adhesive composition containing: (a) a thermoplastic resin; (b) a radical-polymerizable compound including two or more (meth)acryloyl groups; (c) a curing agent that generates a radical by photoirradiation of 150 to 750 nm and/or heating at 80 to 200° C.; and (d) a liquid rubber having a viscosity of 10 to 1000 Pa·s at 25° C. | 2009-10-22 |
20090261484 | LIQUID RESIN COMPOSITION, SEMI-CONDUCTOR DEVICE, AND PROCESS OF FABRICATING THE SAME - A liquid resin composition for use as a sealing resin which reduces wear on a dicing blade or grinder employed for signularization or grinding. The liquid resin composition includes hollow and/or porous particles as a filler, and is adapted in use to be applied on a substrate constituting a semi-conductor device or electronic part. | 2009-10-22 |
20090261485 | REFRIGERATOR WITH DISPENSER FOR CARBONATED WATER | 2009-10-22 |
20090261486 | Mixing eductor - An eductor comprising an inlet channel, a mixing channel, and a flowpath, designed for the improved mixing of a relatively large volume of water with gas while utilizing a relatively small amount of power. | 2009-10-22 |
20090261487 | METHOD FOR MAKING OPTICAL ARTICLES - A method for making an optical article having a first optical surface and an opposite second optical surface, is provided. The method includes: providing a transparent substrate having a first surface and an opposite second surface; forming a first layer comprised of a first molding material on the first surface of the substrate; press-molding the first layer to form a first optical surface thereon; providing a supporting mold having a supporting surface conforming to the first optical surface; attaching the supporting mold to the first layer with the first optical surface in intimate contact with the supporting surface thereof; forming a second layer comprised of a second molding material on the second surface of the substrate; press-molding the second layer to form a second optical surface thereon; and removing the supporting mold to obtain an optical article including the substrate with the first and second layers at opposite sides thereof. | 2009-10-22 |
20090261488 | MANUFACTURING METHOD OF OPTICAL WAVEGUIDE MODULE - A manufacturing method of an optical waveguide module which is capable of forming a light reflecting portion with stabilized accuracy and which is good in production efficiency. The manufacturing method of an optical waveguide module in which an optical element is mounted on the back side of end portions of an optical waveguide is provided. For the production of the above-mentioned optical waveguide, end portions of an over cladding layer | 2009-10-22 |
20090261489 | METHOD FOR MAKING LENSES - A method for making a plurality of lenses, is provided. Each of the lenses has an optical structure on at least one side thereof. The method includes steps of: providing a lens material sheet having a first surface and an opposing second surface; providing a press-molding roller, the press-molding roller having a circumferential surface and a plurality of molding structures formed thereon, the molding structures having molding surfaces to form the optical structures of the lenses; press-molding one of the first and second surfaces of the lens material sheet by applying and rolling the press-molding roller thereon, thereby forming a plurality of the optical structures on the lens material sheet; and dicing the lens material sheet into a plurality of the lenses each having one of the optical structures on the at least one side thereof. | 2009-10-22 |
20090261490 | FILM INSERT MOLDING (FIM) ON A 3D SHAPE - Systems and methods are described for performing film insert molding (FIM) on a 3D shape, such as a traffic light shell or cover. A film is pre-generated for a surface to be covered by the film, and is inserted into a mold. A viscous material is then injected into the mold and the film bonds to the shell as the viscous material cools and hardens. The film includes a material selected to provide one or more of scratch resistance, improved shell hardness, UV protection, corrosion protection etc., and/or may be selected to alter optical characteristics of the shell. | 2009-10-22 |
20090261491 | Method for Producing Surface Convexes and Concaves - A method for producing surface convexes and concaves enabling easy and highly precise formation of desired convex and concave shapes using a photomask is provided. | 2009-10-22 |
20090261492 | BLOCK-SHAPED SCAFFOLD FOR TISSUE ENGINEERING AND PRODUCTION METHOD THEREOF - A block-shaped scaffold for a tissue engineering with improved shape stability and less volume change in water is produce by the steps of approximate-uniformly mixing the particle-shaped material having 100 to 2000 μm diameter with a solution, where a biodegradable polymer is dissolved with an organic solvent, freezing, drying it to remove the solvent, pulverizing thus obtained intermediate product, dissolving it with a liquid, where the biodegradable polymer is not dissolved, to remove the particle-shaped material taking thus obtained intermediate product into a mold, and pressing and heating it, the scaffold having ununiform and continuous holes occupying 20 to 80% in a cross-section area in a three-dimensional network structure having a small hole structure with 5 to 50 μm diameter, elastic coefficient being 0.1 to 2.5 MPa, and volume change being 95 to 105% when dipping it in water for 24 hours. | 2009-10-22 |
20090261493 | Method And System For Making Plastic Cellular Parts And Thermoplastic Composite Articles Utilizing Same - A method and system for making plastic cellular parts and thermoplastic composite articles utilizing the cellular parts are provided. The method includes providing a mold having a mold cavity with an interior surface to define the shape of the cellular part and at least one resin flow path extending from an outer surface of the mold to the mold cavity. The method further includes providing first and second sets of projections or pins. The first set of projections extend into the mold cavity from a first direction and the second set of projections extend into the mold cavity from a second direction opposite the first direction. The projections define cells which open to opposing outer surfaces of the cellular part. The method still further includes filling the mold cavity, with the projections extending into the mold cavity, with molten plastic resin from the at least one resin flow path and removing the cellular part from the mold cavity of the mold after the cellular part hardens. | 2009-10-22 |
20090261494 | Automated Method And System For Making Painted Vehicle Body Panel Skins And Vehicle Body Panels, Such As Instrument Panels, Utilizing Same - An automated method and system for making painted vehicle body panel skins and vehicle body panels are provided. The method includes transferring a mold having a mold surface from an entrance station to a paint station within a dispensing area. The method further includes applying paint on the mold surface to form a layer of paint on the mold surface at the paint station. The method still further includes spraying curable polyurethane elastomer on the painted surface at a spray station within the dispensing area. The paint and spray stations may be coincident. The method still further includes, after the step of spraying and while the polyurethane elastomer is uncured, transferring the mold with the paint and the uncured polyurethane elastomer from the spray station to at least one accumulator station in a curing area to allow the polyurethane elastomer to completely cure in the mold and form the skin. | 2009-10-22 |
20090261495 | METHOD FOR SETTING ACTION STEPS OF A MOLD CORE - A method for setting action steps of a mold core, used in a mold core control system, the method comprising confirmation of the mold core for use. If mold cores are to be used, the number thereof is set. The control system implements action timing settings for every mold core, based on individual requirements. The new settings are confirmed, and if accepted, YES is entered and the action steps of the mold core are complete, and if not, NO is entered, and confirmation of the mold core for use is repeated. | 2009-10-22 |
20090261496 | DIE CLAMPING UNIT AND DIE CLAMPING METHOD - Used in a method of this invention is a die clamping unit, which comprises a tie bar movably attached to a stationary platen, a halfnut positioning servomotor which advances and retreats to the tie bar, a halfnut which is provided on a movable platen and fixes the movable platen and the tie bar together by engaging the tie bar, an engaging mechanism which engages the halfnut with the tie bar, a hydraulic die clamping cylinder which presses the stationary platen and the movable platen, and a control device which controls the halfnut positioning servomotor and the hydraulic cylinder. The control device drives the halfnut positioning servomotor to remove a clearance between the halfnut and an engaging groove of the tie bar before a die clamping process carried out by the hydraulic cylinder. | 2009-10-22 |
20090261497 | METHOD FOR CONSTRUCTING PATTERNS IN A LAYERED MANNER - A process to produce models in layers is described, whereby a first material and then selectively a second material is applied in layers on a building platform and these two application stages are repeated until a desired pattern is achieved. The two materials form a solid if a suitable mixture ratio is used and the first material is a material mixture. The material mixture is at least partially prepared prior to each application stage. | 2009-10-22 |
20090261498 | METHOD AND APPARATUS FOR THE MANUFACTURE OF A FIBER - An apparatus for the manufacture of extruded material. The apparatus includes a material supplier which supplies a material and has an opening, through which the material is extruded to form extruded material. A moving surface is positioned adjacent to the opening to receive the extruded material from the opening. The method for the extrusion of the material which comprises providing the material in a liquid form, extruding the material through an opening to form extruded material and receiving the extruded material on the moving surface. | 2009-10-22 |
20090261499 | DIE HAVING MULTIPLE ORIFICE SLOT - The invention is a die for dispensing flowable material. The die is comprised of a die block. An external face is disposed on the die block. At least one slot extends perpendicularly into the external face. The slot has a longitudinal dimension, a first longitudinal side and a second longitudinal side. At least one support member extends from the external surface into the slot. The support member extends continuously from the first longitudinal side to the second longitudinal side. At least a portion of the support member is disposed in a direction other than perpendicular to the longitudinal dimension. The support member is disposed to such that at least a portion of any plane extending from the first longitudinal side to the second longitudinal side, in a direction perpendicular to the longitudinal dimension of the slot, passes through a void area. | 2009-10-22 |
20090261500 | METHOD FOR MANUFACTURING CELLULOSE RESIN FILM - According to an aspect of the present invention, there is a provided a method for manufacturing a cellulose resin film comprising: ejecting a molten cellulose resin from an outlet (ejection port) of a die in a form of sheet; and casting the sheet-form cellulose resin on a drum, wherein a difference ΔT between a temperature T1 (° C.) of the sheet-form cellulose resin ejected from the die and a temperature T2 (° C.) of the sheet-form cellulose resin cast on the drum, that is, ΔT(=T1−T2)° C., falls within 20° C. or less. According to the aspect, the proceeding of the cooling and solidification of the sheet-form cellulose resin can be controlled, and thereby, a film having a small film-thickness distribution and excellent in flatness of the surface can be obtained. | 2009-10-22 |
20090261501 | MANUFACTURING METHOD FOR A STAMPER AND MANUFACTURING METHOD FOR AN OPTICAL INFORMATION RECORDING MEDIUM USING THE STAMPER - A method of manufacturing a stamper includes: a photoresist forming step for forming a photoresist layer which undergoes a change of shape when it is heated by irradiation with light; a laser beam irradiation step for irradiating the photoresist layer with a laser beam to form at least one hole in the photoresist layer; and a plating step for forming an electrically conductive layer on the photoresist layer having the at least one hole and thereafter electroplating the photoresist layer. | 2009-10-22 |
20090261502 | INTEGRAL MOLDING METHOD OF GASKET OF FUEL CELL-USE COMPONENT MEMBER AND MOLDING DEVICE THEREOF - An integral molding method of gasket of a fuel cell component member in which a gasket body is integrally molded with an outer peripheral portion of a membrane electrode assembly and a peripheral portion of an opening formed on the membrane electrode assembly by cross-linking molding using a mold having a heating means, the membrane electrode assembly comprising a proton exchange membrane, a gas diffusion layer integrally laminated on both sides of the proton exchange membrane via a catalyst carrier layer constituting an electrode. The mold has a cavity corresponding to a molding portion of the gasket body and a heat insulation zone corresponding to a power generating functional portion of the fuel cell component member, a not-cross-linked gasket material is filled in the cavity and the gasket material is molded by heat cross-linking molding using the heating means, whereby a heat generated by molding is prevented from being transmitted to the power generating functional portion by the heat insulation zone. The heat insulation zone is constructed with a recessed portion formed on the mold corresponding to the power generating functional portion, and an inner wall of the recessed portion is attached with a heat insulation material. | 2009-10-22 |
20090261503 | SHEET OR FILM OBLIQUE STRETCHING METHOD AND SHEET OR FILM CLIPPING STRETCHER - Clipping both right and left side edge parts of a sheet or film by right and left pitch-variable clips having flow-directional clip pitches variable along with travel movements, respectively, having positions (AR, AL) for initiation of enlargements of flow-directional clip pitches changed between right clips and left clips, and enlarging flow-directional clip pitches along with travel movements of clips to thereby make an oblique stretch. | 2009-10-22 |
20090261504 | IMPRINTING METHOD AND APPARATUS THEREFOR - An imprinting method includes the steps of setting a room-temperature imprint resist-coated substrate and a mold having a transfer surface having a pattern of projections and recesses therein in an assembling jig, pressing the patterned surface of the mold against the resist surface of the substrate, and releasing the mold from the substrate to separate the substrate, the mold and the assembling jig from one another. The steps are performed in plural independent units in each of which one step is executed, and the mold and the substrate are paired with each other by the assembling jig and conveyed between the units in a range of from the alignment step to the separation step. An imprinting apparatus includes an alignment unit which performs the alignment step, a press unit performing the press step, and a separation unit performing the separation step, wherein conveyance devices are provided to convey the mold and substrate between units. | 2009-10-22 |
20090261505 | POLYMER RODS FOR SPINAL APPLICATIONS - A method of manufacturing a curved spinal rod is disclosed. The method includes heating PEEK; injecting the PEEK into an arcuate spinal rod mold; holding the injected PEEK in the mold until the PEEK substantially sets; and removing the injected PEEK from the mold. In another aspect, a spinal rod is disclosed. The spinal rod includes an arcuate main body having a first end portion, a second end portion, and a central portion. The central portion has a non-circular cross-section with a height greater than its width. The first and second end portions and the central portion of the arcuate main body are integrally formed of a polymer such as polyetheretherketone (PEEK). The spinal rod also includes a rounded end cap adapted to mate with at least one of the end portions. The end cap is radiopaque. | 2009-10-22 |
20090261506 | Crystallization method of neck of primary molded product for biaxially-oriented blow-molded bottle-shaped container and jig to be used for the same - A method for thermally crystallizing a neck of a primary molded product for forming a bottle-shaped container made of polyethylene terephthalate as principal ingredient, said neck having a functional part and a neck ring at a lower end thereof, said functional part being formed with screw threads at an upper portion thereof and a bead ring below the screw threads, said method comprising: heating the neck, and then squeezing the bead ring heated to the heat-deformable temperature, from outside so as to form an outer diameter of the bead ring within a dimensional tolerance for deformation with regard to sealing effect. | 2009-10-22 |
20090261507 | Rotary moulding - A valve in a mould as to provide a potential airflow pathway either way, the valving being characterised in that it has at least a substantially closed condition from which it can be opened by a pressure differential in one direction that is below that which will cause it to open or fail to allow an airflow in the other direction. | 2009-10-22 |
20090261508 | MANUFACTURE OF CMC ARTICLES HAVING SMALL COMPLEX FEATURES - The present invention is ceramic matrix composite gas turbine engine component comprising a plurality of cured ceramic matrix composite plies, each ply comprising ceramic fiber tows, each ceramic fiber tow comprising a plurality of ceramic fibers, the tows in each ply lying adjacent to one another such that each ply has a unidirectional orientation. The component further comprises a layer of a coating on the ceramic fibers. The component further comprises a ceramic matrix material lying in interstitial regions between the fibers and tows of each ply and the interstitial region between the plurality of plies, wherein at least a portion of the component is no greater than about 0.021 inch thick. The present invention is also a method for making such a ceramic matrix composite component. | 2009-10-22 |
20090261509 | VENT PLUG FOR A TIRE VULCANIZATION MOLD, TIRE VULCANIZATION MOLD AND METHOD FOR MANUFACTURING A PNEUMATIC TIRE USING THE TIRE VULCANIZATION MOLD - The invention relates to a vent plug for a tire vulcanization mold used for a vent hole of the mold, the tire vulcanization mold, and a manufacturing method for the tire using the mold. The vent plug includes a plug holder with a hollow ventilation portion and a plug head within the ventilation portion. The plug holder includes a tapered seat portion, an inside diameter of which becomes smaller toward a mold rear side, and a cylinder portion located at the mold rear side of the seat portion. The plug head includes a tapered head portion, an outer diameter of which becomes smaller toward the mold rear side, a base body portion located at the mold rear side of the head portion, and a slit portion communicating with the ventilation portion from an upper end face of the plug head. | 2009-10-22 |
20090261510 | Polymer composition comprising polylactide - The present invention pertains to a polymer composition comprising one of poly-D-lactide and poly-L-lactide bonded to an anionic clay mineral and the other of poly-D-lactide and poly-L-lactide not bonded to the anionic clay mineral. In a preferred embodiment, the anionic clay mineral is a hydrotalcite or a meixnerite. | 2009-10-22 |
20090261511 | SIDE GATE TYPE INJECTION MOLDING DIE AND MOLDED COMPONENT MANUFACTURING METHOD USING THE SAME - A side gate type injection molding die prevents a weld line from being generated on a molded component made of a resin material to which a brightening agent is added, avoiding inferior appearance. The side gate type injection molding die including a product portion | 2009-10-22 |
20090261512 | STEREOLITHOGRAPHY APPARATUS AND STEREOLITHOGRAPHY METHOD - A stereolithography apparatus that forms a three-dimensional model by sequentially laminating cured resin layers through repetition of a cycle of selectively applying light to liquid photocurable resin to form a cured resin layer, further applying liquid photocurable resin on the cured resin layer, and applying light to form a cured resin layer. The apparatus includes a table, a dispenser to supply the liquid photocurable resin onto the table, a recoater to apply the photocurable resin, and a controller to slow down a moving speed of the recoater based on a moving distance of the recoater during application operation of the recoater. | 2009-10-22 |
20090261513 | METHOD AND APPARATUS FOR MANUFACTURING PLASTIC CONTAINERS WITH INFRARED ABSORPTION MONITORING - An apparatus and a method for manufacturing plastic containers, where the plastic containers are produced from a plastic material such as recycled plastic. The plastic preforms are heated in a heating unit and expanded into plastic containers in an expansion device. An infrared absorption degree of the plastic material or of the plastic preforms produced from said plastic material is then examined at least once in the course of the production process. From this examination conclusions can be drawn with respect to the quality of the preforms and their behavior when they are being heated. | 2009-10-22 |
20090261514 | IMPRINTING METHOD AND APPARATUS THEREFOR - An imprinting method forms a predetermined pattern in a resist surface of a substrate coated with a photo-curing type resist by using a mold having a pattern of projections and recesses formed in a transfer surface. The method includes an alignment step, a press step, a UV irradiation step, and a release step. The steps are performed in plural units selected from independent units, composite units, and combinations of independent units and composite units. The mold and the substrate are paired with each other and conveyed between the units. An imprinting apparatus includes plural units which perform the steps in the imprinting method and which are selected from independent units in each of which one step is executed, composite units in each of which plural of steps are executed, and combinations of independent units and composite units; and conveying devices which convey the mold and the substrate. | 2009-10-22 |
20090261515 | Process for Making Disposable Milk Bottle Inner Tube - A process for making disposable milk bottle inner tube includes the following steps: (a) selecting a metallocene linear low density polyethylene and a low density polyethylene and mixing them in the ratio of 40%-80% to 20%-60%, and then adding 2-6% of anti-blocking agent and 0.02%-0.04% of slip agent; (b) producing sheet by heating, extruding, rolling, pulling, winding and cutting; and (c) blow molding. | 2009-10-22 |
20090261516 | METHOD AND APPARATUS FOR STEP-AND-REPEAT MOLDING - A method and apparatus for molding a structure on the top surface of a substrate. Mold material is dispensed onto an area of the top surface of the substrate. The mold apparatus is positioned over the area. The mold portion of the mold apparatus is positioned above the mold material and the mold material is surrounded with a shroud of the mold apparatus. A seal is formed between the shroud and the top surface of the substrate. The pressure is reduced within the shroud to below the ambient pressure. The mold portion of the mold apparatus is lowered toward the top surface of the substrate, so that at least the outer edge of the mold portion is in contact with the mold material. The pressure within the shroud is raised to at least the ambient pressure, and the mold material is cured to form the structure. | 2009-10-22 |
20090261517 | MULTI-STAGE SPRING SYSTEM - Embodiments of a multi-stage spring system are provided herein. In some embodiments, a multi-stage spring system includes a spring assembly having at least one resilient element, wherein the spring assembly has a first spring constant when deflected up to a first distance, a greater, second spring constant when deflected beyond the first distance and up to a second distance, and a greater, third spring constant when deflected beyond the second distance and up to a third distance, and wherein the spring assembly stores mechanical energy when deflected towards a contact surface that biases the spring assembly away from the contact surface when released. | 2009-10-22 |
20090261518 | Microalloyed Spring - The systems and methods described herein include innerspring assemblies or innerspring cores for use with cushioning articles such as mattresses. The innerspring core may have one or more coil springs formed from a high-carbon steel wire alloyed with one or more suitable alloying elements such as titanium and copper and capable of imparting greater strength and durability to the innerspring core. | 2009-10-22 |
20090261519 | Clamping device - Disclosed herein is a securing device for plate-like work pieces, comprising a body member and an anchor member, the body member having a first end and a second end, the first end having an engagement portion, a biasing member to basis the body member laterally within a plurality of aligned openings in said work pieces and biasing the engagement portion past the openings, the engagement portion having an operative surface to engage an outer surface on a first outer work piece, the body member including a threadable portion, the anchor member being operable to engage an outer surface on a second outer work piece, the anchor member including a threaded member to engage the threadable portion, the threaded member be rotationally operational to draw the body member toward the anchor member. | 2009-10-22 |
20090261520 | Clamping apparatus - A non-power operated clamping apparatus is disclosed which is made up of a top section, middle section, and bottom section. There are first direction clamps located on the left side and right side of the middle section and the bottom section is positioned within the first direction clamps and the sides of the middle section. There are second direction clamps between the bottom section and middle section and between the top section and middle section. The workpiece, comprising members of wood glued edge-to-edge, is placed between the top section and middle section and subjected to a first direction compressive force and a second direction compressive force perpendicular to the first direction compressive force. | 2009-10-22 |
20090261521 | Sheet post-processing apparatus - To provide a sheet post-processing apparatus where a cutting means for cutting a fore-edge portion of a center-folded bunch of sheets is disposed in a position spaced from a sheet discharge outlet in an apparatus frame to eliminate the risk for inflicting a wound on the body such as the finger, hand and the like of an operator, provided are an end binding means ( | 2009-10-22 |