43rd week of 2008 patent applcation highlights part 22 |
Patent application number | Title | Published |
20080258782 | Oscillating divider topology - An oscillator includes a first circuit that asynchronously generates an oscillating signal in response to a second circuit of the oscillator acknowledging each cycle of the oscillating signal. | 2008-10-23 |
20080258783 | BROADBAND LOW NOISE COMPLEX FREQUENCY MULTIPLIERS - A frequency multiplier device including a plurality of multipliers, each of which has a first input port, a second input port and an output port; a first combiner coupled to the plurality of multipliers so as to receive an output signal from at least two of the plurality of multipliers, the first combiner outputting a first output signal; and a second combiner coupled to the plurality of multipliers so as to receive an output signal from at least two of the plurality of multipliers, the second combiner outputting a second output signal. The plurality of multipliers includes a first multiplier, a second multiplier, a third multiplier and a fourth multiplier, where the first multiplier has a first input port and a second input port and receives a first input signal at the first input port and the second input port; the second multiplier has a first input port and a second input port and receives a second input signal at the first input port and the second input port; the third multiplier has a first input port and a second input port and receives the second input signal at the first input port and the first input signal at the second input port; and the fourth multiplier has a first input port and a second input port and receives the first input signal at the first input port and the second input signal at the second input port. | 2008-10-23 |
20080258784 | Controller IC, DC-AC conversion apparatus, and parallel running system of DC-AC conversion apparatuses - A DC power source voltage is supplied to a center tap of a primary winding, and first and second semiconductor switches alternately turned on are disposed between each of both ends of the primary winding and a common potential point, and a current flowing through a load is fed back and PWM control of each of the semiconductor switches is performed. Also, snubber circuits are respectively connected between a ground and the center tap of the primary winding, and an abnormal high voltage at the time of switching is reduced. Also, a parallel running of plural inverters is simply performed by disposing PWM comparators corresponding to the first and second semiconductor switches. | 2008-10-23 |
20080258785 | Periodic signal synchronization apparatus, systems, and methods - Apparatus, systems, and methods are disclosed that operate to generate a periodic output signal from a periodic input signal, obtain a plurality of samples of a phase difference between the output signal and the input signal, and to adjust a phase of the output signal based on the samples of the phase difference. Additional apparatus, systems, and methods are disclosed. | 2008-10-23 |
20080258786 | Clock regeneration circuit - A clock regeneration circuit includes a half-bit delay device that outputs a half-bit delayed signal B of a multi-level input signal A, a one-bit delay device that outputs a one-bit delayed signal C of the signal A, an adder, an attenuator that forms an threshold signal, an XOR circuit, and a BPF that outputs a clock signal with a frequency corresponding to a bit rate of the XOR signal. The XOR signal is calculated as an XOR of a two-level input signal F, which is a logical zero when a level of the signal A is no more than a level of the threshold signal and otherwise is a logical one, and a two-level input signal G, which is a logical zero when a level of the signal B is no more than the level of the threshold signal and otherwise is a logical one. | 2008-10-23 |
20080258787 | Power Supply Controller - A parallel circuit | 2008-10-23 |
20080258788 | DYNAMIC DUAL OUTPUT LATCH - A dynamic latch includes a first stage for receiving an input data value and for providing true and complement logic values representing the input data value; a second stage for receiving the true and complement logic values into first and second dynamic node, when a control signal is active; and a holding that outputs the true and complement logic values while the control signal is active. The second stage may provide a feedback signal to the first stage to block propagation of changes in the input data value after the true and complement logic values have been received. The feedback signal may be derived, for example, from logic values on the dynamic nodes. A holding circuit may be provided. | 2008-10-23 |
20080258789 | Flip-flop and semiconductor integrated circuit - A flip-flop is disclosed which includes: a clock supply circuit configured to output or fix a clock signal alternating between two predetermined states in accordance with a sleep signal; a first holding circuit configured to fetch or hold an input signal in accordance with a state the clock signal indicates; a second holding circuit configured to fetch or hold a first signal output by the first holding circuit in accordance with a state the clock signal indicates; an input switching circuit configured to supply as the input signal a second signal output by the second holding circuit or to supply an external signal as the input signal in accordance with the hold signal; and a power supply control circuit configured to supply or not to supply power to the first holding circuit and the input switching circuit in accordance with a power supply control signal. | 2008-10-23 |
20080258790 | Systems and Devices for Sub-threshold Data Capture - Various systems and methods for capturing data are disclosed. For example, some embodiments of the present invention provide differential jam latches. Such differential jam latches include a data input, a latch input, and an output. Further, such differential jam latches include a PMOS stage and an NMOS stage. The PMOS stage includes a first PMOS transistor, a second PMOS transistor, a third PMOS transistor and a fourth PMOS transistor. The gate of the first PMOS transistor and the gate of the second PMOS transistor are electrically coupled to an inverted version of the latch input. The gate of the third PMOS transistor is electrically coupled to the data input, and the gate of the fourth PMOS transistor is electrically coupled to an inverted version of the data input. The NMOS stage includes a first NMOS transistor, a second NMOS transistor, a third NMOS transistor and a fourth NMOS transistor. The gate of the first NMOS transistor and the gate of the second NMOS transistor are electrically coupled to the latch input. The gate of the third NMOS transistor is electrically coupled to the data input, and the gate of the fourth NMOS transistor is electrically coupled to an inverted version of the data input. In addition, the jam latches include two inverters. The PMOS stage is electrically coupled to a first node and a second node, and the NMOS stage is electrically coupled to the first node and the second node. The first inverter drives an inverted version of the signal on the first node to the second node, and the second inverter drives an inverted version of the signal on the second node to the first node. | 2008-10-23 |
20080258791 | DIRECT DIGITAL SYNTHESIZER WITH VARIABLE REFERENCE FOR IMPROVED SPURIOUS PERFORMANCE - Improvement of quantization errors that arise in a delay line with finite resolution. A direct digital synthesizer (DDS), which contains a numerically controlled oscillator (NCO) and a digital-to-phase converter (DPC), is placed in the feedback loop of a phase locked loop (PLL). The DDS is used as a fractional divider of the voltage controlled oscillator (VCO) frequency, such that the reference frequency of the DDS is made variable. Alignment of the edges provided by the DDS delay line may then be adjusted. Mismatch errors in the DDS delay line are reduced by utilizing independently tunable delay elements. | 2008-10-23 |
20080258792 | Digital Single Event Transient Hardened Register Using Adaptive Hold - By adjusting a register's capturing clock edge timing so that the register captures data when the data returns to a correct state, the register may be protected against DSET upsets. If a data glitch occurs near the clock edge, the valid time at the register output is increased (CLK to Q). This valid time increase occurs when the presence of a DSET transient is detected near the clock edge. | 2008-10-23 |
20080258793 | Clock generating circuit and semiconductor device provided with clock generating circuit - An object is to provide a clock generating circuit that can suppress variation of an oscillation frequency from the clock generating circuit, which is due to a change in the output voltage according to a discharging characteristic of the battery, and effectively utilize the remaining power of the battery. A structure includes an output voltage detecting circuit for detecting an output voltage from a battery; a frequency-division number determining circuit for determining the number of frequency-division by a value of the output voltage detected by the output voltage detecting circuit; an oscillation circuit for outputting a reference clock signal depending on the output voltage; a counter circuit for counting a number of waves of the reference clock signal that depends on the number of frequency-division; and a frequency-dividing circuit that frequency-divides the reference clock signal depending on the number of waves counted by the counter circuit. | 2008-10-23 |
20080258794 | GLITCH-FREE CLOCK SWITCHING CIRCUIT - A glitch-free clock switching circuit receives a first clock signal and a second clock signal and outputs a third clock signal corresponding to the first clock signal or a fourth clock signal corresponding to the second clock signal according to a clock switching signal. The glitch-free clock switching circuit switches to output clock signals by stopping output of a clock signal, and then waiting for a predetermined period of time before outputting another clock signal. | 2008-10-23 |
20080258795 | LOW POWER OSCILLATOR - A CMOS low frequency oscillator circuit comprising an amplifier ( | 2008-10-23 |
20080258796 | CIRCUIT ARRANGEMENT AND METHOD FOR LIMITING A SIGNAL VOLTAGE - The present invention relates to the field of signal processing. It is an object of the invention to provide a circuit arrangement (VL) and a method for limiting a signal voltage upstream of a processing stage (A) of a signal processing device, by means of which circuit arrangement and method it becomes possible to reduce signal interference. It is provided a voltage comparison (OPAMP | 2008-10-23 |
20080258797 | NON-RESISTIVE LOAD DRIVER - Embodiments of the invention relate to a method and apparatus to drive non-resistive loads. The non-resistive load driver may include two or more drivers, such as a high-drive circuit and a low-drive circuit, to drive rail-to-rail output voltages and to stabilize the output voltages at a substantially constant level. The high-drive circuit may drive the output voltage of the non-resistive load driver to a threshold level, whereas the low-drive circuit may modify the output voltage of the non-resistive load driver to approximate an input voltage of the non-resistive load driver, and compensate any leakage associated with the non-resistive loads to provide a substantially constant output voltage. The low-drive circuit consumes less current than the high-drive circuit. The non-resistive load driver consumes less power and use less chip space. Alternatively, the non-resistive load driver may be implemented using a single driver with multiple modes, such as a low-drive mode and a high-drive mode, by changing a bias current of the non-resistive load driver between a high current mode and a low current mode. | 2008-10-23 |
20080258798 | ANALOG LEVEL SHIFTER - An analog level shifter is provided, receiving an input voltage to generate an output voltage. In the analog level shifter, a NMOS transistor has a gate coupled to an input node where the input voltage is input. A resistance device comprises a first end coupled to source of the NMOS transistor, and a second end coupled to an output node where the output voltage is output. A current source is coupled to the output node, sinking a first current therefrom to ground. | 2008-10-23 |
20080258799 | HIGH FREQUENCY SWITCHING CIRCUIT - A high frequency switching circuit is disclosed. The high frequency switching circuit is provided with first and second high frequency signal terminals, a control terminal, a field-effect transistor having a drain, a source and a gate. The field-effect transistor is connected between the first and the second high frequency signal terminals so as to switch a high frequency signal. The high frequency switching circuit is further provided with a variable resistance circuit which is connected between the gate of the field-effect transistor and the control terminal. | 2008-10-23 |
20080258800 | Voltage converter and semiconductor integrated circuit - There is a need for preventing a MOS transistor from being destroyed due to an inrush current from an input terminal when a boost operation starts from a boost disabling state. During the boost operation, a third MOS transistor (M | 2008-10-23 |
20080258801 | INTERNAL VOLTAGE GENERATOR OF SEMICONDUCTOR MEMORY DEVICE - An internal voltage generator is capable of supplying a stable internal voltage regardless of an unstable external voltage. The internal voltage includes a first level detecting unit configured to detect a voltage level of the internal voltage and output an output power detecting signal, an oscillating unit configured to produce a periodical signal in response to the output power detecting signal, a second level detecting unit configured to detect a voltage level of an external voltage and output a driving power detecting signal, a dividing unit configured to selectively divide the periodical signal in response to the driving power detecting signal and output a divided signal, and a charge pumping unit configured to provide the internal voltage by pumping the external voltage in response to the divided signal. | 2008-10-23 |
20080258802 | ADJUSTABLE TRANSISTOR BODY BIAS CIRCUITRY - An integrated circuit is provided that contain n-channel and p-channel metal-oxide-semiconductor transistors having body terminals. Adjustable transistor body bias circuitry is provided on the integrated circuit that provides body bias voltages to the body terminals to minimize power consumption. The adjustable body bias circuitry can be controlled using programmable elements on the integrated circuit that are loaded with configuration data. The integrated circuit may be a programmable logic device integrated circuit containing programmable logic. The adjustable body bias circuitry can produce an adjustable negative body bias voltage for biasing n-channel metal-oxide-semiconductor transistors. The adjustable body bias circuitry contains a bandgap reference circuit, a charge pump circuit, and an adjustable voltage regulator. | 2008-10-23 |
20080258803 | Semiconductor circuit - A pseudo differential circuit is a circuit system taking the advantages of both a CMOS circuit and a differential circuit. However, when process variability and the like are taken into account, a cross point of positive and negative outputs is not constant, thereby increasing a variation in duty of an output waveform. A semiconductor circuit according to the present invention includes: a first transistor being of a first conductivity type, coupled between a first power supply and an output terminal, and applied with an input signal; a second transistor being of a second conductivity type and coupled between a second power supply and the output terminal; a third transistor being of the second conductivity type and coupled between the first power supply and the output terminal; and a fourth transistor being of the first conductivity type and coupled between the second power supply and the output terminal. | 2008-10-23 |
20080258804 | NUMERICAL BAND GAP - A system includes a bandgap temperature sensor to generate multiple base-emitter voltages. The system also include a controller to detect the base-emitter voltages generated by the bandgap temperature sensor and to generate a bandgap reference voltage according to the multiple base-emitter voltage signals, the bandgap reference voltage having a voltage level that remains substantially constant relative to environmental temperature variations. | 2008-10-23 |
20080258805 | Semiconductor device having internal power supply voltage generation circuit - The composing circuit outputs a lower voltage out of voltages output from the constant voltage generation circuit and the dummy pump circuit as a voltage to the sensing circuit. The sensing circuit compares voltages to generate a pump activation signal for activating the pump circuit. Since when an external power supply voltage is a low voltage, the voltage applied to the sensing circuit will be an output voltage of the dummy pump circuit having the same output characteristics as those of the pump circuit in place of the reference voltage, no pump activation signal is generated. As a result, when the external power supply voltage is a low voltage, power consumption can be suppressed without uselessly outputting a pump activation signal. | 2008-10-23 |
20080258806 | Phase-Locked Loop Based Controller for Adjusting an Adaptive Continuous-Time Filter - A direct conversion radio-frequency (RF) receiver includes a controller and an adaptive continuous-time filter. The adaptive continuous-time filter receives a multiple-bit control signal generated by the controller to adjust a characteristic of the continuous-time filter. The controller generates the multiple-bit control signal in response to process variation in the semiconductor material used to implement the controller and the adaptive continuous-time filter. A method for tuning an adaptive continuous-time filter comprises determining a RC time constant, converting the RC time constant to a digital word, comparing a select bit of the digital word to a respective bit of a predetermined reference word to generate a control bit, applying the control bit to an adjustable element to modify the RC time constant, repeating the determining, converting, comparing and applying steps until the control bits generate an output word and providing the output word to the adaptive continuous-time filter. | 2008-10-23 |
20080258807 | Basic semiconductor electronic circuit with reduced sensitivity to process variations - A basic electronic circuit generates a magnitude. The circuit has certain structural characteristics and the magnitude undergoes variations in function of the structural characteristics of the circuit. The circuit comprises at least two circuit parts suitable for supplying respective fractions of the magnitude and the at least two circuit parts have different structural characteristics. | 2008-10-23 |
20080258808 | CIRCUIT TO OPTIMIZE CHARGING OF BOOTSTRAP CAPACITOR WITH BOOTSTRAP DIODE EMULATOR - A circuit for optimizing charging of a bootstrap capacitor connected to a high side floating supply voltage at a first terminal and to a switched node voltage at a second terminal, the circuit for optimizing being included in a gate driver circuit having high- and low-side driver circuits for driving high- and low-side switches connected at the switched node in a half bridge to provide current to a load, the high-side driver circuit receiving a first control voltage referenced to a first level and the low-side driver circuit receiving a second control voltage referenced to a second level, the bootstrap capacitor providing the high-side floating supply voltage for the high-side driver circuit, the optimizing circuit comprising a bootstrap diode emulator circuit comprising a bootstrap diode emulator driver circuit driving a first switch, the first switch connected between the first terminal of the bootstrap capacitor and a supply voltage for the low side driver circuit; and a phase sense comparator circuit responsive to the voltage at the switched node and turning ON the first switch when the voltage at the switched node is LOW, whereby charging of the bootstrap capacitor is optimized when the phase sense comparator circuit is enabled, the phase sense comparator circuit turning OFF or keeping OFF the first switch when the first control voltage goes to a level to turn ON the high-side switch or remains at such level or the bootstrap capacitor supply voltage goes high or remains high such that it is a fixed amount above the low-side driver supply voltage; further wherein the phase sense comparator circuit turns the first switch ON when: the second control voltage is at a level adapted to turn ON the low-side switch and the bootstrap capacitor supply voltage is low such that it is below the fixed amount above the low side driver supply voltage; or the first and second control voltages are both at a level such that the high-side and low-side switches are OFF after the second control voltage transitions from an ON state to an OFF state and the bootstrap capacitor supply voltage goes below the fixed amount above the low-side driver supply voltage; or the first and second control voltages are both at a level such that the high-side and low-side switches are OFF after the first control voltage transitions from an ON state to an OFF state and the bootstrap capacitor supply voltage goes below the fixed amount above the low-side driver supply voltage. | 2008-10-23 |
20080258809 | Amplifier Device Capable of Reducing Offset Voltage - An amplifier device capable of reducing offset voltage includes an offset-voltage cancellation device, an input stage circuit, an output stage circuit, a pseudo output stage circuit, a switch circuit, and an output end. The switch circuit is coupled to the input stage circuit, the output stage circuit, and the pseudo output stage circuit, and is utilized for transmitting an amplified signal provided by the input stage circuit to the output stage circuit and transmitting a first feedback voltage provided by the output stage circuit to the input stage circuit or transmitting the amplified signal provided by the input stage circuit to the pseudo output stage circuit and transmitting a second feedback voltage provided by the pseudo output stage circuit to the input stage circuit according to an operating mode. | 2008-10-23 |
20080258810 | Method and Apparatus for Optimizing Current Consumption of Amplifiers with Power Control - Apparatus and method for reducing the current consumption and increasing the efficiency of an RF power amplifier (PA), according to which the load, connected to the output stage of the PA, tuned dynamically or statically for each level of the desired output power. By doing so, the output impedance of the output stage is essentially matched, such that the dynamic RF load line has a slope that corresponds to the impedance required to provide this level. Whenever a smaller output power is desired in response to reduction in the input signal to the amplifier, the load is further tuned, such that the dynamic or static RF load line has a slope that causes the power amplifier to essentially remain in saturation at the smaller output power. | 2008-10-23 |
20080258811 | DISTRIBUTED CLASS G TYPE AMPLIFIER SWITCHING METHOD - An improved Class G type amplifier is provided which switches between multiple power rails depending upon the instantaneous amplitude of the input signal versus the power rails without excessive distortion. The low voltage (inner) amplifier includes a plurality of parallel amplifier devices, and the high voltage (outer) amplifier includes a plurality of parallel amplifier devices. A plurality of switches each couples the input signal to either a respective one of the inner amplifier devices or a respective one of the outer amplifier devices. The switches are activated sequentially, such that the switching from inner amplifier devices to outer amplifier devices or vice versa is staggered over time. This avoids having a single, large glitch in the output and spreads multiple smaller glitches over enough time so that some of the radiated glitch energy can fall within frequencies where amplifier feedback circuitry can eliminate its noise. The switches are sequentially activated by a series of delay elements. | 2008-10-23 |
20080258812 | High Speed Differential Receiver with Rail to Rail Common Mode Operation Having a Symmetrical Differential Output Signal with Low Skew - A novel high-speed differential receiver ( | 2008-10-23 |
20080258813 | Sense Amplifiers Operated Under Hamming Distance Methodology - A semiconductor device includes a first sense amplifier coupled to an input for generating a first output; a second sense amplifier couple to the input for generating a second output; and a third sense amplifier coupled to the input for generating a third output, wherein a fourth output amplifying the input is generated based on combinations of logic states of the first, second and third outputs. | 2008-10-23 |
20080258814 | VARIABLE GAIN AMPLIFIER AND METHOD FOR ACHIEVING VARIABLE GAIN AMPLIFICATION WITH HIGH BANDWIDTH AND LINEARITY - Various example embodiments are disclosed. According to one example embodiment, a high bandwidth, fine granularity variable gain amplifier (“VGA”) may comprise an attenuator, a gain block and a gain adjustment control. The attenuator may comprise at least one pair of attenuator differential input nodes and at least one pair of attenuator differential output nodes. The gain block may comprise at least one pair of gain block differential input nodes coupled to the at least one pair of attenuator differential output nodes and at least one pair of gain block differential output nodes. The gain adjustment control may be configured to adjust a gain of the gain block. | 2008-10-23 |
20080258815 | HIGH FREQUENCY POWER AMPLIFIER AND WIRELESS PORTABLE TERMINAL USING THE SAME - An object is to provide a high frequency power amplifier in which lowering of output power during operation is prevented, influence of thermal noise is suppressed, high frequency operation is stable, and long-term reliability is ensured. The high frequency power amplifier includes a plurality of transistors having gate electrodes, source regions and drain regions, the gate electrodes, source regions and drain regions being respectively connected in common, and a plurality of acoustic reflection layers being buried in portions of the semiconductor substrate, the portions being located between adjacent transistors, the acoustic reflection layers being disposed in a direction which is oblique to a length direction of the gate electrode. | 2008-10-23 |
20080258816 | LOW FREQUENCY ANALOG CIRCUIT AND DESIGN METHOD THEREOF - A low frequency analog circuit and a method for designing the same are provided. In a low frequency analog circuit according to the present invention, a part of MOS transistors employed in the circuit are operated at a weak inversion region. | 2008-10-23 |
20080258817 | HYBRID CONCURRENT AND SWITCHED DUAL-BAND LOW NOISE AMPLIFIER - The present invention provides a system and method for operating hybrid concurrent and switched dual-band low noise amplifiers. Embodiments use a concurrent design at the input block of a hybrid LNA to advantageously achieve better impedance matching while using a switch capacitor design at the output block to advantageously achieve a better gain than typical concurrent multiband LNAs. Embodiments might be integrated into wireless devices configured to simultaneously receive on multiple frequency bands while providing gains of 30 dB or more by combining the advantages of concurrent multiband LNAs with the advantages of switched multiband LNAs. In addition to the higher gains provided by embodiments of the hybrid LNA described herein, hybrid multiband LNAs according to embodiments of the present invention provide a smaller device footprint and power requirements than would be required for a receiver including multiple single-band LNAs for amplifying signals for each frequency band individually. | 2008-10-23 |
20080258818 | AMPLIFIER WITH PROGAMMABLE INPUT IMPEDANCE - One embodiment of the invention includes an amplifier system. The amplifier system comprises an amplifier stage configured to receive an input signal at an amplifier input and to provide an amplified output signal. The amplifier system also comprises a programmable input impedance stage comprising a plurality of transconductance stages. At least one of the plurality of transconductance stages can be selectively activated based on a selection signal, the at least one of the activated transconductance stages providing current through the amplifier input that adjusts an impedance associated with the amplifier input based on the amplified output signal. | 2008-10-23 |
20080258819 | ACTIVE CIRCUIT HAVING IMPROVED LINEARITY USING MULTIPLE GATED TRANSISTOR - The present invention relates to improved linearity of an active circuit, and more particularly, to an active circuit having improved linearity using a main circuit unit and an assistant circuit unit. According to the present invention, the common gate circuit includes a main circuit unit consisting of a common gate circuit having a drain terminal through which an input signal is output as an output signal, an assistant circuit unit having a common gate circuit in order to assist the linearity of the main circuit unit, a biasing unit for biasing the main circuit unit and the assistant circuit unit, respectively, and load stages connected to output stages of the main circuit unit and the assistant circuit unit, wherein the output stages of the main circuit unit and the assistant circuit unit are coupled to each other. | 2008-10-23 |
20080258820 | ACTIVE CIRCUIT HAVING IMPROVED LINEARITY USING MULITIPLE GATED TRANSISTOR - The present invention relates to improved linearity of an active circuit, and more particularly, to an active circuit having improved linearity using a main circuit unit and an assistant circuit unit. According to the present invention, the common gate circuit includes a main circuit unit consisting of a common gate circuit having a drain terminal through which an input signal is output as an output signal, an assistant circuit unit having a common gate circuit in order to assist the linearity of the main circuit unit, a biasing unit for biasing the main circuit unit and the assistant circuit unit, respectively, and load stages connected to output stages of the main circuit unit and the assistant circuit unit, wherein the output stages of the main circuit unit and the assistant circuit unit are coupled to each other. | 2008-10-23 |
20080258821 | CMOS TRIPLE-BAND RF VGA AND POWER AMPLIFIER IN LINEAR TRANSMITTER - Methods and systems for amplifying signals are provided. Embodiments include a three-to-one multiplexer, a multiband RF variable gain amplifier (VGA), a multiband power amplifier driver (PAD), and a one-to three multiplexer. The three-to-one multiplexer receives three input signals from an RF frequency source and outputs an output signal corresponding one input signal. The multiband RF VGA receives the output signal of the three-to-one multiplexer, provides a first level of amplification to the signal received from the three-to-one multiplexer, and outputs an amplified version of the signal. The multiband PAD receives the signal output by the multiband RF variable gain amplifier and provides a second level of amplification to the signal and outputs an amplified version of the signal. The one-to-three multiplexer receives a signal output by the multiband PAD produces three output signals that correspond to each of the three input signals. | 2008-10-23 |
20080258822 | OSCILLATOR CIRCUIT AND SEMICONDUCTOR DEVICE INCLUDING THE SAME - A stable frequency is outputted by an oscillator circuit including a constant current circuit which is electrically connected between a first terminal and a second terminal, a voltage controlled oscillator circuit in which an oscillation frequency fluctuates in accordance with a potential difference between power supply voltage terminals, an n-channel transistor, a p-channel transistor in which a gate-source voltage is set to be constant by the constant current circuit, and a capacitor, in which a source electrode of the p-channel transistor is electrically connected to the first terminal, a drain electrode of the p-channel transistor is electrically connected a drain electrode and a gate electrode of the n-channel transistor, a source electrode of the n-channel transistor is electrically connected to the second terminal, and a gate electrode of the n-channel transistor is electrically connected to the second terminal through the capacitor. | 2008-10-23 |
20080258823 | SELF-COMPENSATING VOLTAGE-CONTROLLED OSCILLATOR - In one embodiment, a voltage-controlled oscillator (VCO) is provided that includes: a plurality of differential inverter stages coupled to form a loop, each differential inverter stage having including a switched capacitor circuit configured to control a signal delay through the differential inverter stage responsive to a control circuit, whereby an output frequency for the VCO is inherently compensated against changes in semiconductor process variations and thermal variations. | 2008-10-23 |
20080258824 | Multi-speed ring oscillator - A ring oscillator comprises a control circuit for receiving a frequency-selection signal operative to select from at least two ring oscillator frequencies, said control circuit using said control signal to generate a first control signal and a second control signal; a primary chain of an odd number of serially connected NOT gates, said primary chain including a primary switching NOT gate responsive to the first control signal and operative to perform a logical NOT or an IGNORE function on a first oscillating input signal to generate a first output signal; and a secondary chain of serially connected NOT gates, said secondary chain logically parallel to at least said primary switching NOT gate, said secondary chain including a secondary switching NOT gate responsive to the second control signal and operative to perform a logical NOT or an IGNORE function on a second oscillating input signal to generate a second output signal. | 2008-10-23 |
20080258825 | Digital Component Deterministic Pseudo Random Clock and Noise Source Device Based on a Random Frequency Modulated Oscillator - Random number generators are used for entertainment in gambling, lotteries and video gaming devices. True Random Number Generators, as are now currently defined, must be actuated by a physical noise source, typically based on the uncertainty of the phase differences of a stable and an unstable autonomous oscillator. In this invention an autonomous random frequency modulated oscillator driven by a self contained pseudo-random number generator outputs three loosely correlated random binary streams. Included in the invention is a hardware method for proving wandering phase differences and also the existence of a colored random distribution of concatenated nibbles. | 2008-10-23 |
20080258826 | Low Voltage Operational Transconductance Amplifier Circuits - Circuits (FIG. | 2008-10-23 |
20080258827 | RADIO FREQUENCY VOLTAGE CONTROLLED OSCILLATORS - A radio frequency voltage controlled oscillator and method for designing it are provided. The RF VCO comprises a differential oscillator and a cascoded current source. The cascoded current source substantially provides a constant current bias to the differential oscillator. A first biased transistor in the cascoded current source is connected to the differential oscillator. A second biased transistor is cascoded to the first biased transistor. A low pass filter is cascoded between the first second biased transistors. | 2008-10-23 |
20080258828 | Colpitts Oscillator - A Colpitts oscillator includes a tank circuit, a first transistor, and a first feedback circuit. The first transistor includes a first region, a second region, and a control region. The first region communicates with the tank circuit. The first feedback circuit communicates with the second region and the control region of the first transistor. | 2008-10-23 |
20080258829 | Integrated quartz oscillator on an active electronic susbtrate - An oscillator having a quartz resonator, and a base wafer containing active electronics, wherein the quartz resonator is bonded directly to the base wafer and subsequently hermetically capped. | 2008-10-23 |
20080258830 | IC FOR CONTROL OF TEMPERATURE-COMPENSATED CRYSTAL OSCILLATOR - A temperature-compensated crystal oscillator includes a mode selector circuit | 2008-10-23 |
20080258831 | AMPLIFYING APPARATUS - A pulse modulator generates a pulse-modulated signal by pulse-modulating and amplifying the amplitude component of an input signal. A low-pass filter filters the pulse-modulated signal from the pulse modulator, and generates an amplified amplitude signal which is obtained by amplifying the amplitude component. An error corrector generates a corrected amplitude signal by correcting an error of the amplified amplitude signal from the low-pass filter by using the amplitude component of the input signal. A mixing unit generates the output signal by mixing the corrected amplitude signal from the error corrector and the phase component of the input signal. | 2008-10-23 |
20080258832 | Digital phase modulator and corresponding method - A simple, interference-free digital phase modulator is to be provided. To this end, the phase modulator is provided with a counter for outputting a counter signal on the basis of a predetermined clock signal and a comparator, which receives a current counter state from the counter, in order to record a digital input signal. The comparator compares the input signal with the current counter state on the basis of a predetermined allocation table and resets the counter, if the input signal corresponds to a counter state assigned via the allocation table. A predetermined signal value of the output counter signal is herewith phase-modulated as a function of the input signal. As only one phase position is generated with the circuit at any point in time, interferences, which are produced by the digital phase modulator itself, are significantly less. | 2008-10-23 |
20080258833 | Signal Generator With Directly-Extractable Dds Signal Source - A signal generator including a DDS-signal source that is configured to operate according to the principle of direct digital synthesis (DDS), and a PLL signal synthesizer that is configured to operate according to the principle of phase locked loop (PLL) using an output signal from the DDS-signal source as a reference signal. The DDS-signal source can be connected via a direct connection, without further frequency division or mixing, directly to an output of the signal generator or directly to a level-adjustment device of the signal generator in order to generate a portion of an overall frequency range of an output signal of the signal generator. | 2008-10-23 |
20080258834 | PULSE WIDTH MODULATION CIRCUIT - A pulse width modulation (PWM) circuit includes a turn on/off switch and a PWM controller. The first terminal of the turn on/off switch is coupled to a turn off voltage. The control terminal of the turn on/off switch receives a turn on/off signal to decide whether the circuit between the first terminal and the second terminal of the turn on/off switch is turned on or not. The PWM controller includes a PWM pin and a turn on/off device. The PWM pin is coupled to the second terminal of the turn on/off switch to output a PWM signal. The turn on/off device is coupled to the PWM pin to decide the turn on/off of the PWM controller according to a signal swing state of the PWM pin. | 2008-10-23 |
20080258835 | CIRCUIT AND METHOD FOR GLITCH CORRECTION - Correction of glitches output from a delta-sigma modulator is accomplished using an integer boundary crossing detector and a FIR filter. The detector monitors a portion of an input to the modulator. The detector recognizes a transition from an all 1's bit pattern to an all 0's bit pattern or vice versa as representative of potential for a glitch to be present on the output of the modulator. The detector responsively generates condition detection output. Receipt of such condition detection output triggers the generation of a correction signal by the filter. The correction signal is, at least substantially similar, in magnitude but opposite in sign from to the expected glitch at the output of the modulator. The correction signal is added to the output of the modulator to substantially eliminate the glitch. | 2008-10-23 |
20080258836 | Impedance matching methods and systems performing the same - Provided are an impedance matching method and a matching system performing the same. The method includes: measuring an electrical characteristic of the power transmission line including the matching system and the load; extracting a control parameter for impedance matching from the electrical characteristic of the power transmission line; and controlling the matching system by using the control parameter. The extracting of the control parameter comprises utilizing an analytic coordinate system that quantitatively relates the electrical characteristic of the matching system to the electrical characteristic of the power transmission line. | 2008-10-23 |
20080258837 | BALUN SIGNAL TRANSFORMER | 2008-10-23 |
20080258838 | MULTILAYER BALUN, HYBRID INTEGRATED CIRCUIT MODULE, AND MULTILAYER SUBSTRATE - A multilayer balun comprises first and second transmission lines that constitute a half-wave transmission line are opposed in adjacent layers, with a dielectric substance therebetween, so that, during use, the current of the first transmission line and the current of the second transmission line flow in the same direction. Thus, magnetic shield is formed between the first and second transmission lines. This eliminates the need for a grounding electrode layer for preventing magnetic interference between the first and second transmission lines. | 2008-10-23 |
20080258839 | HIGH-FREQUENCY SWITCHING MODULE AND FREQUENCY-CHARACTERISTIC ADJUSTING METHOD FOR HIGH-FREQENCY CIRCUIT - A high-frequency switching module in which a high-frequency switch including a diode, which functions as a switching device, and a high-frequency filter including inductors and a capacitor are integrated with each other. The inductor defining a π-type high-frequency filter is connected directly and in series to the diode. By inserting the inductor, the cut-off frequency of a Chebyshev-type low-pass filter circuit produced when the diode is turned ON can be shifted to a lower frequency side, and also, the ripple can be suppressed to a small level. | 2008-10-23 |
20080258840 | MULTILAYER FILTER - A multilayer filter comprises an inductor stacked-layer portion and a varistor stacked-layer portion. The varistor stacked-layer portion has a varistor layer the main component of which is ZnO and a hot electrode and ground electrode positioned in opposite with the varistor layer intervening, and the region enclosed between the opposing hot electrode and ground electrode does not contain a Cu component. Because the region enclosed between the opposing hot electrode and ground electrode is a region which manifests varistor characteristics, and thus the region does not contain a Cu component, degradation of the attenuation characteristics can be suppressed. | 2008-10-23 |
20080258841 | Wireless acoustic-electric feed-through for power and signal transmission - An embodiment provides electrical energy from a source on one side of a medium to a load on the other side of the medium, the embodiment including a first piezoelectric to generate acoustic energy in response to electrical energy from the source, and a second piezoelectric to convert the received acoustic energy to electrical energy used by the load. Other embodiments are described and claimed. | 2008-10-23 |
20080258842 | ACOUSTIC RESONATOR PERFORMANCE ENHANCEMENT USING ALTERNATING FRAME STRUCTURE - Disclosed is an acoustic resonator that includes a substrate, a first electrode, a layer of piezoelectric material, a second electrode, and an alternating frame region. The first electrode is adjacent the substrate, and the first electrode has an outer perimeter. The piezoelectric layer is adjacent the first electrode. The second electrode is adjacent the piezoelectric layer and the second electrode has an outer perimeter. The alternating frame region is on one of the first and second electrodes. | 2008-10-23 |
20080258843 | Surface acoustic wave passband control - An apparatus in one example comprises a piezoelectric layer, an input transducer, an output transducer, and at least one electrode set. The input transducer is configured to convert an input signal from an input source to a surface acoustic wave and send the surface acoustic wave from an input portion of the piezoelectric layer to an output portion of the piezoelectric layer. The input transducer comprises a set of input passbands. The output transducer is configured to receive the surface acoustic wave from the output portion of the piezoelectric layer. The output transducer comprises a set of output passbands. The at least one electrode set is configured to apply at least one voltage bias to at least one portion of the piezoelectric layer to create an electric field that controls an acoustic velocity of the surface acoustic wave through the at least one portion of the piezoelectric layer. The at least one electrode set is configured to control one or more of the set of input passbands and the set of output passbands by adjustment of the at least one voltage bias. | 2008-10-23 |
20080258844 | METHOD FOR MANUFACTURING SURFACE ACOUSTIC WAVE DEVICE AND SURFACE ACOUSTIC WAVE DEVICE - A method for manufacturing a surface acoustic wave filter device includes a step of forming grooves in one principal surface of a piezoelectric substrate, a step of embedding a metallic film in the grooves to form IDT electrodes, a step of performing a process of removing a portion of the piezoelectric substrate from the one principal surface of the piezoelectric substrate, thereby forming a recessed portion including the bottom surface in which the IDT electrodes are embedded, and a step of bonding a cover member to the piezoelectric substrate. | 2008-10-23 |
20080258845 | Resonator Operating with Bulk Acoustic Waves - Disclosed is a resonator that is mounted on a substrate, operates with acoustic bulk waves, and is disposed above an acoustic mirror. According to the invention, the basic mode of the acoustic bulk wave that can be generated in the resonator is suppressed while a higher mode can be excited in parallel and be utilized for the resonator by adjusting the acoustic mirror. | 2008-10-23 |
20080258846 | ELASTIC WAVE FILTER - An elastic wave filter of a resonator type includes at least one IDT electrode arranged so as to contact the piezoelectric substance. The elastic wave filter is arranged such that an elastic wave in a main propagation mode for obtaining target frequency characteristics and an elastic wave in a sub-propagation mode propagate, the elastic wave being capable of propagating simultaneously with the elastic wave in the main propagation mode, an electromechanical coefficient K | 2008-10-23 |
20080258847 | COMPOSITE RESONATOR FOR USE IN TUNABLE OR FIXED FILTERS - A fixed or tunable resonator. The resonator includes an inner conductor, a hollow outer conductor, and a hollow insulating layer. The hollow outer conductor forms a first inner space. The hollow insulating layer is formed from an outer soft dielectric layer, an inner soft dielectric layer, and a ceramic layer disposed between the soft dielectric layers. The hollow insulating layer includes a second inner space formed by the inner soft dielectric layer. The inner conductor is disposed within the second inner space of the hollow insulating layer, and the hollow insulating layer is disposed within the first inner space of the hollow outer conductor. | 2008-10-23 |
20080258848 | Spring loaded microwave interconnector - A spring loaded microwave interconnector (SLMI). The SLMI includes a waveguide probe head having a first side and opposite thereto a second side, the sides transverse to a central axis. A spring loaded coax central conductor coupled to the probe head first side and provides a distal conductive tip. The coax central conductor extends along the central axis. A dielectric sleeve is disposed about the coax central conductor adjacent to the first side. The distal conductive tip extending beyond the dielectric sleeve when in an extended position and is about flush with the dielectric sleeve when in a compressed poison. An multiport waveguide to multiport PCB assembly utilizing a plurality of SLMIs wherein the multiport waveguide and PCB have curved contours is also disclosed. | 2008-10-23 |
20080258849 | LOW PASS METAL POWDER FILTER - A low pass filter having a coaxial structure of an inner conductor, an outer conductor and a metal powder composite interposed between the inner and outer conductor. Embodiments include a 50Ω characteristic impedance. The metal powder can be bronze, copper or other metals, mixed in an epoxy carrier. | 2008-10-23 |
20080258850 | Switching Device Having an Electromagnetic Release - The invention relates to switching equipment comprising a housing, at least one contact point that has at least one fixed and one mobile contact part and an electromagnetic trip device, comprising a trip coil and a hammer armature. Said equipment is wherein the electromagnetic trip device comprises a snap body consisting of a material with magnetic shape memory properties, which interacts with the hammer armature. According to the invention, when a short-circuit occurs, the snap body is switched between two bi-stable positions by the influence of the magnetic field of the trip coil. | 2008-10-23 |
20080258851 | Electromechanical switching device - An electromechanical switching device of at least one embodiment includes fixed contacts securely arranged in a housing and a moving contact bridge for bridging the fixed contacts, a moving contact carrier to carry the contact bridge, and a solenoid to act on the contact carrier. In at least one embodiment the solenoid includes a coil body fixed to the housing, an armature coupled to the contact carrier so as to move with it, a yoke to act together with the armature, and a fixing mechanism, which engages with the yoke and coil body for fixing the yoke to the coil body. | 2008-10-23 |
20080258852 | Reed switch contact coating - A reed switch has a contact surface composed of three layers of metal applied to the contacts of the reed switch. The three layers comprise first a layer of titanium of approximately 15 to 150 micro inches, second a layer of molybdenum of 15 to 150 micro inches, and finally a contact layer of 5 to 20 micro inches of ruthenium, or other platinum group metal or alloy. The layers may be applied by any suitable methods, for example by sputtering. | 2008-10-23 |
20080258853 | Automotive stop lamp switch - A moving element, which is situated on an exterior of a closed case which accommodates therein a fixed contact, a movable contact and a magnetic material and is adapted to be activated in response to a depressing operation of a brake pedal of a vehicle, is provided relative to the closed case, and a magnet is integrated into this moving element, whereby the magnetic material is attracted from the outside of the closed case by the magnet moving together with the magnet, so as to cause the movable contact to move relative to the fixed contact. | 2008-10-23 |
20080258854 | MAGNETICALLY COUPLED HUMIDIFIER CONTAINER COMPONENTS - A method of coupling the upper and lower section of a humidifier container used to humidify oxygen gas, using magnetic coupling means. A series of corresponding magnets around the container, located externally to the device or internally, secure the lower part or vessel to the upper part or cap. Using magnets opposing an attracted metal may he used in lieu of corresponding magnet to magnet attraction which requires the poles of the magnets be oriented with their poles to attract each other. | 2008-10-23 |
20080258855 | Transformer and manufacturing method thereof - This invention relates to a transformer and the manufacturing method thereof, wherein the primary winding is made of round-shape metal wire and the secondary winding of flat-shape metal wire, each wire being wound by the winding machine to form a coiled winding, then the two corresponding windings is formed in such a way to be cladded with magnetic material within the die, and the electrodes extending on both ends of each winding is bended to a right position such that the electrodes of the bended winding just project out of the magnetic material. In this manner, in the case the winding is used in the transformer of voltage range below 12V, not only the fabrication of transformer becomes easier and more convenient, but also the gap between the wire turns of the secondary winding is significantly reduced and thus the volume of the transformer can be shrinked. Therefore, the effectiveness in practical application of the innovative transformer and the manufacturing method thereof of the present invention is upgraded both in the entire manufacturing process and in use. | 2008-10-23 |
20080258856 | MULTIPLE CONDUCTOR INDICATOR - One embodiment of the present invention provides a fuse having opened-fuse indication, which places two or more coils or conductors in parallel and in thermal contact with an indicating material. The multiple conductors allow a lower level of current to produce sufficient heat or sufficient electrical resistance to transform the indicating material. The multiple conductors can also be made of a reduced diameter, resulting in surge protection at a lower device temperature. The multiple conductor indicator in an embodiment includes a base material. First and second conductors contact the base material. An indicating material thermally couples to the first and second conductors. The indicating material can be on the inside or outside of the fuse body. If on the outside, the body can define a recess, wherein the indicator resides within the recess. The indicator can operate with fuses and other types of circuit protection devices. | 2008-10-23 |
20080258857 | ELECTRONIC FUSE WITH CONFORMAL FUSE ELEMENT FORMED OVER A FREESTANDING DIELECTRIC SPACER - An electronic fuse for an integrated circuit and a method of fabrication thereof are presented. The electronic fuse has a first terminal portion and a second terminal portion interconnected by a fuse element. The fuse element has a convex upper surface and a lower surface with a radius of curvature at a smallest surface area of curvature less than or equal to 100 nanometers. Fabricating the electronic fuse includes forming an at least partially freestanding dielectric spacer above a supporting structure, and then conformably forming the fuse element of the fuse over at least a portion of the freestanding dielectric spacer, with the fuse element characterized as noted above. The dielectric spacer may remain in place as a thermally insulating layer underneath the fuse element, or may be removed to form a void underneath the fuse element. | 2008-10-23 |
20080258858 | Non-burnable varistor - A non-burnable varistor, comprises a base slice having two opposite surfaces, a first elicit pole electrically connected to one surface of the said base slice, a second elicit pole electrically connected to the other surface of the said base slice. Outside each of the said two opposite surfaces of the base slice a low-melting-point metal conductor layer is respectively situated, which is melted at the temperature of 155˜450° C., and the two layers are not electrically connected by any good conductor. When the non-burnable varistor base is struck and burned through to form an arc, the low-melting-point metal are melted and go into the arc in the form of gas or liquid, to depress the resistance of the arc nearly to a short estate. So the arc current can be cut off by the over-loading security mechanism as over-current protective fuses or breakers, before the coat of the non-burnable varistor caught on fire, to prevent the occurrence of fire accident. | 2008-10-23 |
20080258859 | Load Control Device Having A Flexible Connector - A load control device has a modular assembly to allow for easy adjustment of the aesthetic and the color of the load control device after installation. The load control device comprises a user interface module and a base module. The user interface module includes an actuation member for receiving a user input and a visual display for providing feedback to the user. A connector of the base module is adapted to be coupled to a connector of the user interface module, such that the base module and the user interface module are electrically connected. The connector of the base module is adapted to move along a longitudinal axis and a lateral axis of the dimmer, such that the actuation member is easily aligned within an opening of a faceplate. | 2008-10-23 |
20080258860 | Universal Light String Lamp Bypass Device - A universal light string lamp bypass device is comprised of a plug and a resistor. The plug is shaped and sized to releasably fit within the base of a lamp assembly. The plug encapsulates the resistor with the resistor leads extending from the bottom end of the plug. When the encapsulated resistor is inserted into a lamp base it can be electrically connected to the lamp socket terminals. The impedance of the resistor substantially matches the impedance of an operating lamp within a lamp socket of the light string. Most lamp bases have a standard configuration for receiving a lamp. This device fits within a lamp base after the lamp has been removed. A section of a light string may be darkened by replacing its lamps with the device. A typical use is for the darkening of a section of a light string connecting two decorated bushes. | 2008-10-23 |
20080258861 | Switching Resistor for an Electric Switching Device - A switching resistor for an electric switching device having an electrically conductive resistive material. The resistive material is a resistive material on a synthetic material basis. | 2008-10-23 |
20080258862 | RESISTOR LAYOUT STRUCTURE AND MANUFACTURING METHOD THEREOF - A resistor layout structure and a manufacture method thereof are provided. The resistor layout structure includes a substrate, a plurality of metals, and a plurality of resistor lumps. The plurality of metals is disposed on the substrate. The plurality of first resistor lumps is disposed on the substrate. The metals are used as a supporting structure during the disposing process. Besides, the metals are interlaced and connected in series connected with the resistor lumps to form the resistor. Therefore, the present invention decreases the resistance variability of the resistor. | 2008-10-23 |
20080258863 | Method and a System for Proximity Evaluation - This invention relates to a method and a system for evaluating proximity. A reference object is moved such that it enters at least two different proximity areas of two different proximity indicators, whereby proximity indications are generated. The time difference between the indications is measured. If the time difference is within predefined range it is ascertained that the reference object is within a well defined area. Thus, the fact that the speed of movement of a physical object is significantly limited is used for obtaining reliable proximity evaluations. | 2008-10-23 |
20080258864 | Communication Apparatus and Communication Method - A communication apparatus for mutual communication, when acting as an authenticator communication apparatus performing authentication, includes a transmitting section that transmits to an authenticatee communication apparatus subject to authentication challenge data to authenticate the authenticatee communication apparatus in a time slot, which is a segmented period of time in which the communication apparatus to communicate with a specific communication apparatus; and a receiving section that receives from the authenticatee communication apparatus first response data for responding to the challenge data in the same time slot as the one in which the transmitting section transmits the challenge data. An objective is to carry out authentication of a tag by a Reader/Writer (R/W) and authentication of the R/W by the tag at the same time as an anti-collision process, and to further achieve confidentiality of unique ID information that is transmitted. | 2008-10-23 |
20080258865 | BINARY VERIFICATION SERVICE - A binary is received at a binary verification service from a binary verification client agent. The binary verification service performs binary verification of the binary, wherein binary verification includes determining whether the binary is complicit with a set of usage rules. The binary verification service sends a binary verification result to the binary verification client agent. | 2008-10-23 |
20080258866 | Apparatus having a moveable component and method for controlling a movement of the moveable component - In the field of medical devices, for instance patient tables, it is known to block the movement of moveable components of a respective apparatus using blocking means and to release these only after actuating a switch. To be able to dispense with the foot switch, an authorized operator is equipped with a radio frequency identification tag and interrogation means for interrogating the radio frequency identification tag are provided on the apparatus. Once the operator initiates a movement by exerting a force, a sensor detects this force and activates the interrogation means. If the interrogation means identify that the radio frequency identification tag is sufficiently close thereto, it is concluded that the authorized operator would like to initiate the movement and the moveable part is released. | 2008-10-23 |
20080258867 | Recreational vehicle wireless keyless power door lock - A power door lock device for a walkthrough door of a Recreational Vehicle (RV) includes a lock disposed in a lock housing. The power door lock also includes an actuator operably coupled to the lock and operable to engage the lock. A wireless receiver is coupled to the actuator and is configured to receive a wireless signal to operate the actuator. A remote wireless transmitter is configured to transmit a signal to the wireless receiver in order to actuate the lock. | 2008-10-23 |
20080258868 | KEYLESS ENTRY SYSTEM - A keyless entry system is provided that includes a vehicle-side device and a portable device. The vehicle-side device includes a vehicle-side transmission unit and a vehicle-side reception unit. The vehicle-side transmission unit is installed in a vehicle and connected to plural transmission antennas. The vehicle-side transmission unit transmits a request signal via signal lines. The vehicle-side reception unit receives an answer signal. The portable device includes a portable device-side reception unit that receives the request signal, and a portable device-side transmission unit that transmits the answer signal. The vehicle-side device includes a vehicle-side control unit that performs a predetermined control when the answer signal from the portable device is authenticated. The portable device includes a portable device-side control unit that detects the intensity of the signals transmitted from the plural transmission antennas. The vehicle-side control unit or the portable device-side control unit calculates distances between the portable device and the respective transmission antennas based on data of the intensity of the signals transmitted from the plural transmission antennas detected by the portable device-side control unit. When an added value of the distances calculated based on two of the intensity data is smaller than a predetermined threshold value, it is determined that the portable device is located inside the vehicle. | 2008-10-23 |
20080258869 | Electronic Key-Management System - A device that is part of an electronic key-management system comprises an interface, and a key holder and key carrier device. The interface is capable of receiving a control signal from an external control system, such as a building access control system, a building security system, a building integration system, a building control system and by local manual control unit. The key holder device is capable of being responsive to the control signal received from the external management system by unsecuring a key associated with the key holder/carrier device. In one embodiment, the key associated with the key holder/carrier device comprises at least one wireless RF transponder capable of providing identification information associated with the key holder/carrier in response to an identification query. | 2008-10-23 |
20080258870 | REMOTE CONTROL SYSTEM AND METHOD - A vehicle remote control system includes a portable device for transmitting a control request command and an in-vehicle device for executing various kinds of vehicle control in accordance with the control request command. During execution of the control by the in-vehicle device, the portable device is set to a standby state under which a UHF transmitter and a UHF receiver are put in a standby or rest state, thereby reducing power consumption. After a standby time elapses, the portable device repeats request command transmission and reply reception until a reply is received from the in-vehicle device. | 2008-10-23 |
20080258871 | PORTABLE AUDIO-CAPABLE DEVICE SYSTEMS, IN PARTICULAR HEARING SYSTEMS, PLAYING MESSAGES - A method includes the step of providing a user of a portable audio-capable device system, such as a hearing system, with a benefit as a reward for the user's consent to accept that said portable audio-capable device system plays messages, in particular audible messages. In particular, the benefit includes providing at no cost, or providing a deduction in payments for, at least one of: a device of said portable audio-capable device system; an accessory for said portable audio-capable device system; a functionality for said portable audio-capable device system; and goods or services contributing to operating costs of said portable audio-capable device system. Accordingly, the user accepts that he is confronted with specific audible messages, and in return, he is provided with a benefit, in particular with a financial benefit. Accordingly, the user can be sponsored, e.g., by the manufacturer of said portable audio-capable device system. | 2008-10-23 |
20080258872 | Method of Operating a Rfid System - The invention relates to a method of operating a RFID system comprising at least one reader ( | 2008-10-23 |
20080258873 | Functional Laminate - The invention refers to a functional laminate including at least one electrically conductive component, particularly an antenna coil or a track, arranged on a non-woven substrate with a grammage of less than 25 g/m | 2008-10-23 |
20080258874 | TRANSPONDER CIRCUIT ARRANGEMENT AND METHOD FOR OPERATING A DEMODULATOR - A transponder circuit arrangement including antenna contacts to which an antenna signal can be applied. The antenna signal includes at least one signal in one transmission band of a plurality of transmission bands. The transponder circuit arrangement also includes a detector adapted to detect whether the antenna signal includes a signal in a predetermined transmission band, and a demodulator adapted to demodulate the signal in the predetermined transmission band when the signal has been detected therein, and otherwise to demodulate a signal in another transmission band. | 2008-10-23 |
20080258875 | RADIO FREQUENCY IDENTIFICATION FUNCTIONALITY COUPLED TO ELECTRICALLY CONDUCTIVE SIGNAGE - The present disclosure relates to multiple embodiments of a signage having radio-frequency responsive features, methods of making and using the signage, and the performance characteristics of the signage. These embodiments include a cutout, aperture, or opening in an electrically conductive sign into which or adjacent to which is placed an RFID tag or chip. | 2008-10-23 |
20080258876 | Distributed Antenna Array With Centralized Data Hub For Determining Presence And Location Of RF Tags - A distributed antenna array with a centralized data hub for determining the presence and location of RF tags has been disclosed. This antenna array centralizes electronics and distributes the RF to zones in a facility to greatly reduce the expense of recurring components for monitoring RF tags. A single BRT/hub with multiple antennas attached to transmit and receive ports is used to cover an entire facility. Large facilities are covered by a small number of the BRT/hub combinations. The BRT/hub has transmit antennas coupled thereto, preferably by co-axial cable, that transmit signals to a portion or all of the RF tags and all or a portion of them modulate and reflect the RF signal to a particular receiving antenna. The receiving antenna then returns the RF signal with tag data to the BRT/hub, preferably by co-axial cable. Also disclosed is an RF backscatter tag that cleanly switches a resonant aperture antenna on and off, thereby greatly increasing the mark-to-space ratio of the backscatter data. This enables tags to be detected by the BRT at much greater distances. | 2008-10-23 |
20080258877 | Secure Self Scan - This invention includes the system and method for the manufacture and use of a hermetically sealed Faraday cage in the retail/consumer goods environment. It is called the “Secure Self Scan” and is constructed using meshed glass, sheet metal and edge level elastomers as agents of containment and reflection. The utility of this invention is that it prevents unauthorized access to communication protocols between RFID tagged consumer items and an RFID interrogator. It also prevents unauthorized access to communication protocols between an RFID interrogator and contact less smart card. This invention takes the mal ware writer and hacker plus the skimmer and eavesdropper out of the RFID equation in relationship to consumer goods, contact less smart cards and consumer privacy. Furthermore, this invention magnifies RFID interrogation signals within the Secure Self Scan unit thereby increasing read rates while concurrently obviating external electro magnetic interference, also known as noise, thereby increasing RFID tag read rates. | 2008-10-23 |
20080258878 | FACILITATING RFID TAGS TO REFRAIN FROM PARTICIPATING IN A SUBSEQUENT INVENTORYING ATTEMPT - RFID reader systems, readers, components, software and methods can inventory RFID tags in one or more early attempts. Then they can facilitate the inventoried RFID tags to refrain from participating in one or more subsequent inventorying attempts. In some embodiments, an inventoried indicator in the tag becomes updated upon backscattering. The updated value is used by the tag to recognize a subsequent attempt, and thus refrain from participating in it. This permits the subsequent attempt to be used more intensively for inventorying the more elusive, harder-to-read tags, especially in more demanding scenarios. | 2008-10-23 |
20080258879 | COMPARING COUNTER CONTENTS FOR TIMING CRITICAL APPLICATIONS - An electrical circuit for comparing contents of counter circuits. The electrical circuit comprises a first counter circuit and a second counter circuit electrically connected to a flip-flop circuit through a logic circuit and OR gates connected to the flip flop circuit. The first counter circuit is for receiving a first enable signal and generating a first output signal. The second counter circuit is for receiving a second enable signal and generating a second output signal. The first enable signal and the second enable signal are for comparing the first output signal to the second output signal. The flip-flop circuit is for generating a first status signal defining a first relationship between the first output signal and the second output signal. The logic circuit is for generating a second status signal defining a second relationship between the first output signal and the second output signal. | 2008-10-23 |
20080258880 | Information Collecting and Decision Making Via Tiered Information Network Systems - Techniques, apparatus and systems for information collecting and decision making based on networks of sensors and communication nodes for security monitoring and warning, disaster warning, counter-terrorism, and other applications associated with information collecting and decision making. | 2008-10-23 |
20080258881 | Method and system for provisioning a java equipped celluar telephone - Embodiments of the present invention recite a method and system for provisioning a Java equipped cellular telephone. In one embodiment, a Geographic Information Systems (GIS) data collector application is uploaded onto a Java equipped cellular telephone for enabling the Java equipped cellular telephone to perform GIS data collection functions. The method further comprises uploading a data dictionary onto the Java equipped cellular telephone comprising at least one GIS feature type. | 2008-10-23 |