43rd week of 2013 patent applcation highlights part 22 |
Patent application number | Title | Published |
20130278301 | Power Management Integrated Circuit for Driving Inductive Loads - A power management integrated circuit includes pairs of high-side and low-side drivers, sensing circuitry, and a processor. The high-side and low-side drivers are used in combination with external discrete NFETs to drive multiple windings of a motor. The N-channel LDMOS transistor of each high-side driver has an associated isolation structure and a tracking and clamping circuit. If the voltage on a terminal of the integrated circuit pulses negative during a switching of current flow to the motor, then the isolation structure and tracking and clamping circuit clamps the voltage on the isolation structure and blocks current flow from the substrate to the drain. An associated ESD protection circuit allows the voltage on the terminal to pulse negative. As a result, a large surge of current that would otherwise flow through the high-side driver is blocked, and is conducted outside the integrated circuit through a body diode of an external NFET. | 2013-10-24 |
20130278302 | CLOCK SIGNAL GENERATOR - Embodiments of the present invention provide a clock signal generator, and the clock signal generator is applied to a physical layer subsystem supporting data transmission at multiple baud rates. The clock signal generator includes: a source clock signal generator, and two or more processors connected to an output end of the source clock signal generator; where the source clock signal generator outputs multiple source clock signals with the same frequency according to a reference signal of a reference clock in the subsystem; the processors perform frequency dividing processing on the multiple source clock signals through a digital logic circuit according to an oversampling technology, to obtain a synchronous clock signal corresponding to a baud rate of data transmission in the subsystem, so as to implement timing and transceiving functions when data is transmitted at the baud rate. | 2013-10-24 |
20130278303 | AUTO FREQUENCY CALIBRATION FOR A PHASE LOCKED LOOP AND METHOD OF USE - A phase locked loop includes a phase difference detector configured to receive a reference frequency and a divider frequency and output a phase difference signal. The phase locked loop includes a code generator configured to receive the reference frequency and the phase difference signal, and output a coarse tuning signal and a reset signal. The phase locked loop includes a digital loop filter configured to receive the phase difference signal and output a fine tuning signal. The phase locked loop includes a voltage control oscillator configured to receive the coarse and fine tuning signals, and output an output frequency. The phase locked loop includes a divider configured to receive the reset signal, a divider number control signal and the output frequency, and output the divider frequency. The phase locked loop includes a delta-sigma modulator configured to receive a divisor ratio and the reset signal, and output divider number control signal. | 2013-10-24 |
20130278304 | Apparatuses and Methods for Conversion of Radio Frequency (RF) Signals to Intermediate Frequency (IF) Signals - Various embodiments implement apparatuses and methods for conversion of radio frequency (RF) signals to intermediate frequency (IF) signals. More particularly, some embodiments are directed toward down conversion of RF signals to IF signals in a multi-band radio receiver, such as a satellite receiver, using a single oscillator for different frequency bands. For example, some of the apparatuses and methods presented are suitable for integration into monolithic RF integrated circuits in low-cost satellite receivers for home entertainment use. | 2013-10-24 |
20130278305 | SEMICONDUCTOR WAFER AND METHOD FOR AUTO-CALIBRATING INTEGRATED CIRCUIT CHIPS AT WAFER LEVEL - In integrated circuit chips that are used for RFID, a method of calibrating an operation frequency that is generated in an operation frequency generator and a semiconductor wafer including a calibration circuit are provided. The method of calibrating an operation frequency of integrated circuit chips includes: supplying DC power to the integrated circuit chips; selecting an integrated circuit chip to perform calibration of an operation frequency; receiving an operation frequency that is generated in the selected integrated circuit chip; generating a frequency calibration value by comparing the operation frequency with a calibration target frequency; transmitting a control signal including the frequency calibration value to the integrated circuit chip; and releasing a selection of the integrated circuit chip in which calibration of the operation frequency is complete. | 2013-10-24 |
20130278306 | SENSOR DEVICE - A sensor device for monitoring the environment of a vehicle includes at least two sensors, each with a signal generator, a transmitting antenna, and at least two receiving antennas, characterized in that at least one reference clock pulse generator for generating a common reference clock pulse for the signal generators of the at least two sensors is provided. | 2013-10-24 |
20130278307 | INTELLIGENT POWER SUPERVISOR - An intelligent power-on reset circuit in accordance with one embodiment of the invention can include a programmable voltage divider. The intelligent power-on reset circuit can also include a comparator that is coupled to the programmable voltage divider and that is coupled to receive a reference voltage. Furthermore, the intelligent power-on reset circuit can include a processing element that is coupled to the programmable voltage divider. The processing element can be coupled to receive programming for controlling a characteristic of the intelligent power-on reset circuit. The processing element can be for dynamically changing the programming during operation of the intelligent power-on reset circuit. | 2013-10-24 |
20130278308 | METHODS AND SYSTEMS FOR CONTROLLING A POWER CONVERTER - A stabilizer system associated with a power converter controller is described. The stabilizer system includes a regulator stabilizer configured to receive a phase locked loop (PLL) error signal and to generate a regulator stabilization signal based at least partially on the PLL error signal. The stabilizer system also includes a regulator coupled to the regulator stabilizer and a converter interface controller. The regulator is configured to receive the regulator stabilization signal, generate a first command signal, based at least partially on the regulator stabilization signal, that reduces system oscillations, and transmit the first command signal to the converter interface controller. | 2013-10-24 |
20130278309 | SEMICONDUCTOR WAFER AND METHOD FOR AUTO-CALIBRATING INTEGRATED CIRCUIT CHIPS USING PLL AT WAFER LEVEL - In integrated circuit chips that are used for RFID, a method of calibrating an operation frequency that is generated in an operation frequency generator and a semiconductor wafer including a calibration circuit are provided. The method of calibrating an operation frequency of integrated circuit chips includes: supplying DC power to the integrated circuit chips; selecting an integrated circuit chip to perform calibration of an operation frequency; receiving an operation frequency that is generated in the selected integrated circuit chip; calculating a difference between a phase of the operation frequency and a phase of a calibration target frequency; generating a frequency calibration value of the operation frequency using the phase difference; transmitting a control signal including the frequency calibration value to the integrated circuit chip; and releasing a selection of the integrated circuit chip in which calibration of the operation frequency is complete. | 2013-10-24 |
20130278310 | DEVICE INCLUDING A CLOCK GENERATION CIRCUIT AND A METHOD OF GENERATING A CLOCK SIGNAL - A device in which a clock generation circuit is connected to a counter circuit for controlling operation timing of a DLL circuit or the like, and the counter circuit is intermittently operated by intermittently supplying a clock signal to the counter circuit from the clock generation circuit. | 2013-10-24 |
20130278311 | PHASE-FREQUENCY DETECTION METHOD - The present invention relates to a method and device for phase-frequency detection in a phase-lock loop circuit. The method comprises receiving compare edge of a reference clock signal and compare edge of a feedback clock signal, maintaining a phase/frequency detector, PFD, state machine with three PFD states, UP, DOWN, and IDLE, based on the received compare edges of the reference and feedback clock signals, recording current and previous time the state machine stays in UP or DOWN states, generating an UP or DOWN signal based on transition of PFD states and the comparison between recorded current time and recorded previous time; and outputting a digital control signal to a feedback frequency control device based on the UP or DOWN signal. A device and system is arranged to execute the method according to the present invention. | 2013-10-24 |
20130278312 | SYNCHRONIZATION OF MULTIPLE SIGNAL CONVERTERS - The present invention may provide a system including a controller and a plurality of integrated circuits. The controller may control synchronization operations of the system, the controller may include a master timing counter and a controller data interface. Each integrated circuit may include a timing counter and an IC data interface. Further, each integrated circuit may synchronize its respective timing counter based on synchronization command received from the controller via the data interfaces. Hence, the system may provide synchronization between the controller and the integrated circuits without an extraneous designated pin(s) for a designated common time-based signal. | 2013-10-24 |
20130278313 | TRIGGER SIGNAL DETECTION APPARATUS - A trigger signal detection apparatus includes: a clock gating circuit which is supplied with a trigger signal and a clock signal and outputs the clock signal; a trigger signal processing circuit which outputs a first signal only for a predetermined time when the clock signal is supplied from the clock gating circuit; a counter which operates in response to the trigger signal, thus outputting a count value of the clock signal; and a time set-up circuit which outputs a second signal to the trigger signal processing circuit when count value supplied from the counter reaches a preset value, and the trigger signal processing circuit stops outputting the first signal when the trigger signal processing circuit receives the second signal. | 2013-10-24 |
20130278314 | FLIP-FLOP FOR LOW SWING CLOCK SIGNAL - The invention provides a flip-flop. In one embodiment, the flip-flop receives a low swing clock signal, and comprises a first NMOS transistor, a first latch circuit, a second NMOS transistor, and a second latch circuit. The low swing clock signal is inverted to obtain an inverted low swing clock signal. The first NMOS transistor is coupled between a receiving node and a first node, and has a gate coupled to the inverted low swing clock signal. The first latch circuit is coupled between the first node and a second node. The second NMOS transistor is coupled between the second node and a third node. The second latch circuit is coupled between the third node and a fourth node, and generates an output signal on the fourth node. | 2013-10-24 |
20130278315 | DUAL-TRIGGER LOW-ENERGY FLIP-FLOP CIRCUIT - One embodiment of the present invention sets forth a technique for technique for capturing and storing a level of an input signal using a dual-trigger low-energy flip-flop circuit that is fully-static and insensitive to fabrication process variations. The dual-trigger low-energy flip-flop circuit presents only three transistor gate loads to the clock signal and none of the internal nodes toggle when the input signal remains constant. One of the clock signals may be a low-frequency “keeper clock” that toggles less frequently than the other two clock signal that is input to two transistor gates. The output signal Q is set or reset at the rising clock edge using separate trigger sub-circuits. Either the set or reset may be armed while the clock signal is low, and the set or reset is triggered at the rising edge of the dock. | 2013-10-24 |
20130278316 | PHASED ARRAY ARCHITECTURE CONFIGURED FOR CURRENT REUSE - A phased array architecture configured for current reuse is disclosed. In an exemplary embodiment, an apparatus includes a current mode phase rotator (PR) module configured to generate phase shifted in-phase (I) and quadrature-phase (Q) current signals, and a current mode residual sideband (RSB) correction module configured to correct residual sideband error associated with the phase shifted I and Q current signals. The RSB correction module and the PR module form a phased array element configured to reuse a DC supply current. | 2013-10-24 |
20130278317 | SWITCHABLE CAPACITIVE ELEMENTS FOR PROGRAMMABLE CAPACITOR ARRAYS - Switchable capacitive elements are disclosed, along with programmable capacitor arrays (PCAs). One embodiment of the switchable capacitive element includes a field effect transistor (FET) device stack, a first capacitor, and a second capacitor. The FET device stack is operable in an open state and in a closed state and has a plurality of FET devices coupled in series to form the FET device stack. The first capacitor and the second capacitor are both coupled in series with the FET device stack. However, the first capacitor is coupled to a first end of the FET device stack while the second capacitor is coupled to a second end opposite the first end of the FET device stack. In this manner, the switchable capacitive element can be operated without a negative charge pump, with decreased bias swings, and with a better power performance. | 2013-10-24 |
20130278318 | SIGNAL PROCESSING APPARATUS AND METHOD - An apparatus and a method for processing a signal, and for estimating a point corresponding to a maximum slope from an envelope of an input signal, are provided. A signal processing apparatus includes an envelope detecting unit configured to detect an envelope of an input signal. The signal processing apparatus further includes a correcting unit configured to correct slopes, each of the slopes being between respective points of the envelope, based on information on a clipping interval of the envelope. The signal processing apparatus further includes an estimating unit configured to estimate a point, of the envelope, in which a corrected slope, among the corrected slopes, includes a maximum value. | 2013-10-24 |
20130278319 | LEVEL SHIFT CIRCUIT UTILIZING RESISTANCE IN SEMICONDUCTOR SUBSTRATE - A level shift circuit does not affect delay time, regardless of the size of resistor resistance value. The level shift circuit includes first and second series circuits wherein first and second resistors and first and second switching elements are connected in series, rise detector circuits that compare the rise potentials of output signals of the first and second series circuits with a predetermined threshold value, and output first and second output signals, which are pulse outputs of a constant duration, when the threshold value is exceeded, and third and fourth switching elements connected in parallel to the first and second resistors respectively. The gate terminals of the third and fourth switching elements are connected to the rise detector circuits, and the third and fourth switching elements are turned on by the first and second output signals respectively. | 2013-10-24 |
20130278320 | MIXER FOR MIXING INPUT SIGNAL WITH MULTIPLE OSCILLATING SIGNALS HAVING DIFFERENT PHASES AND RELATED MIXING METHOD THEREOF - A mixer includes a transformer and a mixing circuit. The transformer is employed for receiving an input signal to generate a differential output. The mixing circuit is coupled to the transformer, and employed for mixing the differential output with N oscillating signals having different phases to generate a plurality of mixed output signals, wherein N is greater than 2. | 2013-10-24 |
20130278321 | Method and Apparatus for Mixer-Based Harmonic Rejection - In one aspect, the present invention exploits the termination conductances of a time-discrete harmonic mixer as another degree of freedom in configuring the mixer to meet given harmonic rejection performance requirements while using reduced number of unit cells. The values of these termination conductances are purposefully configured to introduce a desired non-linearity in quantization of the mixer transconductance by the unit cells. The non-uniform quantization produces a non-linear fitting of the transconductance levels to the transconductance points defining the target sinusoidal waveform. As a consequence of its termination conductance configuration, the contemplated mixer achieves levels of harmonic rejection with that would not be met if the reduced number of unit cells operated with uniform quantization. As a further advantage, the manipulated conductance values generally are lower than those used in conventional designs, e.g., on par with the maximum conductance of the mixer, as provided by mixer's set of unit cells. | 2013-10-24 |
20130278322 | GATE DRIVING APPARATUS - A gate driving apparatus according to the embodiment includes a first switching device, a second switching device that outputs a signal to charge a capacitance of the first switching device, a third switching device connected in parallel to the second switching device to prevent a drop of a voltage output from the second switching device, and a fourth switching device that outputs a signal to discharge the capacitance of the first switching device. An NMOS transistor is used as a main switching device and a PMOS transistor connected in parallel to the NMOS transistor is used as a sub-switching device, so that the chip size is reduced without dropping the output voltage of the gate driving apparatus. The loss of the switching device is prevented by preventing the output voltage of the gate driving apparatus from being dropped. | 2013-10-24 |
20130278323 | High-Frequency Switching Circuit - A high-frequency switching circuit includes a high-frequency switching transistor, wherein a high-frequency signal-path extends via a channel-path of the high-frequency switching transistor. The high-frequency switching circuit includes a control circuit and the control circuit is configured to apply at least two different bias potentials to a substrate of the high-frequency switching transistor, depending on a control signal received by the control circuit. | 2013-10-24 |
20130278324 | SEMICONDUCTOR DEVICE, IMAGE DISPLAY DEVICE, STORAGE DEVICE, AND ELECTRONIC DEVICE - A semiconductor device which has reduced power consumption and includes a selection transistor is provided. A semiconductor device in which the number of wirings and terminals for inputting a power supply potential is reduced and which operates at high speed is provided. A buffer circuit connected to a gate line connected to a gate of the selection transistor has a function of generating a potential higher than a high power supply potential by using the high power supply potential and outputs the potential depending on the selection signal. A bootstrap circuit boosts a high power supply potential that is input to an inverter that is the closest to an output side among a plurality of inverters included in a buffer circuit. Further, by providing a delay circuit in the buffer circuit, the bootstrap circuit starts to boost a potential at the timing later than the input of the selection signal. | 2013-10-24 |
20130278325 | SEMICONDUCTOR DEVICE AND ELECTRONIC APPLIANCE - The amplitude voltage of a signal input to a level shifter can be increased and then output by the level shifter circuit. Specifically, the amplitude voltage of the signal input to the level shifter can be increased to be output. This decreases the amplitude voltage of a circuit (a shift register circuit, a decoder circuit, or the like) which outputs the signal input to the level shifter. Consequently, power consumption of the circuit can be reduced. Alternatively, a voltage applied to a transistor included in the circuit can be reduced. This can suppress degradation of the transistor or damage to the transistor. | 2013-10-24 |
20130278326 | Pressure Contact Arrangement and Method for Producing a Pressure Contact Arrangement - A pressure contact arrangement includes a pressure contact device having an upper contact piece and a lower contact piece, one or more vertical first semiconductor chips and a peripherally closed adhesive bead. Each vertical first semiconductor chip has an upper side, a lower side opposite the upper side, a peripherally closed narrow side adjoining the upper side and the lower side and connecting the upper and lower sides, an upper electrical contact face arranged on the upper side, and a lower electrical contact face arranged on the lower side. The peripherally closed adhesive bead surrounds each vertical first semiconductor chip and fastens each vertical first semiconductor chip to the pressure contact device. A peripherally closed connecting face is provided between each adhesive bead and the narrow side of the corresponding vertical first semiconductor chip that laterally surrounds the vertical first semiconductor chip. | 2013-10-24 |
20130278327 | CONSTANT CURRENT CIRCUIT OF HIGH EFFICIENCY - The present inventive concept is a hyuntak transistor that can prevent a thermal runaway phenomenon and a low heat high efficiency constant current circuit using an auxiliary transistor capable of a high amplification and a constant current. The circuit may be applied to drive a LED and a motor. | 2013-10-24 |
20130278328 | POWER TRANSISTOR PARTIAL CURRENT SENSING FOR HIGH PRECISION APPLICATIONS - A power transistor module including a power transistor with a first common power node, and a split control node. A first clip is connected to a portion of a second power node so that current through a first control segment of the control node is directed through a first transistor portion and through the first clip. A second clip is connected to another portion of the second power node so that current through a second control segment is directed through a second transistor portion and through the second clip. A ratio of an area of the first transistor portion to a combined area of the first and second portions is 5 percent to 75 percent. A shunt is coupled in series to the first clip. The shunt may be directly electrically connected to the first portion of the power transistor. | 2013-10-24 |
20130278329 | ANALOG LOOP FILTER SYSTEMS, APPARATUS, AND METHODS - Described herein is a distributed analog loop filter that can be employed in a phase locked loop or a delay locked loop. A circuit block of the distributed analog loop filter includes at least two parallel equivalent circuit elements. The parallel equivalent circuit elements each have an input line. The input lines for each of the parallel equivalent circuit elements are activated sequentially, one after the other. The parallel equivalent circuit elements have sequentially produced outputs that are also activated sequentially, one after another. The parallel equivalent circuit elements extend the tuning range of distributed analog filter while reducing noise associated with the distributed analog filter. | 2013-10-24 |
20130278330 | LOW PASS FILTER WITH AN INCREASED DELAY - A low pass filter comprises a filter input node configured to receive a first logic signal, a filter output node configured to supply a second logic signal, a resistive element comprising a first terminal coupled to the input node and a second terminal coupled to the output node, and a capacitive element comprising a first terminal coupled to the output node and a second terminal. The filter further comprises an inverting gate having a first terminal coupled to the input node and a second terminal coupled to the second terminal of the capacitive element. | 2013-10-24 |
20130278331 | Reference Potential Converter Circuit - A reference potential converter circuit comprises: a first resistor (resistance value R | 2013-10-24 |
20130278332 | DOHERTY AMPLIFYING APPARATUS AND METHOD - Disclosed is a Doherty amplifying apparatus and method that ensures efficiency in linearity of an input signal by linearizing an applied signal using a linearization unit by analog pre-distortion, and amplifying the linearized signal using a primary amplifier and a secondary amplifier. | 2013-10-24 |
20130278333 | OPTIMIZING CASCADE GAIN STAGES IN A COMMUNICATION SYSTEM - Techniques for optimizing a cascade gain device comprising at least two gain stages are disclosed. A first noise figure associated with the first gain stage is incrementally increased by a plurality of noise figure increments determined based, at least in part, on a minimum noise figure and a maximum noise figure associated with the first gain stage. At each of the plurality of noise figure increments, at least a gain value that corresponds to the noise figure increment is calculated. One of the plurality of noise figure increments and the corresponding gain value is selected as an optimum noise figure of the first gain stage and an optimum gain value of the first gain stage respectively. Parameters of an inter-stage matching network associated with the first gain stage are configured based on the optimum noise figure and the optimum gain of the first gain stage. | 2013-10-24 |
20130278334 | SLEW RATE AND BANDWIDTH ENHANCEMENT IN RESET - Embodiments of a capacitance sensing system including an integrating amplifier and methods for operating the same to provide a higher slew rate and bandwidth are described. In one embodiment, the integrating amplifier comprises an input stage including an inverting input coupled to an electrode of a capacitor to sense a capacitance and a non-inverting input coupled to a reference potential, and an output stage including a compensating capacitor coupled to an output. The compensating capacitor comprises two smaller capacitors coupled in parallel and a switching element configured to open when the integrating amplifier is operated in a RESET mode decoupling one of the two smaller capacitors from the output to decrease capacitance of the compensating capacitor. | 2013-10-24 |
20130278335 | High Speed, Low Power Write Current Switching Scheme for HDD Preamplifier - A hard drive write preamplifier includes a first differential pair of PNP BJTs having a first PNP BJT and a second PNP BJT; a first tail current source coupled into emitter of the PNP BJTs of the first differential pair; a second differential pair of NPN BJTs having a first NPN BJT and a second NPN BJT; a second tail current source coupled into the emitters of the NPN BJTs of the second differential pair; wherein a collector of each of the PNP BJTs of the first differential pair are coupled to a corresponding collector the NPN BJTs of the second differential pair; a first shift up PNP BJT having emitter coupled to the collector of a first PNP BJT of the first differential pair; a second shift up PNP BJT having an emitter coupled to the collector of the second PNP BJT of the first differential pair. | 2013-10-24 |
20130278336 | GAIN ENHANCEMENT FOR CASCODE STRUCTURE - Aspects of the present invention provide apparatuses and methods to provide significant gain enhancement for a cascode structure for a differential amplifier. The cascode structure of the differential amplifier can include first and second pairs of output transistors. The second pair of output transistors can be configured to approximately cancel modulation effects of the first pair of output transistors induced by changes in a differential output of differential amplifier, thereby resulting in conditions for providing enhanced gain. | 2013-10-24 |
20130278337 | DIFFERENTIAL SIGNAL CORRECTION CIRCUIT - A differential signal correction circuit is disclosed. The differential signal correction circuit may comprise a first single-ended-to-differential converter and a second single-ended-to-differential converter. Each one of the two converters may comprise an input port and two output ports. The converters may be configured to perform a first phase correction for a pair of differential signals and output a first output signal and a second output signal. The first output signal is fed back to the first converter through one of the output ports of the first converter, and the second output signal is fed back to the second converter through one of the output ports of the second converter so as to perform phase correction and amplitude correction for the first output signal and the second output signal. | 2013-10-24 |
20130278338 | TRANS-IMPEDANCE AMPLIFIER FOR HIGH SPEED OPTICAL-ELECTRICAL INTERFACES - The differential trans-impedance amplifier uses trans-resistance(s) connected between the input nodes of a first differential amplifier, to implement a trans-impedance differential amplifier in a differential fashion and has two identical resistances, each connected between the photodiode and a respective DC voltage rail of a common bias network of the photodiode adapted to reverse bias the photodiode. The biasing resistances may be much larger than the trans-resistance(s) to prevent drawing any significant signal current from the photodiode. The amplifier may retain the advantages of a classical differential topology while effectively overcoming drawbacks that arise in high data rate applications. | 2013-10-24 |
20130278339 | Power Control for Power Amplifiers - Aspects of a system for improving efficiency over power control for linear and class AB power amplifiers may include a current source circuit that enables determination of a bias current level for a PA circuit within an IC die based on an amplitude of an input modulation signal. The PA circuit may enable generation of an output signal based on a differential input signal and the input modulation signal to the current source circuit. A generated bias voltage may be applied to a transformer external to the IC die, but internal to an IC package containing the IC die and/or a circuit board containing the IC package. One or more amplifier bias voltage levels may be applied to the PA circuit wherein the amplifier bias voltage levels may be derived from the generated bias voltage level and/or the determined bias current level. | 2013-10-24 |
20130278340 | Power Amplifiers with Improved Power Control - Aspects of a system for improving efficiency over power control for linear and class AB power amplifiers may include a current source circuit that enables determination of a bias current level for a PA circuit within an IC die based on an amplitude of an input modulation signal. The PA circuit may enable generation of an output signal based on a differential input signal and the input modulation signal to the current source circuit. A generated bias voltage may be applied to a transformer external to the IC die, but internal to an IC package containing the IC die and/or a circuit board containing the IC package. One or more amplifier bias voltage levels may be applied to the PA circuit wherein the amplifier bias voltage levels may be derived from the generated bias voltage level and/or the determined bias current level. | 2013-10-24 |
20130278341 | RADIO FREQUENCY FRONT-END CIRCUIT AND OPERATION METHOD THEREOF - A radio frequency (RF) front-end circuit and an operating method thereof are provided. The proposed RF front-end circuit includes a first linear amplifier, a second linear amplifier, and a calibration unit. The first linear amplifier performs a high-frequency amplification on a RF signal to generate an amplified RF signal, and down-converts the amplified RF signal into an intermediate frequency (IF) signal. The second first linear amplifier performs a low-frequency amplification on the IF signal to generate an amplified IF signal. The calibration unit is coupled to the first and the second linear amplifiers, and receives a voltage gain fed back from the second linear amplifier. Then, the calibration unit performs an auto-calibration procedure according to the voltage gain fed back from the second linear amplifier to search for an input current value of the first linear amplifier, which correspondingly maximizes the voltage gain of the first amplifier. | 2013-10-24 |
20130278342 | Broadband Transconductance Amplifier - A transconductance amplifier having an input terminal for receiving an input signal and an output terminal for communicating an output signal based on the input signal, the transconductance amplifier may include a gain transistor and a variable capacitance. The gain transistor may have a gate terminal, a first non-gate terminal, and a second non-gate terminal, the first non-gate terminal coupled to the output terminal of the transconductance amplifier. The variable capacitance may be coupled between the gate terminal of the gain transistor and the second non-gate terminal of the gain transistor. | 2013-10-24 |
20130278343 | METHODS AND APPARATUS FOR TUNING DEVICES HAVING RESONATORS - Methods and apparatus for tuning devices having resonators are described. Phase shifters are included in the circuits and used to shift the phase of the output signal(s) of the resonators. In some implementations, the phase shifters are configured in a feedback loop with the resonators. One or more of the apparatus described herein may be implemented as part, or all, of a microelectromechanical system (MEMS). | 2013-10-24 |
20130278344 | Oscillation Signal Generator, In-Phase/Quadrature Oscillation Signal Generator and Associated Signal Processing Method - An oscillation signal generator includes a quadrature voltage-controlled oscillator (QVCO), a phase corrector and a frequency adjusting circuit. The QVCO provides multiple oscillation signals having difference phases. The phase corrector selects one of the oscillation signals as a first oscillation signal and outputs the first oscillation signal from a first output terminal, and selects one of the oscillation signals as a second oscillation signal and outputs the second oscillation signal from a second output terminal. A phase difference between the first and second oscillation signals satisfies a predetermined relationship. The frequency adjusting circuit is coupled to the phase corrector, and generates a quadrature signal and an in-phase signal according to the oscillation signals. The frequency of the oscillation signals is a non-integral multiple of the frequencies of the quadrature and in-phase signals. | 2013-10-24 |
20130278345 | MICROWAVE ADAPTORS AND RELATED OSCILLATOR SYSTEMS - An adaptor for a solid-state oscillator and related microwave adaptors includes an input segment of a conductive material, a first coaxial portion that includes a first inner conductor coupled to the input segment and a first outer shielding segment, and a capping portion coupled to the first coaxial portion to electrically couple the first inner conductor and the first outer shielding segment. | 2013-10-24 |
20130278346 | MAGNETIC OSCILLATOR - According to one embodiment, a magnetic oscillator includes a layered film and a pair of electrodes. The layered film includes a first ferromagnetic layer, an insulating layer stacked on the first ferromagnetic layer, and a second ferromagnetic layer stacked on the insulating layer. The pair of electrodes is configured to apply a current to the layered film in a direction perpendicular to a film surface of the layered film. Regions having different resistance area products are provided between the first ferromagnetic layer and the second ferromagnetic layer. | 2013-10-24 |
20130278347 | COMPENSATION FOR DIGITALLY CONTROLLED OSCILLATOR APPARATUS AND METHOD - Automatic digital sensing and compensation of frequency drift caused by temperature, aging, and/or other effects may be provided by including a compensation capacitor array and a sensing logic. The sensing logic may be configured to detect a drift in a first control signal and to provide the compensation capacitor array with a second control signal. The second control signal is configured to cause an adjustment of capacitance in the compensation capacitor array based on the detected drift in the first control signal. | 2013-10-24 |
20130278348 | CROSSTALK CANCELLATION AND/OR REDUCTION - Some embodiments include a first differential signal pair and a second differential signal pair. The first and second differential signal pairs are arranged relative to each other in a manner to intentionally reduce or cancel crosstalk introduced by a pinout (for example, a section of a pinout, a socket, a connector, etc.) into at least one of the first differential signal pair and the second differential signal pair. Other embodiments are described and claimed. | 2013-10-24 |
20130278349 | Enhancing operation of laminate waveguide structures using an electrically conductive fence - Various embodiments of a millimeter-wave system operative to enhance propagation of millimeter-waves inside a laminate waveguide structure, in which electrical energy has leaked outside the laminated waveguide structure. The system comprises a laminate waveguide structure inside a printed circuit board, and an electrically conductive fence also inside the printed circuit board but outside the laminate waveguide structure. In various embodiments, the electrical energy of millimeter-waves leaks outside the laminate waveguide structure and is reflected by the electrically conducive fence back into the laminate waveguide structure. | 2013-10-24 |
20130278350 | COMPOSITE COMPONENT - A circuit substrate on which a duplexer is mounted includes a substrate body. First, second and third external electrodes are provided on a first main surface of the substrate body. Fourth, fifth and sixth external electrodes are provided on a second main surface of the substrate body. First, second and third signal paths connect the first, second and third external electrodes to the fourth, fifth and sixth external electrodes, respectively. First and second ground conductors are embedded in the substrate body, and overlap with a mounting area so as to contain the mounting area where the duplexer is mounted, in a planar view seen from the z-axis direction. The first, second and third signal paths extend from the inside of the mounting area to the outside of the mounting area between the first main surface and the second ground conductor. | 2013-10-24 |
20130278351 | WAVEGUIDE BASED FIVE OR SIX PORT CIRCUIT - A five-six-port circuit comprising a waveguide on a main surface of a substrate. The hollow waveguide comprises probes arranged longitudinally inside the hollow waveguide arranged to contact the input port of one of three power detectors, whose output ports are arranged to contact the input port of one power detector. The output ports of the power detectors contact the conductor of an open waveguide which extends in parallel to the hollow waveguide. The probes are equidistantly spaced with a distance of L. The circuit also comprises three LP filters, each of which is connected to the conductor of the open waveguide at a position which corresponds to the position of one of the power detectors. | 2013-10-24 |
20130278352 | ORTHO-MODE TRANSDUCER WITH WIDE BANDWIDTH BRANCH PORT - An ortho-mode transducer may include a cylindrical common waveguide terminating in a common port, a rectangular vertical branch waveguide in-line with the cylindrical common waveguide and terminating in a vertical port, and a rectangular horizontal branch waveguide normal to the common waveguide and terminating in a horizontal port. The vertical branch waveguide may be configured to couple a first linearly polarized mode from the vertical port to the common waveguide. The horizontal branch waveguide may be configured to couple a second linearly polarized mode, orthogonal to the first linearly polarized mode, from the horizontal port to the common waveguide. A portion of the vertical branch waveguide may overlap a portion of the cylindrical common waveguide. A septum may span the vertical branch waveguide proximate to the overlapping portions of the vertical branch waveguide and the common waveguide. A rectangular symmetry cavity may be opposed to the horizontal branch waveguide. | 2013-10-24 |
20130278353 | MULTIPATH MITIGATION CIRCUIT FOR HOME NETWORK - A filter circuit is provided having multipath interference mitigation. The filter includes a signal path extending from an input to an output. The signal path includes a conductive path and a ground. A pass band filter is disposed along the signal path between the input and the output. The pass band filter passes a first frequency spectrum in a provider bandwidth, and attenuates a second frequency spectrum in a home network bandwidth. The filter circuit further includes a multipath interference mitigation leg operatively branched from the signal path. The multipath interference mitigation leg increases a return loss of the home network bandwidth. A frequency response of the filter circuit is characterized by an insertion loss characteristic between the input and the output being less than 3 dB in the provider bandwidth, and more than 20 dB in the home network bandwidth. | 2013-10-24 |
20130278354 | POWER FILTER OUTPUT ARCHITECTURE OF A POWER SUPPLY - A power filter output architecture of a power supply includes a power conversion circuit board, a filter inductor, and a power output port. The power conversion circuit board includes a conversion circuit which converts an input power into at least one converted power, a power output circuit arranged at an edge of the power conversion circuit board, and a ground circuit arranged between the conversion circuit and the power output circuit. The filter inductor includes a first pin which obtains the converted power, an inductor body which receives the converted power and induces it to produce a filtered power, and a second pin which crosses the ground circuit to connect to the power output circuit. The power output port includes a plurality of power output terminals disposed on the power output circuit to obtain the filtered power, and a plurality of ground terminals connected to the ground circuit. | 2013-10-24 |
20130278355 | COMMON MODE FILTER PROVIDED WITH HIGHTENED REMOVAL FUNCTION OF COMMON MODE NOISE AND DE-EMPHASIS FUNCTION - In a common mode filter, at least one common mode filter portion is provided for removing a common mode noise, and has a first terminal pair configured to include first and second terminals connected to first and second external terminals, respectively, and has a second terminal pair configured to include third and fourth terminals connected to third and fourth external terminals, respectively. The filter includes an inductor circuit including at least two inductors that are connected in parallel to the first terminal pair of the common mode filter portion and are connected in series to each other, and an external terminal connected to the connection point of the at least two inductors. The external terminal is for being directly or indirectly grounded. | 2013-10-24 |
20130278356 | WIDE-BAND ACOUSTICALLY COUPLED THIN-FILM BAW FILTER - The invention relates to an acoustically coupled thin-film BAW filter, comprising a piezoelectric layer, an input-port on the piezoelectric layer changing electrical signal into an acoustic wave (SAW, BAW), and an output-port on the piezoelectric layer changing acoustic signal into electrical signal. In accordance with the invention the ports include electrodes positioned close to each other, and the filter is designed to operate in first order thickness-extensional TE1 mode. | 2013-10-24 |
20130278357 | MAXIMALLY FLAT FREQUENCY CODED (MFFC) PASSIVE WIRELESS SAW RFID TAGS AND SENSORS - A surface acoustic wave device responsive to an interrogation signal for producing a return signal. The surface acoustic wave device comprises an antenna for receiving the interrogation signal, a piezoelectric substrate, one or more frequency-selective reflective arrays disposed on the piezoelectric substrate, an interdigital transducer for launching an incident surface acoustic wave on the substrate in response to the interrogation signal, the incident surface acoustic wave propagating to the one or more frequency-selective reflective arrays, a reflected surface acoustic wave reflected from each one of the reflective arrays, the interdigital transducer receiving the reflected surface acoustic waves, and the return signal, responsive to each reflected surface acoustic waves. | 2013-10-24 |
20130278358 | ELASTIC WAVE FILTER - An elastic wave filter includes electrode fingers, a first busbar and a second busbar, and inclined electrode portions each having a narrower distance between the electrode fingers from the first busbar toward the second busbar. The elastic wave filter includes a dummy electrode disposed in at least one of the input-side IDT electrode portion and the output-side IDT electrode portion to suppress reflection of a diffracted elastic wave by the busbar and to suppress spurious response at an end portion in a frequency pass-band. The dummy electrode has a width dimension and a pitch that are determined such that none of a period shorter than a shortest period of the electrode fingers and a period longer than a longest period of the electrode fingers is satisfied. | 2013-10-24 |
20130278359 | TWO- AND THREE-SUBSTRATE LEVEL PROCESSES FOR PRODUCING EVANESCENT MODE ELECTROMAGNETIC WAVE CAVITY RESONATORS - This disclosure provides implementations of electromechanical systems (EMS) resonator structures, devices, apparatus, systems, and related processes. In one aspect, a method includes providing a first substrate and a second substrate. In some implementations, the first substrate includes a cavity ceiling, an array of dielectric spacers, and an assembly platform arranged adjacent the array of dielectric spacers opposite the cavity ceiling surface. The assembly platform includes a plurality of post tops. In some implementations, the second substrate has an array of cavities and an array of resonator posts. In some implementations, the method includes mating the first substrate with the second substrate, connecting the post tops with the posts to form an array that includes a plurality of evanescent-mode electromagnetic wave cavity resonators, wherein at least a statically-defined magnitude of a gap distance between the distal surface of each post top and the cavity ceiling is defined by the dielectric spacers. | 2013-10-24 |
20130278360 | DIELECTRIC CONDUITS FOR EHF COMMUNICATIONS - Dielectric conduits for the propagation of electromagnetic EHF signals include an elongate body of a dielectric material extending continuously along a longitudinal axis between a first terminus and a second terminus. At each point along the longitudinal axis, an orthogonal cross-section of the elongate body has a first dimension along a major axis of the cross-section, where the major axis extends along the largest dimension of the cross-section. The orthogonal cross-section also has a second dimension along a minor axis of the cross-section, where the minor axis extends along a widest dimension of the cross-section that is at a right angle to the major axis. For each cross-section of the elongate body, the first dimension is greater than the wavelength of the electromagnetic EHF signals and the second dimension is less than the wavelength of the electromagnetic EHF signals. | 2013-10-24 |
20130278361 | PROTECTIVE ELECTRICAL DEVICE - The present invention is directed to a protective device that includes a cover assembly having a plurality of receptacle openings, a reset button and a test button. The reset button and the test button are disposed along a first diagonal and in opposite corners of a substantially square area defined by the reset button and test button. At least one receptacle contact structure includes a portion extending across the first diagonal and at least one receptacle contact substantially aligned with one of the receptacle openings. An electromechanical apparatus is disposed in the back body within a region substantially aligned with the substantially square area. The electromechanical apparatus includes a toroidal sensor assembly coupled to an actuator coil arranged along a center axis in substantial alignment with the first diagonal, the center axis forming an acute angle relative to a side wall of the back body. | 2013-10-24 |
20130278362 | ELECTROMAGNETIC RELAY - An electromagnetic relay includes: a yoke capable of changing a magnetic pole thereof by an electromagnet; an armature that is magnetized by a permanent magnet and contacts with or separates from the yoke in accordance with the magnetic pole of the yoke; a movable contact that contacts with a fixing contact; an elastic body that biases the movable contact; and a pressing member that presses the elastic body in accordance with a movement of the armature to cause the movable contact to at least contact with or separate from the fixing contact, wherein a cover fixing the permanent magnet and the armature, and the pressing member are integrally formed. | 2013-10-24 |
20130278363 | DEVICE COMPRISING A CANTILEVER AND SCANNING SYSTEM - A device including a first part and a second part, the first and second part being connected to each other and being movable relative to each other. The first part is a cantilever that has a rectangular strip with a probe tip at one end and a magnetic element the other end. The magnetic element is configured to interact with a magnetic field. The first part is connected to the second part by a hinge. | 2013-10-24 |
20130278364 | Sound Generating Apparatus - An apparatus including an electromagnetic coil and a magnet system. The electromagnetic coil includes electrical leads. The magnet system forms electrical conductors connected to the electrical leads of the coil. The magnet system is configured to provide an electrical interface. | 2013-10-24 |
20130278365 | MAGNETIC CLIMBING SYSTEM - A magnetic climbing system comprising a plurality of magnet units adapted to be attached to the body of a user or to a robot or robot platform is described. The magnet units each comprise a permanent magnet unit for generating an attractive force between the magnet unit and a ferrous or magnetic structure. The magnet units further comprise an electromagnet arranged to operate in a first and a second state thereby generating a different magnetic flux leaving the magnet unit (and thus required for generating the attractive force). As such, the magnetic climbing system as described enables the generation of larger attractive forces, compared to known climbing systems. As a consequence, the climbing system according to the present invention may pose less stringent conditions to the friction coefficient of the surface that is climbed. It also creates the possibility of ceiling walking. | 2013-10-24 |
20130278366 | ALLOY COMPOSITION, FE-BASED NANO-CRYSTALLINE ALLOY AND FORMING METHOD OF THE SAME AND MAGNETIC COMPONENT - An alloy composition of the formula Fe | 2013-10-24 |
20130278367 | ARCUATE MAGNET HAVING POLAR-ANISOTROPIC ORIENTATION, AND METHOD AND MOLDING DIE FOR PRODUCING IT - A die apparatus for molding an arcuate magnet having polar-anisotropic orientation in a magnetic field, which comprises a die made of non-magnetic cemented carbide, which is arranged in a parallel magnetic field generated by a pair of opposing magnetic field coils; an arcuate-cross-sectional cavity having an inner arcuate wall, an outer arcuate wall and two side walls, which is disposed in the die; a central ferromagnetic body arranged on the side of the outer arcuate wall of the cavity; and a pair of side ferromagnetic bodies symmetrically arranged on both side wall sides of the cavity; the cavity being arranged such that its radial direction at a circumferential center thereof is identical with the direction of the parallel magnetic field; the width of the central ferromagnetic body being smaller than the width of the cavity in a direction perpendicular to the parallel magnetic field; and a pair of the side ferromagnetic bodies being arranged such that the cavity is positioned in a region sandwiched by a pair of the side ferromagnetic bodies. | 2013-10-24 |
20130278368 | RECTIFIER TRANSFORMER - A rectifier transformer including at least one secondary with windings, one pair of magnetic transductors per winding, one of the transductors having one or more first busbars and the other having one or more second busbars. All of the busbars of the pair of transductors are connected to the same winding. The or each first or second, busbar is connected to a single positive or negative, terminal ( | 2013-10-24 |
20130278369 | SEALED INDUCTOR CONNECTION USING LITZ WIRE - An inductor comprises a ferromagnetic core, a litz wire conductor encircling the ferromagnetic core, a housing, a bobbin, a conductive pin, and a seal assembly. The housing encloses the ferromagnetic core and the litz wire conductor. The conductive pin is conductively attached to the litz wire conductor, and extends therefrom to form an external electrical contact. The bobbin supports the litz wire conductor and positions the conductive pin in alignment with an aperture in the housing which is sealed against fluid egress by the seal assembly. | 2013-10-24 |
20130278370 | SPRING-SUPPORTED INDUCTOR CORE - An inductor comprises a ferromagnetic core, a plurality of conductor turns encircling the ferromagnetic core, a bobbin, and a wave spring. The bobbin encloses the ferromagnetic core and supports the plurality of conductor turns and the wave spring is situated between the bobbin and the ferromagnetic core. | 2013-10-24 |
20130278371 | FLAT COIL PLANAR TRANSFORMER AND METHODS - A low cost, reduced form factor, high performance electronic device for use in electronic circuits and methods. In one exemplary embodiment, the device includes a unitary header assembly construction that ensures device coplanarity and also includes vertically oriented terminal pins. The device utilizes preconfigured flat coil windings that are disposed directly within a planar core. The flat coil windings further include features that are configured to mate with the header assembly terminal pins which substantially simplify the manufacturing process. Methods for manufacturing the device are also disclosed. | 2013-10-24 |
20130278372 | Semiconductor Component with Coreless Transformer - A semiconductor component has integrated a coreless transformer with a first connection contact, a second connection contact, an electrically conductive spiral first coil, an electrically conductive first ring, and an electrically conductive second ring. The electrically conductive spiral first coil is electrically connected between the first connection contact and the second connection contact. The electrically conductive first ring surrounds the first coil and one or both of the first connection contact and the second connection contact. The electrically conductive second ring is arranged between the first coil and the first ring, electrically connected to the first coil, and surrounds the first coil and one or both of the first connection contact and the second connection contact. | 2013-10-24 |
20130278373 | COIL UNIT, SUBSTRATE UNIT AND POWER SUPPLY DEVICE - In the coil unit | 2013-10-24 |
20130278374 | COIL ASSEMBLY COMPRISING PLANAR COIL - Coil assembly ( | 2013-10-24 |
20130278375 | MODULAR FUSE REMOVAL TOOL ACCESSORY, KIT, AND SYSTEMS FOR FUSIBLE DISCONNECT DEVICE - A removal tool accessory for replacing rectangular fuse modules of a fusible switching disconnect device. The removal tool accessory is a single piece part configured to snap-fit with the rectangular fuse module via opposing lateral sides thereof. The accessory includes an opening dimensioned to receive a person's index finger, middle finger, ring finger, and baby finger. A handlebar is provided for optimal mechanical leverage to pull the rectangular fuse module from the fusible switching disconnect device even when access to the rectangular fuse module is restricted. | 2013-10-24 |
20130278376 | RF Thermal Fuse - Certain aspects are directed to a thermal fuse for preventing overheating of RF devices in a telecommunication system. The RF thermal fuse includes a body, a conductive bolt, and a driving mechanism. The body can be positioned on a transmission line between an RF signal source and an RF device. The conductive bolt is positioned in the body. The conductive bolt has a length sufficient to provide impedance at a point of protection on the transmission line in response to the conductive bolt contacting a live conductor of the transmission line. The impedance is sufficient to reflect a portion of the incident power of an RF signal from the RF source. The driving mechanism can cause the conductive bolt to contact the live conductor in response to a temperature at or near the point of protection exceeding a threshold temperature. | 2013-10-24 |
20130278377 | WIRELESS SENSOR DEVICE - A wireless sensor device includes a processor connected to a wireless transmitter and at least one sensor, and a power source connected to power the processor and the wireless transmitter. The processor has two or more states. An internal control element senses at least one predetermined condition. The internal control element switches the processor between states based on the occurrence of at least one predetermined condition. A molded body encloses at least the processor, the wireless transmitter, and the internal control sensor. The internal control sensor is physically isolated within the molded body. | 2013-10-24 |
20130278378 | SECURE EPASS BOOKLET BASED ON DOUBLE CHIP TECHNOLOGY - A tamper-evident credential has a radio frequency identification (RFID) package with a first antenna and a subordinate antenna, RFID package defining a first part of the credential. The credential also has a subordinate RFID package defining a second part of the credential. The subordinate RFID package selectively coupled to said subordinate antenna so that an interrogation signal applied to said first antenna package is transmitted to the subordinate RFID package across said subordinate antenna. | 2013-10-24 |
20130278379 | System Interaction with a Movable Barrier Operator Method and Apparatus - A secure communication link is provided between a movable barrier operator and a peripheral system. Information conveyed via this link is used by one, the other, or both such elements to further inform or direct their respective actions. | 2013-10-24 |
20130278380 | ELECTRONIC DEVICE INCLUDING FINGER MOVEMENT BASED MUSICAL TONE GENERATION AND RELATED METHODS - An electronic device may include a finger biometric sensor and an audio output transducer. The electronic device may further include a controller cooperating with the finger biometric sensor for determining at least one biometric characteristic of a user's finger. The controller may also cooperate with the finger biometric sensor for causing the audio output transducer to generate at least one musical tone changing based upon movement of a user's finger relative to the finger biometric sensor. | 2013-10-24 |
20130278381 | REMOTE KEYLESS ENTRY TRANSMITTER - A remote wireless keyless entry transmitter includes a communications interface for connecting the transmitter directly to an in-vehicle network for registering the transmitter with the vehicle access system. The interface is further connectable to a personal computer to load a set of control codes and programming codes corresponding to a vehicle. The transmitter is programmable to operate multiple functions for multiple vehicles, separately or simultaneously. The transmitter can include a transponder circuit, a display, an accelerometer and a key coupler. A wireless transponder is operationally associated with a vehicle security system by physically connecting the transponder to a vehicle data port with a temporary data link and transferring data between the security system and the transponder over the data link to enable subsequent wireless operation of the security system with the transponder. The transmitter can include an audible signal generator and be programmable to respond to a pager signal. | 2013-10-24 |
20130278382 | SYSTEMS AND METHODS FOR OBJECT LOCALIZATION AND PATH IDENTIFICATION BASED ON RFID SENSING - A networked radio frequency identification system includes a plurality of radio frequency identification (RFID) tag readers, a computer in signal communication with the RFID tag readers over a network, and a software module for storage on and operable by the computer that localizes RFID tags based on information received from the RFID tag readers using a network model having endpoints and oriented links. In an additional example, at least one of the RFID tag readers includes an adjustable configuration setting selected from RF signal strength, antenna gain, antenna polarization, and antenna orientation. In a further aspect, the system localizes RFID tags based on hierarchical threshold limit calculations. In an additional aspect, the system controls a locking device associated with an access point based on localization of an authorized RFID tag at the access point and reception of additional authorizing information from an input device. | 2013-10-24 |
20130278383 | ELECTRONIC DEVICE INCLUDING FINGER-OPERATED INPUT DEVICE BASED BIOMETRIC MATCHING AND RELATED METHODS - An electronic device may include a finger-operated input device, and a finger sensor carried by the finger-operated input device to sense a user's finger. The electronic device may further include a processor to perform applications and perform at least one device function responsive to an operation of the finger-operated input device. The processor may acquire finger-matching biometric data of the user's finger responsive to each operation of the finger-operated input device. The processor may further authenticate the user based upon an authentication request from one of the applications. The authentication may be based upon a match of most recently acquired finger-matching biometric data and finger-enrollment biometric data. | 2013-10-24 |
20130278384 | APPLIANCE, DEVICE, AND SYSTEM FOR HOME ENERGY MANAGEMENT - A home energy management system is configured to alert a homeowner based on information from an appliance. In one embodiment, the system comprises an appliance and an apparatus that communicates, e.g., via wireless technology. The appliance comprises circuitry to generate a data packet, which comprises information to identify the appliance as well as the status of one or more features and functions of the appliance. Exemplary functions can monitor movement proximate the appliance and/or entry or access to the interior of the appliance. The remote apparatus receives the data packet and, in one example, generates an output to an end user that conveys information in the data packet to the end user. The output can comprise an electronic message (e.g., an email or text message) that identifies from the data packet one or more appliance functions that exhibit a change in status. | 2013-10-24 |
20130278385 | DEVICE, SYSTEM AND METHOD OF PROCESSING A RECEIVED ALERT - Some demonstrative embodiments include devices, systems and/or methods of processing alerts. For example, a device may include an alert module, operative independent of an operating-system and/or a power mode of the device, to receive an alert message from at least one communication network and to cause at least one user interface of the device to provide to a user of the device an alert indication, which is based on the alert message. | 2013-10-24 |
20130278386 | PORTABLE ENCODED INFORMATION READING TERMINAL CONFIGURED TO ADJUST TRANSMIT POWER LEVEL - A system and method of adjusting the transmission strength emitted by an integrated RFID reading device by an EIR terminal. The EIR terminal scans a signal of decodable indicia, locates the decodable indicia within the signal, decodes the decodable indicia into a decoded message, which is an identifier for said physical object. The EIR terminal then makes contact with the physical object and stores the location of this contact as a point of origin and then, moves through three dimensional and receives values from its motion sensing device representing the location of said EIR terminal in three dimensional space relative to the point of origin. Then, the EIR terminal determines the distance of the RFID reading device from the point of origin and adjusts the power level of said RFID reading device relative to this distance. | 2013-10-24 |
20130278387 | Radio Frequency Identification Sensor Assembly - In accordance with one embodiment, an RFID sensor assembly comprises a sensing RFID chip and a reference RFID chip. The sensing RFID chip and the reference RFID chip are configured for electrical coupling to an electronic component via a coupling arrangement. The coupling arrangement of the sensing RFID chip is configured to vary a coupling property in response to a sensed parameter. | 2013-10-24 |
20130278388 | SYSTEMS AND METHODS FOR OBJECT LOCALIZATION AND PATH IDENTIFICATION BASED ON RFID SENSING - A networked radio frequency identification system includes a plurality of radio frequency identification (RFID) tag readers, a computer in signal communication with the RFID tag readers over a network, and a software module for storage on and operable by the computer that localizes RFID tags based on information received from the RFID tag readers using a network model having endpoints and oriented links. In an additional example, at least one of the RFID tag readers includes an adjustable configuration setting selected from RF signal strength, antenna gain, antenna polarization, and antenna orientation. In a further aspect, the system localizes RFID tags based on hierarchical threshold limit calculations. In an additional aspect, the system controls a locking device associated with an access point based on localization of an authorized RFID tag at the access point and reception of additional authorizing information from an input device. | 2013-10-24 |
20130278389 | SYSTEMS AND METHODS FOR OBJECT LOCALIZATION AND PATH IDENTIFICATION BASED ON RFID SENSING - A networked radio frequency identification system includes a plurality of radio frequency identification (RFID) tag readers, a computer in signal communication with the RFID tag readers over a network, and a software module for storage on and operable by the computer that localizes RFID tags based on information received from the RFID tag readers using a network model having endpoints and oriented links. In an additional example, at least one of the RFID tag readers includes an adjustable configuration setting selected from RF signal strength, antenna gain, antenna polarization, and antenna orientation. In a further aspect, the system localizes RFID tags based on hierarchical threshold limit calculations. In an additional aspect, the system controls a locking device associated with an access point based on localization of an authorized RFID tag at the access point and reception of additional authorizing information from an input device. | 2013-10-24 |
20130278390 | SYSTEMS AND METHODS FOR OBJECT LOCALIZATION AND PATH IDENTIFICATION BASED ON RFID SENSING - A networked radio frequency identification system includes a plurality of radio frequency identification (RFID) tag readers, a computer in signal communication with the RFID tag readers over a network, and a software module for storage on and operable by the computer that localizes RFID tags based on information received from the RFID tag readers using a network model having endpoints and oriented links. In an additional example, at least one of the RFID tag readers includes an adjustable configuration setting selected from RF signal strength, antenna gain, antenna polarization, and antenna orientation. In a further aspect, the system localizes RFID tags based on hierarchical threshold limit calculations. In an additional aspect, the system controls a locking device associated with an access point based on localization of an authorized RFID tag at the access point and reception of additional authorizing information from an input device. | 2013-10-24 |
20130278391 | METHOD AND SYSTEMS OF TAGGING OBJECTS AND READING TAGS COUPLED TO OBJECTS - Methods and systems of tagging objects and reading tags coupled to objects. At least some of the illustrative embodiments are systems comprising a reading antenna, a tag reader coupled to the reading antenna, and a radio frequency identification (RFID) tag comprising a tag antenna electromagnetically coupled to the reading antenna. The RFID tag couples to an object such as the body of a living organism or a metallic article. Moreover, the tag antenna has a far-field radiation pattern in a direction away from the object that is substantially unaffected by proximity of the RFID tag to the object, and substantially unaffected by which surface of the RFID tag faces the object. | 2013-10-24 |
20130278392 | METHOD AND SYSTEM FOR DETERMINING ASSET DISPOSITION USING RFID - A system and method of determining a disposition of an electronic device as installed, in-need-of-repair, or in-storage are provided, using Radio Frequency Identification (RFID) devices on the electronic devices and a sensor which detects disposition. Diagnostic test results and locations of installed devices may also be communicated to the RFID associated with the device and provided in a response to an interrogation. Shared memory on the device is integrated with the RFID device to store utilization and health history on the device for later retrieval. The disposition data is provided in a response to an interrogation of each device. Optionally, a communications device on a chassis housing electronic devices provides the disposition and location of all installed devices in response to an interrogation. The device disposition and location information is communicated to the communications device upon installation via a processing unit integral to the chassis. | 2013-10-24 |
20130278393 | PORTABLE ENCODED INFORMATION READING TERMINAL CONFIGURED TO LOCATE GROUPS OF RFID TAGS - A portable radio-frequency identifier (RFID) reading terminal can comprise a microprocessor, a memory, an RFID reading device, and a display. The portable EIR terminal can be configured, responsive to successfully reading a plurality of RFID tags attached to a plurality of items sustained by a physical structure, to group the plurality of read RFID tags into zero or more clusters, by correlating quantities of RFID tags read within several time periods to spatial positions of the coverage shapes of the RF signals transmitted by the RFID reading device during the several time periods. The EIR terminal can be further configured to determine the spatial positions of the RFID signal coverage shapes based on the spatial positions and orientations of the portable EIR terminal during the several time periods. The EIR terminal can be further configured to display a quantity of RFID tags within each cluster overlaid over an image. | 2013-10-24 |
20130278394 | Media Processing Device, Control Method of a Media Processing Device, and Storage Medium - Writing incorrect information to an IC tag affixed to a medium is prevented. When a control command including recording information, an instruction to record the recording information on a medium, and an instruction to write data including at least time-related information to an IC tag affixed to the medium is received from a host computer, the system controller | 2013-10-24 |
20130278395 | WIRELESS FIELD DEVICE HAVING DISCRETE INPUT/OUTPUT - A wireless field device for use in an industrial process includes input/output terminals configured to couple to a process interface element. A discrete input/output channel is configured to receive a discrete input from the process interface element through the input/output terminals when configured as a discrete input channel. The discrete input/output channel is further configured to provide a discrete output to the process interface element through the input/output terminals when the discrete input/output channel is configured as discrete output channel. Wireless communication circuitry is configured to transmit and receive information. A controller communicates information through the wireless communication circuitry and operates in accordance with configuration information to configure the input/output channel as an input channel when the input/output terminals are connected to a discrete process variable sensor, and further configure the discrete input/output channel as a discrete output channel when the input/output terminals are coupled to a discrete control element. | 2013-10-24 |
20130278396 | Intraoral Communications and Processing Device - Methods, apparatuses, systems, and computer-readable media for communicating via an electronic device for use in a mouth environment of an animal and resistant to damage from bodily fluids and pressure. The device can be pierced through a tongue, a lip, or a cheek, anchored to a tooth or a teeth of the mandible, or implanted in (or attached to an implant in) the maxilla or mandible. The device includes: a power device, which can power the apparatus, a memory storage device, which can store and recall data; a communications subsystem, which communicates with one or more remote devices; an output device, which creates stimulus directly or indirectly observable in the mouth environment; an input device, which can create signals according to activity in the mouth environment and can send them to the memory storage device and/or processor; and a processor coupled to the memory storage device, the communication subsystem, the output device and the input device. | 2013-10-24 |
20130278397 | REMOTE CONTROL METHOD AND SYSTEM AND MOBILE DEVICE OF THE SYSTEM - A remote control method applied in a mobile device whereby movements of the mobile device are detected via an acceleration sensor internally installed in the mobile device. An acceleration generated according to the movement is determined as being smaller or greater than a predetermined threshold value. If the acceleration is equal to or greater than the predetermined threshold value, a control instruction is generated. The control instruction is transmitted to an electronic device via a wireless network module of the mobile device to trigger a preset switch operation between the mobile device and the electronic device. | 2013-10-24 |
20130278398 | APPARATUS AND METHOD FOR REMOTELY SETTING MOTION VECTOR FOR SELF-PROPELLED TOY VEHICLES - The present solution is directed to systems and methods for setting motion vector (MV) for a self-propelled toy by hand-held remote controller (RC). The method feature is that (i) the vector of a control action made by the user with the RC, (ii) the vector of the desired motion for the selected toy and (iii) the vector displayed by light indicator at the selected toy, all the three, or at least two of them, have coincided direction and proportional value. The desired vector is being set while the RC is pointed at the selected toy. If pointing is being made by invisible light, then the pointed toy should be indicated by its own means. One RC may be used for controlling arbitrary number of devices consequently. Otherwise a number of toys may be grouped, and the same MV may be given to all of them at once. | 2013-10-24 |
20130278399 | RESPONDING TO HEALTHCARE ALERTS - A healthcare alert system including a plurality of alert modules, each alert module including an activation component and an RFID reader. The RFID readers in the alert modules are configured to read identification information of a responder to an alert from an RFID tag associated with the responder, and to transmit the identification information to a central system. The central system is configured associate a time stamp with the identification information and to process the identification information and time of response. In one embodiment, the activation component is a pull cord. | 2013-10-24 |
20130278400 | HAPTIC DEVICE - A method of generating a haptic sensation comprising: determining an initial estimate of a filter to be applied to a respective signal input to each transducer; defining a model of the system; calculating the vibration of the member as an output of the model of the system; calculating a reference error value for the output of the model; determining changed parameter values of the parameters of the model; recalculating the error value for the output of the model; comparing the recalculated error value with the reference error value; setting the recalculated error value as the reference error value, setting the changed parameter values as the model parameters, and repeating the above steps, or outputting the model parameters; generating a new filter using the output model parameters; and applying the new filters to respective input signals applied to each transducer to generate vibration within the member to provide the haptic sensation. | 2013-10-24 |