44th week of 2011 patent applcation highlights part 19 |
Patent application number | Title | Published |
20110267035 | CURRENT DETECTOR AND METHOD OF MANUFACTURING SAME - The invention relates to a current detector using a magnetic balance system and method of manufacturing same. A plurality of taps N, N−1, N−2, N+1, and N+2 are connected to the output side of the secondary coil, and provided on the winding side of a secondary coil in winding device including a bobbin | 2011-11-03 |
20110267036 | CONNECTING DIGITAL STORAGE OSCILLOSCOPES - An apparatus includes a first oscilloscope having multiple channels, and a second oscilloscope having multiple channels. The first oscilloscope is configured to operate as a master or as a slave. The first oscilloscope operates as the master by using a first trigger signal and a first clock signal that are native to the first oscilloscope, and the first oscilloscope operates as the slave by using a second trigger signal and a second clock signal that are native to the second oscilloscope. The second oscilloscope is configured to operate as the master or as the slave. The second oscilloscope operates as the master by using the second trigger signal and the second clock signal, and the second oscilloscope operates as the slave by using the first trigger signal and the first clock signal. | 2011-11-03 |
20110267037 | MULTI-LEVEL TRIGGERING CIRCUIT - Circuitry includes a comparator to compare an input analog signal to a threshold and to output a signal that is based on the comparison; a first circuit path to receive the signal and to detect a characteristic of the signal, where the first circuit path is configured to support triggering at a first frequency; a second circuit path to receive the signal and to detect the characteristic of the signal, where the second circuit path is configured to support triggering at a second frequency that is lower than the first frequency; and a selector to select an output of the first circuit path or an output of the second circuit path. | 2011-11-03 |
20110267038 | SHUNT SENSOR AND SHUNT SENSOR ASSEMBLY - The present disclosure describes configurations for current shunt sensors and current shunt sensor assemblies having improved electromagnetic cross-talk rejection that can be used in single-phase/split-phase and poly-phase power metering applications. Some embodiments of the current shunt sensors and current shunt sensor assemblies reduce the need for a shielding material around current shunt sensors in single-phase/split-phase and poly-phase power metering applications. Some embodiments of the current shunt sensors achieve improved electromagnetic cross-talk rejection through a substantially symmetrical arrangement of component parts along the primary path of current flow. Some embodiments of the current shunt sensors achieve improved electromagnetic cross-talk rejection by symmetrical configurations that, in operation, induce complementary parasitic currents or voltages that substantially cancel each other out and do not substantially affect primary current flow through the current shunt sensor. | 2011-11-03 |
20110267039 | MAGNET AND HOLDER ASSEMBLY HAVING IMPROVED ROTATIONAL AND AXIAL STABILITY - A magnet held in a magnet holder is constrained against radial or axial instability, or against both, by a shape on either component in contact with complementary shape on the other component, the shaped components generally defining a tab-and-slot arrangement. The magnet component may be a bonded magnet and in one embodiment may be formed in place by injection molding. The magnet also will exhibit improved magnet properties when magnetized to have lines of polarity matching a path defined by the bulk of the magnetic material as governed by the location of tabs on the magnet. The invention is useful in magnet-sensor assemblies found in industrial applications and in automotive applications such as power steering systems. | 2011-11-03 |
20110267040 | LINEAR OR ROTARY POSITION SENSOR WITH A PERMANENT MAGNET FOR DETECTING A FERROMAGNETIC TARGET - The disclosure relates to a contactless magnetic sensor for measuring the angular or linear movement of a ferromagnetic target. The purpose of the disclosure is to make a position sensor having reduced dimensions and capable of detecting a piece of position information as soon as the sensor is powered without degrading the performance thereof. To this end, the disclosure relates to a mobile sensor that includes at least one permanent magnet, at least one ferromagnetic member at least one magnetically sensitive member, the permanent magnet having an upper surface opposite the ferromagnetic target, wherein the permanent magnet has a substantially cylindrical or parallelepiped shape and includes a cavity, the ferromagnetic member being arranged inside the cavity and the magnetically sensitive member being arranged inside the cavity above the ferromagnetic member and below the upper surface of the magnet. | 2011-11-03 |
20110267041 | Hall Rotary Transformer and Hall Rotation Angle Encoder Made of It - A hall rotary transformer comprises a rotary transformer stator ( | 2011-11-03 |
20110267042 | MOTOR FUNCTION ANALYZING APPARATUS - It is an object of the present invention to provide a motor function analyzing apparatus which simplifies a calibration measurement necessary before measuring a finger tapping motion, and which is capable of evaluating a motor function highly precisely. The present invention provides a motor function analyzing apparatus which simplifies a calibration measurement necessary before measuring a finger tapping motion, and which is capable of evaluating a motor function highly precisely by using a calibration point unique to each apparatus and a calibration point unique to each subject. | 2011-11-03 |
20110267043 | MAGNETIC ENCODER APPARATUS - A magnetic scale includes a scale member having a plurality of grooves. The scale member defines a passive magnetic scale track. The plurality of grooves include grooves of at least a first groove type and a second groove type, the magnetic properties of the scale member in the locality of grooves of the first groove type being different than the magnetic properties of the scale member in the locality of grooves of the second groove type. The scale member is arranged to carry or encode absolute position information in the form of at least one codeword comprising a sequence of data bits, wherein each of the data bits is provided by a groove of the scale member, the data bit taking a first value if the groove is of the first groove type and a second value if the groove is of the second groove type. | 2011-11-03 |
20110267044 | Position detection device - A position detection device includes an electromagnetic conversion element and a magnetic field generator. The electromagnetic conversion element is arranged on a given plane. The magnetic field generator is arranged facing one side of the electromagnetic conversion element in a direction vertical to the given plane and generates a magnetic field covering the electromagnetic conversion element. A relative position between the electromagnetic conversion element and the magnetic field generator is detected when a relative displacement parallel to the given plane is made by the electromagnetic conversion element and the magnetic field generator based on an output signal of the electromagnetic conversion element. The magnetic field generator has an opposed face that tilts to the electromagnetic conversion element, and generates the magnetic field from the opposed face. | 2011-11-03 |
20110267045 | Method and Apparatus for Sectional Magnetic Encoding of a Shaft and For Measuring Rotational Angle, Rotational Speed and Torque - Magnetically encoded shafts for use in detecting forces exerted on the shaft during operation. Magnetically encoded regions arranged in tracks or bands, encircle the shaft and are formed within or affixed to the shaft. The magnetically encoded regions define force-sensitive regions therebetween. Magnetic fields surround the force-sensitive regions and are altered by force vectors passing through the force sensitive region. These magnetic fields are sensed by magnetic field sensors to determine various shaft parameters including, for example: shaft rotational speed, shaft rotational position, and forces exerted on the shaft, e.g., torque, bending forces, stress forces and strain forces. To provide continuous detection of shaft operational parameters and forces, dead zones between magnetically encoded regions are aligned with force sensitive regions associated with magnetically encoded regions in other bands. | 2011-11-03 |
20110267046 | METHOD AND DEVICE FOR COMPENSATION IN A MEASUREMENT OF A MAGNETIC FIELD, OBJECT-LOCALIZING METHOD AND SYSTEM, RECORDING MEDIUM FOR THESE METHODS - This method of compensation in the measurement of a magnetic field comprises:
| 2011-11-03 |
20110267047 | NONDESTRUCTIVE ROBOTIC INSPECTION METHOD AND SYSTEM THEREFOR - A method and system for inspecting components, such as a rotating component of a turbomachines having one or more slots along a perimeter thereof. The method entails mounting to a robotic apparatus a probe assembly that includes a holder assembly to which a probe tip is mounted, an eddy current coil within the probe tip and adjacent a first face thereof, a touch probe contact located at a second face of the probe tip, an element for enabling relative movement between the probe tip and holder assembly, and an element for biasing the probe tip relative to the holder assembly in a direction parallel to the movement. The probe tip is then placed in a slot and caused to travel along the surface of the slot to electromagnetically inspect the slot for cracks in its surface while the first face of the probe tip is maintained in contact with a slot surface. | 2011-11-03 |
20110267048 | MAGNETICALLY SENSITIVE DEVICES - Methods and apparatus pertaining to magnetically sensitive devices are provided. A device includes a graphite containing-material (GCM) supported in contact with respective pairs of electrodes. The GCM is subject to a magnetic field. Various levels of electric current are driven through the GCM, while corresponding voltage measurements are taken. Resulting current-versus-voltage data pairs are compared to calibration data for the device. Magnetic field intensities, operating states of the device or other determinations can be made according to the comparison. | 2011-11-03 |
20110267049 | OPTICAL FIBER MAGNETO-OPTICAL DETECTING DEVICE - An optical fiber magneto-optical detecting device comprises: a light-guiding input part ( | 2011-11-03 |
20110267050 | MAGNETIC STUD FINDER - A magnetic apparatus for locating hidden ferrous fasteners includes a holder of a preselected non-ferromagnetic material having a base member and at least one wall member of a first predetermined height. The wall member being fixed substantially normal to the base member and has a perimeter about 30 to 70% of a perimeter of the base member. The apparatus further includes a cylindrical magnet of preselected type having a predetermined diameter and a second predetermined height and having sufficient strength to pull itself to such hidden ferrous fastener across a separation distance of at least ½-inch. | 2011-11-03 |
20110267051 | STANDING WAVE TRAP - The present embodiments relate to a standing wave trap for a magnetic resonance tomography device. The standing wave trap includes a conductor region extending in one plane and at least one capacitor that is conductively connected to two sections of the conductor region. | 2011-11-03 |
20110267052 | BROADBAND DECOUPLING PULSE TRAIN WITH INTERLEAVED PAUSES FOR MAGNETIC RESONANCE SPECTROSCOPY - A magnetic resonance apparatus ( | 2011-11-03 |
20110267053 | METHOD FOR THREE-DIMENSIONAL TURBO SPIN ECHO IMAGING - A three-dimensional turbo spin echo imaging method of applying, within a repetition time TR, N groups of pulses to respectively scan N slabs in succession, with each group including one excitation pulse and more than one refocusing pulse, wherein N is a positive integer greater than 1, is improved by applying a first slice selection gradient at the same time as applying each said excitation pulse, and applying a second slice selection gradient at the same time as applying each said refocusing pulse, and applying a phase encoding gradient after having applied each refocusing pulse, then applying a frequency encoding gradient and acquiring scan signals during the duration of the frequency encoding gradient. An image according to the scan signals is reconstructed. | 2011-11-03 |
20110267054 | MAGNETIC RESONANCE IMAGING WATER-FAT SEPARATION METHOD - A magnetic resonance imaging (MRI) water-fat separation method includes acquiring in-phase image raw measurement data and out-of-phase image raw measurement data with an MRI device, reconstructing an in-phase image and an out-of-phase image according to a system matrix and the raw measurement data using the penalty function regularized iterative reconstruction method, and calculating water and fat images according to the in-phase image and the out-of-phase image. The use of the penalty function regularized iterative method eliminates the need for k-space raw measurement data with a 100% sampling rate, thereby reducing the MRI scan time, shortening the entire imaging time, and improving the efficiency of the MRI device. | 2011-11-03 |
20110267055 | MAGNETIC RESONANCE IMAGING APPARATUS - According to a magnetic resonance imaging apparatus according to an embodiment, a Radio Frequency (RF) pulse applying unit applies to a subject a flip pulse for exciting spin of nuclei inside a subject body, and a flop pulse for refocusing the phase of the spin. A gradient magnetic-field applying unit applies a spoiler gradient magnetic field onto the subject after the flop pulse is applied, and applies a rewind gradient magnetic field before applying the flop pulse. A control unit executes a pulse sequence of controlling the gradient magnetic-field applying unit so as to keep each of the strengths of the spoiler gradient magnetic field and the rewind gradient magnetic field at respective predetermined values or higher with respect to each of a plurality of slice encodings. | 2011-11-03 |
20110267056 | DIGITAL WAVEFORM SYNTHESIZER FOR NMR PHASE CONTROL - In an RF source, a digital waveform synthesizer comprises a computational module to synchronously determine a desired periodic function, f(θ), within a first bandwidth portion, to which computational result there is combined an injected digital noise increment in an adjustable range of bounded amplitude, specifically selected to average over discontinuities of the DAC transfer characteristic. The combination is effected after passing the injected noise increment through a programmable digital filter forming a composite tuning word having a total bandwidth at a selected Nyquist zone and thence passing the composite tuning word through a truncation component to a DAC. The programmable digital filter is constructed to displace the spectral distribution of the injected noise increment to a portion of the total bandwidth remote from the first bandwidth portion. | 2011-11-03 |
20110267057 | DYNAMIC FREQUENCY DRIFT CORRECTION METHOD IN MAGNETIC RESONANCE IMAGING - For magnetic resonance imaging (MRI), a dynamic frequency drift correction method for binomial water excitation method includes collecting the reference one-dimensional navigation signal by an MRI device; acquiring one current one-dimensional navigation signal after scanning N images, wherein N is a positive integer; calculating the frequency drift according to the reference one-dimensional navigation signal and the current one-dimensional navigation signal; calculating and setting the initial phase of the next radio frequency signal by the MRI device according to the frequency drift. The method provides real-time calculation of the main magnetic field frequency drift according to the one-dimensional navigation signal during the scanning period and corrects the phase of the radio frequency signal to ensure that the direction of the gradient field is always perpendicular to the plane formed by the spinning of fat protons, so there is only water signal remaining after excitation so that water images can be obtained. | 2011-11-03 |
20110267058 | DIRECTED ENERGY IMAGING SYSTEM - An imaging system that uses a directed-energy device can include a directed-energy device configured to generate an excitation signal to impinge a region of interest of a target and excite elements therein and receive resonance signals emitted from the region of interest of the target after the excitation signal is terminated. The directed-energy device can include a charged particle generator configured to generate plural energized particles and a charge transformer configured to receive the plural energized particles that include charged particles from the charged particle generator and to output a wavefront including energized particles that include particles having substantially zero charge. The imaging system can also include plural gradient coils positioned about a bore of a magnet and configured to impress a polarizing magnetic field on a target and a communications interface. | 2011-11-03 |
20110267059 | RF COIL ASSEMBLY FOR USE IN MAGNETIC RESONANCE IMAGING - An apparatus for intra-operative MRI includes a patient table with a movable magnet and an RF coil having an upper portion and a lower portion. The upper portion is formed of a foam material flexible to different shapes with a pair of stiffeners formed of connected pivotal elements extending from a central back-bone embedded in the top sheet of the foam to hold the flexible material in the different shapes and is carried at one end of a flexible foam arm attached to a side rail of the table and stiffened by a longitudinal stiffener. A head clamp is attached to the table with a C-shaped holder for the skull clamp pins. The lower coil is movable by flexing about longitudinal lines to different curvatures and is held channel shaped by the C-shaped holder. It is attached at one longitudinal end to an adjustable mount connected to the head clamp. | 2011-11-03 |
20110267060 | MAGNETIC RESONANCE IMAGING DEVICE - A magnetic resonance imaging device includes magnetic field generating means and control means for controlling receiving means according to a predetermined pulse sequence, the predetermined pulse sequence including an unnecessary material suppressing sequence unit for canceling a signal from an unnecessary material which is not a measurement target and a main imaging sequence unit for measuring a nuclear magnetic resonance signal used to create an image of an examinee. The unnecessary material suppressing sequence unit generates at least two or more high frequency magnetic field pulses so that the longitudinal magnetization of the unnecessary material is made spatially uniform in the imaging space under application of a first high frequency magnetic field pulse in the main imaging sequence unit. The magnetic resonance imaging device further includes adjusting means for adjusting the flip angles of the two or more high frequency magnetic field pulses, and the control means applies the two or more high frequency magnetic field pulses at the flip angles adjusted by the adjusting means. | 2011-11-03 |
20110267061 | QUARTER WAVE BALUN FOR MAGNETIC RESONANCE IMAGING SYSTEMS - A balun assembly includes a body portion having an opening extending therethrough, the opening sized to receive at least one radio-frequency (RF) cable therethrough, the RF cable transmitting a signal therethrough a signal having a wavelength, and a balun disposed within the body portion, the balun being folded to form a plurality of layers, the combined length of the layers being approximately equal to a quarter wavelength of the signal transmitted through the RF cable. A method of fabricating a balun assembly and an MRI system including a balun are also provided. | 2011-11-03 |
20110267062 | BALUN AND MAGNETIC RESONANCE IMAGING APPARATUS - The present invention provides a technique for maintaining a function for effectively blocking common mode noise with a simple configuration, even in the case where unbalance occurs in characteristic impedance of a coaxial cable in an MRI apparatus, and improving the performance of an RF coil. In a circuit where a balun is established by parallel connection with the coaxial cable, multiple serial resonance circuits having different resonance frequencies are connected in parallel. A value of each constitutional element of each of the serial resonance circuits is adjusted in such a manner that the frequency for blocking the common mode noise of the entire balun falls into a range between the resonance frequencies of these serial resonance circuits. | 2011-11-03 |
20110267063 | LOCATING ARRANGEMENT AND METHOD USING BORING TOOL AND CABLE LOCATING SIGNALS - An arrangement and an associated method are described in which a boring tool is moved through the ground within a given region along a path in which region a cable is buried. The boring tool and the cable transmit a boring tool locating signal and a cable locating signal, respectively. Intensities of the boring tool locating signal and the cable locating signal are measured along with a pitch orientation of the boring tool. Using the measured intensities and established pitch orientation, a positional relationship is determined to relative scale including at least the boring tool and the cable in the region. The positional relationship is displayed to scale in one view. The positional relationship may be determined and displayed including the forward locate point in scaled relation to the boring tool and the cable. Cable depth determination techniques are described including a two-point ground depth determination method. | 2011-11-03 |
20110267064 | MULTI-FREQUENCY BORING TOOL LOCATING SYSTEM AND METHOD - Arrangements, apparatus and associated methods are described for use in a multi-frequency boring tool locating system. The boring tool includes a transmitter for transmitting a locating signal at two or more selectable frequencies. One set of above ground procedures may be applied to the transmitter in order to change the frequency of the boring tool transmitter. Another set of procedures is applicable for changing the frequency during below ground drilling operations, for example, by subjecting the boring tool to a predetermined roll orientation sequence. An enhanced portable locator operates in a manual or automatic mode to receive locating frequency information transmitted from the boring tool transmitter including frequency updates. Boring tool transmitter, as well as above ground locator shutdown/restart procedures are described relating to multi-frequency operation. A tone detector is described which implements one or more digital match filters. | 2011-11-03 |
20110267065 | PACKER FLUID AND SYSTEM AND METHOD FOR REMOTE SENSING - A system, method and device for interrogating a downhole environment in a borehole beneath a surface includes a source of electromagnetic energy operable to transmit an electromagnetic signal in the borehole, a sensor module, including a passive resonating circuit including a crystal oscillator having a resonant frequency that varies with changes in the condition in the downhole environment in response to a condition in the downhole environment in the borehole and a detector positionable to receive the reflected modulated electromagnetic signal. In an embodiment, a solids-free dielectric medium is provided within an annular volume in the borehole defined by the casing through which the electromagnetic signal is transmitted. | 2011-11-03 |
20110267066 | METHOD AND APPARATUS FOR GRADIENT ELECTROMAGNETIC INDUCTION WELL LOGGING - The method and apparatus for determining the conductivity of anisotropic formations surrounding a borehole. The method comprises measuring the gradient of the magnetic field by an electromagnet logging tool in a borehole in the subsurface formation. The instrument comprises one or several closely positioned parallel receiver coils and one or several closely positioned parallel transmitter coils with the magnetic direction of the transmitter coils parallel or different from the magnetic moment direction of the receiver coils. In an embodiment, a gradient induction instrument consists of a tri-axial transmitter array and up to 27 pairs of receiver coils, measuring some or all magnetic gradient components. | 2011-11-03 |
20110267067 | ELECTRONIC BATTERY TESTER - An electronic battery tester for testing a storage battery including electrical connectors configured to couple to the storage battery. Measurement circuitry is coupled to the electrical connectors and a display is configured to display information to an operator. A manual input is configured to receive an input from a user. A microprocessor is coupled to the measurement circuitry and is configured to perform a battery test on the storage battery as a function of a battery parameter measured with the measurement circuitry. The microprocessor is configured to display characters and receive a character select input from the manual input which identifies one character of a plurality of characters displayed on the display. In another aspect, a forcing function is coupled to the battery and has first and second selectable frequencies. The microprocessor is configured to select between the first frequency and the second frequency. | 2011-11-03 |
20110267068 | ENERGY STORAGE LEVEL INDICATION CIRCUIT - An energy storage level indication circuit includes an energy storage device and a radio control module operable to transmit a wireless heartbeat signal at a rate indicating an amount of energy stored in the energy storage device. | 2011-11-03 |
20110267069 | METHOD FOR DETERMINING BATTERY CAPACITY - An electrical device is powered by a battery. The device includes transition phase determining circuitry operatively connected to the battery to determine that the battery has entered a transition phase based on the occurrence of a change in direction of current flowing through the battery. Battery capacity determining circuitry is operatively connected to the transition phase determining circuitry and configured to determine, in response the transition phase determining circuitry determining that the battery is in the transition phase, a capacity of the battery based on a transition phase battery capacity model of capacity-vs.-voltage. The transition phase determining circuitry is further configured to determine an end of the transition phase based on the transition phase battery capacity model and a non-transition battery capacity model of capacity-vs.-voltage yielding the same capacity value for a given measured voltage of the battery. | 2011-11-03 |
20110267070 | Ground Fault Detection For An Electrical Subsea Control System - A ground fault detection circuit for detecting ground faults in electrical subsea conductor lines including a first electrical conductor line, a second electrical conductor line, a first ground fault detection line, and a second ground fault detection line. The ground fault detection circuit further includes a first resistor operatively connected to a voltage source and the first ground fault detection line, a second resistor operatively connected to the voltage source and the second ground fault detection line, and a voltage detection device configured to detect the voltage at an output end of the first resistor to determine the presence of a ground fault in at least one of the first and second conductor lines. | 2011-11-03 |
20110267071 | HYBRID SELF-TEST CIRCUIT STRUCTURE - A hybrid self-test circuit structure comprises a plurality of input terminals and a plurality of output terminals for testing a plurality of memory units. The circuit structure comprises a first level functional unit for driving a plurality of first output terminals electrically coupled to the first level functional unit to output an output signal according to an external control signal transmitted from the outside; a plurality of second level functional units for receiving the output signal and generating a test signal according to the output signal and outputting the test signal to the memory units; a parallel interface parallelly installed between the first level functional unit and at least one of the second level functional units; and a serial interface serially installed between the first level functional unit and at least one of the second level functional units. | 2011-11-03 |
20110267072 | DETECTOR OF TRANSFORMER INTERTURN SHORT CIRCUIT USING VOLTAGE DIFFERENTIAL - An improved internturn short circuit detection device of transformer via differential voltage comprises a single-phase transformer (TM). The single-phase transformer (TM) comprises a high-voltage coil (K) and a low-voltage coil (N). A voltage transformer (PT) is positioned at the high voltage side of the single-phase transformer (TM). Two branches of a tap (K | 2011-11-03 |
20110267073 | VALIDATING HIGH SPEED LINK PERFORMANCE MARGIN FOR SWITCH FABRIC WITH ANY-TO-ANY CONNECTION ACROSS A MIDPLANE - A system for testing link performance margin in a network device includes one or more daughter cards having a driver to transmit a signal and a receiver to receive the signal, and a midplane including a channel to transmit the signal from the driver to the receiver. The system includes multiple connector assemblies to connect the one or more daughter cards to the midplane, where each of the multiple connector assemblies includes a different known crosstalk margin value. A bit error rate tester is connected to a link between the driver and the receiver, and the multiple connector assemblies are interchangeably included in the link to approximate different signal-to-noise ratio margins for the tested link. | 2011-11-03 |
20110267074 | METHOD OF MEASURING A MULTIPHASE FLOW - A method of measuring the permittivity and/or conductivity of a multiphase fluid flowing through a conduit is provided. The method includes the steps of measuring the signal from a first electromagnetic transmitter to a first electromagnetic receiver separated by a first distance, measuring the signal from the first electromagnetic transmitter to a second electromagnetic receiver separated by a second distance, measuring the signal from a second electromagnetic transmitter to the first electromagnetic receiver separated by a distance substantially equal to the second distance, measuring the signal from the second electromagnetic transmitter to the second electromagnetic receiver separated by a distance substantially equal to the first distance, and wherein the first and second distances are substantially different. This is followed by the step of combining the four signals to obtain a measurement of the phase-shift and amplitude-attenuation substantially independent of the gain values applied to the receivers and transmitters to provide an estimate of the mixture permittivity and/or conductivity of the multiphase fluid. | 2011-11-03 |
20110267075 | METHOD OF MEASURING SPECIFIC ABSORPTION RATE OF ELECTROMAGNETIC WAVES - Disclosed is an SAR measurement method that is capable of securing sufficient power within a short period of time and always maintaining the intensity of measurement signals irrespective of the measurement frequency. With the SAR measurement method, a plurality of measurement modules each with a control unit for processing location information and SAR measurement values, a memory unit for storing data, an antenna for making signal transception with the external, and a storage battery charged by way of inductive power are prepared. Thereafter, the plurality of measurement modules are arranged and installed within a phantom formed with a homogeneous material that conforms to the electrical characteristics of human body tissue. An electronic product to be measured in SAR is mounted at a predetermined location of the phantom with a predetermined posture. A high frequency of several hundred megahertz (MHz) to several hundred gigahertz (GHz) is scanned toward the phantom. The electronic product is operated with a predetermined pattern during a predetermined period of time. A measurement controller receives the data stored at the respective measurement modules to download and process the data, thereby verifying the SAR of the electronic product. | 2011-11-03 |
20110267076 | Method for energy-saving operation of a magneto-inductive flow measuring device - A method for operating a magneto-inductive flow measuring device having a measuring tube, wherein an at least partially electrically-conductive measured material flows through the measuring tube. For determining flow, there is produced by means of at least one coil arrangement a clocked magnetic field, which at least partially passes through the measured material, wherein the magnetic field is produced by an exciter current, which flows through the coil arrangement. The magnetic field is operated with at least a first clocking, wherein, in a case in which the coil arrangement is free of exciter current, an electrical potential difference is sensed between the measured material and a reference potential by means of at least a first measuring electrode communicating with the measured material. The potential difference is compared with a predetermined reference value, and, in the case of a deviation of the potential difference from the reference value which lies within a predetermined threshold value, the magnetic field for determining flow is operated with at least a second clocking, reduced compared to the first clocking. | 2011-11-03 |
20110267077 | METHOD OF SENSOR CELL TIMING - A method for measuring values from a sensor cell having the basic structure of an MOS silicone transistor having and including a polymer material therein. The method includes the steps of expelling an analyte from the polymer material, determining a silicon current signature before analyte accumulation in a sensitive response region, introducing analyte into the polymer material, determining the silicon current signature immediately after analyte introduction, determining the organic current signature immediately after analyte introduction, allowing analyte accumulation in the polymer material, determining the silicon current signature after analyte accumulation, determining the organic current signature after analyte accumulation, and determining the silicon current signature after analyte accumulation in sensitive response region. | 2011-11-03 |
20110267078 | Current Sensor Capacity Measuring System - A capacitance measuring circuit comprising an oscillator circuit, where a sensor capacitance forms a link of a plurality of series connected impedances and where a square wave voltage is impressed on the series connected impedances from a separate high speed, a low impedance source and the measurement of the charging current, into the series connected impedances, is performed by a separate high accuracy current sensing device, connected in series between the low impedance square wave source and the plurality of the series connected impedances. | 2011-11-03 |
20110267079 | CAPACITANCE SENSING CIRCUIT AND METHOD OF CAPACITANCE SENSING - A capacitance sensing circuit comprises a capacitive device having a capacitance, the device initially being at a first voltage level. The capacitance sensing circuit is capable of applying one or more pull-up currents to the device during one or more corresponding pull-up periods of time, for changing the first voltage level into one or more corresponding pull-up voltage levels; applying a measurement current to the device; and measuring a measurement period of time, during which one of the pull-up voltage levels changes into a second voltage level. A method of sensing a capacitance of a capacitive device comprises applying a first voltage to the device; applying one or more pull-up currents during corresponding pull-up times, for changing the first voltage into corresponding pull-up voltages; applying a measurement current; and measuring a time, during which one pull-up voltage changes into a second voltage. | 2011-11-03 |
20110267080 | Remote Oil Monitoring System - The remote monitoring of oil samples is disclosed. Monitoring may be achieved through the use of a computer, phone, mobile device, or any other networked computing device in contact with a sensing element at the remote location. Such remote monitoring may be beneficial when equipment such as pumps, generators, engines, compressors, and transformers are located in remote locations that are not always easily accessible to maintenance personnel. Contact may be achieved using any number of wireless transmission techniques. | 2011-11-03 |
20110267081 | METHOD AND SYSTEM TO VERIFY THE RELIABILITY OF ELECTRONIC DEVICES - To verify robustness with respect to electrical overstresses of an electronic circuit under test, the latter is exposed to electrical overstresses, and the behavior thereof is monitored. In particular, both the testing of the electronic circuit in dynamic conditions is performed by causing it to be traversed by the currents that characterize operation thereof, and by exposing at least one supply line of the electronic circuit under test to electrical overstresses and the testing of the electronic circuit under test in static conditions, without causing it to be traversed by the currents that characterize operation thereof, and by exposing to electrical overstresses both the supply and the input and/or output lines of the electronic circuit under test. The device for generating the overstresses can be mounted on a circuit board, which can be coupled as daughter board to a mother board, on which the electronic circuit under test is mounted. | 2011-11-03 |
20110267082 | Methodologies and Test Configurations for Testing Thermal Interface Materials - Methodologies and test configurations are provided for testing thermal interface materials and, in particular, methodologies and test configurations are provided for testing thermal interface materials used for testing integrated circuits. A test methodology includes applying a thermal interface material on a device under test. The test methodology further includes monitoring the device under test with a plurality of temperature sensors. The test methodology further includes determining whether any of the plurality of temperature sensors increases above a steady state. | 2011-11-03 |
20110267083 | METHOD FOR MEASURING TRANSISTOR - An object is to provide a measuring method with high reproducibility in a bias-temperature stress test of a transistor in which an oxide semiconductor is used for a semiconductor layer. Provided is a measuring method of a transistor, which includes the steps of disposing a transistor in which an oxide semiconductor is used for a semiconductor layer in a measurement room having a light-blocking property, introducing dry air, nitrogen, or argon into the measurement room, and applying a predetermined voltage to a gate electrode of the transistor in the measurement room kept under an atmosphere where the dew point is greater than or equal to −110° C. and less than or equal to −60° C., whereby the amount of change in threshold voltage over time is measured. | 2011-11-03 |
20110267084 | THERMAL INTERFACE MATERIAL, TEST STRUCTURE AND METHOD OF USE - Non-corrosive thermal interface materials for use in a test structure and method of use. The test structure includes a heat sink for dissipating heat away from a device under test. The test structure further includes a non-corrosive thermal interface material disposed between the heat sink and the device under test. The non-corrosive thermal interface material is capable of withstanding test conditions for at least 60 minutes for at least 115° C. without staining or leaving residue on the device under test after baking. | 2011-11-03 |
20110267085 | METHOD AND APPARATUS FOR TESTING DEVICES USING SERIALLY CONTROLLED INTELLIGENT SWITCHES - Methods and apparatus for testing devices using serially controlled intelligent switches have been described. In some embodiments, a probe card assembly can be provided that includes a plurality of integrated circuits (ICs) serially coupled to form a chain, the chain coupled to at least one serial control line, the plurality of ICs including switches coupled to test probes, each of the switches being programmable responsive to a control signal on the at least one serial control line. | 2011-11-03 |
20110267086 | TEST CIRCUIT OF AN INTEGRATED CIRCUIT ON A WAFER - A test circuit is described of a circuit integrated on wafer of the type comprising at least one antenna of the embedded type comprising at least one test antenna associated with said at least one embedded antenna that realizes its connection of the wireless loopback type creating a wireless channel for said at least one embedded antenna and allows its electric test, transforming an electromagnetic signal of communication between said at least one embedded antenna and said at least one test antenna into an electric signal that can be read by a test apparatus. | 2011-11-03 |
20110267087 | APPARATUS AND METHOD FOR WAFER LEVEL CLASSIFICATION OF LIGHT EMITTING DEVICE - The present disclosure provides a semiconductor test system. The semiconductor test system includes a wafer stage to hold a wafer having a plurality of light emitting devices (LEDs); a probe test card operable to test each test field of the wafer; and a light detector integrated with the probe test card to collect light from a LED of the wafer. | 2011-11-03 |
20110267088 | CONTACTLESS LOOP PROBE - The invention relates to a contactless loop probe for the contactless decoupling of an HF signal for a contactless measuring system, comprising at least one coupling structure ( | 2011-11-03 |
20110267089 | TESTING BOARD - The testing board is used to carry electrical device for electric testing. The testing board is constructed by a main testing board and a supporting board assembled on the lower surface of the main testing board. The main testing board and the supporting board respectively have a first thickness and a second thickness. The sum of the first thickness and the second thickness is matching the required distance of a testing apparatus. | 2011-11-03 |
20110267090 | METHOD OF TESTING SOLAR CELLS - A method of measuring the efficiency with which a solar cell converts incident photons into charge carriers, including the following steps: (a) illuminating the solar cell with a broadband light source; (b) illuminating the solar cell with the broadband light source of which the intensity of a selected range of wavelengths has been reduced; (c) determining the change in the number of photons incident on the cell and the change in the number of charge carriers produced by the cell between steps (a) and (b); and (d) using the changes determined in step (c) to calculate the said efficiency measure. | 2011-11-03 |
20110267091 | SEMICONDUCTOR DEVICE AND METHOD FOR OPERATING THE SAME - A semiconductor device includes an internal operation signal generation circuit configured to generate an internal operation signal in response to a signal applied through a reset signal input pad during a test period. | 2011-11-03 |
20110267092 | APPARATUS AND METHODS FOR THROUGH SUBSTRATE VIA TEST - A stack of vertically-connected, horizontally-oriented integrated circuits (ICs) may have electrical connections from the front side of one IC to the back side of another IC. Electrical signals may be transferred from the back side of one IC to the front side of the same IC by means of through substrate vias (TSVs), which may include through silicon vias. Electronic apparatus, systems, and methods may operate to test and/or replace defective TSVs. Additional apparatus, systems and methods are disclosed. | 2011-11-03 |
20110267093 | TESTABLE INTEGRATED CIRCUIT, SYSTEM IN PACKAGE AND TEST INSTRUCTION SET - An integrated circuit die includes a plurality of interconnects including a first test data input, a second test data input and a test dat | 2011-11-03 |
20110267094 | CIRCUIT AND METHOD FOR DETECTING A FAULT ATTACK - A device for detecting a fault attack, including: a circuit for detecting an interruption of a power supply; a circuit for comparing the duration of said interruption with a first threshold; and a counter of the number of successive interruptions of the power supply having a duration which does not exceed the first threshold. | 2011-11-03 |
20110267095 | Apparatus and Method for Licensing Programmable Hardware Sub-Designs Using a Host-Identifier - Methods and apparatuses for enforcing terms of a licensing agreement between a plurality of parties involved in a particular hardware design through the use of hardware technologies. According to one embodiment, a hardware sub-design includes a license verification sub-design that is protected from user modification by encryption. In one embodiment, a license is generated based on a trusted host identifier within an external hardware device. In one embodiment, each trusted host identifier is unique, and no two integrated circuits share the same trusted host identifier. In another embodiment, the integrated circuit is a field programmable gate array or an application specific integrated circuit. In one embodiment, a license determines how long the hardware sub-design will operate when the hardware sub-design is implemented within an integrated circuit having a trusted host identifier. | 2011-11-03 |
20110267096 | CRITICAL-PATH CIRCUIT FOR PERFORMANCE MONITORING - An integrated circuit having a monitor circuit for monitoring timing in a critical path having a target timing margin is disclosed. The monitor circuit has two shift registers, one of which includes a delay element that applies a delay value to a received signal. The inputs to the two shift registers form a signal input node capable of receiving an input signal. The monitor circuit also has a logic gate having an output and at least two inputs, each input connected to a corresponding one of the outputs of the two shift registers. The output of the logic gate indicates whether the target timing margin is satisfied or not satisfied. | 2011-11-03 |
20110267097 | SEMICONDUCTOR DEVICE INCLUDING SWITCH FOR COUPLING POWER LINE - A semiconductor device whose operational state is switched between a test state and a normal operational state according to a logical value of a signal input from the outside is provided. The semiconductor device includes a first power line, a second power line, a switch that is controlled by a signal line to couple/isolate the first power line to/from the second power line, a control circuit that outputs a control signal, and a state switching circuit that drives the signal line to couple/isolate the first power line to/from the second power line according to a logical value of the control signal when the input signal is one of logical values, whereas the state switching circuit drives the signal line to couple the first power line to the second power line when the first signal is the other logical value. | 2011-11-03 |
20110267098 | SEMICONDUCTOR DEVICE, MEMORY SYSTEM, AND METHOD FOR CONTROLLING TERMINATION OF THE SAME - A semiconductor device includes a plurality of first input units configured to receive a command, a second input unit configured to receive a termination command, a termination control unit configured to be enabled by the termination command and decode the command to control a termination operation, and a termination unit configured to be controlled by the termination control unit and terminate an interface pad. | 2011-11-03 |
20110267099 | Semiconductor device generating complementary output signals - To include a first inverter that receives an input signal to output an inverted signal, a second inverter that receives the inverted signal to output a first internal signal, and a third inverter that receives the input signal and outputs a second internal signal by using the inverted signal as a power supply. According to the present invention, because a signal on one signal path is used as a power supply of an inverter included in the other signal path, phases of a pair of output signals based on the input signal can be exactly matched without adding a capacitor or a resistor for adjustment. | 2011-11-03 |
20110267100 | OUTPUT BUFFER CIRCUIT AND INTEGRATED CIRCUIT INCLUDING SAME - An output buffer circuit includes a control unit and an output driver. The control unit generates a control signal in response to a mode signal applied from an internal circuit. The output driver selectively performs a driver operation, a termination operation or an electrostatic discharge (ESD) protection operation in response to the control signal. | 2011-11-03 |
20110267101 | CONTROLLING DYNAMIC SELECTION OF ON-DIE TERMINATION - A control component outputs to an integrated circuit device an indication to apply one of a plurality of controllable termination impedance configurations at a data input of the integrated circuit device. The indication causes the integrated circuit device to apply a first of the controllable termination impedance configurations at the data input during a first internal state of the integrated circuit device corresponding to the reception of write data on the data input, and causes the integrated circuit device to apply a second of the controllable termination impedance configurations at the data input during a second internal state of the integrated circuit device that follows the first internal state. | 2011-11-03 |
20110267102 | NON-SEQUENTIALLY CONFIGURABLE IC - Some embodiments of the invention provide a configurable integrated circuit (IC). The IC includes at least fifty configurable circuits arranged in an array having a plurality of rows and a plurality of columns. Each configurable circuit for configurably performing a set of operations. At least a first configurable circuit reconfigures at a first reconfiguration rate. The first configurable circuit performs a different operation each time the first configurable circuit is reconfigured. The reconfiguration of the first configurable circuit does not follow any sequential progression through the set of operations of the first configurable circuit. | 2011-11-03 |
20110267103 | METHOD AND APPARATUS FOR SAVING POWER IN AN INTEGRATED CIRCUIT - Some embodiments provide an integrated circuit (‘IC’) that includes at least first and second circuits operating at a first voltage. The IC includes, between the first and second circuits, a direct connection comprising a third circuit for transmitting a signal from the first circuit to the second circuit at a second voltage that is lower than the first voltage. At least one of the first and second circuits is a configurable circuit for configurably performing operations. | 2011-11-03 |
20110267104 | ENHANCED PERMUTABLE SWITCHING NETWORK WITH MULTICASTING SIGNALS FOR INTERCONNECTION FABRIC - An integrated circuit having an L-level permutable switching network (L-PSN) comprising L levels of intermediate conductors and (L+2) levels of conductors for L at least equal to one. At least an (i−1)-th level of conductors of the L-PSN comprising L | 2011-11-03 |
20110267105 | PARITY UNIT USING 3-INPUT NANDs - Disclosed herein is a logic circuit which responds to three signals to detect whether the number of signals taking one of logic-1 and logic-0 is odd or even, and includes five NAND gates. The first NAND gate is supplied with the first signal, the second signal and the third signal; the second NAND gate is supplied with the inverted first signal, the inverted second signal and the third signal; the third NAND gate is supplied with the first signal, the inverted second signal and the inverted third signal; and the fourth NAND gate is supplied with the inverted first signal, the second signal and the inverted third signal. The fifth NAND gate is supplied with outputs of first, second, third and fourth NAND gates and produces the output signal whose logic level is dependent on whether the number of the input signals taking one of logic-1 and logic-0 is odd or even. | 2011-11-03 |
20110267106 | LOW-POWER ROUTING MULTIPLEXERS - Low-power routing multiplexers that reduce static and dynamic power consumption are provided. A variety of different techniques are used to reduce power consumption of the routing multiplexers without significantly increasing their size. For example, power consumption of the routing multiplexers may be reduced by reducing short-circuit currents, reducing leakage currents, limiting voltage swing, and recycling charge within the multiplexer. Multiple power reduction techniques may be combined into a single routing multiplexer design. Low-power routing multiplexers may also be designed to operate in selectable modes, such as, a high-speed, high-power mode and a low-speed, low-power mode. | 2011-11-03 |
20110267107 | CIRCUIT FOR REDUCING NEGATIVE BIAS TEMPERATURE INSTABILITY - A circuit includes an operational PMOS transistor of a logic gate driver. A control circuit is configured to turn off the operational PMOS transistor during a standby mode. The circuit also includes a sacrificial PMOS transistor coupled to an output node. The operational PMOS transistor is coupled to the output node. The sacrificial PMOS transistor is configured to keep the output node at a logical 1 during the standby mode. | 2011-11-03 |
20110267108 | SEMICONDUCTOR INTEGRATED CIRCUIT - A first counter detects a rising edge of a clock signal, and generates a first signal having a multiplied cycle of the clock signal. A second counter detects a falling edge of the clock signal, and generates a second signal having a multiplied cycle of the clock signal. A first line transfers the first signal, while a second line transfers the second signal. A phase comparator is connected to the first line and the second line to generate a third signal based on a phase difference between the first signal and the second signal and output the third signal to one of the circuit units. A plurality of the phase comparators are connected to the first line and the second line, and are disposed between one of the ends of the first line and the second line and one of the circuit units. | 2011-11-03 |
20110267109 | PULSE WIDTH FILTER - The present invention relates a pulse width filter generating a modulation signal that is increased in synchronization with one of an increasing edge and a decreasing edge of the input signal and is decreased in synchronization with the other of the increasing edge and the decreasing edge, and transmitting the input signal of the modulation signal. The input signal passed through the filter unit is inverted thereby being an output signal. The pulse width filter controls the increasing and the decreasing of the modulation signal according to the output signal and the input signal passed through the filter unit, and the modulation signal is a signal to determined whether the pulse width of the input signal is more than the predetermined cut-off pulse width. | 2011-11-03 |
20110267110 | Symmetrical Electrical Physical Layer Activity Detector - A low-current differential signal activity detector circuit may be configured to reject large common mode signals on differential input lines, while still detecting smaller differential signals applied to the same set of differential input lines. The detector circuit may comprise a translinear buffer that is driven at the buffer input and at the buffer output by the differential input signals. The differential signal thereby driving the inputs of the detector circuit may be half-wave rectified through the buffer output devices and may be filtered to provide the detected output. When applying a common mode signal, the buffer's input and output may track each other, and no current may be rectified in the output devices, thus providing common-mode signal rejection. The detector circuit may also be configured with two buffers having their outputs coupled to a common node, each buffer input driven by a respective one of the differential input signals. The differential signal thereby driving the inputs of the detector circuit may be fully rectified through the output devices of the two buffers, and may be filtered to provide the detected output. The two buffers may be configured in a symmetrical structure that allows for the rejection of common-mode signals when the outputs of the buffers are coupled to a common node. | 2011-11-03 |
20110267111 | WIDE DYNAMIC RANGE, WIDE BANDWIDTH, VOLTAGE TO CURRENT CONVERTER - A voltage to current converter comprising a composite amplifier arrangement having a common-base transistor for providing voltage to current conversion, the input current to common-base transistor is corrected to account for the temperature drift of the transistor and variations in the bias supply voltage. | 2011-11-03 |
20110267112 | OUTPUT DRIVER AND SEMICONDUCTOR APPARATUS HAVING THE SAME - An output driver includes: a pull-up signal generation unit configured to control a pulse width of first data and output a pull-up pre-drive signal; a pull-down signal generation unit configured to control a pulse width of second data and output a pull-down pre-drive signal; a pull-up pre-driver unit configured to receive the pull-up pre-drive signal and generate a pull-up main drive signal; a pull-down pre-driver unit configured to receive the pull-down pre-drive signal and generate a pull-down main drive signal; a pull-up main driver unit configured to charge an output node according to the pull-up main drive signal; and a pull-down main driver unit configured to discharge the output node according to the pull-down main drive signal. | 2011-11-03 |
20110267113 | FREQUENCY MULTIPLIER - A multiplier circuit, including: a transistor with gate, source and drain connections adapted to accept an input signal by the transistor gate; a reference voltage source providing a DC reference voltage to the transistor drain; an inductor connected between the drain and the reference voltage source; a resistor connected in parallel to the inductor between the transistor drain and the reference voltage source; a current source providing a DC current to the transistor source; two capacitors forming a voltage divider, with the first capacitor connecting between the gate and the source and the second capacitor connecting between the source and the ground in parallel to the current source; and wherein the multiplier circuit is adapted to accept an input signal and provide as output an amplified current signal with a frequency that is double that of the input signal. | 2011-11-03 |
20110267114 | SEMICONDUCTOR DEVICE, METHOD FOR OPERATING THE SAME, AND MEMORY SYSTEM INCLUDING THE SAME - A semiconductor device includes a clock supply circuit configured to generate an internal clock by using an external clock, an internal circuit configured to operate in synchronization with the internal clock and enter a power-down mode in response to a power-down signal, and a controller configured to control an entry of the clock supply circuit into the power-down mode in response to a locking signal, which represents that the clock supply circuit has been locked, and the power-down signal. | 2011-11-03 |
20110267115 | POWER-ON RESET CIRCUIT WITH SUPPRESSED CURRENT - A power-on reset circuit includes a first monitor circuit that monitors a power supply voltage, an output circuit that outputs a reset release signal upon detection, by the first monitor circuit, of the power supply voltage exceeding a first predetermined value, and a control circuit having lower current consumption than the first monitor circuit, wherein the control circuit includes a second monitor circuit that monitors the power supply voltage, a suppression circuit that suppresses current flowing through the first monitor circuit upon detection, by the second monitor circuit, of the power supply voltage exceeding a second predetermined value higher than the first predetermined value, and an output fixing circuit that fixes the output of the output circuit to a predetermined potential upon detection, by the second monitor circuit, of the power supply voltage exceeding the second predetermined value. | 2011-11-03 |
20110267116 | METHOD AND CIRCUIT FOR DISPLAYPORT VIDEO CLOCK RECOVERY - A method and a circuit are described for recovery of video clocks for a DisplayPort receiver. The disclosure includes two clock dividers, a direct digital synthesis (DDS), a fixed multiplier Phase-Locked Loop (PLL) on a DisplayPort video system. A DisplayPort receiver link clock is divided to a lower frequency as the input of the DDS which can lower the performance requirement on a DDS circuit. The output from a time stamp value indirectly controls a direct digital synthesis device, which then drives a PLL to generate the recovery clock signal. The technique is suitable for implementation on an integrated circuit and Field Programmable Gate array system. | 2011-11-03 |
20110267117 | DATA INPUT/OUTPUT APPARATUS AND METHOD FOR SEMICONDUCTOR SYSTEM - A semiconductor memory device includes: a strobe signal reception unit configured to receive a strobe signal and generate a tracking clock signal; a clock reception unit configured to receive a clock signal and generate an internal clock signal; a plurality of data reception units configured to receive parallel data in accordance with the internal clock signal and generate internal data; and a phase control unit configured to control the phase of the internal clock signal to track the tracking clock signal and to compensate for a variation in the phase of the internal clock signal while the data is received. | 2011-11-03 |
20110267118 | DELAY LOCKED LOOP OF SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD FOR DRIVING THE SAME - A delay locked loop (DLL) of a semiconductor integrated circuit includes a first delay line configured to variably delay a source clock signal and output a locked clock signal, a phase comparator configured to compare the phase of the source clock signal with the phase of a feedback clock signal, a second delay line configured to variably delay the locked clock signal, a first delay controller configured to control the first delay time of the first delay line, a second delay controller configured to control the minimum delay time of the second delay line, and an operation mode controller configured to control the first and second delay controllers in response to an output signal of the phase comparator, and switch operation modes of the first and second delay controllers depending on locking state of the delay lines. | 2011-11-03 |
20110267119 | Wideband analog phase shifter - A phase shifter includes a low-pass filter, a high-pass filter, and an all-pass filter coupled in series between an RF input terminal and an RF output terminal of the phase shifter, at least one of the filters being tunable, controlling the phase of an input signal over a wide range of frequencies. | 2011-11-03 |
20110267120 | DELAY LINE CALIBRATION - In some embodiments, provided are calibration techniques for measuring mismatches between TDL delay stage elements, and in some cases, then compensating for the mismatches to minimize performance degradation. | 2011-11-03 |
20110267121 | APPARATUS AND METHOD FOR ALTERING THE PROPERTIES OF MATERIALS BY PROCESSING THROUGH THE APPLICATION OF A MAGNETIC FIELD - A system and method for altering the properties of a material by exposure of the material to a magnetic field is described herein. The method comprises generating a magnetic field; exposing a material to the magnetic field, and determining the optimum settings of the magnetic field parameters for the particular material. The magnetic field may be time varying or time invariant. Various properties of the magnetic field can be altered to determine the optimum settings for altering the material properties, including the amplitude, frequency, and waveform. In one embodiment, a method for improving the conductivity of a transmission line is provided, comprising: providing a high voltage electrical transmission line; temporarily installing a magnetic field generator along at least a portion of the transmission line; and generating a pulsed magnetic field around at least a portion of the transmission line using the magnetic field generator and simultaneously running a current through the transmission line. | 2011-11-03 |
20110267122 | ALL-DIGITAL CLOCK DATA RECOVERY DEVICE AND TRANSCEIVER IMPLEMENTED THEREOF - The present invention relates to an all-digital clock data recovery (CDR) which is implemented by a digital filter and a digitally controlled oscillator. The CDR of the present invention comprises a phase detector producing a digital sequence of data and a digital sequence of edge by sampling the serial data stream with a clock, a de-serializer transforming the digital sequences of data and edge into n-bit bus, a digitally controlled oscillator (DCO) implemented by a multi-stage chain of inverters having a variable resistance switching matrix wherein the resistance of each element of the variable resistance switching matrix is varied in such a way that the supply current being fed to each inverter is controlled in pursuant to a digital control code, and thereby producing a clock whose oscillation frequency is updated and fed to the phase detector, a digital synthesis control logic circuit generating a thermometer-code-type digital control code out of the n-bit data and n-bit edge from the de-serializer wherein the thermometer-code-type digital control code is fed to the DCO, and a 2-bit direct forward path directly controlling the frequency of the clock being produced by the DCO with an operating speed which is faster than the digital synthesis control logic circuit by n times. | 2011-11-03 |
20110267123 | CLOCK DUTY CORRECTION CIRCUIT - A clock duty correction circuit includes a first current sourcing unit that sources a current to a current path in response to a clock signal, a first current sinking unit that sinks the current of the current path in response to the clock signal, a second current sourcing unit that sources a current to the current path in response to a delay clock signal obtained by delaying the clock signal by a predetermined time, a second current sinking unit that sinks the current of the current path in response to the delay clock signal, a current adjustment unit that adjusts an amount of the current flowing through the current path according to a voltage level of a control voltage, and a clock output unit that outputs an output clock signal having a voltage level corresponding to the amount of the current flowing through the current adjustment unit. | 2011-11-03 |
20110267124 | CLOCK SIGNAL DUTY CORRECTION CIRCUIT - A clock signal duty correction circuit includes: a first transition timing control unit configured to generate a first control signal for controlling a rising timing of a duty correction clock signal by using a clock signal; a second transition timing control unit configured to generate a second control signal for varying a falling timing of the duty correction clock signal by using the clock signal according to a code signal; and a differential buffer unit configured to generate the duty correction clock signal, whose rising time or falling time is adjusted, in response to the first control signal and the second control signal. | 2011-11-03 |
20110267125 | MULTI-THRESHOLD COMPLEMENTARY METAL-OXIDE SEMICONDUCTOR MASTER SLAVE FLIP-FLOP - A multi-threshold complementary metal-oxide semiconductor technology (MTCMOS technology) master slave flip-flop with a single clock signal includes a master storage element configured to store an input data in response to a clock signal transition and a slave storage element configured to receive data from the master storage element and to output the received data in response to an opposite clock signal transition. The master storage element includes low threshold voltage transistors, the slave storage element includes high threshold voltage transistors, and the master and the slave storage elements are provided with a single clock signal. | 2011-11-03 |
20110267126 | DELAY CIRCUIT OF SEMICONDUCTOR DEVICE - A delay circuit of a semiconductor device increases its delay time as an external voltage increases. The delay circuit can also ensure a desired delay time according to an external voltage, without additional delay circuits. The delay circuit of the semiconductor device includes a first delay unit, and a second delay. The second delay unit has a propagation delay characteristic different from that of the first delay unit with respect to variation of a power supply voltage, wherein the first delay unit is supplied with a first power supply voltage independent of variation of an external voltage, and the second delay unit is supplied with a second power supply voltage dependent on the variation of the external voltage. | 2011-11-03 |
20110267127 | Integrated circuit, communication unit and method for improved amplitude resolution of an RF-DAC - An integrated circuit comprises a digitally-controlled power generation stage (DPA) for converting an input signal to a radio frequency (RF) carrier, the DPA comprising a plurality of selectable switching devices capable of adjusting an envelope of the RF carrier; and a pulse width modulator (PWM) generator arranged to generate a PWM control signal and operably coupleable to the plurality of selectable switching devices of the DPA. The PWM generator inputs the PWM control signal to a subset of the plurality of the selectable switching devices such that a PWM signal adjusts the envelope RF carrier output from the DPA. | 2011-11-03 |
20110267128 | PARAMETER SETTING CIRCUIT AND METHOD FOR INTEGRATED CIRCUITS - A parameter setting circuit and method for an integrated circuit apply a pulse current to a pin of the integrated circuit during a programming mode of the integrated circuit, and then extract the difference between the voltage on the pin and the DC component of the voltage on the pin to determine a setting signal for parameter setting to an internal circuit of the integrated circuit. By this way, an input pin, an output pin or an input/output pin of the integrated circuit may be used as the pin implementing the parameter setting function. | 2011-11-03 |
20110267129 | GENERATING A FULL RAIL SIGNAL - Apparatus, systems, and methods are disclosed, such as those that comprise a center-swing signal generator that includes a push-pull center-swing driver coupled to a common-mode pre-emphasis module, the center-swing signal generator to receive a low swing current mode logic (CML) signal and output a center-swing signal, and a full-swing cross-coupled inverter coupled to the center-swing signal generator, the full-swing cross-coupled inverter to receive the center-swing signal and output a full-rail single-ended swing signal. Additional apparatus, systems, and methods are disclosed. | 2011-11-03 |
20110267130 | DIGITAL FILTER-DECIMATOR-TUNER - A digital filter-decimator-tuner is configured to receive a complex signal input x | 2011-11-03 |
20110267131 | METHOD AND APPARATUS FOR COMPENSATING PERIODIC SIGNAL - An apparatus and a method for compensating periodic signal in an optical disc drive are described. The control apparatus includes an amplitude processing unit, a phase processing unit, a wave generator, a first switch module and a second switch module. The amplitude processing unit processes the amplitude of the input signal based on a reference signal for generating an amplitude signal. The phase processing unit processes the phase of the input signal based on the reference signal for generating a phase signal. The first switch module switches the amplitude signal to select one of the amplitude value and a predetermined amplitude value. The second switch module switches the phase signal to select one of the phase value and a predetermined phase value. The wave generator generates a compensated wave signal based on the selected amplitude value and the selected phase value, and outputs the compensated wave signal. | 2011-11-03 |
20110267132 | BI-DIRECTIONAL CIRCUIT BREAKER - A circuit breaker comprising first and second JFETs, each comprising a gate, drain and source connection, the JFETs sources being operatively connected to each other to form a common-source connection and adapted to be connected to and operating to open an external circuit when the current flowing through the JFETs exceeds a predetermined threshold, the JFETs' gates, and common-source connection being operatively connected to a gate driver circuit which causes the JFETs to turn off when the predetermined threshold is exceeded; whereupon the current flows through the common-source connection into the second gate and into the gate driver circuit which causes the gate driver circuit to turn off the first and second JFETs and open the circuit breaker. Also claimed is a method of sensing an overloaded circuit comprising leading and trailing JFETs in a circuit that open the circuit and prevent current flow when a predetermined threshold is exceeded. | 2011-11-03 |
20110267133 | CURRENT GENERATING CIRCUIT - A current generating circuit including a current mirror, an impedance device, a first voltage generating portion and a second voltage generating portion. The current mirror has a current output leg and a current generating leg. The impedance device is connected to the current generating leg. The first voltage generating portion can generate a first voltage that is complementary to absolute temperature. The second voltage generating portion can generate a second voltage that is proportional to absolute temperature. The first voltage generating portion and the second voltage generating portion are arranged to generate an impedance current across the impedance device. The current output leg is operable to output an output current based on the impedance current. The impedance device has an impedance value, a first terminal and a second terminal. An impedance voltage drop across the first terminal and the second terminal is equal to a product of the impedance value and the impedance current. The first voltage is based on an attenuation of the impedance voltage drop. | 2011-11-03 |
20110267134 | TWO LEAD ELECTRONIC SWITCH SYSTEM ADAPTED TO REPLACE A MECHANICAL SWITCH SYSTEM - A system adapted to replace a mechanical switch with an electronic switch, without the need of additional wiring. The electronic switch includes a bridge array for sensing a characteristic, e.g., temperature or pressure, and an electronic circuit having a switch. As the characteristic of the bridge array varies a switch changes states. | 2011-11-03 |