45th week of 2008 patent applcation highlights part 12 |
Patent application number | Title | Published |
20080272321 | SIDE INLET-TYPED SOLENOID VALVE - A solenoid valve for a slip control system in a vehicle is disclosed. A flow passage is provided in which working fluid such as oil that generates a break hydraulic pressure flows from the side of a solenoid valve through a filter, flows to the front of a plunger through a side hole formed in a valve body of the solenoid valve, and then flows along the side of valve body, that is, is discharged out of an outlet through a side space between valve body and a valve seat. Therefore, linear pressure control is easy because working fluid flows into toward the front of valve plunger through a side inlet of solenoid valve and the entire size is reduced because a special channel for guiding working fluid to the front of the valve plunger is not needed in a pump housing case. | 2008-11-06 |
20080272322 | Proportional Pressure Control Valve Comprising a Pressure Jump in the Characteristic P/I Curve Thereof - An electromagnetic proportional pressure-control valve of a vehicle transmission which includes a magnet part, a hydraulic part and a spring operatively connecting the magnet part to the hydraulic part. The magnet part includes a coil, an armature and an armature bar. The hydraulic part includes first and second closing elements. The first closing element forms a flat seat and the second closing element a ball seat and the closing elements are opened and/or closed via a tappet rod. When no current is applied to the valve, the second closing element is closed and an gap (ü) in the first closing element is larger than one seventh a nominal width (NW) of the valve. The second closure area (A | 2008-11-06 |
20080272323 | Connector to Be Attached to Liquid Tank and Liquid Tank Provided With the Connector - The object is to provide a connector to be attached to a liquid tank, which reduces a trouble of arranging a plug, is advantageous in cost and capable of preventing misconnection, is provided by compactly integrating two types of plugs, which are a liquid delivery plug and a gas feeding plug. The connector is to be attached to a liquid tank for delivery of an internal liquid, and is constructed of: a plug ( | 2008-11-06 |
20080272324 | ELLIPTICAL SEALING SURFACE FOR BUTTERFLY VALVE - A reduced component wear valve is comprised of a valve body having a passage therethrough and a disc attached to a rotatable shaft. The disc is utilized with a seal forming a gap between the disc and the seal proximate to the rotational axis of the disc. When the disc is in the open position, the seal major axis is greater then the disc diameter and they do not touch. As the disc rotates to near closure, the disc perimeter engages the minor axis of the seal (which is smaller than the disc diameter), and the disc stretches the seal in the minor axis direction thus decreasing the major axis such that the gap is closed. The seal can be pre-formed in an elliptical shape or it can be formed into an elliptical shape by a retaining mechanism. The seal may be a single-piece or a multi-piece assembly press-fit into the valve body. Zero or light disc to seal contact during the majority of the valve disc rotation minimizes valve seal wear and rotational friction. | 2008-11-06 |
20080272325 | Lightweight Valve - A lightweight valve ( | 2008-11-06 |
20080272326 | Driving tool and head valve assembly for a driving tool - A driving tool and a head valve assembly for a driving tool. The head valve assembly may include an end cap, a seal bushing received within the end cap, a movable member slidably movable with respect to the seal bushing between a first position and a second position, and a flexible membrane configured to bias the movable member towards the first position. The seal bushing cooperates with the end cap to define a first cavity and a vent path fluidly connected to the first cavity. The vent path is substantially unobstructed when the movable member is in the first position, and the vent path is sealed by a sealing portion of the movable member when the movable member is in the second position. | 2008-11-06 |
20080272327 | Process For Manufacturing a Ptfe Filament, and a Ptfe Filament, and a Ptfe Filament Obtained By This Process - The present invention consists of an inventive process for manufacturing a PTFE filament ( | 2008-11-06 |
20080272328 | RADIATION-OR THERMALLY-CURABLE OXETANE BARRIER SEALANTS - This invention relates to cationically curable sealants that provide low moisture permeability and good adhesive strength after cure. The composition consists essentially of an oxetane compound and a cationic initiator. | 2008-11-06 |
20080272329 | Piezoelectric Ceramic Composition - The present invention provides a piezoelectric ceramic composition, for producing piezoelectric elements exhibiting high piezoelectric strain constant d | 2008-11-06 |
20080272330 | REFRIGERANT COMPOSITIONS - Disclosed is a nonflammable refrigerant composition consisting of pentafluoroethane in an amount from 62% to 67% based on the weight of the composition, a second component that is selected from 1,1,1,2-tetrafluoroethane, 1,1,2,2-tetrafluoroethane, and mixtures thereof in an amount from 26% to 36% by weight; and an ethylenically unsaturated or saturated hydrocarbon compound that is at least 70% isobutane in an amount of from 1% to 4% by weight and up to 5% by weight based on the weight of the composition of another fluorohydrocarbon. The composition optionally may further include at least one additive, lubricant or combination thereof. | 2008-11-06 |
20080272331 | Hybrid nanoparticles - A method and composition for making hybrid nanoparticles and use of such nanoparticles are disclosed herein. In one embodiment of the invention, the hybrid nanoparticles comprise a phase change material (PCM) and a metal layer encapsulating the phase change material. In another embodiment of the invention, the hybrid nanoparticles comprise a phase change material, a polymer layer encapsulating the phase change material, and an outer metal layer encapsulating the polymer layer. In another embodiment of the invention, the hybrid nanoparticles comprise an inner core of a PCM encapsulated by a polymer shell containing embedded nanoparticles that have a high thermal conductivity. | 2008-11-06 |
20080272332 | MICROENCAPSULATED HEAT DELIVERY VEHICLES - Microencapsulated delivery vehicles comprising an active agent are disclosed. In one embodiment, the microencapsulated delivery vehicles are heat delivery vehicles capable of generating heat upon activation. The microencapsulated heat delivery vehicles may be introduced into wet wipes such that, upon activation, the wet wipe solution is warmed resulting in a warm sensation on a user's skin. Any number of other active ingredients, such as cooling agents and biocides, can also be incorporated into a microencapsulated delivery vehicle. | 2008-11-06 |
20080272333 | Hydrogen Getter - A getter composition suitable for gettering hydrogen comprises a first metal oxide and a second metal oxide, said first metal oxide being more readily reducible in hydrogen at temperatures between 0° C. and 100° C. than said second metal oxide. | 2008-11-06 |
20080272334 | COMPOSITIONS FOR LIQUID CRYSTAL DISPLAY - This invention relates to compositions and an assembly process for the manufacture of liquid crystal displays. The assembly process is especially advantageous because it can be easily scalable to roll-to-roll continuous manufacturing of liquid crystal displays. The invention is directed to a photoalignable top-sealing composition for top-sealing a liquid crystal display cell. | 2008-11-06 |
20080272335 | Process for producing pellet or granular forms of polymer additives - A method for the production of a pellet or granular form of a polymer performance additive for the effective delivery of the active ingredient into the rubber or plastic manufacturing process. At least one polymer additive in the composition of 10% to 99% is combined with at least one binding additive in the composition of about 1% to 90%. | 2008-11-06 |
20080272336 | Organic Oxygen Scavenger/Indicator - The invention relates to an oxygen scavenger/indicator which contains at least one substance with combined scavenger and indicator function for oxygen, which can absorb oxygen under the effect of moisture in basic conditions, and also to at least one basically reacting compound. The indicator effect is effected by a change in at least one physical property of the substance with combined scavenger and indicator function for oxygen, the change being triggered by the effect of moisture. | 2008-11-06 |
20080272337 | Chiral Compounds - The invention relates to chiral compounds, methods of their preparation, and to their use in optical, electrooptical, electronic, semiconducting or luminescent components or devices, and in decorative, security, cosmetic or diagnostic applications. | 2008-11-06 |
20080272338 | DYE LOADED ZEOLITE MATERIAL - The present invention provides a dye loaded zeolite material comprising: a) at least one zeolite crystal having straight through uniform channels each having a channel axis parallel to, and a channel width transverse to, a c-axis of crystal unit cells; b) closure molecules having an elongated shape and consisting of a head moiety and a tail moiety, the tail moiety having a longitudinal extension of more than a dimension of the crystal unit cells along the c-axis and the head moiety having a lateral extension that is larger than said channel width and will prevent said head moiety from penetrating into a channel; c) a channel being terminated, in generally plug-like manner, at least at one end thereof located at a surface of the zeolite crystal by a closure molecule hose tail moiety penetrates into said channel and whose head moiety substantially occludes said channel end while projecting over said surface; and d) an essentially linear arrangement of luminescent dye molecules enclosed within a terminated channel adjacent to at least one closure molecule and exhibiting properties related to supramolecular organization. | 2008-11-06 |
20080272339 | NO-STRIP PROCESS FOR PRODUCING BARS COMPRISING ACYL-ISETHIONATE AND FREE FATTY ACID, AND HAVING CONSUMER DESIRABLE PROPERTIES - The present invention relates to process for producing bars comprising 20 to 70% by wt. acyl isethionate and 15% to 35% free fatty acid and which is made by process where excess fatty acids made during production of acyl isethionate is removed by neutralization rather than by “stripping”. The bar retains remarkably desirable consumer properties. | 2008-11-06 |
20080272340 | Method for Producing Syngas with Low Carbon Dioxide Emission - The invention concerns a method for producing syngas by means of a syngas producing unit comprising: at least one syngas producing reactor producing from hydrocarbons: a crude syngas comprising hydrogen, CO and CO | 2008-11-06 |
20080272341 | Corrosion-responsive coating formulations for protection of metal surfaces - Methods and compositions are described for protecting a metal surface against corrosion. The method involves applying to the metal surface a coating formulation that comprises a radiation curable resin and a corrosion-responsive agent that is capable of releasing a corrosion-inhibiting ion in response to exposure to ionic species characteristic of those present on a metal surface undergoing oxidative corrosion; and exposing the coating formulation to radiation whereby the radiation curable resin forms a corrosion-resisting coating having a low spontaneous release rate of the corrosion-responsive agent into the environment. | 2008-11-06 |
20080272342 | Chemical Composition Useful as Corrosion Inhibitor - The present invention relates to a chemical composition comprising (a) a glycoside component A comprising at least one glycoside of the formula R(OG)x wherein R is an aliphatic hydrocarbon radical having 1 to 25 carbon atoms or is a radical of formula R | 2008-11-06 |
20080272343 | Method for preparing functional organic particle - The present invention relates to functional organic particles having functional nanoparticles dispersed in an organic polymeric matrix, wherein the distribution of the functional nanoparticles is increased in the direction toward increasing the particle diameter from the center of the functional organic particles, and to a method for preparing the same. | 2008-11-06 |
20080272344 | Conductive polymer composites - The present invention relates generally to conductive polymer composites, electrically conductive adhesives, and methods of producing the same. The conductive polymer composites and electrically conductive adhesives may be used for electronic component interconnects, flip chip interconnections, electrical connections to circuit boards, jumper connections, or similar uses. The method of forming a conductive polymer composite includes mixing conductive metal flakes, functionalized conductive metal nanoparticles, and a polymer precursor and curing the polymer precursor to form a composite. In one embodiment, the conductive polymer composites may be composed of microparticles of silver flake and sintered silver nanoparticles between the silver flakes. The polymer composites have an electrical conductivity of less than 10 | 2008-11-06 |
20080272345 | Composite Ceramic Hollow Fibres Method for Production and Use Thereof - Composites comprising at least one hollow fibre of oxygen-transporting ceramic material, which is a ceramic material which conducts oxygen anions and electrons or a combination of ceramic material which conducts oxygen anions and a ceramic or nonceramic material which conducts electrons, with the outer surface of the hollow fibre being in contact with the outer surface of the same hollow fibre or another hollow fibre and the contact points being joined by sintering, are described. | 2008-11-06 |
20080272346 | Multi-Photon Absorber Medium and Method of Exposure Using the Same - A multi-photon absorber medium is of a predetermined thickness and contains multi-photon absorber material. The medium causes photo-reaction by multi-photon absorption upon receipt of light projected inward from one side. The reactivity to the light of the medium gradually increases from the one side toward another side. | 2008-11-06 |
20080272347 | Organic Ligands for Semiconductor Nanocrystals - An organic ligand for a semiconductor nanocrystal including a coordinating functional group, a photopolymerizable functional group, and a functional group capable of imparting solubility in an alkaline solution. The photopolymerizable functional group is preferably an ethylenically unsaturated group, and the functional group capable of imparting solubility in an alkaline solution is preferably a carboxyl group. | 2008-11-06 |
20080272348 | Palletised Loads of Containers - A device for use on palletised loads of containers for maintaining tension in vertical strapping comprises a rectangle ( | 2008-11-06 |
20080272349 | Vehicle jack assembly - The present invention is a jack assembly having a first and second upper bracket pivotally connected to a support member and each having at least one strengthening bead and at least one rolled edge. A first lower bracket is pivotally connected to the first upper bracket using a non-threaded trunnion and a bearing through which a threaded rod extends. A second lower bracket is pivotally connected to the second upper bracket using a threaded trunnion through which the threaded rod also extends. The brackets are tapered for strength. The first and second lower brackets are pivotally connected to a base having an enclosed keyhole orifice for storage of the jack assembly. At least one strengthening flange is formed in both the first and second lower bracket. | 2008-11-06 |
20080272350 | Device for Conduiting and Piping and a Shuttle - The present invention relates to an apparatus for conduiting and piping, comprising (1) a device to produce negative pressure, and (2) a shuttle, comprising a body, to link a conducting wire on its rear end. The present invention also relates to a shuttle for conduiting and piping. | 2008-11-06 |
20080272351 | All-Air Vehicle Lifting Jack - Disclosed is an all-air jack for lifting a vehicle, comprising: a frame assembly; a first bellow at an upper portion of the frame assembly; a second bellow at a lower portion of the frame assembly; an air bellow attachment plate positioned between the first and second bellows; an air supply with a first and second air tube, the first air tube in communication with the first bellows and the second air tube in communication with the second bellows; wherein inflation of the bellows raises the jack to lift the vehicle. The first and second air tubes and air supply are connectable by a 3-way air valve. Preferably, 120 psi of air is used to inflate the bellows. | 2008-11-06 |
20080272352 | Combined Guardrail and Cable Safety Systems - A combined guardrail and cable safety system is disclosed. In one aspect, a safety barrier incorporating the teachings of the present disclosure may include a plurality of cable posts spaced from each other and disposed adjacent to a roadway. At least two cables may be releasably engaged with and supported by the cable posts. The cable posts and the at least two cables may cooperate with each other to prevent a vehicle from leaving the roadway. A plurality of guardrail posts may also spaced from each other and disposed adjacent to the roadway longitudinally spaced from the plurality of cable post. A box beam guardrail beam may be attached to the plurality of guardrail posts. The at least two cables may operably extend from the cable posts to engage respective cable anchor brackets attached to the box beam guardrail beam. | 2008-11-06 |
20080272353 | Apparatus and method for post mount guide - A post mount guide includes a tubular body having a throughhole for non-frictionally freely slidably receiving therethrough an upright support portion of a post mount, at least one pair of mounting panels having each panel positioned 90° from the other and adjacent to one another, the panels extending spaced apart from and connected at one end to the tubular body, wherein the mounting panels of each pair of panels are adapted to resiliently bend and configured to receive and retain a fastener therethrough, and a stop mechanism is included with each pair of panels for stopping the panels from bending beyond a fixed position toward the tubular body. The stop mechanism includes first and second end portions of the adjacent mounting panels, respectively, being configured for reversible abutting engagement with one another upon bending inward to the fixed position toward the tubular body. | 2008-11-06 |
20080272354 | PHASE CHANGE DIODE MEMORY - An integrated circuit having a memory includes a semiconductor line and a phase change element contacting the semiconductor line. The phase change element provides a storage location. A diode junction is formed at the interface between the semiconductor line and the phase change element. | 2008-11-06 |
20080272355 | PHASE CHANGE MEMORY DEVICE AND METHOD FOR FORMING THE SAME - A memory device using a phase change material and a method for forming the same are disclosed. One embodiment of a memory device includes a first insulating layer provided on a substrate and defining an opening; a first conductor including a first portion and a second portion, the first portion provided on a bottom of the opening, the second portion being continuously provided along a sidewall of the opening; a variable resistor connected to the second portion of the first conductor and provided along the sidewall of the opening; and a second conductor provided on the variable resistor. | 2008-11-06 |
20080272356 | FABRICATION OF PHASE CHANGE MEMORY ELEMENT WITH PHASE-CHANGE ELECTRODES USING CONFORMAL DEPOSITION - A phase change memory element with phase change electrodes, and method of making the same. Exemplary embodiments include a phase change bridge, including a bottom contact layer, a first insulating layer disposed on the bottom contact layer, a first phase change region disposed on the bottom contact layer adjacent the first insulating layer, a second phase change region disposed on the bottom contact layer adjacent the first insulating layer, wherein the first insulating layer thermally and electrically isolates the first and second phase change regions, and a third phase change region disposed on each of the first and second phase change regions, each of the third phase change regions isolated from one another by a conductor layer disposed on the first insulating layer. | 2008-11-06 |
20080272357 | Phase Changeable Memory Device Structures - A phase-changeable memory device may include a substrate, an insulating layer on the substrate, first and second electrodes, and a pattern of a phase-changeable material between the first and second electrodes. More particularly, the insulating layer may have a hole therein, and the first electrode may be in the hole in the insulating layer. Moreover, portions of the second electrode may extend beyond an edge of the pattern of phase-changeable material. Related methods are also discussed. | 2008-11-06 |
20080272358 | PHASE CHANGE MEMORY DEVICES AND METHODS FOR FABRICATING THE SAME - Phase change memory devices and methods for manufacturing the same are provided. An exemplary embodiment of a phase change memory device includes a bottom electrode formed over a substrate. A first dielectric layer is formed over the bottom electrode. A heating electrode is formed in the first dielectric layer and partially protrudes over the first dielectric layer, wherein the heating electrode includes an intrinsic portion embedded within the first dielectric layer, a reduced portion stacked over the intrinsic portion, and an oxide spacer surrounding a sidewall of the reduced portion. A phase change material layer is formed over the first dielectric layer and covers the heating electrode, the phase change material layer contacts a top surface of the reduced portion of the heating electrode. A top electrode is formed over the phase change material layer and contacts the phase change material layer. | 2008-11-06 |
20080272359 | PHASE CHANGEABLE MEMORY CELLS - A phase changeable memory cell is disclosed. According to embodiments of the invention, a phase changeable memory cell is formed that has a reduced contact area with one of the electrodes, compared to previously known phase changeable memory cells. This contact area can be a sidewall of one of the electrodes, or a perimeter edge of a contact opening through the electrode. Thus, when the thickness of the electrode is relatively thin, the contact area between the electrode and the phase changeable material pattern is relatively very small. As a result, it is possible to reduce power consumption of the phase changeable memory device and to form reliable and compact phase changeable memory cells. | 2008-11-06 |
20080272360 | PROGRAMMABLE METALLIZATION CELL STRUCTURES INCLUDING AN OXIDE ELECTROLYTE, DEVICES INCLUDING THE STRUCTURE AND METHOD OF FORMING SAME - A microelectronic programmable structure suitable for storing information, a device including the structure and methods of forming and programming the structure are disclosed. The programmable structure generally includes an oxide ion conductor and a plurality of electrodes. Electrical properties of the structure may be altered by applying energy to the structure, and thus information may be stored using the structure. | 2008-11-06 |
20080272361 | High Density Nanotube Devices - Carbon-nanotube-based devices or nanowire-based devices are formed in multiple layers to obtain higher density of such devices. The layers may be all similar such as all carbon-nanotube-based transistors. Or they may be different, such as one layer with nanowire devices and another layer with nanotube devices. Or some layers such as the bottom layer may be based on silicon devices and another layer with nanotube devices. Traditional interconnects and vias may be used to connect layers and electrodes, or nanoscale materials such as nanotubes or nanowires may be used as interconnects or vias. | 2008-11-06 |
20080272362 | ADAPTING SHORT-WAVELENGTH LED'S FOR POLYCHROMATIC, BROADBAND, OR WHITE EMISSION - An adapted LED is provided comprising a short-wavelength LED and a re-emitting semiconductor construction, wherein the re-emitting semiconductor construction comprises at least one potential well not located within a pn junction. The potential well(s) are typically quantum well(s). The adapted LED may be a white or near-white light LED. The re-emitting semiconductor construction may additionally comprise absorbing layers surrounding or closely or immediately adjacent to the potential well(s). In addition, graphic display devices and illumination devices comprising the adapted LED according to the present invention are provided. | 2008-11-06 |
20080272363 | Selectively Conducting Devices, Diode Constructions, Constructions, and Diode Forming Methods - Some embodiments include selectively conducting devices having a first electrode, a second electrode, and dielectric material between the first and second electrodes. The dielectric material may be configured to conduct current from the first electrode to the second electrode when a first voltage is applied across the first electrode and the second electrode. Furthermore, the dielectric material may be configured to inhibit current from flowing from the second electrode to the first electrode when a second voltage having a polarity opposite that of a polarity of the first voltage is applied across the first electrode and the second electrode. The diode material may comprise a plurality of layers of different dielectric materials arranged in order of increasing barrier height. Quantum wells may form at junctions of layers of the plurality responsive to the first voltage. Some embodiments include diode forming methods. | 2008-11-06 |
20080272364 | INSULATING FILM AND ELECTRONIC DEVICE - An insulating film comprising: a first barrier layer; a well layer provided; and a second barrier layer is proposed. The first barrier layer consists of a material having a first bandgap and a first relative permittivity. The well layer is provided on the first barrier layer, and consists of a material having a second bandgap smaller than the first bandgap and having a second relative permittivity larger than first relative permittivity. Discrete energy levels are formed in the well layer by a quantum effect. The second barrier layer is provided on the well layer, and consists of a material having a third bandgap larger than the second bandgap and having a third relative permittivity smaller than second relative permittivity. Alternatively, an insulating film comprising: n (n being an integer larger than 2) layers of barrier layer consisting of a material having a bandgap larger than a first bandgap and having a relative permittivity smaller than a first relative permittivity; and (n−1) layers of well layers consisting of a material having a bandgap smaller than the first bandgap and having a relative permittivity larger than the first relative permittivity, discrete energy levels being formed in the well layer by a quantum effect, each of the barrier layers and each of the well layers being stacked by turns, and discrete energy levels being formed in each of the well layers by a quantum effect, is provided. Alternatively, an insulating film having a lattice mismatch within a range of plus-or-minus 1.5% to the substrate, and further having a high barrier and a large permittivity is provided. | 2008-11-06 |
20080272365 | INSULATING FILM AND ELECTRONIC DEVICE - An insulating film comprising: a first barrier layer; a well layer provided; and a second barrier layer is proposed. The first barrier layer consists of a material having a first bandgap and a first relative permittivity. The well layer is provided on the first barrier layer, and consists of a material having a second bandgap smaller than the first bandgap and having a second relative permittivity larger than first relative permittivity. Discrete energy levels are formed in the well layer by a quantum effect. The second barrier layer is provided on the well layer, and consists of a material having a third bandgap larger than the second bandgap and having a third relative permittivity smaller than second relative permittivity. Alternatively, an insulating film comprising: n (n being an integer larger than 2) layers of barrier layer consisting of a material having a bandgap larger than a first bandgap and having a relative permittivity smaller than a first relative permittivity; and (n−1) layers of well layers consisting of a material having a bandgap smaller than the first bandgap and having a relative permittivity larger than the first relative permittivity, discrete energy levels being formed in the well layer by a quantum effect, each of the barrier layers and each of the well layers being stacked by turns, and discrete energy levels being formed in each of the well layers by a quantum effect, is provided. Alternatively, an insulating film having a lattice mismatch within a range of plus-or-minus 1.5% to the substrate, and further having a high barrier and a large permittivity is provided. | 2008-11-06 |
20080272366 | Field effect transistor having germanium nanorod and method of manufacturing the same - A field effect transistor having at least one Ge nanorod and a method of manufacturing the field effect transistor are provided. The field effect transistor may include a gate oxide layer formed on a silicon substrate, at least one nanorod embedded in the gate oxide layer having both ends thereof exposed, a source electrode and a drain electrode connected to opposite sides of the at least one Ge nanorod, and a gate electrode formed on the gate oxide layer between the source electrode and the drain electrode. | 2008-11-06 |
20080272367 | LIGHT-EMITTING DEVICE HAVING IMPROVED LIGHT OUTPUT - A light-emitting LED device has one or more light-emitting LED elements, including first and second spaced-apart electrodes with one or more light-emitting layers formed there-between, wherein at least one of the electrodes is a transparent electrode. Also included are a first transparent encapsulating layer having a first optical index formed over the transparent electrode opposite the light-emitting layer; a light-scattering layer formed over the first transparent encapsulating layer opposite the transparent electrode; and a second transparent encapsulating layer, having a second optical index lower than the first optical index, formed over the light-scattering layer. | 2008-11-06 |
20080272368 | Extended Redistribution Layers Bumped Wafer - A semiconductor device is manufactured by, first, providing a wafer, designated with a saw street guide, and having a bond pad formed on an active surface of the wafer. The wafer is taped with a dicing tape. The wafer is singulated along the saw street guide into a plurality of dies having a plurality of gaps between each of the plurality of dies. The dicing tape is stretched to expand the plurality of gaps to a predetermined distance. An organic material is deposited into each of the plurality of gaps. A top surface of the organic material is substantially coplanar with a top surface of a first die of the plurality of dies. A redistribution layer is patterned over a portion of the organic material. An under bump metallization (UBM) is deposited over the organic material in electrical communication, through the redistribution layer, with the bond pad. | 2008-11-06 |
20080272369 | Organic electronic device - An organic electronic device. The device includes a first electrode to inject or extract hole, the first electrode including a conductive layer and an n-type organic compound layer disposed on the conductive layer, a second electrode to inject or extract electron, a p-type organic compound layer disposed between the n-type organic compound layer and the second electrode. The p-type organic compound layer forms an NP junction between the n-type organic compound layer and the p-type organic compound layer. The energy difference between a lowest unoccupied molecular orbital (LUMO) energy of the n-type organic compound layer and a Fermi energy of the conductive layer is about 2 eV or less, and the energy difference between the LUMO energy of the n-type organic compound layer and a highest unoccupied molecular orbital (HOMO) energy of the p-type organic compound layer is about 1 eV or less. | 2008-11-06 |
20080272370 | FIELD-EFFECT TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME - A method for manufacturing a field-effect transistor includes the steps of forming a source electrode and a drain electrode each containing hydrogen or deuterium; forming an oxide semiconductor layer in which the electrical resistance is decreased if hydrogen or deuterium is added; and, causing hydrogen or deuterium to diffuse from the source electrode and the drain electrode to the oxide semiconductor layer. | 2008-11-06 |
20080272371 | RESISTANCE-BASED ETCH DEPTH DETERMINATION FOR SGT TECHNOLOGY - A method for determining the depth etch, a method of forming a shielded gate trench (SGT) structure and a semiconductor device wafer are disclosed. A material layer is formed over part of a substrate having a trench. The material fills the trench. A resist mask is placed over a test portion of the material layer thereby defining a test structure that lies underneath the resist mask. The resist mask does not cover the trench. The material is isotropically etched and a signal related to a resistance change of the test structure is measured. A lateral undercut D | 2008-11-06 |
20080272372 | Test structures for stacking dies having through-silicon vias - A semiconductor die including a test structure is provided. The semiconductor die includes a loop-back formed on a surface of the semiconductor die. The loop-back structure includes a first bonding pad on a first surface; and a second bonding pad on the first surface, wherein the first and the second bonding pads are electrically disconnected from integrated circuit devices in the semiconductor die. A conductive feature electrically shorts the first and the second bonding pads. An additional die including an interconnect structure is bonded onto the semiconductor die. The interconnect structure includes a third and a fourth bonding pad bonded to the first and the second bonding pads, respectively. Through-wafer vias in the additional die are further connected to the third and fourth bonding pads. | 2008-11-06 |
20080272373 | Flash Memory Device Having Resistivity Measurement Pattern and Method of Forming the Same - A flash memory device has a resistivity measurement pattern and method of forming the same. A trench is formed in an isolation film in a Self-Aligned Floating Gate (SAFG) scheme. The trench is buried to form a resistivity measurement floating gate. This allows the resistivity of the floating gate to be measured even in the SAFG scheme. Contacts for resistivity measurement are directly connected to the resistivity measurement floating gate. Therefore, variation in resistivity measurement values, which is incurred by the parasitic interface, can be reduced. | 2008-11-06 |
20080272374 | SEMICONDUCTOR DISPLAY DEVICE - To provide a semiconductor display device capable of displaying an image having clarity and a desired color, even when the speed of deterioration of an EL layer is influenced by its environment. Display pixels and sensor pixels of an EL display each have an EL element, and the sensor pixels each have a diode. The luminance of the EL elements of each in the display pixels is controlled in accordance with the amount of electric current flowing in each of the diodes. | 2008-11-06 |
20080272375 | THIN FILM TRANSISTOR ARRAY PANEL, DISPLAY DEVICE INCLUDING THE PANEL, AND METHOD FOR MANUFACTURING THE DISPLAY DEVICE - A thin film transistor array panel, a display device including the thin film transistor array panel, and a method for manufacturing the display device. The thin film transistor array panel includes a substrate having first and second surfaces, a first thin film form formed on the first surface and including a first electrode, and a second thin film form formed on the second surface and including a second electrode, to thereby improve the viewing angle and contrast ratio of the display device. | 2008-11-06 |
20080272376 | Semiconductor Device and Method of Manufacturing the Same - In a semiconductor device having a substrate which has a metal surface, an insulating film which is formed on the substrate having the metal surface, and a pixel unit which is formed on the insulating film; the pixel unit includes a TFT, and wiring lines connected with the TFT, and a storage capacitor is constituted by the substrate ( | 2008-11-06 |
20080272377 | Gallium Nitride Substrate and Gallium Nitride Film Deposition Method - Affords high-carrier-concentration, low-cracking-incidence gallium nitride substrates and methods of forming gallium nitride films. A gallium nitride film | 2008-11-06 |
20080272378 | METHOD FOR FORMING A NITRIDE SEMICONDUCTOR LAYER AND METHOD FOR SEPARATING THE NITRIDE SEMICONDUCTOR LAYER FROM THE SUBSTRATE - There is provided a method of forming a nitride semiconductor layer, including the steps of firstly providing a substrate on which a patterned epitaxy layer with a pier structure is formed. A protective layer is then formed on the patterned epitaxy layer, exposing a top surface of the pier structure. Next, a nitride semiconductor layer is formed over the patterned epitaxy layer connected to the nitride semiconductor layer through the pier structure, wherein the nitride semiconductor layer, the pier structure, and the patterned epitaxy layer together form a space exposing a bottom surface of the nitride semiconductor layer. Thereafter, a weakening process is performed to remove a portion of the bottom surface of the nitride semiconductor layer and to weaken a connection point between the top surface of the pier structure and the nitride semiconductor layer. Finally, the substrate is separated from the nitride semiconductor layer through the connection point. | 2008-11-06 |
20080272379 | DISPLAY APPARATUS, METHOD AND LIGHT SOURCE - In accordance with the invention, a display apparatus including a light source is provided, the light source having at least one superluminescent light emitting diode (SLED), the apparatus further having at least one light modulating device arranged in a beam path of a light beam emitted by the light source and operable to emit influenced light upon incidence of the light beam, the light modulating device being operatively connected to an electronic control, the display apparatus further having a projection optics arranged in a beam path of the influenced light. | 2008-11-06 |
20080272380 | Shield Member in LED Apparatus - An LED apparatus for illumination toward a preferential side in a downward and outward direction including a shield member in the form of a layer positioned over LED packages and secondary lens members. The shield member has a shield portion and a substantially planar non-shield portion thereabout. In preferred embodiments, the shield portion extends over a part of the lens portion of the secondary lens member. A cover preferably secures the shield member with respect to the secondary lens member, the primary lens and the LED package, the shield member preferably being sandwiched between the cover and the flange of the secondary lens member. | 2008-11-06 |
20080272381 | ORGANIC LIGHT EMITTING DISPLAY WITH SINGLE CRYSTALLINE SILICON TFT AND METHOD OF FABRICATING THE SAME - Provided is an organic light emitting display, in which a semiconductor circuit unit of 2T-1C structure including a switching transistor and a driving transistor formed of single crystalline silicon is formed on a plastic substrate. A method of fabricating the single crystalline silicon includes: growing a single crystalline silicon layer to a predetermined thickness on a crystal growth plate; depositing a buffer layer on the single crystalline silicon layer; forming a partition layer at a predetermined depth in the single crystalline silicon layer by, e.g., implanting hydrogen ions in the single crystalline silicon layer from an upper portion of an insulating layer; attaching a substrate to the buffer layer; and releasing the partition layer of the single crystalline silicon layer by heating the partition layer from the crystal growth plate to obtain a single crystalline silicon layer of a predetermined thickness on the substrate. | 2008-11-06 |
20080272382 | Light emitting device and method of manufacturing the same - A light emitting device and a method of manufacturing the same are disclosed. The light emitting device includes a buffer layer formed on a substrate, a nitride semiconductor layer including a first semiconductor layer, an active layer, and a second semiconductor layer, which are sequentially stacked on the buffer layer, a portion of the first semiconductor layer being exposed to the outside by performing mesa etching from the second semiconductor layer to the portion of the first semiconductor layer, and at least one nanocone formed on the second semiconductor layer. | 2008-11-06 |
20080272383 | SIDE MOUNTABLE SEMICONDUCTOR LIGHT EMITTING DEVICE PACKAGES, PANELS AND METHODS OF FORMING THE SAME - Side-mountable semiconductor light emitting device packages include an electrically insulating substrate having a front face and a back face and a side face extending therebetween. The side face is configured for mounting on an underlying surface. An electrically conductive contact is provided proximate an edge of the substrate on the back face of the substrate and/or on a recessed region on the side face of the substrate. The contact is positioned to be positioned proximate an electrical connection region of the underlying surface when the semiconductor light emitting device package is side mounted on the underlying surface. A conductive trace extends along the front face of the substrate and is electrically connected to the contact. A semiconductor light emitting device is mounted on the front face of the substrate and electrically connected to the conductive trace. | 2008-11-06 |
20080272384 | Light emitting diode - A light emitting diode (LED) having disposed on a top of a package an optical mechanism comprised of multiple grooves or dots to promote optical use efficiency of the packaging through light condensing effects produced by the optical mechanism to collect a light source inside the LED to emit in a given direction through the optical mechanism for effectively reducing discriminating escape of the light source in both right and left sides of the given direction thus to significantly upgrade general luminance performance of the LED. | 2008-11-06 |
20080272385 | Light emitting diode - A light emitting diode includes a base, a light emitting chip, and a wavelength converting layer. The base is formed with a recessed portion that has a bottom wall surface, and a sidewall surface extending upwardly from the bottom wall surface and cooperating with the bottom wall surface to define a receiving space. The light emitting chip is provided on the bottom wall surface of the receiving space, and has a top chip surface disposed below a top surface of the base, and a peripheral chip surface extending downwardly from the top chip surface and being substantially parallel to and forming a gap with the side wall surface of the recessed portion. The wavelength converting layer is filled in the receiving space in the recessed portion so as to cover the top chip surface and the peripheral chip surface of the light emitting chip. | 2008-11-06 |
20080272386 | Light Emitting Devices for Light Conversion and Methods and Semiconductor Chips for Fabricating the Same - Broad spectrum light emitting devices and methods and semiconductor chips for fabricating such devices include a light emitting element, such as a diode or laser, which emits light in a predefined range of frequencies. The light emitting element includes a shaped substrate suitable for light extraction through the substrate and a cavity in the substrate proximate the light emitting element. For example, a trench adjacent the light emitting element may be provided. The cavity/trench is configured to contain light conversion material such that light extracted from sidewalls of the cavity/trench passes through the light conversion material contained in the cavity/trench. Methods of fabricating such devices and/or chips are also provided. | 2008-11-06 |
20080272387 | ADAPTING SHORT-WAVELENGTH LED'S FOR POLYCHROMATIC, BROADBAND, OR "WHITE" EMISSION - An adapted LED is provided comprising a short-wavelength LED and a re-emitting semiconductor construction, wherein the re-emitting semiconductor construction comprises at least one potential well not located within a pn junction. The potential well(s) are typically quantum well(s). The adapted LED may be a white or near-white light LED. The re-emitting semiconductor construction may additionally comprise absorbing layers surrounding or closely or immediately adjacent to the potential well(s). In addition, graphic display devices and illumination devices comprising the adapted LED according to the present invention are provided. | 2008-11-06 |
20080272388 | Method for fabricating thin film pattern, device and fabricating method therefor, method for fabricating liquid crystal display, liquid crystal display, method for fabricating active matrix substrate, electro-optical apparatus, and electrical apparatus - A method for fabricating a thin film pattern on a substrate, includes the steps of: forming a concave part on the substrate that conforms to the thin film pattern; and applying a function liquid into the concave part. | 2008-11-06 |
20080272389 | Infrared Source - A sealed infrared radiation source includes an emitter membrane stimulated by an electrical current conducted through the membrane, which acts like an electrical conductor, wherein the membrane is mounted between first and second housing parts, at least one being transparent in the IR range, each housing part defining a cavity between the membrane and the respective housing part of each side of the membrane. The housing parts are at least partially electrical conductive, and a first of the housing parts is electrically coupled to a first end of the electrical conductor and insulated from the second end of the electrical conductor, the second housing part being electrically coupled to a second end of the electrical conductor and being insulated from the first end of the electrical conductor, thus allowing a current applied from the first housing part to the second housing part to pass through and heat the membrane. | 2008-11-06 |
20080272390 | LED APPARATUS - An LED apparatus comprises a base, an LED device, an electrode member and an insulation layer. The base has a bevel side to be embedded with a corresponding receiving base for electrical conduction of an electrode (e.g., a negative electrode). The LED device is placed on an upper surface of the base. The electrode member comprising a metal rod and an electrode plate is connected to the LED device for electrical conduction of an electrode (e.g., a positive electrode). The insulation layer is placed between the electrode plate of the electrode member and the base for electrical insulation. The bevel side of the base can be modified as desired, and is generally less than 10 degrees, and preferably less than 5 degrees, and may be less than 3 degrees if needed. | 2008-11-06 |
20080272391 | SILICON COMPATIBLE INTEGRATED LIGHT COMMUNICATOR - Various methods and devices are implemented using efficient silicon compatible integrated light communicators. According to one embodiment of the present invention, a semiconductor device is implemented for communicating light, such as by detecting, modulating or emitting light. The device has a silicon-seeding location, an insulator layer and a second layer on the insulator layer. The second layer includes a silicon-on-insulator region and an active region surrounded by the silicon-on-insulator region and connected to the silicon-seeding location. The active region includes a single-crystalline germanium-based material that extends from the silicon-seeding location through a passageway with a cross-sectional area that is sufficiently small to mitigate crystalline growth defects. The single-crystalline germanium-based material is physically coupled to the insulating layer such that the insulating layer introduces a high tensile strain to the germanium-based material, and a more specific aspect is directed to an SOI implementation. | 2008-11-06 |
20080272392 | Nitride crystal, nitride crystal substrate, epilayer-containing nitride crystal substrate, semiconductor device and method of manufacturing the same - A nitride crystal is characterized in that, in connection with plane spacing of arbitrary specific parallel crystal lattice planes of the nitride crystal obtained from X-ray diffraction measurement performed with variation of X-ray penetration depth from a surface of the crystal while X-ray diffraction conditions of the specific parallel crystal lattice planes are satisfied, a uniform distortion at a surface layer of the crystal represented by a value of |d | 2008-11-06 |
20080272393 | SEMICONDUCTOR DEVICE HAVING STRAIN-INDUCING SUBSTRATE AND FABRICATION METHODS THEREOF - A semiconductor device includes a semiconductor substrate that includes a substrate layer having a first composition of semiconductor material. A source region, drain region, and a channel region are formed in the substrate, with the drain region spaced apart from the source region and the gate region abutting the channel region. The channel region includes a channel layer having a second composition of semiconductor material. Additionally, the substrate layer abuts the channel layer and applies a stress to the channel region along a boundary between the substrate layer and the channel layer. | 2008-11-06 |
20080272394 | JUNCTION FIELD EFFECT TRANSISTORS IN GERMANIUM AND SILICON-GERMANIUM ALLOYS AND METHOD FOR MAKING AND USING - Junction field effect transistors (JFET) formed in substrates containing germanium. JFETs having polycrystalline semiconductor surface contacts with self-aligned silicide formed thereon and self-aligned source, drain and gate regions formed by thermal drive-in of impurities from surface contacts into the substrate, and implanted link regions. Others have a polycrystalline semiconductor gate surface contact and metal back gate, source and drain contacts and a metal surface contact to the gate surface contact with implanted source and drains and a self-aligned gate region. JFETs having a polycrystalline semiconductor gate surface contact and metal back gate, source and drain contacts and a metal surface contact to the gate surface contact with implanted source and drains and a self-aligned gate region and silicide formed on the top of the source, drain and back gate contacts and on top of the gate polycrystalline semiconductor gate contact to which the metal surface contacts make electrical contact. | 2008-11-06 |
20080272395 | ENHANCED HOLE MOBILITY P-TYPE JFET AND FABRICATION METHOD THEREFOR - Enhanced hole mobility p-type JFET and fabrication methods. A p-type junction field effect transistor including a substrate of n-type, a source region and a drain region formed in the substrate; wherein the source region and the drain region are p-type doped and at least one of the source region and the drain region is formed with silicon-germanium compound (Si | 2008-11-06 |
20080272396 | Simplified Method of Producing an Epitaxially Grown Structure - Method to produce a structure consisting of depositing a material by columnar epitaxy on a crystalline face of a substrate ( | 2008-11-06 |
20080272397 | SEMICONDUCTOR DEVICE WITH MODULATED FIELD ELEMENT - The current invention introduces a modulated field element incorporated into the semiconductor device outside the controlling electrode and active areas. This element changes its conductivity and/or dielectric properties depending on the electrical potentials of the interface or interfaces between the modulated field element and the semiconductor device and/or incident electromagnetic radiation. The element is either connected to only one terminal of the semiconductor device, or not connected to any terminal of a semiconductor device nor to its active area(s). Such an element can be used as modulated field plate, or a part of a field plate, as a passivation layer or its part, as a guard ring or its part, as a smart field or charge control element or its part, as a feedback element or its part, as a sensor element or its part, as an additional electrode or its part, as an electromagnetic signal path or its part, and/or for any other functions optimizing or modernizing device performance. | 2008-11-06 |
20080272398 | CONDUCTIVE SPACERS FOR SEMICONDUCTOR DEVICES AND METHODS OF FORMING - A method of forming a conductive spacer on a semiconductor device. The method includes depositing a polysilicon layer on the semiconductor device, selectively implanting dopant ions in the polysilicon layer on a first side of a transistor region of the semiconductor device to define a conductive spacer area, and removing the polysilicon layer except for the conductive spacer area. Optionally, a silicidation process can be performed on the conductive spacer area so that the conductive spacer is made up of metal silicide. | 2008-11-06 |
20080272399 | PIXEL SENSOR CELL FOR COLLECTING ELECTRONS AND HOLES - The present invention is a pixel sensor cell and method of making the same. The pixel sensor cell approximately doubles the available signal for a given quanta of light. The device of the present invention utilizes the holes produced by impinging photons in a pixel sensor cell circuit. A pixel sensor cell having reduced complexity includes an n-type collection well region formed beneath a surface of a substrate for collecting electrons generated by electromagnetic radiation impinging on the pixel sensor cell and a p-type collection well region formed beneath the surface of the substrate for collecting holes generated by the impinging photons. A circuit structure having a first input is coupled to the n-type collection well region and a second input is coupled to the p-type collection well region, wherein an output signal of the pixel sensor cell is the magnitude of the difference of a signal of the first input and a signal of the second input. | 2008-11-06 |
20080272400 | PIXEL SENSOR CELL FOR COLLECTING ELECTRONS AND HOLES - The present invention is a pixel sensor cell and method of making the same. The pixel sensor cell approximately doubles the available signal for a given quanta of light. The device of the present invention utilizes the holes produced by impinging photons in a pixel sensor cell circuit. A pixel sensor cell having reduced complexity includes an n-type collection well region formed beneath a surface of a substrate for collecting electrons generated by electromagnetic radiation impinging on the pixel sensor cell and a p-type collection well region formed beneath the surface of the substrate for collecting holes generated by the impinging photons. A circuit structure having a first input is coupled to the n-type collection well region and a second input is coupled to the p-type collection well region, wherein an output signal of the pixel sensor cell is the magnitude of the difference of a signal of the first input and a signal of the second input. | 2008-11-06 |
20080272401 | Inverted Junction Field Effect Transistor and Method of Forming Thereof - A junction field effect transistor includes a substrate and a well region on the substrate. A channel region lies in the well region. A source region lies in the channel region. A drain region lies in the channel region and apart from the source region. A gate region is isolated from the source, drain, and channel regions. The gate region is in contact with a portion of the well region. | 2008-11-06 |
20080272402 | JFET Device With Improved Off-State Leakage Current and Method of Fabrication - A junction field effect transistor comprises a semiconductor substrate. A first impurity region of a first conductivity type is formed in the substrate. A second impurity region of the first conductivity type is formed in the substrate and spaced apart from the first impurity region. A channel region of the first conductivity type is formed between the first and second impurity regions. A gate region of a second conductivity type is formed in the substrate between the first and second impurity regions. A gap region is formed in the substrate between the gate region and the first impurity region such that the first impurity region is spaced apart from the gate region. | 2008-11-06 |
20080272403 | JFET Device With Virtual Source and Drain Link Regions and Method of Fabrication - A junction field effect transistor comprises a semiconductor substrate. A source region of a first conductivity type is formed in the substrate. A drain region of the first conductivity type is formed in the substrate. A channel region of the first conductivity type is formed in the substrate. A gate region of a second conductivity type is formed in the substrate between the source and drain regions. A first virtual link region is formed in the substrate between the gate region and either the source region or the drain region. A dielectric material overlays the first virtual link region. A first electrode region overlays the dielectric material. | 2008-11-06 |
20080272404 | METHOD FOR APPLYING A STRESS LAYER TO A SEMICONDUCTOR DEVICE AND DEVICE FORMED THEREFROM - A semiconductor device includes a substrate of semiconductor material. A source region, a drain region, and a conducting region of the semiconductor device are formed in the substrate and doped with a first type of impurities. The conducting region is operable to conduct current between the drain region and the source region when the semiconductor device is operating in an on state. A gate region is also formed in the substrate and doped with a second type of impurities. The gate region abuts a channel region of the conducting region. A stress layer is deposited on at least a portion of the conducting region. The stress layer applies a stress to the conducting region along a boundary of the conducting region that strains at least a portion of the conducting region. | 2008-11-06 |
20080272405 | Content addressable memory cell including a junction field effect transistor - A semiconductor device that includes a memory cell having a junction field effect transistor (JFET) used to form a content addressable memory (CAM) cell is disclosed. The JFET may include a data storage region disposed between a first and second insulating region. The data storage region provides a first threshold voltage to the JFET when storing a first data value and provides a second threshold voltage to the JFET when storing a second data value. The memory cell is a dynamic random access memory (DRAM) cell and can be used to form a CAM cell. The CAM cell may be a ternary CAM cell formed with as few as two JFETs. | 2008-11-06 |
20080272406 | DOUBLE GATE JFET WITH REDUCED AREA CONSUMPTION AND FABRICATION METHOD THEREFOR - Double gate JFET with reduced area consumption and fabrication method therefore. Double-gate semiconductor device including a substrate having a shallow trench isolator region comprising a first STI and a second STI, a channel region having a first and second channel edges, the channel region formed in the substrate and disposed between and in contact with the first STI and the second STI at the first and second channel edge. The first STI has a first cavity at the first channel edge, and the second STI has a second cavity at the second channel edge. The device further includes a gate electrode region comprising conductive material filling at least one of the first and second cavities. At least one of the first and second cavities is physically configured to provide electrical coupling of the gate electrode region to a back-gate P-N junction. | 2008-11-06 |
20080272407 | SEMICONDUCTOR DEVICE HAVING A FIN STRUCTURE AND FABRICATION METHOD THEREOF - A semiconductor device includes a silicon on insulator (SOI) substrate, comprising an insulation layer formed on semiconductor material, and a fin structure. The fin structure is formed of semiconductor material and extends from the SOI substrate. Additionally, the fin structure includes a source region, a drain region, a channel region, and a gate region. The source region, drain region, and the channel region are doped with a first type of impurities, and the gate region is doped with a second type of impurities. The gate region abuts the channel region along at least one boundary, and the channel region is operable to conduct current between the drain region and the source region when the semiconductor device is operating in an on state. | 2008-11-06 |
20080272408 | ACTIVE AREA JUNCTION ISOLATION STRUCTURE AND JUNCTION ISOLATED TRANSISTORS INCLUDING IGFET, JFET AND MOS TRANSISTORS AND METHOD FOR MAKING - Integrated active area isolation structure for transistor to replace larger and more expensive Shallow Trench Isolation or field oxide to isolate transistors. Multiple well implant is formed with PN junctions between wells and with surface contacts to substrate and wells so bias voltages applied to reverse bias PN junctions to isolate active areas. Insulating layer is formed on top surface of substrate and interconnect channels are etched in insulating layer which do not go down to the semiconductor substrate. Contact openings for surface contacts to wells and substrate are etched in insulating layer down to semiconductor layer. Doped silicon or metal is formed in contact openings for surface contacts and to form interconnects in channels. Silicide may be formed on top of polycrystalline silicon contacts and interconnect lines to lower resistivity. Any JFET or MOS transistor may be integrated into the resulting junction isolated active area. | 2008-11-06 |
20080272409 | JFET Having a Step Channel Doping Profile and Method of Fabrication - A junction field effect transistor comprises a semiconductor substrate, a source region formed in the substrate, a drain region formed in the substrate and spaced apart from the source region, and a gate region formed in the substrate. The transistor further comprises a first channel region formed in the substrate and spaced apart from the gate region, and a second channel region formed in the substrate and between the first channel region and the gate region. The second channel region has a higher concentration of doped impurities than the first channel region. | 2008-11-06 |
20080272410 | Self-Aligned Spacer Contact - A metal-oxide-semiconductor field-effect transistor (MOSFET) having self-aligned spacer contacts is provided. In accordance with embodiments of the present invention, a transistor, having a gate electrode and source/drain regions formed on opposing sides of the gate electrode, is covered with a first dielectric layer. A first contact opening is formed in the first dielectric layer to expose at least a portion of one of the source/drain regions. A second dielectric layer is formed over the first dielectric layer. Thereafter, an inter-layer dielectric layer is formed over the second dielectric layer and a second contact opening is formed through the inter-layer dielectric layer. In an embodiment, an etch-back process may be performed on the second dielectric layer prior to forming the inter-layer dielectric layer. | 2008-11-06 |
20080272411 | SEMICONDUCTOR DEVICE WITH MULTIPLE TENSILE STRESSOR LAYERS AND METHOD - A semiconductor device has at least two tensile stressor layers that are cured with UV radiation. A second tensile stressor layer is formed after a first stressor layer. In some examples, the tensile stressor layers include silicon nitride and hydrogen. In some examples, the second tensile stressor layer has a greater shrinkage percentage due to the curing than the first tensile stressor layer. In one form, the second tensile stressor layer after the curing exerts a greater tensile stress than the first tensile stressor layer. The tensile stressors layers are utilized to improve carrier mobility in an N-channel transistor and thus enhance transistor performance. In one form a single group of overlying tensile stressor layers is provided with each layer being increasingly thicker and having increasingly more hydrogen prior to being cured. In other embodiments multiple overlying groups are formed, each group having a similar repeating depth and hydrogen profile. | 2008-11-06 |
20080272412 | METHOD AND STRUCTURE TO REDUCE CONTACT RESISTANCE ON THIN SILICON-ON-INSULATOR DEVICE - A method (and system) of reducing contact resistance on a silicon-on-insulator device, including controlling a silicide depth in a source-drain region of the device. | 2008-11-06 |
20080272413 | Light-Sensitive Component - In order to detect light with in particular a high blue component, the inversion zone and the space charge zone of a CMOS-like structure are used. In conjunction with an at least partly transparent gate electrode, in particular a transparent conductive oxide or a patterned gate electrode, it becomes possible to absorb the short-wave component of incident light within the inversion zone and to reliably conduct away the generated charge carrier pairs to first and second contacts. During operation, a control voltage is applied to the gate electrode with a magnitude that generates a continuous inversion zone below the optionally patterned gate electrode. | 2008-11-06 |
20080272414 | Image sensing cell, device, method of operation, and method of manufacture - An image sensing device can include one or more image sensing cells. Each image sensing cell can have a charge store element formed from a semiconductor material doped to a first conductivity type. The charge store element can be in contact with a channel region formed from a semiconductor material doped to a second conductivity type. The charge store element can have one or more surfaces for exposure to an image source. Each image sensing cell can also include a charge electrode formed from a semiconductor material doped to the first conductivity type that is separated from the charge store element by a semiconductor material doped to the second conductivity type. In addition, one or more current detection electrodes can be included in each image sensing cell. A current detection electrode can pass a current flowing through the channel region in a read operation. Such an image sensing cell can be compact in size and/or have a large image sensing area. | 2008-11-06 |
20080272415 | Solid-state imaging device - A solid-state imaging device includes a photoelectric conversion section which is provided for each pixel and which converts light incident on a first surface of a substrate into signal charges, a circuit region which reads signal charges accumulated by the photoelectric conversion section, a multilayer film including an insulating film and a wiring film, the multilayer film being disposed on a second surface of the substrate opposite to the first surface, and a transmission-preventing film disposed at least between the wiring film in the multilayer film and the substrate. | 2008-11-06 |
20080272416 | Image sensor and method of manufacturing the same - Provided is an image sensor and method of manufacturing the same. The image sensor can include a semiconductor substrate, a metal interconnection layer, an inorganic layer, lens seed patterns, and microlenses. The semiconductor substrate can include unit pixels. The metal interconnection layer can be disposed on the semiconductor substrate to provide signal and poser connections to the unit pixels. The inorganic layer can be disposed on the metal interconnection layer. The lens seed patterns are selectively disposed on the inorganic layer and are formed of an organic material. The microlenses are formed on the lens seed patterns. | 2008-11-06 |
20080272417 | Image Sensor and Method for Manufacturing the Same - An image sensor and method for manufacturing the same are provided. The image sensor can include an isolation area and active area on a substrate; a photodiode area and a transistor area provided on the active area; a gate insulating layer on the transistor area; and a gate electrode provided on the gate insulating layer and a portion of the photodiode area by extending over a portion of the isolation area between the transistor area and the photodiode area. In one embodiment, the gate electrode can be a gate electrode of a drive transistor of a 3-T type image sensor. | 2008-11-06 |
20080272418 | Semiconductor component comprising a buried mirror - A method for forming a buried mirror in a semiconductor component includes the steps of forming a structure comprising a semiconductor layer laid on an insulating layer covering a substrate; forming one or several openings in the semiconductor layer emerging at the surface of the insulating layer; eliminating a portion of the insulating layer, whereby a recess is formed; forming a second thin insulating layer against the wall of the recess; and forming a metal layer in the recess against the second insulating layer. | 2008-11-06 |
20080272419 | Solid-state imaging device - A solid-state imaging device includes a photoelectric conversion section which is provided for each pixel and which converts light incident on a first surface of a substrate into signal charges, a circuit region which reads signal charges accumulated by the photoelectric conversion section, a multilayer film including an insulating film and a wiring film, the multilayer film being disposed on a second surface of the substrate opposite to the first surface, and a transmission-preventing film disposed at least between the wiring film in the multilayer film and the substrate. | 2008-11-06 |
20080272420 | CMOS image sensor and manufacturing method thereof - A gate insulation layer with a high dielectric constant for a CMOS image sensor formed by a damascene process. A silicide layer on a gate electrode layer is formed in both a pixel region and a peripheral circuit region, and a silicide layer on a source/drain region is formed only in a peripheral circuit. | 2008-11-06 |